JPS59117323A - Resistor module - Google Patents

Abstract

PURPOSE:To obtain a resistor module by which a signal line is terminated effectively by connecting a power supply to a terminal connected in common to the resistor module via a semiconductor element. CONSTITUTION:A logical circuit 1 is constituted by using ECL elements and a termination resistor R1 matched to a characteristic impedance Z0 of a signal line 4 is used to prevent the generation of a delay at high speed switching by the reflection of the signal line 4. Since a power supply VEE is connected to a common connecting terminal 9 of the resistor R1 via a Zener diode 7 and a bypass capacitor 8, the relation of Z0=R1 is set without applying excessive load to the ECL gate 1. Thus, the resistor module possible for high density mounting is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resistor module that is a multiplex circuit component, and more particularly to a resistor module that constitutes a terminating resistor for terminating a signal line with a resistance value equal to its characteristic impedance.

ECLr <, Emitter Coupled L
When configuring a logic circuit using Logic) elements, a terminating resistor that matches the characteristic impedance of the signal line is used to prevent delays during high-speed switching due to reflections on the signal line.

FIG. 1 is a connection diagram showing an example of a conventional circuit of this type, in which (1) is an ECL gate, (2) is an IC package,
(3) is a resistance module, (41c signal line, VEE
, V7T has separate power supply and ZOU signal line (4)
The characteristic impedance of R1 is the resistance value of each resistor of the resistor module (3). Since Zo=R□, no reflection occurs at the end of the signal line (4). Normally, l VEEI > l VTTI K is set. however,
Fig. 1 Tehi No. 100 line (connecting lines unrelated to the termination of 41 are not shown).

'If the power supply VEE and VTT are of a common military type and have a common internal circuit, the ECL fi+, signal line (4), and resistor module (
A closed circuit passing through 31 is constructed, and in addition to the signal current (VEE
The extra current determined by VTr)/R1 becomes a load on the ECL gate fi+, which causes problems with the gate drive ability, and causes extra heat generation due to the gravitational loss of (VER-VTT)/R□. . Therefore, there is a drawback that the power supply VTT must be provided separately from the power supply VEE in order to avoid such a problem.

FIG. 2 is a connection diagram showing another example of the conventional circuit, in which the same symbols as in FIG. 1 indicate the same parts, (5) is a resistance module,
R2 and R3 are the resistance values of the respective resistors.

In the circuit shown in FIG. 2, impedance matching is performed by setting 1/Zo=1/R2+MR3. As shown in Figure 2, this circuit requires a ground terminal for the resistor module (5), which increases the external dimensions of the resistor module and further increases the voltage
C has the disadvantage that high-density packaging is hindered due to an increase in the number of terminals.

This invention was made to eliminate the above-mentioned drawbacks of the conventional ones, and it is possible to effectively terminate a signal line without using a separate power supply or increasing the number of resistor module bins. The purpose is to provide a resistance module.

Therefore, in this invention, the power supply of the mL gate is applied to the common terminal of the resistor of the resistance module through the semiconductor element, thereby preventing extra current from being loaded on the EeL gate. Detailed explanation.

FIG. 3 is a connection diagram showing an embodiment of the present invention, in which the same reference numerals as in FIG. 1 indicate the same parts, and (6) is a resistance module;
(7) is a semiconductor element such as a Zener diode or an ordinary diode, (81 is a bypass capacitor, and (9) is a common connection point for the number of resistor elements.

By setting R1=Z, an impedance matching termination can be configured. The heavy pressure drop of the semiconductor element (7) is V
D, the voltage at the connection point (9) ■9 is v9 = v
□-VD. If V9 is made equal to vTT in FIG. 1, the voltage applied to the resistor module (6) will be equivalent in FIG. 3 and FIG. There isn't.

Z again. = When impedance matching is performed with R1, it is assumed that the operating resistance of the semiconductor element (71) is zero, but since the signal output of the ECL gate (1) changes rapidly, a bypass capacitor is used for that signal. The impedance of (8) is close to zero, so the impedance of the parallel circuit of the semiconductor element (7) and the bypass capacitor (81) can be considered to be zero.

As described above, according to the present invention, it is possible to obtain a resistance module that can be mounted at high density without increasing the power supply of the device and without increasing the number of pins of the resistance module.

[Brief explanation of the drawing]

2.1 is a connection diagram showing an example of a conventional method, FIG. 2 is a connection diagram showing another example of the conventional method, and FIG. 3 is a connection diagram showing an embodiment of the present invention. (1)...ECL, 12+...IC package, (
41...Signal line, (6)...Resistance module, (
7)...Semiconductor element. Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Shin Kuzuno - 12 Figure 1 Figure 2 ■εE Figure 3 ↓ EE 121

Claims (1)

[Claims] In a resistance module in which one terminal of a plurality of resistance elements is commonly connected, the commonly connected terminal and
A resistor module characterized in that a semiconductor element is connected in series between the resistor module and an external terminal connected to the resistor module.