TW201438020A - Flash memory adaptor and the flash memory storage device using the same - Google Patents
Flash memory adaptor and the flash memory storage device using the same Download PDFInfo
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本發明有關於一種轉接器及儲存裝置,且特別是有關於快閃記憶體的轉接器及儲存裝置。 The invention relates to an adapter and a storage device, and in particular to an adapter and a storage device for a flash memory.
快閃記憶體儲存裝置因具有非揮發、可快速存取、可抹除再寫等特性,成為現今極受歡迎及常用的記憶體而適用於各種電子裝置。但由於應用產品領域不斷增加,快閃記憶體的規格也不斷推陳出新,例如增加資料線的數量以提升每筆資料的傳遞量與速度,或是對於資料的錯誤檢查及修正的標準也越來越提高。 The flash memory storage device has become a popular and commonly used memory for various electronic devices because of its characteristics of non-volatile, fast access, erasable and re-writable. However, due to the increasing number of application products, the specifications of flash memory are constantly being updated. For example, the number of data lines is increased to increase the throughput and speed of each data, or the standards for error checking and correction of data are becoming more and more important. improve.
然而,用來存取快閃記憶體裝置的電子產品卻不一定隨著快閃記憶體的更新頻率而變便設計,造成有部分電子產品與新式的快閃記憶體裝置無法相容,或無法使快閃記憶體裝置發揮其應有的存取效能,致使使用者無法順利以電子裝置控制對快閃記憶體裝置進行資料的存取。 However, the electronic products used to access the flash memory device are not necessarily designed to change with the update frequency of the flash memory, resulting in some electronic products not compatible with the new flash memory device, or unable to The flash memory device is enabled to perform its intended access performance, so that the user cannot smoothly control the access of the flash memory device to the electronic device.
本發明實施例提供一種快閃記憶體轉接器,用以轉接一主機端裝置及一快閃記憶體儲存裝置,該控制器包括:第一介面單元、第二介面單元、控制單元及暫存單元。第一介面單元用以連接主機端裝置上相對應的裝置連接單元,第二介面單元用以連接快閃記憶體儲存裝置上相對應的記憶體連接單元。控制單元耦接第一介面單元及第二介面單元、接收主機端裝置產生的存取指令,並據以透過第二 介面單元對快閃記憶體儲存裝置讀取或寫入資料。暫存單元耦接控制單元,用以暫存從快閃記憶體儲存裝置讀取或將寫入快閃記憶體儲存裝置的資料。其中,控制單元對暫存單元中的資料進行處理,以將處理後的資料根據存取指令而傳送到主機端裝置或寫入快閃記憶體儲存裝置。 The embodiment of the invention provides a flash memory adapter for transferring a host device and a flash memory storage device, the controller comprising: a first interface unit, a second interface unit, a control unit, and a temporary Save the unit. The first interface unit is configured to connect to a corresponding device connection unit on the host device, and the second interface unit is configured to connect to a corresponding memory connection unit on the flash memory storage device. The control unit is coupled to the first interface unit and the second interface unit, and receives an access instruction generated by the host device, and The interface unit reads or writes data to the flash memory storage device. The temporary storage unit is coupled to the control unit for temporarily storing data read from or written to the flash memory storage device. The control unit processes the data in the temporary storage unit to transfer the processed data to the host device or to the flash memory storage device according to the access command.
除此之外,本發明實施例還提供一種快閃記憶體儲存裝置,用以供一主機端裝置存取資料,包括快閃記憶體單元與快閃記憶體轉接器。快閃記憶體轉接器耦接快閃記憶體單元,並包括第一介面單元、第二介面單元、控制單元及暫存單元。第一介面單元用以連該主機端裝置上相對應的裝置連接單元,第二介面單元連接快閃記憶體單元。控制單元耦接第一介面單元及第二介面單元、接收主機端裝置產生的存取指令,並據以透過第二介面單元對快閃記憶體單元讀取或寫入資料。暫存單元耦接控制單元,用以暫存從快閃記憶體單元讀取或將寫入快閃記憶體單元的資料。其中,控制單元對暫存單元中的資料進行處理,以將處理後的資料根據存取指令而傳送到主機端裝置或寫入快閃記憶體單元。 In addition, the embodiment of the present invention further provides a flash memory storage device for accessing data by a host device, including a flash memory unit and a flash memory adapter. The flash memory adapter is coupled to the flash memory unit and includes a first interface unit, a second interface unit, a control unit, and a temporary storage unit. The first interface unit is connected to the corresponding device connection unit on the host device, and the second interface unit is connected to the flash memory unit. The control unit is coupled to the first interface unit and the second interface unit, receives an access instruction generated by the host device, and reads or writes data to the flash memory unit through the second interface unit. The temporary storage unit is coupled to the control unit for temporarily storing data read from or written to the flash memory unit. The control unit processes the data in the temporary storage unit to transfer the processed data to the host device or to the flash memory unit according to the access instruction.
綜上所述,本發明實施例所提供的快閃記憶體轉接器可供主機端裝置存取快人記憶體單元的資料。藉此,主機端裝置不需做任何變更,即可透過由控制單元控制的轉接器而與各種新規格的快閃記憶體儲存媒體進行資料的讀寫。 In summary, the flash memory adapter provided by the embodiment of the present invention can be used by the host device to access data of the fast memory unit. Thereby, the host device can read and write data with various new specifications of the flash memory storage medium through the adapter controlled by the control unit without any change.
〔第一實施例〕 [First Embodiment]
請參照圖1,圖1繪示了本發明的一種快閃記憶體轉接器實施例的方塊圖。所述的快閃記憶體轉接器10用以連接電子裝置20及快閃記憶體儲存裝置30。電子裝置20透過快閃記憶體轉接器10而存取快閃記憶體儲存裝置30之資料。 Please refer to FIG. 1. FIG. 1 is a block diagram of an embodiment of a flash memory adapter of the present invention. The flash memory adapter 10 is used to connect the electronic device 20 and the flash memory storage device 30. The electronic device 20 accesses the data of the flash memory storage device 30 through the flash memory adapter 10.
快閃記憶體轉接器10至少可包括第一介面單元100、第二介面單元102、控制單元104及暫存單元106。第一介面單元100、第二介面單元102及暫存單元106分別耦接於控制單元104。電子裝置20則至少包括裝置處理單元200以及用以與第一介面單元100連接的裝置連接單元202。裝置處理單元200耦接於裝置連接單元202。快閃記憶體儲存裝置30包括有用以儲存資料的快閃記憶體單元300,以及用以與第二介面單元102連接的記憶體連接單元302。 The flash memory adapter 10 can include at least a first interface unit 100, a second interface unit 102, a control unit 104, and a temporary storage unit 106. The first interface unit 100 , the second interface unit 102 , and the temporary storage unit 106 are respectively coupled to the control unit 104 . The electronic device 20 then includes at least a device processing unit 200 and a device connection unit 202 for connecting to the first interface unit 100. The device processing unit 200 is coupled to the device connection unit 202. The flash memory storage device 30 includes a flash memory unit 300 for storing data, and a memory connection unit 302 for connecting to the second interface unit 102.
其中,裝置連接單元202與記憶體連接單元302可能不相容,例如裝置連接單元202為串列周邊介面(Serial Peripheral Interface)單元,而記憶體連接單元302則為反及閘快閃記憶體(NAND Flash)介面單元,兩介面接腳數與接腳訊號配置皆不同。或者,裝置連接單元202為舊型的快閃記憶體介面單元,而記憶體連接單元302則是較新型的快閃記憶體介面單元,彼此間的接腳數量與訊號配置也可能不同。因此,若無快閃記憶體轉接器10的轉接,主機端裝置20可能無法順利存取快閃記憶體儲存裝置30中的資料。 The device connection unit 202 may be incompatible with the memory connection unit 302. For example, the device connection unit 202 is a Serial Peripheral Interface unit, and the memory connection unit 302 is a reverse gate flash memory ( NAND Flash) interface unit, the number of the two interface pins is different from the pin signal configuration. Alternatively, the device connection unit 202 is an old type of flash memory interface unit, and the memory connection unit 302 is a relatively new type of flash memory interface unit, and the number of pins and the signal configuration may be different from each other. Therefore, if there is no transfer of the flash memory adapter 10, the host device 20 may not be able to smoothly access the data in the flash memory storage device 30.
因此,快閃記憶體轉接器10的第一介面單元100與第二介面單元102分別為對應裝置連接單元202與記憶體連接單元302的不同介面。具體來說第一介面單元100及第 二介面單元102可分別由多個通用輸出輸入接腳所構成,以適用於不同的介面規格。 Therefore, the first interface unit 100 and the second interface unit 102 of the flash memory adapter 10 are different interfaces of the corresponding device connection unit 202 and the memory connection unit 302, respectively. Specifically, the first interface unit 100 and the The two interface units 102 can each be constructed of a plurality of universal output input pins to accommodate different interface specifications.
控制單元104為快閃記憶體轉接器10的控制處理中心,透過第一介面單元100接收主機端裝置20的裝置處理單元200所發出的存取指令,並且據以將來自主機端裝置20的資料寫入快閃記憶體儲存裝置30的快閃記憶體單元300,或是從根據存取指令透過第二介面單元102接收從快閃記憶體儲存裝置30所讀取的資料。 The control unit 104 is a control processing center of the flash memory adapter 10, and receives an access instruction issued by the device processing unit 200 of the host device 20 through the first interface unit 100, and accordingly, from the host device 20 The data is written to the flash memory unit 300 of the flash memory storage device 30, or the data read from the flash memory storage device 30 is received from the second memory unit 102 via the access command.
快閃記憶體儲存裝置30對資料存取的速度與效能,以及對資料讀寫的管理要求可能高都於主機端裝置20,例如記憶體連接單元302包括16條或更多資料線,每次可輸出16位元以上資料,但裝置連接單元202可能僅有8條資料線用以傳輸資訊,每次僅能傳輸8位元資料,可能造成資料的漏失。因此控制單元104可將從快閃記憶體單元300所讀取的資料先暫存在暫存單元106,並對暫存單元106中的資料進行驗證處理後,再透過與裝置連接單元202對應的第一介面單元100依照與主機端裝置20相容的方式傳送到主機端裝置20。 The flash memory storage device 30 may have higher speed and performance for data access and management requirements for data reading and writing than the host device 20, for example, the memory connecting unit 302 includes 16 or more data lines, each time. More than 16 bits of data can be output, but the device connection unit 202 may only have 8 data lines for transmitting information, and only 8 bits of data can be transmitted at a time, which may cause data loss. Therefore, the control unit 104 may temporarily store the data read from the flash memory unit 300 in the temporary storage unit 106, and perform verification processing on the data in the temporary storage unit 106, and then transmit the corresponding information corresponding to the device connection unit 202. An interface unit 100 is transmitted to the host device 20 in a manner compatible with the host device 20.
進一步來說,本實施例的快閃記憶體轉接器10還可包括記憶單元108,例如非揮發性的唯讀記憶體,用以記錄轉接器10的韌體。控制單元104根據韌體可將前述的多個通用輸出入接腳分別配置為第一介面單元100的接腳與第二介面單元102的接腳。除此之外,控制單元104尚可根據韌體而控制快閃記憶體轉接器10中的其他部件對欲存取的資料進行檢驗或對快閃記憶體單元300的記憶區塊進行管理。 Further, the flash memory adapter 10 of the present embodiment may further include a memory unit 108, such as a non-volatile read-only memory, for recording the firmware of the adapter 10. The control unit 104 can configure the plurality of general-purpose input and output pins described above as the pins of the first interface unit 100 and the pins of the second interface unit 102 according to the firmware. In addition, the control unit 104 can control other components in the flash memory adapter 10 to check the data to be accessed or manage the memory blocks of the flash memory unit 300 according to the firmware.
因此,本實施例的快閃記憶體轉接器10更可包括分別耦接於控制單元104的快閃記憶體轉換單元110、錯誤檢查修正單元112及壞塊管理單元114。 Therefore, the flash memory adapter 10 of the present embodiment may further include a flash memory conversion unit 110, an error check correction unit 112, and a bad block management unit 114 respectively coupled to the control unit 104.
快閃記憶體轉換單元110可為快閃記憶體轉換層(Flash Translate Layer,FTL)單元,用以管理快閃記憶體單元300中的記憶區塊的邏輯位址與實體位址映對(address mapping)。所述的快閃記憶體轉換層單元可包含抹寫次數均衡機制(wear leveling)及記憶體空間回收機制(garbage collection)。前者根據每個記憶區塊的總耐寫次數(endurance)配置被寫入的資料的位址以平均消耗各個記憶區塊的抹寫次數,後者則在抹除記憶區塊的資料時,將有效資料搬移到其他區塊而釋出完整的記憶空間。 The flash memory conversion unit 110 can be a Flash Translate Layer (FTL) unit for managing the logical address and physical address mapping of the memory block in the flash memory unit 300. Mapping). The flash memory conversion layer unit may include a wear leveling and a memory space collection mechanism. The former configures the address of the data to be written according to the total endurance of each memory block to consume the number of erasures of each memory block on average, and the latter is effective when erasing the data of the memory block. The data is moved to other blocks to release the complete memory space.
錯誤檢查修正單元112可為錯誤檢查修正(Error Checking and Correcting)電路晶片,用以檢驗接收到的資料的正確性,例如根據錯誤修正碼(error correction code)對資料進行校驗,並於發現資料有誤時加以修正。 The error check correction unit 112 may be an Error Checking and Correcting circuit chip for verifying the correctness of the received data, for example, verifying the data according to an error correction code, and discovering the data. Amend it if there is an error.
壞塊管理(Bad Block Management,BBM)單元114則可偵測出快閃記憶體單元300中已經損壞的記憶區塊並加以標記,藉此以提升快閃記憶體儲存裝置30的使用效能。 The Bad Block Management (BBM) unit 114 can detect and mark the damaged memory blocks in the flash memory unit 300, thereby improving the performance of the flash memory storage device 30.
除此之外,本實施例的快閃記憶體轉接器10甚至可包括看門狗(Watchdog)電路、加密單元或其他與讀寫快閃記憶體單元300之資料相關的控制或管理元件。 In addition, the flash memory adapter 10 of the present embodiment may even include a watchdog circuit, an encryption unit, or other control or management elements associated with the data read and write to the flash memory unit 300.
藉由快閃記憶體轉接器10執行上述各種控制及處理機制,主機端裝置10即不需自行處理讀寫快閃記憶體儲存裝置30之資料的工作,並且由控制單元104根據韌體將檢驗過的資料按照所配置的資料線分別傳送到主機端裝置20或 快閃記憶體儲存裝置30。因此,主機端裝置20即使原本沒有任何快閃記憶體控制模組、或所具有的快閃記憶體控制模組無法有效控制較新的快閃記憶體儲存裝置30,也不必對主機端裝置20進行任何的改裝或設計,也能透過快閃記憶體轉接器10與原本可能不相容、或是處理需求較高的快閃記憶體儲存裝置30進行資料讀寫。 By performing the various control and processing mechanisms described above by the flash memory adapter 10, the host device 10 does not need to process the data of the flash memory storage device 30, and the control unit 104 will perform the firmware according to the firmware. The verified data is transmitted to the host device 20 or according to the configured data line. Flash memory storage device 30. Therefore, even if the host device 20 does not have any flash memory control module or has a flash memory control module that cannot effectively control the newer flash memory storage device 30, the host device 20 does not need to be used for the host device 20. Any modification or design can also be performed by the flash memory adapter 10 to read and write data from the flash memory storage device 30 which may otherwise be incompatible or has a high processing demand.
〔第二實施例〕 [Second embodiment]
請參閱圖2,圖2繪示了本發明的一種快閃記憶體儲存裝置實施例的方塊圖。所述的快閃記憶體儲存裝置40可直接連接於主機端裝置50,以供主機端裝置50進行資料存取。 Please refer to FIG. 2. FIG. 2 is a block diagram of an embodiment of a flash memory storage device of the present invention. The flash memory storage device 40 can be directly connected to the host device 50 for data access by the host device 50.
本實施例的快閃記憶體儲存裝置40包括快閃記憶體轉接器42與快閃記憶體單元44。快閃記憶體轉接器42至少包括第一介面單元420、第二介面單元422、控制單元424及暫存單元426。 The flash memory storage device 40 of the present embodiment includes a flash memory adapter 42 and a flash memory unit 44. The flash memory adapter 42 includes at least a first interface unit 420, a second interface unit 422, a control unit 424, and a temporary storage unit 426.
其中,第一介面單元420用以連接主機端裝置50的裝置連接單元502,以傳遞主機端裝置50的裝置處理單元500的存取指令。裝置連接單元502可為例如串列周邊介面單元或舊型的快閃記憶體介面單元。第一介面單元420則為與裝置連接單元502相對應的串列周邊介面單元或快閃記憶體單元。 The first interface unit 420 is configured to connect to the device connection unit 502 of the host device 50 to transmit an access instruction of the device processing unit 500 of the host device 50. The device connection unit 502 can be, for example, a serial peripheral interface unit or an old type of flash memory interface unit. The first interface unit 420 is a serial peripheral interface unit or a flash memory unit corresponding to the device connection unit 502.
快閃記憶體單元44透過第二介面單元422連接於控制單元404,以供控制單元404依據接收到的存取指令而對快閃記憶體單元408進行資料的讀取或寫入。 The flash memory unit 44 is coupled to the control unit 404 via the second interface unit 422 for the control unit 404 to read or write data to the flash memory unit 408 in accordance with the received access command.
其中,快閃記憶體單元408可為反及閘快閃記憶體 晶片,第二介面單元402則為相對應的反及閘快閃記憶體介面單元。 The flash memory unit 408 can be a reverse flash memory. The chip, the second interface unit 402 is a corresponding anti-gate flash memory interface unit.
控制單元424透過第一介面單元420接收主機端裝置50的存取指令,並且據以將來自主機端裝置50的資料寫入快閃記憶體單元44,或是從根據存取指令透過第二介面單元422接收從快閃記憶體單元44所讀取的資料。 The control unit 424 receives the access instruction of the host device 50 through the first interface unit 420, and accordingly writes the data from the host device 50 to the flash memory unit 44, or from the second interface according to the access command. Unit 422 receives the material read from flash memory unit 44.
由於存取快閃記憶體單元44之資料所需要讀寫速度、資料量或資料檢查的規格,可能已超出主機端裝置50的處理能力,因此可將快閃記憶體轉接器42設置於快閃記憶體儲存裝置40內,由控制單元424分別透過第一介面單元420及第二介面單元422連接主機端裝置50與快閃記憶體單元44。當主機端裝置50透過裝置連接單元502與第一介面單元420而連接到快閃記憶體儲存裝置40後,控制單元424可根據主機端裝置50的存取指令,將主機端裝置50要寫入快閃記憶體單元44的資料先暫存於暫存單元426,並對暫存單元426中的資料進行檢查,以及確認快閃記憶體單元44的儲存區塊的可用狀態,以將資料寫入快閃記憶體單元44。 Since the read/write speed, the amount of data, or the specification of the data check required for accessing the data of the flash memory unit 44 may exceed the processing capability of the host device 50, the flash memory adapter 42 can be set to be fast. In the flash memory storage device 40, the control unit 424 connects the host device 50 and the flash memory unit 44 through the first interface unit 420 and the second interface unit 422, respectively. After the host device 50 is connected to the flash memory storage device 40 through the device connection unit 502 and the first interface unit 420, the control unit 424 can write the host device 50 according to the access instruction of the host device 50. The data of the flash memory unit 44 is temporarily stored in the temporary storage unit 426, and the data in the temporary storage unit 426 is checked, and the available state of the storage block of the flash memory unit 44 is confirmed to write the data. Flash memory unit 44.
因此在本實施例中,快閃記憶體轉接器42還可包括記憶單元428、快閃記憶體轉換單元430、錯誤檢查修正單元432及壞塊管理單元434等元件。 Therefore, in this embodiment, the flash memory adapter 42 may further include components such as a memory unit 428, a flash memory conversion unit 430, an error check correction unit 432, and a bad block management unit 434.
記憶單元428可例如為電子式可程式可抹除唯讀記憶體晶片或其他非揮發性記憶晶片,儲存韌體以供控制單元404據以執行對資料的處理。 The memory unit 428 can be, for example, an electronically programmable erasable read-only memory chip or other non-volatile memory chip, and stores the firmware for the control unit 404 to perform processing on the data.
快閃記憶體轉換單元430可為包含抹寫次數均衡機制及記憶體空間回收機制的快閃記憶體轉換層控制單元,用 以配置快閃記憶體單元44的儲存區塊,以便儲存資料。錯誤檢查修正單元432則用以檢驗來自主機端裝置50及從快閃記憶體單元44讀取的資料之完整性,並於偵測出錯誤時加以修正。壞塊管理單元434則用以標示出快閃記憶體單元44中失效的儲存區塊,以維持快閃記憶體單元44的使用效能。 The flash memory conversion unit 430 can be a flash memory conversion layer control unit including a strobe number equalization mechanism and a memory space recovery mechanism. The storage block of the flash memory unit 44 is configured to store data. The error check correction unit 432 is used to check the integrity of the data read from the host device 50 and from the flash memory unit 44, and is corrected when an error is detected. The bad block management unit 434 is used to mark the failed storage blocks in the flash memory unit 44 to maintain the performance of the flash memory unit 44.
本實施例所述的記憶單元428、快閃記憶體轉換單元430、錯誤檢查修正單元432及壞塊管理單元434分別與前一實施例中的108、110、112及114相對應,故前述已說明的相同功能及特性,於此即不再重述。 The memory unit 428, the flash memory conversion unit 430, the error check correction unit 432, and the bad block management unit 434 described in this embodiment respectively correspond to 108, 110, 112, and 114 in the previous embodiment, so that the foregoing The same functions and features described are not repeated here.
本實施例的快閃記憶體轉接器42還可更進一步包括例如看門狗電路單元、電源管理單元或加密單元等單元,分別根據控制單元404的控制而執行相對應的作用,以維持快閃記憶體儲存裝置40的運作,以及主機端裝置50與快閃記憶體儲存裝置40之間的資料傳遞。 The flash memory adapter 42 of the present embodiment may further include a unit such as a watchdog circuit unit, a power management unit, or an encryption unit, and perform corresponding functions according to the control of the control unit 404, respectively, to maintain fast. The operation of the flash memory storage device 40 and the transfer of data between the host device 50 and the flash memory storage device 40.
藉由上述的快閃記憶體儲存裝置40,現有的主機端裝置50無需改造或另行設計,快閃記憶體轉接器42取代主機端裝置50處理資料讀寫所需的緩衝、映對及檢查等工作,即可使主機端裝置50對新式的快閃記憶體儲存裝置40進行資料的讀寫。 With the above-mentioned flash memory storage device 40, the existing host device 50 does not need to be modified or otherwise designed, and the flash memory adapter 42 replaces the buffer, mapping and inspection required for the host device 50 to process data reading and writing. After the work, the host device 50 can read and write data to the new type of flash memory storage device 40.
〔實施例的可能功效〕 [Possible effects of the examples]
根據本發明實施例,上述的快閃記憶體儲存裝置及快閃記憶體轉接器可讓現有的主機端裝置以原有的規格,存取較新型的快閃記憶體儲存裝置,克服快閃記憶體儲存媒體因快速發展變化,使得主機端裝置無法相容於新式快閃 記憶體儲存媒體的問題。藉此,無需變動主機端裝置的設計,仍可存取快閃記憶體儲存媒體,除了避免需要重新設計主機端裝置而造成成本增加外,也可讓主機端裝置的使用者以現有的主機端裝置存取各種新式或舊式快閃記體儲存媒體的資料。 According to the embodiment of the invention, the above-mentioned flash memory storage device and the flash memory adapter can allow the existing host device to access the newer flash memory storage device with the original specifications, and overcome the flash. The storage medium of the memory is rapidly changing, making the host device incompatible with the new flash Memory storage media issues. Thereby, the flash memory storage medium can be accessed without changing the design of the host device, and the user of the host device can be used as the existing host end, in addition to avoiding the cost increase required to redesign the host device. The device accesses data of various new or old flash memory storage media.
以上所述僅為本發明之實施例,其並非用以侷限本發明之專利範圍。 The above description is only an embodiment of the present invention, and is not intended to limit the scope of the invention.
10,42‧‧‧快閃記憶體轉接器 10,42‧‧‧Flash Memory Adapter
100,420‧‧‧第一介面單元 100,420‧‧‧ first interface unit
102,422‧‧‧第二介面單元 102,422‧‧‧Second interface unit
104,424‧‧‧控制單元 104,424‧‧‧Control unit
106,426‧‧‧暫存單元 106,426‧‧‧ temporary storage unit
108,428‧‧‧記憶單元 108, 428‧‧‧ memory unit
110,430‧‧‧快閃記憶體轉換單元 110,430‧‧‧Flash memory conversion unit
112,432‧‧‧錯誤檢查修正單元 112,432‧‧‧Error checking correction unit
114,434‧‧‧壞塊管理單元 114,434‧‧‧Bad Block Management Unit
20,50‧‧‧主機端裝置 20, 50‧‧‧ host device
200,500‧‧‧裝置處理單元 200,500‧‧‧Device Processing Unit
202,502‧‧‧裝置連接單元 202,502‧‧‧Device connection unit
30,40‧‧‧快閃記憶體儲存裝置 30,40‧‧‧Flash memory storage device
300‧‧‧快閃記憶體單元 300‧‧‧Flash memory unit
302,44‧‧‧記憶體連接單元 302, 44‧‧‧ memory connection unit
圖1:本發明提供的一種快閃記憶體轉接器實施例的方塊圖;及圖2:本發明提供的一種設置有快閃記憶體轉接器之快閃記憶體儲存裝置實施例的方塊圖。 1 is a block diagram of an embodiment of a flash memory adapter provided by the present invention; and FIG. 2 is a block diagram of an embodiment of a flash memory storage device provided with a flash memory adapter provided by the present invention. Figure.
10‧‧‧快閃記憶體轉接器 10‧‧‧Flash Memory Adapter
100‧‧‧第一介面單元 100‧‧‧First interface unit
102‧‧‧第二介面單元 102‧‧‧Second interface unit
104‧‧‧控制單元 104‧‧‧Control unit
106‧‧‧暫存單元 106‧‧‧Scratch unit
108‧‧‧記憶單元 108‧‧‧ memory unit
110‧‧‧快閃記憶體轉換單元 110‧‧‧Flash memory conversion unit
112‧‧‧錯誤檢查修正單元 112‧‧‧Error checking correction unit
114‧‧‧壞塊管理單元 114‧‧‧Bad Block Management Unit
20‧‧‧主機端裝置 20‧‧‧ host device
200‧‧‧裝置處理單元 200‧‧‧Device Processing Unit
202‧‧‧裝置連接單元 202‧‧‧Device connection unit
30‧‧‧快閃記憶體儲存裝置 30‧‧‧Flash memory storage device
300‧‧‧快閃記憶體單元 300‧‧‧Flash memory unit
302‧‧‧記憶體連接單元 302‧‧‧Memory connection unit
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Cited By (3)
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TWI562154B (en) * | 2015-02-17 | 2016-12-11 | Silicon Motion Inc | Methods for reading data from a storage unit of a flash memory and apparatuses using the same |
TWI608350B (en) * | 2016-03-09 | 2017-12-11 | 慧榮科技股份有限公司 | Memory device and control unit thereof, and data movement method for memory device |
TWI632458B (en) * | 2016-03-09 | 2018-08-11 | 慧榮科技股份有限公司 | Memory device and control unit thereof, and data movement method for memory device |
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TWI562154B (en) * | 2015-02-17 | 2016-12-11 | Silicon Motion Inc | Methods for reading data from a storage unit of a flash memory and apparatuses using the same |
US9990280B2 (en) | 2015-02-17 | 2018-06-05 | Silicon Motion, Inc. | Methods for reading data from a storage unit of a flash memory and apparatuses using the same |
TWI608350B (en) * | 2016-03-09 | 2017-12-11 | 慧榮科技股份有限公司 | Memory device and control unit thereof, and data movement method for memory device |
US10025526B2 (en) | 2016-03-09 | 2018-07-17 | Silicon Motion, Inc. | Storage device and data moving method for storage device |
TWI632458B (en) * | 2016-03-09 | 2018-08-11 | 慧榮科技股份有限公司 | Memory device and control unit thereof, and data movement method for memory device |
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