CN203338339U - Flash memory adaptor and flash memory storage device - Google Patents
Flash memory adaptor and flash memory storage device Download PDFInfo
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- CN203338339U CN203338339U CN2013201454290U CN201320145429U CN203338339U CN 203338339 U CN203338339 U CN 203338339U CN 2013201454290 U CN2013201454290 U CN 2013201454290U CN 201320145429 U CN201320145429 U CN 201320145429U CN 203338339 U CN203338339 U CN 203338339U
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Abstract
The utility model discloses a flash memory adaptor and a flash memory storage device. The flash memory adaptor is used for adapting a host end device and the flash memory storage device, and comprises a first interface unit, a second interface unit, a control unit and a scratch memory unit. The first interface unit is used for being connected with a device connection unit of the host end device, and the second interface unit is used for being connected with a storage connection unit of the flash memory storage device. The control unit is coupled with the first interface unit and the second interface unit, receives access instructions generated by the host end device, and reads data of the flash memory storage device through the second interface unit according to the access instructions. The scratch memory unit temporarily stores data read from the flash memory storage device or data to be read in the storage device. The control unit processes data in the scratch memory unit, and then sends the processed data to the host end device or reads the processed data in the flash memory storage device according to the access instructions.
Description
Technical field
The utility model is relevant for a kind of breakout box and storage device, and particularly relevant for breakout box and the storage device of flash memory.
Background technology
But flash memory, because having non-volatile quick access, the erasable characteristic such as write again, becomes storer extremely welcome and commonly used now and is applicable to various electronic installations.But, because the application product field constantly increases, the specification of flash memory is also constantly weeded out the old and bring forth the new, for example increase transmission capacity and the speed of quantity to promote every data of data line, or also more and more improve for the bug check of data and the standard of correction.
Yet, being used for the electronic product of access flash memory device but not necessarily becomes just design along with the renewal frequency of flash memory, cause portions of electronics product and new-type flash memory device incompatible, maybe can't make flash memory device bring into play its due access usefulness, cause the user to control flash memory device is carried out to the access of data with electronic installation smoothly.
Summary of the invention
In view of the problems referred to above of the prior art, the utility model discloses a kind of breakout box and storage device of flash memory.
The utility model provides a kind of flash memory breakout box, and in order to a host side device and the flash memory of transferring, this controller comprises: first interface unit, the second interface unit, control module and temporary storage location.The first interface unit is in order to connect device linkage unit corresponding on the host side device, and the second interface unit is in order to connect storer linkage unit corresponding on flash memory.Control module couples the access instruction that first interface unit and the second interface unit, Receiving Host end device produce, and by the second interface unit, flash memory is read or data writing according to this.Temporary storage location couples control module, in order to temporary, from flash memory, reads the data that maybe will write flash memory.Wherein, control module is processed the data in temporary storage location, with the data based access instruction by after processing, is sent to the host side device or writes flash memory.
In addition, the utility model embodiment also provides a kind of flash memory, uses for a host side device access data, comprises flash cell and flash memory breakout box.The flash memory breakout box couples flash cell, and comprises first interface unit, the second interface unit, control module and temporary storage location.The first interface unit is in order to connect device linkage unit corresponding on this host side device, and the second interface unit connects flash cell.Control module couples the access instruction that first interface unit and the second interface unit, Receiving Host end device produce, and by the second interface unit, flash cell is read or data writing according to this.Temporary storage location couples control module, in order to temporary, from flash cell, reads the data that maybe will write flash cell.Wherein, control module is processed the data in temporary storage location, with the data based access instruction by after processing, is sent to the host side device or writes flash cell.
In sum, the flash memory breakout box that the utility model embodiment provides can be for the data of host side device access straightforward man memory cell.Thus, the host side device does not need to do any change, can carry out the read-write of data with the flash memory stores media of various new specs by the breakout box of being controlled by control module.
The accompanying drawing explanation
The calcspar of a kind of flash memory breakout box embodiment that Fig. 1 provides for the utility model; And
A kind of calcspar that is provided with the flash memory embodiment of flash memory breakout box that Fig. 2 provides for the utility model.
Wherein, description of reference numerals is as follows:
10,42: the flash memory breakout box
100,420: the first interface unit
The 102,422: second interface unit
104,424: control module
106,426: temporary storage location
108,428: storage unit
110,430: the flash memory converting unit
112,432: the bug check amending unit
114,434: the bad block management unit
20,50: the host side device
200,500: the device processing unit
202,502: the device linkage unit
30,40: flash memory
300: flash cell
302,44: the storer linkage unit
Embodiment
(the first embodiment)
Please refer to Fig. 1, Fig. 1 has illustrated the calcspar of a kind of flash memory breakout box embodiment of the present utility model.Described flash memory breakout box 10 is in order to connection of electronic devices 20 and flash memory 30.Electronic installation 20 passes through flash memory breakout box 10 and the data of access flash memory 30.
Flash memory breakout box 10 at least can comprise first interface unit 100, the second interface unit 102, control module 104 and temporary storage location 106.First interface unit 100, the second interface unit 102 and temporary storage location 106 are respectively coupled to control module 104.20 of electronic installations at least comprise device processing unit 200 and the device linkage unit 202 in order to be connected with first interface unit 100.Device processing unit 200 is coupled to device linkage unit 202.Flash memory 30 includes the flash cell 300 in order to storage data, and the storer linkage unit 302 in order to be connected with the second interface unit 102.
Wherein, device linkage unit 202 may be incompatible with storer linkage unit 302, for example install linkage unit 202 for serial circumference interface (Serial Peripheral Interface) unit, storer linkage unit 302 is Sheffer stroke gate flash memory (NAND Flash) interface unit, and two interface pins numbers and pin signal configures are neither same.Perhaps, the flash interface unit that device linkage unit 202 is old type, storer linkage unit 302 is more novel flash interface unit, pin count to each other also may be different from signal configures.Therefore, if without the switching of flash memory breakout box 10, host side device 20 is the data in access flash memory 30 smoothly.
Therefore, the first interface unit 100 of flash memory breakout box 10 and the second interface unit 102 are respectively the distinct interface of corresponding intrument linkage unit 202 and storer linkage unit 302.First interface unit 100 and the second interface unit 102 can be consisted of a plurality of general output input pins respectively specifically, to be applicable to different interface specifications.
The control processing enter that control module 104 is flash memory breakout box 10, the access instruction that device processing unit 200 by first interface unit 100 Receiving Host end devices 20 sends, and will write from the data of main frame end device 20 flash cell 300 of flash memory 30 according to this, or from according to access instruction, by the second interface unit 102, receiving the data that read from flash memory 30.
Speed and the usefulness of 30 pairs of data accesses of flash memory, and the management expectancy that data are read and write possibility height is all in host side device 20, for example storer linkage unit 302 comprises 16 or more data line, each exportable 16 above data, but device linkage unit 202 may only have 8 data lines in order to transmission information, only 8 bit data can be transmitted at every turn, the leakage of data may be caused.Therefore control module 104 can first be temporarily stored in temporary storage location 106 by the data that read from flash cell 300, and after the data in temporary storage location 106 are verified to processing, then be sent to host side device 20 by the first interface unit 100 corresponding with device linkage unit 202 according to the mode compatible with host side device 20.
Furthermore, the flash memory breakout box 10 of the present embodiment also can comprise storage unit 108, and non-volatile ROM (read-only memory) for example, in order to record the firmware of breakout box 10.Control module 104 can be configured to aforesaid a plurality of universal output and input pins respectively the pin of first interface unit 100 and the pin of the second interface unit 102 according to firmware.In addition, control module 104 still can be controlled that miscellaneous part in flash memory breakout box 10 is tested to the data of wanting access or the memory block of flash cell 300 is managed according to firmware.
Therefore, the flash memory breakout box 10 of the present embodiment more can comprise flash memory converting unit 110, bug check amending unit 112 and the bad block management unit 114 that is respectively coupled to control module 104.
Flash memory converting unit 110 can be flash translation layer (FTL) (Flash Translate Layer, FTL) unit, in order to logical address and the physical address mapping (address mapping) of managing the memory block in flash cell 300.Described flash translation layer (FTL) unit can comprise erasable number of times equilibrating mechanism (wear leveling) and storage space reclaim mechanism (garbage collection).The former configures the erasable number of times of the address of the data that are written into each memory block of mean consumption according to the total anti-number of times (endurance) of writing of each memory block, latter, when erasing the data of memory block, is moved valid data other blocks and is disengaged complete storage space.
Bug check amending unit 112 can be bug check correction (Error Checking and Correcting) circuit chip, the correctness of the data that receive in order to check, for example according to bug patch code (error correction code), data are carried out to verification, and revised when finding that data are wrong.
114 of unit of bad block management (Bad Block Management, BBM) can detect the memory block damaged in flash cell 300 mark in addition, with this to promote the effective utilization of flash memory 30.
In addition, the flash memory breakout box 10 of the present embodiment even can comprise house dog (Watchdog) circuit, ciphering unit or other control or managent components relevant to the data of read-write flash cell 300.
Carry out above-mentioned various control and treatment mechanism by flash memory breakout box 10, host side device 10 does not need to read and write by oneself the work of the data of flash memory 30, and the data that will be checked according to firmware by control module 104 are sent to respectively host side device 20 or flash memory 30 according to configured data line.Therefore, even host side device 20 can't effectively be controlled newer flash memory 30 without any flash memory control module or the flash memory control module that has originally, also needn't carry out any repacking or design to host side device 20, also can be by flash memory breakout box 10 with script be possible incompatible or the flash memory that processing demands is higher 30 carries out reading and writing data.
(the second embodiment)
Refer to Fig. 2, Fig. 2 has illustrated the calcspar of a kind of flash memory embodiment of the present utility model.Described flash memory 40 can be directly connected in host side device 50, for host side device 50, carries out data access.
The flash memory 40 of the present embodiment comprises flash memory breakout box 42 and flash cell 44.Flash memory breakout box 42 at least comprises first interface unit 420, the second interface unit 422, control module 424 and temporary storage location 426.
Wherein, first interface unit 420 is in order to connect the device linkage unit 502 of host side device 50, with the access instruction of the device processing unit 500 that transmits host side device 50.Device linkage unit 502 can be the flash interface unit of serial circumference interface unit for example or old type.420 of first interface unit are serial circumference interface unit or the flash cell corresponding with device linkage unit 502.
Flash cell 44 is connected in control module 404 by the second interface unit 422, for control module 404, according to the access instruction received, flash cell 408 is carried out to reading or writing of data.
Wherein, flash cell 408 can be the Sheffer stroke gate flash chip, and the second 402 of interface units are corresponding Sheffer stroke gate flash interface unit.
Specification due to the required read or write speed of the data of access flash cell 44, data volume or data check, the processing power that may exceed host side device 50, therefore flash memory breakout box 42 can be arranged in flash memory 40, by control module 424, connect host side device 50 and flash cell 44 by first interface unit 420 and the second interface unit 422 respectively.After host side device 50 is connected to flash memory 40 by device linkage unit 502 with first interface unit 420, control module 424 can be according to the access instruction of host side device 50, the data that host side device 50 will be write to flash cell 44 first are temporary in temporary storage location 426, and the data in temporary storage location 426 are checked, and the upstate of confirming the storage block of flash cell 44, data are write to flash cell 44.
Therefore in the present embodiment, flash memory breakout box 42 also can comprise the elements such as storage unit 428, flash memory converting unit 430, bug check amending unit 432 and bad block management unit 434.
Flash memory converting unit 430 can be the flash translation layer (FTL) control module that comprises erasable number of times equilibrating mechanism and storage space reclaim mechanism, in order to configure the storage block of flash cell 44, so that storage data.432 of bug check amending units reach the integrality of the data that read from flash cell 44 in order to check from host side device 50, and are revised when detecting mistake.434 of bad block management unit are in order to indicate the storage block lost efficacy in flash cell 44, to maintain the effective utilization of flash cell 44.
The described storage unit 428 of the present embodiment, flash memory converting unit 430, bug check amending unit 432 and bad block management unit 434 be 108,110,112 and 114 corresponding with in last embodiment respectively, therefore the identical function illustrated aforementioned and characteristic, no longer repeat in this.
The flash memory breakout box 42 of the present embodiment also can further comprise unit such as watchdog circuit unit, Power Management Unit or ciphering unit, carry out corresponding effect according to the control of control module 404 respectively, to maintain the running of flash memory 40, and the data transmission between host side device 50 and flash memory 40.
By above-mentioned flash memory 40, existing host side device 50 is without transformation or otherwise designed, flash memory breakout box 42 replaces host side device 50 deal with data and reads and writes the work such as required buffering, mapping and inspection, can make 50 pairs of new-type flash memories of host side device 40 carry out the read-write of data.
(the possible effect of embodiment)
According to the utility model embodiment, above-mentioned flash memory and flash memory breakout box can allow existing host side device with original specification, the flash memory that access is more novel, overcome the flash memory stores media and change because of fast development, make the host side device incompatible in the problem of new-type flash memory stores media.Thus, design without change host side device, but still access flash memory stores media, cause the cost increase except avoiding needing redesign host side device, also can allow the user of host side device remember the data of body Storage Medias with the various new-type or old-fashioned quick flashings of existing host side device access.
The foregoing is only embodiment of the present utility model, it is not in order to limit to the scope of the claims of the present utility model.
Claims (11)
1. a flash memory breakout box, in order to a host side device and the flash memory of transferring, is characterized in that, this controller comprises:
One first interface unit, in order to connect a device linkage unit corresponding on this host side device;
One second interface unit, in order to connect a storer linkage unit corresponding on this flash memory;
One control module, couple this first interface unit and this second interface unit, receives the access instruction that this host side device produces, and by this second interface unit, this flash memory is read or data writing according to this; And
One temporary storage location, couple this control module, in order to temporary, from this flash memory, reads the data that maybe will write this flash memory;
Wherein, this control module is processed the data in this temporary storage location, with data based this access instruction by after processing, is sent to this host side device or writes this flash memory.
2. flash memory breakout box as claimed in claim 1, is characterized in that, this first interface unit and this second interface unit are distinct interface.
3. flash memory breakout box as claimed in claim 1, is characterized in that, also comprises:
One storage unit, be coupled to this control module, records one group of control program, and wherein, this control module is carried out this root control program to process the data in this temporary storage location.
4. flash memory breakout box as claimed in claim 1, is characterized in that, also comprises:
One bug check amending unit, be coupled to this control module, according to an error code that checks data in this temporary storage location, and revises accordingly the mistake of data.
5. flash memory breakout box as claimed in claim 1, is characterized in that, also comprises:
One flash memory converting unit, be coupled to this control module, in order to the number of times of erasing of a plurality of memory block of average this flash memory device.
6. flash memory breakout box as claimed in claim 1, is characterized in that, also comprises:
One bad block management unit, be coupled to this control module, in order to the bad block in the middle of a plurality of memory block of managing this flash memory device.
7. flash memory breakout box as claimed in claim 2, is characterized in that, this first interface unit is the serial circumference interface unit, and this second interface unit is the NAND interface unit.
8. a flash memory, use for a host side device access data, it is characterized in that, comprising:
One flash cell; And
One flash memory breakout box, couple this flash cell, comprising:
One first interface unit, in order to connect a device linkage unit corresponding on this host side device;
One second interface unit, connect this flash cell;
One control module, couple this first interface unit and this second interface unit, receives the access instruction that this host side device produces, and by this second interface unit, this flash cell is read or data writing according to this;
One temporary storage location, couple this control module, in order to temporary, from this flash cell, reads the data that maybe will write this flash cell;
Wherein, this control module is processed the data in this temporary storage location, with data based this access instruction by after processing, is sent to this host side device or writes this flash cell.
9. flash memory as claimed in claim 8, is characterized in that, this first interface unit and this second interface unit are distinct interface.
10. flash memory as claimed in claim 8, is characterized in that, this flash memory breakout box also comprises:
One storage unit, be coupled to this control module, records one group of control program, and wherein, this control module is carried out this root control program to process the data in this temporary storage location.
11. flash memory as claimed in claim 8, is characterized in that, this flash memory breakout box also comprises:
One bug check amending unit, be coupled to this control module, according to an error code that checks data in this temporary storage location, and revises accordingly the mistake of data;
One block management unit, be coupled to this control module, in order to the number of times of erasing of a plurality of memory block of average this flash memory device; And
One bad block management unit, be coupled to this control module, in order to the bad block in the middle of a plurality of memory block of managing this flash memory device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201454290U CN203338339U (en) | 2013-03-27 | 2013-03-27 | Flash memory adaptor and flash memory storage device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201454290U CN203338339U (en) | 2013-03-27 | 2013-03-27 | Flash memory adaptor and flash memory storage device |
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| CN203338339U true CN203338339U (en) | 2013-12-11 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104077079A (en) * | 2013-03-27 | 2014-10-01 | 郑智文 | Flash memory adaptor and flash memory storage device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104077079A (en) * | 2013-03-27 | 2014-10-01 | 郑智文 | Flash memory adaptor and flash memory storage device |
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| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131211 Termination date: 20160327 |