TW201433064A - Single-stage high power factor zero-current detecting variable-frequency asymmetric half-bridge converter - Google Patents

Single-stage high power factor zero-current detecting variable-frequency asymmetric half-bridge converter Download PDF

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TW201433064A
TW201433064A TW102104309A TW102104309A TW201433064A TW 201433064 A TW201433064 A TW 201433064A TW 102104309 A TW102104309 A TW 102104309A TW 102104309 A TW102104309 A TW 102104309A TW 201433064 A TW201433064 A TW 201433064A
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zero
circuit
power
current
bridge
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TW102104309A
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TWI506931B (en
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jin-yuan Xu
yu-liang Zhang
Ren-Wei Huang
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Univ Nat Kaohsiung Applied Sci
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The present invention relates to a single-stage high power factor zero-current detecting variable-frequency asymmetric half-bridge converter, which comprising a switching unit, a power conversion unit, a drive circuit, a feedback circuit, a zero-current detection circuit, a duty cycle limiting circuit and an AND gate. The drive circuit is a current-mode controlled pulse width modulation (PWM) control loop, which is a current-mode controlled PWM integrated circuit. The feedback circuit is a feedback integrated circuit, and the AND gate is integrated into the feedback unit. The power conversion unit comprises a transformer and a rectifier/filter circuit. The zero-current detection unit can detect whether the input inductor current is zero, if the input inductor current is zero, a first logic signal is generated, then the asymmetric half-bridge switch is allowed to perform switching. The duty cycle limiting circuit extracts a conduction cycle signal, determines whether the conduction cycle signal is less than 0.5, and generates a second logic signal, so as to ensure that the asymmetric half-bridge has a duty cycle ratio less than 0.5. When the first logic signal and the second logic signal are both true, a switch conduction signal is generated through the AND gate to ensure the zero-current switching and that the duty cycle ratio is less than 0.5. The present invention mainly addresses the problem of conventional single-stage high power factor asymmetric half-bridge converters, in which the circuit component specifications must be subjected to special calculations in order to achieve the zero-voltage switching. With the circuit configuration disclosed in this invention, not only the zero-voltage switching function can be achieved without requiring special design of the input inductor, but also the duty cycle ratio of the switching device in a half-bridge converter can be guaranteed to be less than 0.5, thereby ensuring the normal operation of a single-stage high power factor half-bridge switching unit.

Description

單級高功因零電流偵測變頻式非對稱半橋轉換器Single-stage high-power zero-current detection variable frequency asymmetric half-bridge converter

【1】 本發明係有關於一種單級高功因零電流偵測變頻式非對稱半橋轉換器,尤其係指一種可偵測電力轉換單元內輸入電感電流為零,確保開關裝置為零電壓切換(Zero Voltage Switching, ZVS)以降低開關切換效率損失,效率可達91%,並保證開關裝置責任週期比(Duty Cycle Ratio)小於0.5以使非對稱半橋轉換器能正常工作。[1] The present invention relates to a single-stage high-power-dependent zero-current detecting variable-frequency asymmetric half-bridge converter, in particular to a zero-input inductor current in a detectable power conversion unit, ensuring zero voltage of the switching device Zero Voltage Switching (ZVS) reduces switching switching efficiency loss by up to 91% and ensures that the switching device duty cycle ratio is less than 0.5 for the asymmetric half-bridge converter to work properly.

【2】 隨著現代科技的進步與可攜式電子產品的蓬勃發展,轉換器的效能及各項應用亦越來越受到重視,而功率因數修正(Power Factor Correction, PFC)正是檢視轉換器效能的重要指標之一。【3】 現今之轉換器技術,已可做到將功率因數修正之功能整合至非對稱半橋轉換器內使其為一單級電路,使該轉換器之功率避免因兩級電路間傳遞而造成轉換效率下降;而達到此一目的之技術,通常是在開關裝置前增加一輸入電感,利用該輸入電感的濾波特性來修正電流波型,進而達到電路自體功率因數修正之功能。然而,該輸入電感之規格,需與電路配合進行複雜的計算,才能使開關達到零電壓切換(Zero Voltage Switching, ZVS),以避免非零電壓時操作非對稱半橋式開關單元造成的切換損失。【4】 如第一圖所示,該圖為習知的非對稱半橋轉換器(Half-bridge converter)2,該非對稱半橋轉換器2是將由直流電源1所輸出的一第一直流電力轉換為一第二直流電力,而該第二直流電力之電流與電壓將具有固定之位準而形成一平穩之輸出,且可由該轉換器(converter)電路之設定而改變該第二直流電力之電壓位準;現今所使用之轉換器(converter)架構如第一圖所示,該轉換器包含一非對稱半橋式開關單元21、一電力轉換單元22、一產生一導通週期訊號之驅動電路23以及產生一回授訊號之一回授電路24,其中該非對稱半橋式開關單元21內具有至少二開關裝置211,用以連接一直流電源1取得一第一直流電力,而該導通週期訊號控制該開關裝置211導通該第一直流電力流經該電力轉換單元22之責任週期(duty cycle),由該電力轉換單元22將該第一直流電力轉換為一第二直流電力並輸出,又該回授電路24係自該第二直流電力擷取一回授訊號送至該驅動電路23,藉此調整該導通週期訊號以改變該半橋式開關單元21之責任週期,達到該轉換器之輸出具有隨負載調整之回授穩壓功能。【5】 而該開關裝置211要達到該轉換器能夠正常穩定工作,必須使該非對稱半橋式開關電路21之責任週期比(duty cycle ratio)小於0.5,當責任週期比大於0.5時,則會造成該轉換器無法正常運作;為了避免該轉換器之輸出隨負載而變動,輸出回授之功能將會調整該開關裝置211之責任週期比而產生變動,若該轉換器無法一直維持責任週期比小於0.5,則將導致非對稱半橋轉換器無法正常運作,應提供一改善之措施。[2] With the advancement of modern technology and the booming of portable electronic products, converter performance and various applications are receiving more and more attention, and Power Factor Correction (PFC) is the inspection converter. One of the important indicators of effectiveness. [3] Today's converter technology has been able to integrate the power factor correction function into an asymmetric half-bridge converter to make it a single-stage circuit, so that the power of the converter can be avoided due to the transmission between the two-stage circuits. The conversion efficiency is reduced; and the technology for achieving this purpose is usually to add an input inductor in front of the switching device, and use the filtering characteristic of the input inductor to correct the current waveform, thereby achieving the function of the circuit self-power factor correction. However, the specification of the input inductor needs to be complicated with the circuit to make the switch reach Zero Voltage Switching (ZVS) to avoid the switching loss caused by operating the asymmetric half-bridge switching unit at non-zero voltage. . [4] As shown in the first figure, the figure is a conventional asymmetric half bridge converter 2, which is a first DC power to be output by the DC power source 1. Converting to a second DC power, the current and voltage of the second DC power will have a fixed level to form a smooth output, and the second DC power can be changed by the setting of the converter circuit The voltage level; the converter structure used today is as shown in the first figure, the converter comprises an asymmetric half-bridge switching unit 21, a power conversion unit 22, and a driving circuit for generating a conduction period signal. And a feedback circuit 24 for generating a feedback signal, wherein the asymmetric half-bridge switch unit 21 has at least two switching devices 211 for connecting the DC power source 1 to obtain a first DC power, and the ON period signal Controlling the switching device 211 to turn on a duty cycle of the first DC power flowing through the power conversion unit 22, and the power conversion unit 22 converts the first DC power into a second DC power And outputting the feedback circuit 24 from the second DC power to the drive circuit 23, thereby adjusting the conduction period signal to change the duty cycle of the half bridge switch unit 21, to achieve the The output of the converter has a feedback regulation that is adjusted with the load. [5] When the switching device 211 is to achieve normal and stable operation of the converter, the duty cycle ratio of the asymmetric half-bridge switching circuit 21 must be less than 0.5, and when the duty cycle ratio is greater than 0.5, The converter does not operate normally; in order to prevent the output of the converter from changing with the load, the output feedback function will adjust the duty cycle ratio of the switching device 211 to change, if the converter cannot maintain the duty cycle ratio at all times Less than 0.5 will cause the asymmetric half-bridge converter to malfunction, and an improvement should be provided.

【6】 故為解決習知方式之問題,發明人乃經悉心研究與實驗,研發出本案所提出之單級高功因零電流偵測變頻式非對稱半橋轉換器,乃將一單級高功因非對稱半橋轉換器中,將單級高功因半橋式開關單元內的輸入電感耦接於一零電流偵測電路,藉此偵測該輸入電感內之電流量是否為零,以避免該電流影響開關裝置而無法達到零電壓切換;此外,為避免該零電流偵測電路之運作影響開關裝置,使開關裝置的責任週期比無法小於0.5而無法正常運作,因此另外增加一責任週期控制電路,用以確保該非對稱半橋式轉換器之正常運作。【7】 為達前述之目的,本案提供一種單級高功因零電流偵測變頻式非對稱半橋轉換器,其包含:一單級高功因非對稱半橋式開關單元、一電力轉換單元、一驅動電路、一回授電路、一零電流偵測電路、一責任週期限制電路以及一及閘(AND Gate);該單級高功因非對稱半橋式開關單元內包含一輸入電感及至少二開關裝置;該單級高功因非對稱半橋式開關單元接收一第一直流電力,透過該驅動電路所產生之一導通週期訊號驅動該開關裝置而切換該第一直流電力至該電力轉換單元,以令該電力轉換單元轉換該第一直流電力為一第二直流電力;該回授電路係自該第二直流電力擷取一輸出電壓,並執行該輸出電壓與該預定電壓的比較,來產生一個誤差電壓,當開關電流感測電阻上之電壓超過誤差電壓時,產生一關閉訊號;該零電流偵測電路耦接於該輸入電感,以判斷該輸入電感上之電流是否為零,並產生一第一邏輯訊號,以保證下開關能完成零電流Turn-on;該責任週期限制電路係擷取該導通週期訊號,判斷該導通週期訊號是否符合小於0.5,並產生一第二邏輯訊號;該及閘接收該第一邏輯訊號與該第二邏輯訊號,以產生一判斷訊號給該回授電路,使該回授電路產生一開啟訊號;該驅動電路透過接收回授電路的關閉訊號與開啟訊號,產生該導通週期訊號。【8】 本案所提出之單級高功因零電流偵測變頻式非對稱半橋轉換器具有以下有益效果:【9】 1.透過一零電流偵測電路連接於單級高功因非對稱半橋式電力控制單元內之輸入電感,用以偵測該輸入電感內之電流為零,以確保該單級高功因非對稱半橋式開關單元可達到零電壓切換之功能。【10】 2. 藉由一責任週期限制電路耦接於一驅動電路,接收該驅動電路所產生之導通週期訊號並進行判斷及調整PWM訊號的輸出,以避免因開關裝置之責任週期比大於0.5所造成非對稱半橋式轉換器無法正常運作的問題。[6] Therefore, in order to solve the problem of the conventional method, the inventor has carefully studied and experimented and developed the single-stage high-power zero-current detection variable-frequency asymmetric half-bridge converter proposed in this case, which will be a single stage. In the high-power asymmetric half-bridge converter, the input inductance in the single-stage high-power half-bridge switching unit is coupled to a zero current detecting circuit, thereby detecting whether the current in the input inductor is zero or not. In order to prevent the current from affecting the switching device and failing to achieve zero voltage switching; in addition, in order to prevent the operation of the zero current detecting circuit from affecting the switching device, the duty cycle ratio of the switching device cannot be less than 0.5 and cannot operate normally, so an additional one is added. A duty cycle control circuit to ensure proper operation of the asymmetric half bridge converter. [7] For the purpose of the foregoing, the present invention provides a single-stage high-power zero-current detection variable frequency asymmetric half-bridge converter, which comprises: a single-stage high-power-dependent asymmetric half-bridge switching unit, and a power conversion a unit, a driving circuit, a feedback circuit, a zero current detecting circuit, a duty cycle limiting circuit, and an AND gate; the single-stage high-power asymmetric half-bridge switching unit includes an input inductor And at least two switching devices; the single-stage high-power switch receives a first DC power due to the asymmetric half-bridge switching unit, and drives the switching device through a driving period signal generated by the driving circuit to switch the first DC power to the a power conversion unit, wherein the power conversion unit converts the first DC power into a second DC power; the feedback circuit draws an output voltage from the second DC power, and performs the output voltage and the predetermined voltage Comparing to generate an error voltage, when the voltage on the switch current sensing resistor exceeds the error voltage, generating a turn-off signal; the zero current detecting circuit is coupled to the input inductor to Determining whether the current on the input inductor is zero, and generating a first logic signal to ensure that the lower switch can complete the zero current Turn-on; the duty cycle limiting circuit takes the conduction period signal to determine whether the conduction period signal is The feedback is less than 0.5 and generates a second logic signal; the gate receives the first logic signal and the second logic signal to generate a determination signal to the feedback circuit, so that the feedback circuit generates an enable signal; The driving circuit generates the conduction period signal by receiving the closing signal and the opening signal of the feedback circuit. [8] The single-stage high-power zero-current detection variable-frequency asymmetric half-bridge converter proposed in this case has the following beneficial effects: [9] 1. Connected to a single-stage high-power-dependent asymmetry through a zero-current detection circuit The input inductor in the half-bridge power control unit is used to detect zero current in the input inductor to ensure that the single-stage high-power function can achieve zero voltage switching due to the asymmetric half-bridge switching unit. [10] 2. A duty cycle limiting circuit is coupled to a driving circuit, receives the conduction period signal generated by the driving circuit, and determines and adjusts the output of the PWM signal to avoid that the duty cycle ratio of the switching device is greater than 0.5. The problem caused by the asymmetric half-bridge converter is not working properly.

【14】 為使能更進一步瞭解本案之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,使得熟習本方法之人士可以據以完成之。用以達到電壓轉換與穩定輸出電壓的效果,及開關裝置可以達到零電流切換的效果,並使轉換器具有功因調整之功能。【15】 為助於實施者辨明本發明之精要,請參閱第二圖,該圖為本發明之單級高功因零電流偵測變頻式非對稱半橋轉換器3,該單級高功因零電流偵測變頻式非對稱半橋轉換器3包含一單級高功因非對稱半橋式開關單元31、一電力轉換單元32、一驅動電路33、一回授電路34、一零電流偵測電路35、一責任週期限制電路36以及一及閘(AND Gate)37;該單級高功因非對稱半橋式開關單元31內包含一輸入電感311及至少二開關裝置312;該單級高功因非對稱半橋式開關單元31接收一第一直流電力,透過該驅動電路33所產生之一導通週期訊號驅動該開關裝置312而切換該第一直流電力至該電力轉換單元32,以令該電力轉換單元32轉換該第一直流電力為一第二直流電力;其中,該輸入電感311本身被動元件的濾波特性,加上開關導通時間固定,進而達到功率因數修正之功能。【16】 而驅動該開關裝置312之該導通週期訊號,則是該驅動電路312透過接收該回授電路34所產生之一開啟訊號或一關閉訊號來決定;該回授電路34自該第二直流電力擷取一輸出電壓,並執行該輸出電壓與該預定電壓的比較,來產生一關閉訊號。【17】 該零電流偵測電路35耦接於該輸入電感311,以判斷該輸入電感311上之電流是否為零,並產生一第一邏輯訊號,透過該零電流偵測電路35來確保該開關裝置312不會因該輸入電感311上所產生之電流的影響,而無法達到零電壓切換(Zero Voltage Switching, ZVS)的條件。【18】 而由於該第一直流電壓之輸入電壓是呈現M型波的型態呈現,因此該輸入電感311上的電流會因輸入電壓之變動而改變,造成電流歸零的時間不一定,故若單純以零電流偵測是為了不要干擾到非對稱半橋之零電壓切換,需當輸入電感電流為零時,非對稱半橋之開關才可以進行切換動作,當電感電流為零時,由零電流偵測電路35輸出第一邏輯訊號。【19】 如果該開關裝置312的開啟時間大於關閉時間,亦即責任週期比無法小於0.5,使得該單級高功因非對稱半橋式開關單元無法正常運作,造成輸出功率下降或甚至無法輸出,因此需在上述電路中加入該責任週期限制電路36。【20】 該責任週期限制電路36係擷取該導通週期訊號,判斷該導通週期訊號是否符合小於0.5,並產生一第二邏輯訊號;並透過該及閘37接收該第一邏輯訊號與該第二邏輯訊號,判斷同時滿足“輸入電感311零電流”與“責任週期小於0.5”此兩個條件,該及閘37則產生一判斷訊號給該回授電路24,使該回授電路24產生一開啟訊號,該驅動電路33透過接收該關閉訊號與該開啟訊號,進而產生下開關導通週期訊號。【21】 而如第三圖所示,該圖為本發明之第一實施例的電路圖,如圖所示,該及閘37並不限定以獨立電路的型態存在,而是將該及閘之電路功能整合於該回授電路24內,而不限於只有將該及閘以獨立電路來呈現。【22】 以上所述者僅為用以解釋本發明之較佳實施例,並非企圖據以對本發明做任何形式上之限制,凡有在相同之發明精神下所作有關本發明之任何修飾或變更,皆仍應包括在本發明意圖保護之範疇。[14] To enable a further understanding of the features and technical aspects of the present invention, reference is made to the following detailed description of the invention and the accompanying drawings, so that those skilled in the art can do so. It is used to achieve the effect of voltage conversion and stable output voltage, and the switching device can achieve the effect of zero current switching, and the converter has the function of adjusting the power factor. [15] In order to help the implementer to clarify the essence of the present invention, please refer to the second figure, which is a single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter 3 of the present invention, which is high in single stage. The power factor zero current detection variable frequency asymmetric half bridge converter 3 comprises a single stage high power factor asymmetric half bridge type switching unit 31, a power conversion unit 32, a driving circuit 33, a feedback circuit 34, and a zero a current detecting circuit 35, a duty cycle limiting circuit 36, and an AND gate 37; the single-stage high-power asymmetrical half-bridge switching unit 31 includes an input inductor 311 and at least two switching devices 312; The single-stage high-power asymmetrical half-bridge switch unit 31 receives a first DC power, and drives the switch device 312 through a turn-on period signal generated by the drive circuit 33 to switch the first DC power to the power conversion unit 32. The power conversion unit 32 converts the first DC power into a second DC power; wherein the input inductor 311 itself has a filtering characteristic of the passive component, and the switch ON time is fixed, thereby achieving the power factor correction function. [16] The driving period 312 of the switching device 312 is determined by the driving circuit 312 receiving an opening signal or a closing signal generated by the feedback circuit 34; the feedback circuit 34 is from the second The DC power draws an output voltage and performs a comparison of the output voltage with the predetermined voltage to generate a turn-off signal. The zero current detecting circuit 35 is coupled to the input inductor 311 to determine whether the current on the input inductor 311 is zero, and generates a first logic signal, and the zero current detecting circuit 35 ensures the The switching device 312 does not have the effect of zero voltage switching (ZVS) due to the influence of the current generated on the input inductor 311. [18] Since the input voltage of the first DC voltage is in the form of an M-type wave, the current on the input inductor 311 changes due to the change of the input voltage, and the time for returning the current to the zero is not necessarily, so If the zero current detection is simply to avoid interference with the zero voltage switching of the asymmetric half bridge, the switch of the asymmetric half bridge can be switched when the input inductor current is zero. When the inductor current is zero, The zero current detecting circuit 35 outputs the first logic signal. [19] If the opening time of the switching device 312 is greater than the closing time, that is, the duty cycle ratio cannot be less than 0.5, the single-stage high power due to the asymmetric half-bridge switching unit cannot operate normally, causing the output power to drop or even fail to output. Therefore, the duty cycle limiting circuit 36 needs to be added to the above circuit. [20] The duty cycle limiting circuit 36 captures the conduction period signal, determines whether the conduction period signal meets less than 0.5, and generates a second logic signal; and receives the first logic signal and the first through the gate 37 The two logic signals determine that both the "input inductor 311 zero current" and the "responsibility period is less than 0.5" are satisfied, and the gate 37 generates a judgment signal to the feedback circuit 24, so that the feedback circuit 24 generates a When the signal is turned on, the driving circuit 33 receives the turn-off signal and the turn-on signal, thereby generating a switch-on period signal. [21] As shown in the third figure, the figure is a circuit diagram of the first embodiment of the present invention. As shown in the figure, the gate 37 is not limited to the type of the independent circuit, but the gate is The circuit function is integrated into the feedback circuit 24, and is not limited to only presenting the NAND gate in a separate circuit. [22] The above description is only for the purpose of explaining the preferred embodiments of the present invention, and is not intended to limit the invention in any way. Any modification or alteration of the present invention in the spirit of the same invention. All should still be included in the scope of the intention of the present invention.

1...直流電源1. . . DC power supply

2...非對稱半橋轉換器2. . . Asymmetric half bridge converter

21...非對稱半橋式開關單元twenty one. . . Asymmetric half bridge switch unit

211...開關裝置211. . . Switching device

22...電力轉換單元twenty two. . . Power conversion unit

23...驅動電路twenty three. . . Drive circuit

24...回授電路twenty four. . . Feedback circuit

3...單級高功因零電流偵測變頻式非對稱半橋轉換器3. . . Single-stage high-power zero-current detection variable frequency asymmetric half-bridge converter

31...單級高功因非對稱半橋式開關單元31. . . Single-stage high-power-dependent asymmetric half-bridge switching unit

311...輸入電感311. . . Input inductance

312...開關裝置312. . . Switching device

32...電力轉換單元32. . . Power conversion unit

33...驅動電路33. . . Drive circuit

34...回授電路34. . . Feedback circuit

35...零電流偵測電路35. . . Zero current detection circuit

36...責任週期限制電路36. . . Accountability cycle limiting circuit

37...及閘37. . . Gate

4...經全波整流為M型波之直流電源4. . . Full-wave rectified to M-wave DC power supply

【11】 第一圖:習知之非對稱半橋轉換器的電路圖。【12】 第二圖:本發明之單級高功因零電流偵測變頻式非對稱半橋轉換器的電路圖。【13】 第三圖:本發明之第一實施例的電路圖。[11] First: Circuit diagram of a conventional asymmetric half-bridge converter. [12] The second figure: The circuit diagram of the single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter of the present invention. [13] Third drawing: A circuit diagram of the first embodiment of the present invention.

3...單級高功因零電流偵測變頻式非對稱半橋轉換器3. . . Single-stage high-power zero-current detection variable frequency asymmetric half-bridge converter

31...單級高功因非對稱半橋式開關單元31. . . Single-stage high-power-dependent asymmetric half-bridge switching unit

311...輸入電感311. . . Input inductance

312...開關裝置312. . . Switching device

32...電力轉換單元32. . . Power conversion unit

33...驅動電路33. . . Drive circuit

34...回授電路34. . . Feedback circuit

35...零電流偵測電路35. . . Zero current detection circuit

36...責任週期限制電路36. . . Accountability cycle limiting circuit

37...及閘37. . . Gate

4...經全波整流為M型波之直流電源4. . . Full-wave rectified to M-wave DC power supply

Claims (9)

一種單級高功因零電流偵測變頻式非對稱半橋轉換器,包含:一單級高功因非對稱半橋式開關單元、一電力轉換單元、一驅動電路、一回授電路、一零電流偵測電路、一責任週期限制電路以及一及閘(AND Gate);該單級高功因非對稱半橋式開關單元內包含一輸入電感及至少二開關裝置;該單級高功因非對稱半橋式電力控制單元接收一第一直流電力,透過該驅動電路所產生之一導通週期訊號驅動該開關裝置而切換該第一直流電力至該電力轉換單元,以令該電力轉換單元轉換該第一直流電力為一第二直流電力;該回授電路係自該第二直流電力擷取一輸出電壓,並執行該輸出電壓與該預定電壓的比較,來產生一誤差訊號,用於決定下開關關閉時間;該零電流偵測電路耦接於該輸入電感,以判斷該輸入電感上之電流是否為零,並產生一第一邏輯訊號;該責任週期限制電路係擷取該導通週期訊號,判斷該導通週期訊號是否符合小於0.5,並產生一第二邏輯訊號;該及閘接收該第一邏輯訊號與該第二邏輯訊號,以產生一判斷訊號給該回授電路,使該回授電路產生一開啟訊號;該驅動電路透過接收該關閉訊號與該開啟訊號,產生該導通週期訊號。A single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter comprises: a single-stage high-power-dependent asymmetric half-bridge switching unit, a power conversion unit, a driving circuit, a feedback circuit, and a a zero current detecting circuit, a duty cycle limiting circuit and an AND gate; the single stage high power asymmetrical half bridge switching unit comprises an input inductor and at least two switching devices; the single stage high power factor The asymmetric half-bridge power control unit receives a first DC power, drives the switching device through a driving period signal generated by the driving circuit, and switches the first DC power to the power conversion unit to convert the power conversion unit The first DC power is a second DC power; the feedback circuit draws an output voltage from the second DC power, and performs comparison of the output voltage with the predetermined voltage to generate an error signal for determining a lower switch detection time; the zero current detection circuit is coupled to the input inductor to determine whether the current on the input inductor is zero, and generate a first logic signal; The period limiting circuit captures the conduction period signal, determines whether the conduction period signal meets less than 0.5, and generates a second logic signal; the gate receives the first logic signal and the second logic signal to generate a determination signal The feedback circuit is configured to generate an enable signal by the feedback circuit; the drive circuit generates the turn-on period signal by receiving the turn-off signal and the turn-on signal. 如專利申請範圍第1項所述之單級高功因零電流偵測變頻式非對稱半橋轉換器,其中該驅動電路為一電流模式控制之脈波寬度調變(Pulse Width Modulation, PWM)控制迴路。The single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter according to the first application of the patent application scope, wherein the driving circuit is a pulse mode width modulation (PWM) of current mode control. Control loop. 如專利申請範圍第2項所述之單級高功因零電流偵測變頻式非對稱半橋轉換器,其中該電流模式控制之脈波寬度調變控制迴路為一電流模式控制之脈波寬度調變積體電路。The single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter according to the second application of the patent application scope, wherein the current mode control pulse width modulation control loop is a current mode controlled pulse width Modulate the integrated circuit. 如專利申請範圍第1項所述之單級高功因零電流偵測變頻式非對稱半橋轉換器,其中該回授電路為一回授積體電路。The single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter according to the first application of the patent application scope, wherein the feedback circuit is a back-embedded circuit. 如專利申請範圍第1項所述之單級高功因零電流偵測變頻式非對稱半橋轉換器,其中該及閘整合於該回授單元中。The single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter according to the first aspect of the patent application, wherein the gate is integrated in the feedback unit. 如專利申請範圍第1項所述之單級高功因零電流偵測變頻式非對稱半橋轉換器,其中該電力轉換單元包括一變壓器以及一整流濾波電路。The single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter according to the first aspect of the patent application, wherein the power conversion unit comprises a transformer and a rectifying and filtering circuit. 如專利申請範圍第1項所述之單級高功因零電流偵測變頻式非對稱半橋轉換器,其中該零電流偵測單元可以偵測輸入電感電流為零,如果輸入電感電流為零時,產生第一邏輯訊號,非對稱半橋開關才能進行切換動作。The single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter according to the first application of the patent application scope, wherein the zero current detecting unit can detect that the input inductor current is zero, if the input inductor current is zero When the first logic signal is generated, the asymmetric half bridge switch can perform the switching action. 如專利申請範圍第1項所述之單級高功因零電流偵測變頻式非對稱半橋轉換器,其中該責任週期限制電路係擷取該導通週期訊號,判斷該導通週期訊號是否符合小於0.5,並產生一第二邏輯訊號,以確保非對稱半橋責任週期小於0.5,使電路能夠正常運作。The single-stage high-power zero-current detecting variable frequency asymmetric half-bridge converter according to the first aspect of the patent application, wherein the duty cycle limiting circuit captures the conduction period signal to determine whether the conduction period signal is less than 0.5, and generate a second logic signal to ensure that the asymmetric half-bridge duty cycle is less than 0.5, so that the circuit can operate normally. 當第一邏輯訊號與該第二邏輯訊號均成立時,經由及閘產生一開關導通訊號,以確保零電流切換,及責任週期小於0.5。When both the first logic signal and the second logic signal are established, a switch communication number is generated via the AND gate to ensure zero current switching, and the duty cycle is less than 0.5.
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