TW201432937A - Led element - Google Patents

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TW201432937A
TW201432937A TW103100646A TW103100646A TW201432937A TW 201432937 A TW201432937 A TW 201432937A TW 103100646 A TW103100646 A TW 103100646A TW 103100646 A TW103100646 A TW 103100646A TW 201432937 A TW201432937 A TW 201432937A
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layer
led element
semiconductor
semiconductor layer
current diffusion
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TW103100646A
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TWI535054B (en
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Kohei Miyoshi
Masashi Tsukihara
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Ushio Electric Inc
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Abstract

Provided is an LED element that ensures horizontal current spreading within an active layer, improving light-emission efficiency, without causing problems due to lattice mismatch in an n-type semiconductor layer adjacent to said active layer. This LED element, which is obtained by inducing c-axis growth of nitride semiconductor layers on top of a support substrate, has the following: a first semiconductor layer comprising an n-type nitride semiconductor a current-diffusion layer an active layer comprising a nitride semiconductor and a second semiconductor layer comprising a p-type nitride semiconductor. The current-diffusion layer contains a heterojunction between a third semiconductor layer comprising InxGa1 - xN (with 0 < x <= 0.05) and a fourth semiconductor layer comprising n-Aly1Gay2Iny3N (with 0 < y1 < 1, 0 < y2 < 1, 0 <= y3 <= 0.05, and y1+y2+y3 = 1), said third semiconductor layer being between 10 and 25 nm thick, inclusive.

Description

LED元件 LED component

本發明係關於LED元件,尤其關於以氮化物半導體所構成的LED元件。 The present invention relates to LED elements, and more particularly to LED elements constructed of nitride semiconductors.

先前,作為使用氮化物半導體的LED元件,如以藍色發光二極體為代表,於藍寶石基板上藉由磊晶成長,形成半導體層構造體(層積半導體基板)。此種技術係例如於後述專利文獻1及專利文獻2所揭示。 In the LED element using a nitride semiconductor, a semiconductor layer structure (laminated semiconductor substrate) is formed by epitaxial growth on a sapphire substrate, as represented by a blue light-emitting diode. Such a technique is disclosed, for example, in Patent Document 1 and Patent Document 2 which will be described later.

於專利文獻1,揭示具有於藍寶石基板上,依序層積作為n型氮化物半導體,由氮化鎵(GaN)所成之n型接觸層、由n-AlGaN所成之n型被覆層、由n-InGaN所成之活性層、由p-AlGaN所成之p型被覆層、由p-GaN所成之p型接觸層之構造的LED。活性層係利用單量子井結構或多量子井結構來實現。 Patent Document 1 discloses an n-type contact layer formed of gallium nitride (GaN) and an n-type cladding layer made of n-AlGaN, which are sequentially laminated on a sapphire substrate as an n-type nitride semiconductor. An LED composed of an active layer made of n-InGaN, a p-type cladding layer made of p-AlGaN, and a p-type contact layer made of p-GaN. The active layer is realized using a single quantum well structure or a multiple quantum well structure.

然後,藍寶石基板與n型接觸層之間,形成有由GaN、AlGaN或AlN所成的緩衝層。於形成活性層的n-InGaN,摻雜有Si及Gc等的施體不純物及/或Zn及Mg等的受體不純物。 Then, a buffer layer made of GaN, AlGaN, or AlN is formed between the sapphire substrate and the n-type contact layer. The n-InGaN forming the active layer is doped with a donor impurity such as Si or Gc and/or an acceptor impurity such as Zn or Mg.

於專利文獻2,揭示在形成LED的層積半導體中,於面方位對齊於c軸方向的AlN上,成長形成比其晶格參數大,且面方位對齊於c軸方向的GaN層,並於其上依序形成比其晶格參數小的n-AlGaN層、具有多量子井結構的活性層、p-AlGaN層的內容。 Patent Document 2 discloses that in a laminated semiconductor in which an LED is formed, a GaN layer having a larger crystal lattice parameter and a plane orientation aligned with the c-axis direction is grown on AlN having a plane orientation aligned with the c-axis direction. The contents of the n-AlGaN layer having a smaller lattice parameter, the active layer having a multi-quantum well structure, and the p-AlGaN layer are sequentially formed thereon.

[先前技術文獻] [Previous Technical Literature] [專利文獻] [Patent Literature]

[專利文獻1]日本特開平10-93138號公報 [Patent Document 1] Japanese Patent Laid-Open No. Hei 10-93138

[專利文獻2]日本特開2005-209925號公報 [Patent Document 2] Japanese Patent Laid-Open Publication No. 2005-209925

GaN及AlGaN等的氮化物半導體係具有纖維鋅礦型結晶構造(六方晶體構造)。纖維鋅礦型結晶構造之面係利用4指數表記(六方晶體指數),使用以a1、a2、a3及c所示之基本向量,表示結晶面及方位。基本向量c係延伸於[0001]方向,該方向稱為「c軸」。垂直於c軸之面係稱為「c面」或「(0001)面」。 A nitride semiconductor such as GaN or AlGaN has a wurtzite crystal structure (hexagonal crystal structure). The surface of the wurtzite crystal structure is represented by a 4 index (hexagonal crystal index), and the basic planes indicated by a1, a2, a3, and c are used to indicate the crystal plane and orientation. The basic vector c extends in the [0001] direction, which is called the "c-axis". The plane perpendicular to the c-axis is called "c-plane" or "(0001) plane".

先前,使用氮化物半導體來製作半導體元件時,作為使氮化物半導體結晶成長的基板,使用主面具有c面基板的基板。實際上,於該基板上使無摻雜的GaN層成長,近而,於其上層使n型的氮化物半導體層成長。 When a semiconductor element is produced using a nitride semiconductor, a substrate having a c-plane substrate on its main surface is used as a substrate for crystal growth of a nitride semiconductor. Actually, the undoped GaN layer is grown on the substrate, and the n-type nitride semiconductor layer is grown in the upper layer.

圖7係揭示先前之LED元件90的構造的概略 剖面圖。再者,於以下圖面中,實際的尺寸比與圖面上的尺寸比不一定一致。 Figure 7 is a diagram showing the outline of the construction of the prior LED element 90. Sectional view. Furthermore, in the following figures, the actual size ratio does not necessarily coincide with the size ratio on the drawing.

LED元件90係於藍寶石等的支持基板11的上層,具有例如以3μm的膜厚形成無摻雜之GaN層的無摻雜層13,與其上層,例如以1.5μm的膜厚形成n-AlGaN層的n型被覆層15。進而,LED元件90係於n型型被覆層15的上層,交互層積例如構成量子井層之膜厚2nm的InGaN與構成障壁層之膜厚5nm的AlGaN,藉此形成MQW(Multi-quantum Well:多重量子井)的活性層17。進而,LED元件90係於活性層17的上層,具有例如以p-AlGaN形成之p型被覆層19,於其上層具有以p+-GaN層形成之P型接觸層21。再者,LED元件90係因應需要,在活性層17與p型被覆層19之間,具有以AlGaN形成之最後阻障層。 The LED element 90 is attached to the upper layer of the support substrate 11 such as sapphire, and has, for example, an undoped layer 13 in which an undoped GaN layer is formed with a film thickness of 3 μm, and an upper layer, for example, a film thickness of 1.5 μm to form an n-AlGaN layer. The n-type cladding layer 15. Further, the LED element 90 is attached to the upper layer of the n-type cladding layer 15 to alternately laminate, for example, InGaN having a thickness of 2 nm which constitutes a quantum well layer and AlGaN having a thickness of 5 nm which constitutes the barrier layer, thereby forming MQW (Multi-quantum Well) : The active layer 17 of a multiple quantum well). Further, the LED element 90 is provided on the upper layer of the active layer 17, and has, for example, a p-type cladding layer 19 formed of p-AlGaN, and a P-type contact layer 21 formed of a p+-GaN layer on the upper layer. Further, the LED element 90 has a final barrier layer formed of AlGaN between the active layer 17 and the p-type cladding layer 19 as needed.

在此,構成n型被覆層15的AlGaN係晶格參數小於構成其下層之無摻雜層13的GaN。因此,於n型被覆層15內會產生起因於晶格不匹配的拉伸應力81。再者,拉伸應力81所示之箭頭表示應力的朝向。該拉伸應力81係與n型被覆層15的膜厚之增大一起增大,超過某臨限值的話,會產生伴隨於表面粗化及被覆、結晶缺陷的錯位差排,導致發光效率的降低。 Here, the AlGaN-based lattice parameter constituting the n-type cladding layer 15 is smaller than the GaN of the undoped layer 13 constituting the lower layer. Therefore, tensile stress 81 due to lattice mismatch occurs in the n-type cladding layer 15. Further, the arrow indicated by the tensile stress 81 indicates the orientation of the stress. The tensile stress 81 increases with the increase in the film thickness of the n-type coating layer 15. When the thickness exceeds a certain threshold, misalignment is caused by surface roughening, coating, and crystal defects, resulting in luminous efficiency. reduce.

另一方面,n型被覆層15的膜厚過薄時,對形成於p型接觸層21之上面的供電端子(未圖示)與n型被覆層15之間施加電壓的話,從供電端子,電流會透過 位於其正下方附近之p型接觸層21、p型被覆層19、活性層17,往n型被覆層15流通。因此,電流僅流通活性層17內之一部分的區域,發光區域變少,結果導致發光效率的降低。進而,因電流流通於活性層17的一部分,局部發生電流集中,產生在活性層17內之載波的不均勻性,無法取得高發光強度。 On the other hand, when the film thickness of the n-type cladding layer 15 is too thin, when a voltage is applied between the power supply terminal (not shown) formed on the upper surface of the p-type contact layer 21 and the n-type cladding layer 15, the power supply terminal is used. Current will pass through The p-type contact layer 21, the p-type cladding layer 19, and the active layer 17 located near the lower side thereof are distributed to the n-type cladding layer 15. Therefore, the current flows only in a portion of one portion of the active layer 17, and the light-emitting region becomes small, resulting in a decrease in luminous efficiency. Further, since a current flows in a part of the active layer 17, a local concentration occurs locally, and a carrier of the carrier layer 17 is uneven, and high luminous intensity cannot be obtained.

本發明係有鑑於前述課題,目的為實現不會產生起因於鄰接於活性層之n型半導體層的晶格不匹配的課題,確保活性層內之水平方向的電流擴散,提升發光效率的LED元件。 The present invention has been made in view of the above-described problems, and an object of the present invention is to provide an LED element which does not cause a lattice mismatch due to an n-type semiconductor layer adjacent to an active layer, and which ensures current diffusion in a horizontal direction in an active layer and improves luminous efficiency. .

本發明的LED元件,係於支持基板上使氮化物半導體層c軸成長所成的LED元件,其特徵為:具有:第1半導體層,係以n型氮化物半導體所構成;電流擴散層,係形成於前述第1半導體層的上層;活性層,係形成於前述電流擴散層的上層,以氮化物半導體所構成;及第2半導體層,係形成於前述活性層的上層,且以p型氮化物半導體所構成;前述電流擴散層,係具有由InxGa1-xN(0<x≦0.05)所成之第3半導體層,與由n-AlyGa1-yN(0<y≦1)所成之第4半導體層的異質連接,前述第3半導體層的膜厚為10nm以上25nm以下。 The LED element of the present invention is an LED element formed by growing a nitride semiconductor layer c-axis on a support substrate, and has a first semiconductor layer formed of an n-type nitride semiconductor and a current diffusion layer. The upper layer of the first semiconductor layer is formed; the active layer is formed on the upper layer of the current diffusion layer, and is formed of a nitride semiconductor; and the second semiconductor layer is formed on the upper layer of the active layer, and is p-type a nitride semiconductor; the current diffusion layer has a third semiconductor layer formed of In x Ga 1-x N (0 < x ≦ 0.05), and n-Al y Ga 1-y N (0<异1) The heterojunction of the fourth semiconductor layer formed, wherein the thickness of the third semiconductor layer is 10 nm or more and 25 nm or less.

藉由由InxGa1-xN所成之第3半導體層與由 n-AlyGa1-yN所成之第4半導體層的異質連接,因兩材料之能帶隙的不同,於兩層的界面形成能帶彎區域。於該能帶彎區域,形成水平方向移動度高的2維電子氣體層。 By the heterojunction of the third semiconductor layer formed of In x Ga 1-x N and the fourth semiconductor layer formed of n-Al y Ga 1-y N, due to the difference in energy band gap between the two materials, The interface between the two layers forms a bendable region. A two-dimensional electron gas layer having a high degree of horizontal mobility is formed in the band bending region.

在此,將InxGa1-xN的In比率提升為高於10%的話,會產生起因於壓電電場之能帶的扭曲,因量子史塔克效應,發光效率會降低。此係即使於重複由InaGa1-aN(0<a≦1)所成之量子井層與由AlbGa1-bN(0<b≦1)所成之障壁層所構成之多量子井結構來實現活性層之狀況中也相同。在此,In組成的比率係為決定放射光之波長的要因。亦即,作為產生將構成電流擴散層的InxGa1-xN,及構成活性層的InaGa1-aN(0<a≦1)的In比率設為10%以下時可取出的光線,亦即,波長為例如365nm程度之近紫外光的LED元件,本發明特別有用。 Here, if the In ratio of In x Ga 1-x N is raised to more than 10%, distortion due to the energy band of the piezoelectric electric field is generated, and the luminous efficiency is lowered due to the quantum Stuck effect. This is even if the quantum well layer formed by In a Ga 1-a N (0<a≦1) and the barrier layer formed by Al b Ga 1-b N (0<b≦1) are repeated. The same is true for the multi-quantum well structure to achieve the active layer. Here, the ratio of the In composition is a factor that determines the wavelength of the emitted light. In other words, when the In ratio of In x Ga 1-x N constituting the current diffusion layer and the In a Ga 1-a N (0<a≦1) constituting the active layer are 10% or less, it can be taken out. The present invention is particularly useful for light, i.e., LED elements having a wavelength of, for example, near 365 nm.

又,將由InxGa1-xN所成之第3半導體層的膜厚,設為相較於為了構成一般之多量子井結構的量子井層所形成之InxGa1-xN的膜厚(例如2nm程度),具有充分厚度的10nm以上25nm以下。在一般之多量子井結構中,為了防止量子史塔克效應所致之發光比例的降低,進行將InxGa1-xN的膜厚設為2nm程度,就算厚一點,也設為3nm以下。 Furthermore, by the film thickness formed by the In x Ga 1-x N of the third semiconductor layer, In order to construct compared to the quantum well layers formed of quantum well structure is generally much film x Ga 1-x N of It is thick (for example, about 2 nm) and has a sufficient thickness of 10 nm or more and 25 nm or less. In the general multi-quantum well structure, in order to prevent a decrease in the light-emitting ratio due to the quantum Stark effect, the film thickness of In x Ga 1-x N is set to about 2 nm, and even if it is thick, it is set to 3 nm or less. .

但是,在本發明的LED元件中,將構成電流擴散層之InxGa1-xN的膜厚,設為10nm以上25nm以下。如此,利用增加膜厚,可加大藉由InxGa1-xN所形成之幾乎平坦的能帶區域,增加確保電子的容量。到於該區域充 分蓄積電子為止之間,電子無法超越藉由n-AlyGa1-yN所形成之障壁。之間,2維電子氣體往平行於界面的方向移動,故電子會往水平方向擴散。亦即,在電子充分地往水平方向擴散,於能帶彎區域及幾近平坦的能帶區域內,蓄積了充分量的電子的階段中,電子會超越n-AlyGa1-yN的障壁,往p層側移動。亦即,到電流從p層側往n層側流動為止,暫時實現電子往水平方向的擴散。藉此,因為流動於活性層內的電流會往水平方向擴散,可使活性層整體發光,可提升發光效率。 However, in the LED element of the present invention, the film thickness of In x Ga 1-x N constituting the current diffusion layer is 10 nm or more and 25 nm or less. Thus, by increasing the film thickness, the almost flat band region formed by In x Ga 1-x N can be increased, and the capacity for securing electrons can be increased. Between the accumulation of electrons in this region, electrons cannot exceed the barrier formed by n-Al y Ga 1-y N. Between, the two-dimensional electron gas moves in a direction parallel to the interface, so the electrons will spread in the horizontal direction. That is, in the stage where electrons are sufficiently diffused in the horizontal direction, electrons may exceed n-Al y Ga 1-y N in a stage in which a sufficient amount of electrons are accumulated in the band bending region and the nearly flat band region. The barrier moves to the side of the p-layer. In other words, the current is temporarily diffused in the horizontal direction until the current flows from the p-layer side to the n-layer side. Thereby, since the current flowing in the active layer is diffused in the horizontal direction, the active layer can be entirely illuminated, and the luminous efficiency can be improved.

另一方面,藉由本發明者的銳意研究,發現在將InxGa1-xN的膜厚設為比25nm厚,例如30nm時,結晶缺陷等的問題會顯著化,光輸出會降低。亦即,InxGa1-xN的膜厚係設為不產生結晶缺陷的臨限膜厚以下為佳。 On the other hand, the inventors of the present invention have found that when the film thickness of In x Ga 1-x N is made thicker than 25 nm, for example, 30 nm, problems such as crystal defects are remarkable, and light output is lowered. That is, the film thickness of In x Ga 1-x N is preferably set to be less than or equal to the thickness of the film which does not cause crystal defects.

因此,如前述般,利用將InxGa1-xN的膜厚設為10nm以上25nm以下,可獲得相較先前的LED元件,提升光輸出的效果。 Therefore, by setting the film thickness of In x Ga 1-x N to 10 nm or more and 25 nm or less as described above, it is possible to obtain an effect of improving the light output compared to the conventional LED element.

進而,藉由本發明者的銳意研究,發現利用將n-AlyGa1-yN的Si摻雜濃度,設為1×1018/cm3以上,5×1018/cm3以下,可擔保此種光輸出的提升效果。例如,可知將Si摻雜濃度設為5×1017/cm3等之比1×1018/cm3少之值時,會產生伴隨絕對地載體不足的活性層內之載體的不均勻,另一方面,設為9×1018/cm3等之比5×1018/cm3高之值時,會產生效率下降,任一皆無法獲得較高之光輸 出。 Further, it has been found by the inventors' intensive research that it is possible to secure a Si doping concentration of n-Al y Ga 1-y N to 1 × 10 18 /cm 3 or more and 5 × 10 18 /cm 3 or less. This light output enhances the effect. For example, the Si doping concentration is set to be seen / cm value of 5 × 10 17 / cm 3, etc. than 1 × 10 18 3 less, the unevenness generated within the active layer of the carrier along the carrier absolutely insufficient, other On the other hand, when the ratio of 9 × 10 18 /cm 3 or the like is set to a value higher than 5 × 10 18 /cm 3 , a decrease in efficiency occurs, and neither of them can obtain a high light output.

因此,利用將InxGa1-xN的膜厚設為10nm以上25nm以下之外,進而將n-AlyGa1-yN的Si摻雜濃度設為1×1018/cm3以上,5×1018/cm3以下,可獲得相較於先前的LED元件,更提升光輸出的效果。 Therefore, by setting the film thickness of In x Ga 1-x N to 10 nm or more and 25 nm or less, the Si doping concentration of n-Al y Ga 1-y N is further set to 1 × 10 18 /cm 3 or more. When it is 5 × 10 18 /cm 3 or less, the effect of improving the light output can be obtained as compared with the previous LED element.

再者,亦可利用將前述第3半導體層與前述第4半導體層層積複數組,實現使前述電流擴散層作為具有複數個前述異質連接的構造。 Further, the current diffusion layer may have a structure in which the current diffusion layer has a plurality of heterogeneous connections by stacking the third semiconductor layer and the fourth semiconductor layer.

作為此種構造時,根據形成複數個異質連接的界面,也形成複數個形成2維電子氣體層的電子井。 又,也形成複數個具有電子蓄積層之功能的InxGa1-xN所致之電子井。藉此,可更提升電流擴散的效果。 As such a structure, a plurality of electron wells forming a two-dimensional electron gas layer are also formed according to an interface in which a plurality of heterojunctions are formed. Further, an electron well caused by a plurality of In x Ga 1-x N having a function of an electron accumulation layer is also formed. Thereby, the effect of current spreading can be further improved.

依據本發明,因為可一邊以不導致結晶缺陷之範圍內的膜厚來形成n型被覆層,一邊實現水平方向的電流擴散,所以,可實現發光效率較高的LED元件。 According to the present invention, since the current can be diffused in the horizontal direction while forming the n-type cladding layer in a film thickness within a range that does not cause crystal defects, an LED element having high luminous efficiency can be realized.

1‧‧‧LED元件 1‧‧‧LED components

3‧‧‧電流擴散層 3‧‧‧current diffusion layer

11‧‧‧支持基板 11‧‧‧Support substrate

13‧‧‧無摻雜層 13‧‧‧Undoped layer

15‧‧‧n型被覆層 15‧‧‧n type coating

17‧‧‧活性層 17‧‧‧Active layer

19‧‧‧p型被覆層 19‧‧‧p type coating

21‧‧‧p型接觸層 21‧‧‧p-type contact layer

30‧‧‧傳導帶 30‧‧‧Transmission belt

31‧‧‧價電子帶 31‧‧‧Price electronic tape

32‧‧‧InGaN的費米能階 32‧‧‧Fermien order of InGaN

33‧‧‧AlGaN的費米能階 33‧‧‧Fermien order of AlGaN

41‧‧‧形成於AlGaN與InGan的界面的能帶彎區域 41‧‧‧Bend zone formed at the interface between AlGaN and InGan

42‧‧‧InGaN所形成之幾近平坦的能帶區域 42‧‧‧ Nearly flat band regions formed by InGaN

81‧‧‧拉伸應力 81‧‧‧ tensile stress

90‧‧‧LED元件 90‧‧‧LED components

[圖1]揭示本發明的LED元件之構造的概略剖面圖。 Fig. 1 is a schematic cross-sectional view showing the structure of an LED element of the present invention.

[圖2]揭示使InxGa1-xN的In組成變化時,流動於活性層之電流與可從LED元件取得之光輸出的關係的圖表。 FIG. 2 is a graph showing the relationship between the current flowing through the active layer and the light output obtainable from the LED element when the In composition of In x Ga 1-x N is changed.

[圖3A]模式揭示電流擴散層的理想能帶圖者。 [Fig. 3A] The mode reveals an ideal energy band diagram of the current diffusion layer.

[圖3B]反映壓電電場的影響,模式揭示電流擴散層的能帶圖者。 [Fig. 3B] Reflecting the influence of the piezoelectric electric field, the mode reveals the energy band diagram of the current diffusion layer.

[圖3C]反映半導體材料的相互作用,模式揭示電流擴散層之傳導帶的能帶圖者。 [Fig. 3C] Reflecting the interaction of the semiconductor material, the mode reveals the energy band diagram of the conduction band of the current diffusion layer.

[圖4]揭示使InxGa1-xN的膜厚變化時,流動於活性層之電流與可從LED元件取得之光輸出的關係的圖表。 Fig. 4 is a graph showing the relationship between the current flowing through the active layer and the light output obtainable from the LED element when the film thickness of In x Ga 1-x N is changed.

[圖5]揭示使AlGaN的Si摻雜濃度變化時,流動於活性層之電流與可從LED元件取得之光輸出的關係的圖表。 Fig. 5 is a graph showing the relationship between the current flowing through the active layer and the light output obtainable from the LED element when the Si doping concentration of AlGaN is changed.

[圖6A]揭示本發明的LED元件之其他構造的概略剖面圖。 Fig. 6A is a schematic cross-sectional view showing another structure of an LED element of the present invention.

[圖6B]反映半導體材料的相互作用,模式揭示圖6A的構造之電流擴散層之傳導帶的能帶圖者。 [Fig. 6B] Reflecting the interaction of the semiconductor material, the mode reveals the energy band diagram of the conduction band of the current diffusion layer of the configuration of Fig. 6A.

[圖7]揭示先前的LED元件之構造的概略剖面圖。 Fig. 7 is a schematic cross-sectional view showing the structure of a conventional LED element.

[構造] [structure]

圖1係揭示本發明的LED元件1之構造的概略剖面圖。再者,針對與圖7所示之LED元件90相同的構成要件,附加相同的符號。又,於以下各圖面中,實際的尺寸比與圖面上的尺寸比不一定一致。 Fig. 1 is a schematic cross-sectional view showing the structure of an LED element 1 of the present invention. Incidentally, the same components as those of the LED element 90 shown in FIG. 7 are denoted by the same reference numerals. Moreover, in the following drawings, the actual size ratio does not necessarily match the size ratio on the drawing.

LED元件1相較於LED元件90,在追加具備 電流擴散層3之處不同。亦即,LED元件1係於藍寶石等的支持基板11的上層,由下依序具備無摻雜層13、n型被覆層15(對應「第1半導體層」)、電流擴散層3、活性層17、p型被覆層19(對應「第2半導體層」)及p型接觸層21。又,與LED元件90相同,因應需要,在活性層17與p型被覆層19之間,具有最後阻障層(未圖示)。 The LED element 1 is additionally provided in comparison with the LED element 90. The current diffusion layer 3 is different. In other words, the LED element 1 is provided on the upper layer of the support substrate 11 such as sapphire, and includes the undoped layer 13 and the n-type cladding layer 15 (corresponding to the "first semiconductor layer"), the current diffusion layer 3, and the active layer. 17. A p-type cladding layer 19 (corresponding to a "second semiconductor layer") and a p-type contact layer 21. Further, similarly to the LED element 90, a final barrier layer (not shown) is provided between the active layer 17 and the p-type cladding layer 19 as needed.

(支持基板11) (Support substrate 11)

支持基板11係以藍寶石基板所構成。再者,除藍寶石之外,以Si、SiC、GaN、YAG等構成亦可。 The support substrate 11 is composed of a sapphire substrate. Further, in addition to sapphire, Si, SiC, GaN, YAG, or the like may be used.

(無摻雜層13) (undoped layer 13)

無摻雜層13係以GaN形成。更具體來說,藉由由GaN所成之低溫緩衝層,與於其上層由GaN所成之基底層所形成。 The undoped layer 13 is formed of GaN. More specifically, it is formed by a low temperature buffer layer made of GaN and a base layer made of GaN on its upper layer.

(n型被覆層15) (n-type coating layer 15)

n型被覆層15係以n-AlnGa1-nN(0<n<1)構成。再者,作為於接觸無摻雜層13的區域,包含以n-GaN構成之層(保護層)的構造亦可。此時,於保護層,摻雜有Si、Ge、S、Se、Sn、Te等的n型不純物,尤其摻雜Si為佳。 The n-type cladding layer 15 is composed of n-Al n Ga 1-n N (0<n<1). Further, as a region contacting the undoped layer 13, a structure including a layer (protective layer) made of n-GaN may be used. At this time, the protective layer is doped with an n-type impurity such as Si, Ge, S, Se, Sn, or Te, and particularly preferably Si is doped.

再者,在本實施形態中,作為一例,以n-Al0.1Ga0.9N形成n型被覆層15。 Further, in the present embodiment, as an example, the n-type cladding layer 15 is formed of n-Al 0.1 Ga 0.9 N.

(活性層17) (active layer 17)

活性層17係以具有例如重複由InaGa1-aN(0<a≦1)所成之量子井層與由AlbGa1-bN(0<b≦1)所成之障壁層所構成之多量子井結構(MQW)的半導體層所形成。該等之層係作為非摻雜型亦可,作為摻雜p型或n型亦可。 The active layer 17 is formed of, for example, a quantum well layer formed by repeating In a Ga 1-a N (0<a≦1) and a barrier layer formed of Al b Ga 1-b N (0<b≦1) A semiconductor layer of a multi-quantum well structure (MQW) is formed. These layers may be used as a non-doped type, and may be doped p-type or n-type.

在本實施形態中,作為一例,將活性層17中的量子井層設為In0.04Ga0.96N,障壁層設為Al0.06Ga0.94N,並重複5週期該量子井層與障壁層,藉此形成活性層17。於LED元件1中,該重複週期數並不限定於5。 In the present embodiment, as an example, the quantum well layer in the active layer 17 is made of In 0.04 Ga 0.96 N, and the barrier layer is made of Al 0.06 Ga 0.94 N, and the quantum well layer and the barrier layer are repeated for five cycles. The active layer 17 is formed. In the LED element 1, the number of repetition periods is not limited to five.

(p型被覆層19) (p type coating layer 19)

p型被覆層19係以例如所構成p-AlcGa1-cN(0<c≦1)構成,摻雜有Mg、Be、Zn、C等的p型不純物。在本實施形態中,作為一例,以p-Al0.3Ga0.7N與p-Al0.07Ga0.93N的層積構造來形成p型被覆層19。再者,作為於接觸p接觸層21的區域,包含以GaN構成之層(保護層)的構造亦可。此時,於保護層,摻雜有Mg、Be、Zn、C等的p型不純物。 The p-type cladding layer 19 is composed of, for example, p-Al c Ga 1-c N (0<c≦1), and is doped with a p-type impurity such as Mg, Be, Zn, or C. In the present embodiment, as an example, the p-type cladding layer 19 is formed by a laminated structure of p-Al 0.3 Ga 0.7 N and p-Al 0.07 Ga 0.93 N. Further, a structure including a layer (protective layer) made of GaN may be used as a region in contact with the p-contact layer 21. At this time, the protective layer is doped with a p-type impurity such as Mg, Be, Zn, or C.

(p型接觸層21) (p-type contact layer 21)

P型接觸層21係例如以p-GaN構成。尤其高濃度摻雜Mg、Be、Zn、C等的p型不純物,以p+-GaN層構 成。 The P-type contact layer 21 is made of, for example, p-GaN. Especially p-type impurities doped with Mg, Be, Zn, C, etc. at high concentration, with p+-GaN layer structure to make.

(電流擴散層3) (current diffusion layer 3)

電流擴散層3係藉由由InxGa1-xN(0<x≦0.05)所成之層(對應「第3半導體層」),與由n-AlyGa1-yN(0<y≦1)所成之層(對應「第4半導體層」)的異質連接所形成。其中,構成第3半導體層的InxGa1-xN的膜厚係為10nm以上25nm以下。 The current diffusion layer 3 is composed of a layer formed of In x Ga 1-x N (0 < x ≦ 0.05) (corresponding to "third semiconductor layer"), and n-Al y Ga 1-y N (0 < y≦1) A heterogeneous junction of the formed layer (corresponding to the "fourth semiconductor layer"). The film thickness of In x Ga 1-x N constituting the third semiconductor layer is 10 nm or more and 25 nm or less.

[電流擴散層3的效果說明] [Explanation of the effect of the current diffusion layer 3]

以下,針對藉由具備前述構造的電流擴散層3,LED元件1的發光效率相較於先前的LED元件90更為提升之狀況,參照實施例來進行說明。 Hereinafter, the state in which the luminous efficiency of the LED element 1 is higher than that of the conventional LED element 90 by the current diffusion layer 3 having the above-described structure will be described with reference to the embodiments.

(第3半導體的In組成相關的考察) (Investigation on the In composition of the third semiconductor)

圖2係揭示使構成電流擴散層3的InxGa1-xN(第3半導體層)的In組成,亦即x值變化時,流動於活性層17之電流與從LED元件1所得之光線輸出的關係的圖表。再者,為了比較,也記載未設置電流擴散層3之先前的LED元件90的資料。 2 is a view showing the In composition of In x Ga 1-x N (third semiconductor layer) constituting the current diffusion layer 3, that is, the current flowing through the active layer 17 and the light obtained from the LED element 1 when the value of x is changed. A chart of the relationship of the output. Further, for comparison, the data of the previous LED element 90 in which the current diffusion layer 3 is not provided is also described.

在In組成為2%、5%時,可知任一皆可大幅取得比先前的LED元件90大的光輸出。另一方面,將In組成設為10%時,可知光輸出降低至低於LED元件90。該結果係表示以下內容者。 When the In composition is 2% or 5%, it is understood that any of the light outputs larger than the previous LED element 90 can be obtained. On the other hand, when the In composition is set to 10%, it is understood that the light output is lowered below the LED element 90. The result is the following.

圖3A及圖3B係模式揭示電流擴散層3的能帶圖。再者,以下,未著目於各原子的組成時,將第3半導體層表記為InGaN,將第4半導體層表記為AlGaN,但是,並不是規定氮以外的原子的比率為1:1。 3A and 3B are diagrams showing the energy band diagram of the current diffusion layer 3. In the following, when the composition of each atom is not observed, the third semiconductor layer is referred to as InGaN, and the fourth semiconductor layer is referred to as AlGaN. However, the ratio of atoms other than the predetermined nitrogen is not 1:1.

相較於InGaN,AlGaN的能帶隙比較大。因此,如圖3A所示,如不考慮後述之極化電場的影響,在構成n型被覆層15的n-AlGaN,與電流擴散層3的AlGaN之間,形成InGaN所致之幾近平坦的能帶區域。在此,構成電流擴散層3之InGaN的膜厚,係遠遠厚於構成活性層17之InGaN的膜厚(例如2nm),以10nm以上25nm以下構成,故廣泛形成幾近平坦的能帶區域。 Compared to InGaN, AlGaN has a larger band gap. Therefore, as shown in FIG. 3A, the near-flatness caused by InGaN is formed between n-AlGaN constituting the n-type cladding layer 15 and AlGaN of the current diffusion layer 3, irrespective of the influence of the polarization electric field to be described later. Can bring area. Here, the film thickness of InGaN constituting the current diffusion layer 3 is much thicker than the thickness of InGaN (for example, 2 nm) constituting the active layer 17, and is composed of 10 nm or more and 25 nm or less. Therefore, a nearly flat band region is widely formed. .

如LED元件1,於構成無摻雜層13的GaN結晶的c面上,使構成n型被覆層15的AlGaN結晶成長,形成異質連接時,如上所述,依據晶格參數差,於GaN結晶產生拉伸應力,在GaN結晶內,於c軸方向發生壓電極化(piezoelectric polarization)。起因於該壓電極化所致之內部電場(壓電電場),在垂直於構成量子井層之電流擴散層3的InGaN之井面的c軸方向,產生較大的極化電場(壓電電場)。 When the AlGaN crystal constituting the n-type cladding layer 15 is grown on the c-plane of the GaN crystal constituting the undoped layer 13 to form a heterojunction, as described above, the GaN crystal is formed according to the lattice parameter difference. Tensile stress is generated, and piezoelectric polarization occurs in the c-axis direction in the GaN crystal. The internal electric field (piezoelectric electric field) due to the piezoelectric polarization causes a large polarization electric field (piezoelectric electric field) in the c-axis direction perpendicular to the well surface of the InGaN of the current diffusion layer 3 constituting the quantum well layer. ).

圖3B係模式揭示考慮該壓電電場的影響所描繪之電流擴散層3的能帶者。因壓電電場,能帶產生歪曲。 Fig. 3B is a mode showing the energy band of the current diffusion layer 3 depicted in consideration of the influence of the piezoelectric electric field. Due to the piezoelectric electric field, the energy band is distorted.

能帶的歪曲增大的話,電子與電洞的波動函數之重疊會減少,因電子與電洞再次結合所發光之比例會 降低,產生所謂量子史塔克效應。該歪曲係InGaN中的In組成比越大則越大。於圖2中,在使In組成增加為10%時,相較於未設置電流擴散層3之先前的LED元件90,光輸出降低是因該量子史塔克效應顯著化。 If the distortion of the energy band is increased, the overlap of the wave function of the electron and the hole will be reduced, and the ratio of the electron and the hole will be combined again. Lower, resulting in the so-called quantum Stark effect. The larger the In composition ratio in the tortuous system InGaN, the larger. In FIG. 2, when the In composition is increased to 10%, the light output reduction is remarkable due to the quantum Stuck effect compared to the previous LED element 90 in which the current diffusion layer 3 is not provided.

另一方面,In組成為2%、5%時,相較於先前的LED元件90,光輸出會增加。作為該理由,可想到以下的內容。 On the other hand, when the In composition is 2% or 5%, the light output is increased as compared with the previous LED element 90. For this reason, the following contents are conceivable.

如圖3A所示,相較於InGaN,AlGaN係電子性能帶隙較大。於圖3A,揭示傳導帶30、價電子帶31以及InGaN的費米能階32及AlGaN的費米能階33。再者,在圖3A中,並未考慮InGaN與AlGaN之間的相互作用。 As shown in FIG. 3A, the AlGaN-based electronic properties have a larger band gap than InGaN. In FIG. 3A, the conduction band 30, the valence band 31, and the Fermi level 32 of InGaN and the Fermi level 33 of AlGaN are disclosed. Furthermore, in FIG. 3A, the interaction between InGaN and AlGaN is not considered.

圖3C係模式揭示反映兩個半導體裝置的相互作用之傳導帶30的狀態者。費米能階32及33相互為等位,但是,因AlGaN與InGaN的能帶的不連續性,接近p層之AlGaN層的傳導帶被往下方拉,產生能帶彎區域41。於該能帶彎區域41內,形成水平方向移動度高的2維電子氣體層。又,如上所述,因增大InGaN層的膜厚,幾近平坦的能帶區域42會擴張,可蓄積多數電子,所以,到形成於AlGaN與InGaN之界面的能帶彎區域41及於InGaN之幾近平坦的能帶區域42蓄積電子為止,電子不會超過AlGaN的電位而超限。亦即,謀求水平方向之電子的移動,結果,可實現水平方向的電流擴散。亦即,藉由AlGaN與InGaN,實現電流擴散層3。 The Figure 3C mode reveals the state of the conductive strip 30 that reflects the interaction of the two semiconductor devices. The Fermi level 32 and 33 are equi-positioned with each other. However, due to the discontinuity of the energy band of AlGaN and InGaN, the conduction band of the AlGaN layer close to the p-layer is pulled downward to generate the band bend region 41. In the energy band bending region 41, a two-dimensional electron gas layer having a high horizontal mobility is formed. Further, as described above, since the thickness of the InGaN layer is increased, the nearly flat band region 42 is expanded and a large amount of electrons can be accumulated. Therefore, the band bend region 41 formed at the interface between AlGaN and InGaN and InGaN are formed. When the nearly flat energy band region 42 accumulates electrons, the electrons do not exceed the potential of the AlGaN and exceed the limit. That is, the movement of electrons in the horizontal direction is sought, and as a result, current spreading in the horizontal direction can be realized. That is, the current diffusion layer 3 is realized by AlGaN and InGaN.

藉由以上內容,可知利用將InGaN的In比率設為高於0%且5%以下,可獲得提升LED元件1的光輸出的效果。 From the above, it is understood that the effect of increasing the light output of the LED element 1 can be obtained by setting the In ratio of InGaN to be higher than 0% and 5% or less.

又,尤其利用增大InGaN的膜厚,可提高電流擴散效果,更有助於光輸出的提升。關於此點,於下說明。 Further, in particular, by increasing the film thickness of InGaN, the current spreading effect can be improved, and the light output can be improved. This point is explained below.

(第3半導體的膜厚相關的考察) (Investigation on the film thickness of the third semiconductor)

如上所述,根據InGaN形成幾近平坦的能帶區域42,於提高蓄積電子的意義中,可說增大第3半導體(InGaN)的膜厚為佳。但是,起因於GaN與InGaN的晶格參數的差,過度增大InGaN的膜厚的話,會產生晶格弛緩,於能帶彎區域41及幾近平坦的能帶區域42無法充分蓄積電子。 As described above, it is preferable to increase the film thickness of the third semiconductor (InGaN) in the sense that the near-flat energy band region 42 is formed by InGaN. However, due to the difference in lattice parameters between GaN and InGaN, if the film thickness of InGaN is excessively increased, lattice relaxation occurs, and electrons cannot be sufficiently accumulated in the band bending region 41 and the nearly flat band region 42.

圖4係揭示使InGaN的膜厚變化時,流動於活性層之電流與可從LED元件取得之光輸出的關係的圖表。再者,In組成設為2%。依據圖4,於InGaN的膜厚10nm中,可獲得與不具備電流擴散層3之先前的LED元件90同等的光輸出,將InGaN的膜厚設為15nm、20nm、25nm時,可知可獲得高於先前的光輸出。再者,將InGaN的膜厚設為15nm時,在施加電流值的廣泛範圍中可獲得最高的光輸出。 Fig. 4 is a graph showing the relationship between the current flowing through the active layer and the light output obtainable from the LED element when the film thickness of InGaN is changed. Furthermore, the In composition was set to 2%. According to FIG. 4, when the film thickness of InGaN is 10 nm, the light output equivalent to that of the previous LED element 90 not including the current diffusion layer 3 can be obtained, and when the thickness of InGaN is 15 nm, 20 nm, or 25 nm, it can be seen that high can be obtained. Previous light output. Further, when the film thickness of InGaN is set to 15 nm, the highest light output can be obtained in a wide range of applied current values.

相對於此,將InGaN的膜厚設為30nm時,光輸出比先前的LED元件90還低。此係將膜厚設為 30nm時,會產生前述晶格弛緩所致之結晶缺陷,面內的電流的均勻性降低,結果,光輸出也降低。 On the other hand, when the film thickness of InGaN is 30 nm, the light output is lower than that of the previous LED element 90. This system sets the film thickness At 30 nm, crystal defects due to the aforementioned lattice relaxation occur, and the uniformity of the current in the plane is lowered, and as a result, the light output is also lowered.

再者,如圖4所示,將InGaN的膜厚設為小於10nm的5nm時,光輸出降低至低於先前LED元件90。此係參照圖3B,如上所述,理由是因為大幅受到壓電電場的影響,藉由InGaN所形成之幾近平坦的能帶區域42也產生傾斜,蓄積電子的能力降低。 Further, as shown in FIG. 4, when the film thickness of InGaN is set to 5 nm of less than 10 nm, the light output is lowered to be lower than that of the previous LED element 90. Referring to FIG. 3B, as described above, the reason is that the nearly flat energy band region 42 formed by InGaN is also affected by the piezoelectric electric field, and the ability to accumulate electrons is lowered.

藉由以上內容,可知利用將InGaN的膜厚設為10nm以上25nm以下,可獲得提升LED元件1的光輸出的效果。 From the above, it is understood that the effect of increasing the light output of the LED element 1 can be obtained by setting the film thickness of InGaN to 10 nm or more and 25 nm or less.

(第4半導體的Si摻雜濃度相關的考察) (Review on the Si doping concentration of the fourth semiconductor)

圖5係揭示使構成電流擴散層3之第4半導體(AlGaN)的Si摻雜濃度變化時,流動於活性層之電流與可從LED元件取得之光輸出的關係的圖表。再者,將InGaN的In組成設為2%,將膜厚設為15nm。 FIG. 5 is a graph showing the relationship between the current flowing in the active layer and the light output that can be obtained from the LED element when the Si doping concentration of the fourth semiconductor (AlGaN) constituting the current diffusion layer 3 is changed. Further, the In composition of InGaN was set to 2%, and the film thickness was set to 15 nm.

依據圖5,在Si摻雜濃度為3×1018(/cm3)時,顯示最高的光輸出。又,在1×1018(/cm3)、3×1018(/cm3)、5×1018(/cm3)時,可知任一皆顯示高於先前的LED元件90的光輸出(參照圖4)。相對於此,在Si摻雜濃度低於1×1018(/cm3)的5×1017(/cm3)之狀況,與高於5×1018(/cm3)的9×1018(/cm3)之狀況中,可知光輸出比先前的LED元件90還低(參照圖4)。 According to Fig. 5, the highest light output is exhibited at a Si doping concentration of 3 × 10 18 (/cm 3 ). Further, at 1 × 10 18 (/cm 3 ), 3 × 10 18 (/cm 3 ), and 5 × 10 18 (/cm 3 ), it is understood that either of them shows higher light output than the previous LED element 90 ( Refer to Figure 4). In contrast, the case where the Si doping concentration is lower than 1 × 10 18 (/cm 3 ) of 5 × 10 17 (/cm 3 ), and the case where the Si doping concentration is higher than 5 × 10 18 (/cm 3 ) is 9 × 10 18 In the case of (/cm 3 ), it is understood that the light output is lower than that of the previous LED element 90 (refer to FIG. 4).

此係在AlGaN的Si摻雜濃度為5×1017(/cm3) 時,因為Si濃度絕對性地低,在活性層17內產生Si的不均,造成光輸出降低。另一方面,在AlGaN的Si摻雜濃度為9×1018(/cm3)時,因電流集中所致之發熱,發光再結合機率會降低,產生內部發光效率惡化,所謂效率下降現象,所以,光輸出降低。 When the Si doping concentration of AlGaN is 5 × 10 17 (/cm 3 ), since the Si concentration is absolutely low, unevenness of Si is generated in the active layer 17, resulting in a decrease in light output. On the other hand, when the Si doping concentration of AlGaN is 9 × 10 18 (/cm 3 ), heat generation due to current concentration causes a decrease in the probability of recombination of light emission, which causes deterioration of internal light emission efficiency, so that efficiency is lowered. The light output is reduced.

根據以上內容,可知利用將構成電流擴散層3之AlGaN的Si濃度設為1×1018(/cm3)以上5×1018(/cm3)以下,可獲得更加提升LED元件1的光輸出的效果。 According to the above, it is understood that the light output of the LED element 1 can be further improved by using the Si concentration of the AlGaN constituting the current diffusion layer 3 to be 1×10 18 (/cm 3 ) or more and 5×10 18 (/cm 3 ) or less. Effect.

[LED元件1的製造方法] [Method of Manufacturing LED Element 1]

接著,針對本發明的LED元件1的製造方法,進行說明。再者,在後述製造方法中說明的製造條件及膜厚等的尺寸,僅為一例,並不是限定於該等數值者。 Next, a method of manufacturing the LED element 1 of the present invention will be described. In addition, the manufacturing conditions, the film thickness, and the like described in the manufacturing method described later are merely examples, and are not limited to the numerical values.

<步驟S1> <Step S1>

首先,於支持基板11上,形成無摻雜層13。例如,藉由以下的工程來進行。 First, an undoped layer 13 is formed on the support substrate 11. For example, it is carried out by the following works.

(支持基板11的準備) (Preparation of support substrate 11)

作為支持基板11,使用藍寶石基板時,進行c面藍寶石基板的清洗。該清洗更具體來說,藉由例如於MOCVD(Metal Organic Chemical Vapor Deposition:有機金屬化學氣相沉積)裝置的處理爐內配置c面藍寶石基板,一邊於處理爐內流通流量為10slm的氫氣,一邊將爐 內溫度例如升溫至1150℃來進行。 When the sapphire substrate is used as the support substrate 11, the c-plane sapphire substrate is cleaned. More specifically, the c-plane sapphire substrate is placed in a treatment furnace of a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and hydrogen gas having a flow rate of 10 slm is flowed into the treatment furnace. Put the furnace The internal temperature is raised, for example, to 1,150 °C.

(無摻雜層13的形成) (Formation of undoped layer 13)

接著,於支持基板11(c面藍寶石基板)的表面,形成由GaN所成的低溫緩衝層,進而於其上層形成由GaN所成的基底層。該等低溫緩衝層及基底層對應無摻雜層13。 Next, a low temperature buffer layer made of GaN is formed on the surface of the support substrate 11 (c-plane sapphire substrate), and a base layer made of GaN is formed on the upper layer. The low temperature buffer layer and the base layer correspond to the undoped layer 13.

無摻雜層13的更具體形成方法係例如以下所述。首先,將MOCVD裝置的爐內壓力設為100kPa,將爐內溫度設為480℃。然後,一邊於處理爐內作為載體氣體,流通流量分別為5slm的氮氣體及氫氣體,一邊作為原料氣體,將流量為50μmol/min的三甲基鎵及流量為250000μmol/min的氨供給68秒間至處理爐內。藉此,於支持基板11的表面,形成厚度為20nm的由GaN所成的低溫緩衝層。 A more specific method of forming the undoped layer 13 is as follows, for example. First, the furnace internal pressure of the MOCVD apparatus was set to 100 kPa, and the furnace internal temperature was set to 480 °C. Then, while supplying a nitrogen gas and a hydrogen gas having a flow rate of 5 slm in the processing furnace as a carrier gas, trimethylgallium having a flow rate of 50 μmol/min and ammonia having a flow rate of 250,000 μmol/min were supplied as a raw material gas for 68 seconds. To the inside of the furnace. Thereby, a low temperature buffer layer made of GaN having a thickness of 20 nm was formed on the surface of the support substrate 11.

接著,將MOCVD裝置的爐內溫度升溫至1150℃。然後,一邊於處理爐內作為載體氣體,流通流量為20slm的氮氣體及流量為15slm的氫氣體,一邊作為原料氣體,將流量為100μmol/min的三甲基鎵及流量為250000μmol/min的氨供給30秒間至處理爐內。藉此,於第1緩衝層的表面,形成厚度為1.7μm的由GaN所成的基底層。 Next, the furnace temperature of the MOCVD apparatus was raised to 1,150 °C. Then, a nitrogen gas having a flow rate of 20 slm and a hydrogen gas having a flow rate of 15 slm were used as a carrier gas in the treatment furnace, and trimethylgallium having a flow rate of 100 μmol/min and ammonia having a flow rate of 250,000 μmol/min were used as a material gas. Supply for 30 seconds to the furnace. Thereby, a base layer made of GaN having a thickness of 1.7 μm was formed on the surface of the first buffer layer.

<步驟S2> <Step S2>

接著,於無摻雜層13的上層,形成以n-AlnGa1-nN(0<n≦1)構成的n型被覆層15。 Next, an n-type cladding layer 15 composed of n-Al n Ga 1-n N (0 < n ≦ 1) is formed on the upper layer of the undoped layer 13.

n型被覆層15的更具體形成方法係例如以下所述。首先,將MOCVD裝置的爐內壓力設為30kPa。然後,一邊於處理爐內作為載體氣體,流通流量為20slm的氮氣體及流量為15slm的氫氣體,一邊作為原料氣體,將流量為94μmol/min的三甲基鎵、流量為6μmol/min的三甲基鋁、流量為250000μmol/min的氨及流量為0.025μmol/min的四乙基矽烷供給30分鐘至處理爐內。藉此,將具有Al0.06Ga0.94N的組成,Si濃度為3×1019/cm3且厚度為1.7μm的高濃度電子供給層形成於無摻雜層13的上層。亦即,藉由此工程,至少關於上面的區域,會形成具有Si濃度為3×1019/cm3且厚度為1.7μm的高濃度電子供給層的n型被覆層15。 A more specific formation method of the n-type coating layer 15 is as follows, for example. First, the pressure in the furnace of the MOCVD apparatus was set to 30 kPa. Then, a nitrogen gas having a flow rate of 20 slm and a hydrogen gas having a flow rate of 15 slm were used as a carrier gas in the treatment furnace, and trimethylgallium having a flow rate of 94 μmol/min and a flow rate of 6 μmol/min were used as a material gas. Methyl aluminum, ammonia having a flow rate of 250,000 μmol/min, and tetraethyl decane having a flow rate of 0.025 μmol/min were supplied to the treatment furnace for 30 minutes. Thereby, a high-concentration electron supply layer having a composition of Al 0.06 Ga 0.94 N, a Si concentration of 3 × 10 19 /cm 3 and a thickness of 1.7 μm was formed on the upper layer of the undoped layer 13 . That is, by this work, at least the upper region, the n-type cladding layer 15 having a high-concentration electron supply layer having a Si concentration of 3 × 10 19 /cm 3 and a thickness of 1.7 μm is formed.

再者,作為包含於n型被覆層15的n型不純物,可使用矽(Si)、鍺(Se)、硫(S)、硒(Se)、錫(Sn)及碲(Te)等。在該等之中,尤其矽(Si)為佳。 Further, as the n-type impurity contained in the n-type cladding layer 15, bismuth (Si), bismuth (Se), sulfur (S), selenium (Se), tin (Sn), tellurium (Te), or the like can be used. Among these, especially bismuth (Si) is preferred.

<步驟S3> <Step S3>

接著,利用於無摻雜層13的上層,形成由InxGa1-xN(0<x≦0.05)所成之第3半導體層,與由n-AlyGa1-yN(0<y≦1)所成之第4半導體層,來形成電流擴散層3。 Next, for the upper layer of the undoped layer 13, a third semiconductor layer formed of In x Ga 1-x N (0 < x ≦ 0.05) is formed, and n-Al y Ga 1-y N (0< The fourth semiconductor layer formed by y≦1) forms the current diffusion layer 3.

電流擴散層3的更具體形成方法係例如以下 所述。首先,將MOCVD裝置的爐內壓力設為100kPa,將爐內溫度設為830℃。然後,進行一邊對處理爐內,作為載體氣體,流通流量為15slm的氮氣體及流量為1slm的氫氣體,一邊作為原料氣體,將流量為10μmol/min的三甲基鎵、流量為12μmol/min的三甲基銦及流量為300000μmol/min的氨,360秒間供給至處理爐內的步驟。之後,進行將流量為10μmol/min的三甲基鎵、流量為1.6μmol/min的三甲基鋁、0.002μmol/min的四乙基矽烷及流量為300000μmol/min的氨,360秒間供給至處理爐內的步驟。藉此,形成由厚度為15nm的InGaN及厚度為20nm的n-AlGaN所成的電流擴散層3。 A more specific method of forming the current diffusion layer 3 is, for example, the following Said. First, the furnace internal pressure of the MOCVD apparatus was set to 100 kPa, and the furnace internal temperature was set to 830 °C. Then, a nitrogen gas having a flow rate of 15 slm and a hydrogen gas having a flow rate of 1 slm as a carrier gas in the treatment furnace were used, and trimethylgallium having a flow rate of 10 μmol/min and a flow rate of 12 μmol/min were used as a material gas. The trimethyl indium and the ammonia having a flow rate of 300,000 μmol/min were supplied to the inside of the treatment furnace in 360 seconds. Thereafter, trimethylgallium having a flow rate of 10 μmol/min, trimethylaluminum having a flow rate of 1.6 μmol/min, tetraethylnonane at 0.002 μmol/min, and ammonia having a flow rate of 300,000 μmol/min were supplied to the treatment in 360 seconds. The steps inside the furnace. Thereby, a current diffusion layer 3 made of InGaN having a thickness of 15 nm and n-AlGaN having a thickness of 20 nm was formed.

<步驟S4> <Step S4>

接著,於電流擴散層3的上層,形成具有重複由InaGa1-aN(0<a≦1)所成之量子井層與由AlbGa1-bN(0<b≦1)所成之障壁層所構成之多量子井結構的活性層17。 Next, in the upper layer of the current diffusion layer 3, a quantum well layer formed by repeating In a Ga 1-a N (0<a≦1) and Al b Ga 1-b N (0<b≦1) are formed. The active layer 17 of the multi-quantum well structure formed by the barrier layer formed.

活性層17的更具體形成方法係例如以下所述。首先,將MOCVD裝置的爐內壓力設為100kPa,將爐內溫度設為830℃。然後,進行一邊對處理爐內,作為載體氣體,流通流量為15slm的氮氣體及流量為1slm的氫氣體,一邊作為原料氣體,將流量為10μmol/min的三甲基鎵、流量為12μmol/min的三甲基銦及流量為300000μmol/min的氨,48秒間供給至處理爐內的步驟。之後,進行將流量為10μmol/min的三甲基鎵、流量為 1.6μmol/min的三甲基鋁、0.002μmol/min的四乙基矽烷及流量為300000μmol/min的氨,120秒間供給至處理爐內的步驟。以下,藉由重複該等兩個步驟,具有厚度為2nm的由InGaN所成之量子井層及厚度為7nm的由n-AlGaN所成之障壁層所致之5週期的多量子井結構的活性層17被形成於電流擴散層3的上層。 A more specific method of forming the active layer 17 is as follows, for example. First, the furnace internal pressure of the MOCVD apparatus was set to 100 kPa, and the furnace internal temperature was set to 830 °C. Then, a nitrogen gas having a flow rate of 15 slm and a hydrogen gas having a flow rate of 1 slm as a carrier gas in the treatment furnace were used, and trimethylgallium having a flow rate of 10 μmol/min and a flow rate of 12 μmol/min were used as a material gas. The trimethyl indium and the ammonia having a flow rate of 300,000 μmol/min were supplied to the treatment furnace in 48 seconds. Thereafter, trimethylgallium having a flow rate of 10 μmol/min was used, and the flow rate was 1.6 μmol/min of trimethylaluminum, 0.002 μmol/min of tetraethylnonane, and a flow rate of 300,000 μmol/min of ammonia were supplied to the treatment furnace for 120 seconds. Hereinafter, the activity of a 5-cycle multi-quantum well structure caused by a quantum well layer made of InGaN and a barrier layer made of n-AlGaN having a thickness of 7 nm having a thickness of 2 nm is repeated by repeating the two steps. The layer 17 is formed on the upper layer of the current diffusion layer 3.

<步驟S5> <Step S5>

接著,於活性層17的上層,形成以p-AlcGa1-cN(0<c≦1)構成之p型被覆層19,更於其上層,形成高濃度的p接觸層21。 Next, on the upper layer of the active layer 17, a p-type cladding layer 19 composed of p-Al c Ga 1-c N (0 < c ≦ 1) is formed, and a p-contact layer 21 having a high concentration is formed on the upper layer.

p型被覆層19及p接觸層21的更具體形成方法係例如以下所述。首先,將MOCVD裝置的爐內壓力維持為100kPa,一邊對處理爐內,作為載體氣體,流通流量為15slm的氮氣體及流量為25slm的氫氣體,一邊將爐內溫度升溫至1050℃。之後,作為原料氣體,將流量為35μmol/min的三甲基鎵、流量為20μmol/min的三甲基鋁、流量為250000μmol/min的氨及流量為0.1μmol/min的雙(環戊二烯)鎂,60秒間供給至處理爐內。藉此,於活性層17的表面,形成具有厚度為20nm之Al0.3Ga0.7N的組成的電洞供給層。之後,藉由將三甲基鋁的流量變更為9μmol/min,並360秒間供給原料氣體,形成具有厚度為120nm之Al0.07Ga0.93N的組成的電洞供給層。藉由該等電洞供給層,形成p型被覆層19。 More specific formation methods of the p-type cladding layer 19 and the p-contact layer 21 are as follows, for example. First, the furnace pressure in the MOCVD apparatus was maintained at 100 kPa, and a nitrogen gas having a flow rate of 15 slm and a hydrogen gas having a flow rate of 25 slm were used as a carrier gas in the treatment furnace, and the temperature in the furnace was raised to 1,050 °C. Thereafter, trimethylgallium having a flow rate of 35 μmol/min, trimethylaluminum having a flow rate of 20 μmol/min, ammonia having a flow rate of 250,000 μmol/min, and bis(cyclopentadiene) having a flow rate of 0.1 μmol/min were used as a material gas. Magnesium is supplied to the treatment furnace in 60 seconds. Thereby, a hole supply layer having a composition of Al 0.3 Ga 0.7 N having a thickness of 20 nm was formed on the surface of the active layer 17. Thereafter, by changing the flow rate of trimethylaluminum to 9 μmol/min and supplying the material gas for 360 seconds, a hole supply layer having a composition of Al 0.07 Ga 0.93 N having a thickness of 120 nm was formed. The p-type cladding layer 19 is formed by the holes supply layer.

進而,之後,停止三甲基鋁的供給,並且將雙(環戊二烯)鎂的流量變更成0.2μmol/min,20秒間供給原料氣體。藉此,形成厚度為5nm的由p-GaN所成的p型接觸層21。 Further, after that, the supply of trimethylaluminum was stopped, and the flow rate of bis(cyclopentadienyl)magnesium was changed to 0.2 μmol/min, and the source gas was supplied for 20 seconds. Thereby, a p-type contact layer 21 made of p-GaN having a thickness of 5 nm was formed.

再者,作為p型不純物,可使用鎂(Mg)、鈹(Be)、鋅(Zn)、碳(C)等。 Further, as the p-type impurity, magnesium (Mg), beryllium (Be), zinc (Zn), carbon (C) or the like can be used.

<步驟S6> <Step S6>

接著,對於在步驟S1~S5中所得之晶圓,進行活性化處理。更具體來說,使用RTA(Rapid Thermal Anneal:快速加熱)裝置,在氮氣氛下以650℃進行15分鐘的活性化處理。 Next, the wafers obtained in steps S1 to S5 are subjected to activation treatment. More specifically, it was subjected to an activation treatment at 650 ° C for 15 minutes in a nitrogen atmosphere using an RTA (Rapid Thermal Anneal) apparatus.

之後,在實現縱型的LED元件時,剝離支持基板11之後,於該支持基板11存在之處,形成電極,用以形成n側電極。又,在實現橫型的LED元件時,到從p側露出n型半導體層為止,進行蝕刻,形成n側電極。再者,此時,作為因應需要,形成透明電極等的電極者亦可。之後,於各電極形成供電端子等,因應需要以透光性高的絕緣層來覆蓋露出之元件側面及上面,藉由引線接合等來進行與基板的連接。 Thereafter, when the vertical LED element is realized, after the support substrate 11 is peeled off, an electrode is formed at the place where the support substrate 11 exists to form an n-side electrode. Further, when a horizontal LED element is realized, etching is performed until the n-type semiconductor layer is exposed from the p side, and an n-side electrode is formed. In this case, an electrode such as a transparent electrode may be formed as needed. Thereafter, a power supply terminal or the like is formed on each of the electrodes, and the exposed side surface and the upper surface of the element are required to be covered with an insulating layer having high light transmittance, and the connection to the substrate is performed by wire bonding or the like.

[其他實施形態] [Other Embodiments]

以下,針對其他實施形態進行說明。 Hereinafter, other embodiments will be described.

於LED元件1中,重複複數個由InxGa1-xN (0<x≦0.05)所成之層,與由n-AlyGa1-yN(0<y≦1)所成之層的異質連接,來構成電流擴散層3亦可(參照圖6A)。又,圖6B係遵從圖3C,模式揭示圖6A的構造之電流擴散層3的傳導帶的能帶圖。 In the LED element 1, a plurality of layers formed of In x Ga 1-x N (0<x≦0.05) are repeated, and are formed by n-Al y Ga 1-y N (0<y≦1). The heterogeneous connection of the layers may constitute the current diffusion layer 3 (see FIG. 6A). Further, Fig. 6B is an energy band diagram showing the conduction band of the current diffusion layer 3 of the configuration of Fig. 6A in accordance with Fig. 3C.

利用設為如圖6A的構造,因為可具有複數個擔任將電流往水平方向擴散之作用的能帶彎區域41,及具有蓄積電子之功能的幾近平坦的能帶區域42,可比圖1的構造,更加提升電流擴散的效果。藉此,可更提升光輸出。 With the configuration shown in FIG. 6A, since there are a plurality of energy band bending regions 41 serving as a function of diffusing current in a horizontal direction, and a nearly flat energy band region 42 having a function of accumulating electrons, it is possible to compare with the nearly flat energy band region 42 of the function of accumulating electrons. The structure further enhances the effect of current spreading. Thereby, the light output can be further improved.

1‧‧‧LED元件 1‧‧‧LED components

3‧‧‧電流擴散層 3‧‧‧current diffusion layer

11‧‧‧支持基板 11‧‧‧Support substrate

13‧‧‧無摻雜層 13‧‧‧Undoped layer

15‧‧‧n型被覆層 15‧‧‧n type coating

17‧‧‧活性層 17‧‧‧Active layer

19‧‧‧p型被覆層 19‧‧‧p type coating

21‧‧‧p型接觸層 21‧‧‧p-type contact layer

Claims (3)

一種LED元件,係於支持基板上使氮化物半導體層c軸成長所成的LED元件,其特徵為:具有:第1半導體層,係以n型氮化物半導體所構成;電流擴散層,係形成於前述第1半導體層的上層;活性層,係形成於前述電流擴散層的上層,以氮化物半導體所構成;及第2半導體層,係形成於前述活性層的上層,且以p型氮化物半導體所構成;前述電流擴散層,係具有由InxGa1-xN(0<x≦0.05)所成之第3半導體層,與由n-AlyGa1-yN(0<y≦1)所成之第4半導體層的異質連接,前述第3半導體層的膜厚為10nm以上25nm以下。 An LED element is an LED element formed by growing a nitride semiconductor layer c-axis on a support substrate, and is characterized in that: the first semiconductor layer is made of an n-type nitride semiconductor; and the current diffusion layer is formed. An upper layer of the first semiconductor layer; an active layer formed on the upper layer of the current diffusion layer and formed of a nitride semiconductor; and a second semiconductor layer formed on the upper layer of the active layer and having a p-type nitride The current diffusion layer has a third semiconductor layer formed of In x Ga 1-x N (0 < x ≦ 0.05) and n-Al y Ga 1-y N (0 < y ≦ 1) The heterojunction of the formed fourth semiconductor layer, the film thickness of the third semiconductor layer being 10 nm or more and 25 nm or less. 如申請專利範圍第1項所記載之LED元件,其中,前述第4半導體層的Si摻雜濃度為1×1018/cm3以上,5×1018/cm3以下。 The LED element according to the first aspect of the invention, wherein the fourth semiconductor layer has a Si doping concentration of 1 × 10 18 /cm 3 or more and 5 × 10 18 /cm 3 or less. 如申請專利範圍第1項或第2項所記載之LED元件,其中,前述電流擴散層,係利用將前述第3半導體層與前述第4半導體層層積複數組,具有複數個前述異質連接的構造。 The LED element according to the first or second aspect of the invention, wherein the current diffusion layer is formed by stacking the third semiconductor layer and the fourth semiconductor layer in an array, and has a plurality of heterogeneous connections. structure.
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