TW201415773A - Power supply apparatus relating to DC-DC voltage conversion and having short protection function - Google Patents

Abstract

A power supply apparatus is provided, and which includes a power conversion circuit, a control chip with soft-start function and a short protection circuit. The power conversion circuit is configured to provide a DC output voltage to a load in response to an output pulse-width-modulation (PWM) signal. The control chip is operated under a DC input voltage, and configured to generate the output PWM signal to control the operation of the power conversion circuit. The short protection circuit is configured to pull-down the level of a soft-start pin of the control chip, so as to substantially/significantly reduce the frequency and duty cycle of the output PWM signal, and then substantially/significantly reduce the current flowing through the shorted load.

Description

Power supply device associated with DC voltage conversion and short circuit protection

The present invention relates to a power conversion technique, and more particularly to a power supply apparatus associated with DC voltage conversion and having a short circuit protection function.

A DC-DC converter that traditionally uses a PWM-based control mechanism is short-circuited at the output (load). If no additional short-circuit protection is taken, DC-DC conversion The device will continuously generate/output an abnormally large current to flow through the short-circuited load. As a result, it is possible to cause an abnormal rise in the temperature of the components of the DC-DC converter itself or the load, thereby increasing the risk of damage to the components of the DC-DC converter itself or the load.

In view of this, in order to solve the problems described in the prior art, an exemplary embodiment of the present invention provides a power supply device including: a power conversion line Road, control chip with soft start function, and short circuit protection circuit. The power conversion line is configured to provide a DC output voltage to the load in response to an output pulse width modulation signal. A control chip with a soft start function is coupled to the power conversion line. Moreover, the control wafer operates at a DC input voltage and is configured to generate the output pulse width modulation signal to control operation of the power conversion line. The short circuit protection line is coupled to the control chip, and is configured to pull down a level of a soft-start pin of the control chip in response to a short circuit of the load, thereby substantially reducing the output pulse width modulation The frequency and duty cycle of the signal, which in turn greatly reduces the current through the short-circuit load.

In an exemplary embodiment of the invention, the control chip may further have an output pin to output the generated output pulse width modulation signal. Under this condition, the short circuit protection circuit may include: a PNP type bipolar junction transistor, first and second capacitors, and first and second resistors. The emitter of the PNP-type bipolar junction transistor is coupled to the soft start pin of the control chip, and the collector of the PNP type dual carrier junction transistor is coupled to a ground potential. The first end of the first capacitor is for receiving the DC input voltage, and the second end of the first capacitor is coupled to the base of the PNP type bipolar junction transistor. The first end of the first resistor is coupled to the base of the PNP-type bipolar junction transistor, and the second end of the first resistor is coupled to the ground potential. The second capacitor is coupled to the first resistor. The first end of the second resistor is coupled to the base of the PNP-type bipolar junction transistor, and the second end of the second resistor is coupled to the output pin of the control chip.

In an exemplary embodiment of the present invention, the short circuit protection circuit may further include: a third capacitor connected across the emitter and collector of the PNP type bipolar junction transistor between.

In an exemplary embodiment of the present invention, the short circuit protection circuit can be further provided under the condition that the short circuit protection circuit includes the PNP type double carrier junction transistor, the first to third capacitors, and the first and second resistors. Including: diode and third resistor. Therefore, the anode of the diode can be coupled to the output pin of the control chip, the cathode of the diode can be coupled to the second end of the second resistor, and the first end of the third resistor can be coupled to the first capacitor. The second end, and the second end of the third resistor can be coupled to the base of the PNP type bipolar junction transistor. Or (alternatively), 2) the first end of the third resistor may be coupled to the base of the PNP type bipolar junction transistor, and the anode of the diode may be coupled to the second end of the third resistor, and the diode The cathode can be coupled to the output pin of the control chip.

In an exemplary embodiment of the invention, the control chip may further have a power pin to receive a DC input voltage required for operation; and the control chip may further have a ground pin to be coupled to the ground potential.

In an exemplary embodiment of the present invention, the power supply device may further include: a bypass capacitor coupled between the power pin of the control chip and the ground pin, and configured to reduce input to control Power supply noise for the chip.

In an exemplary embodiment of the invention, the control chip may further have a bootstrap pin. In this case, the power supply device may further include: a bootstrap capacitor coupled between the bootstrap pin and the output pin of the control chip, and configured to enhance coupling of the control chip to the power source The driving voltage of the high-voltage side N-type transistor between the pin and the output pin.

In an exemplary embodiment of the invention, the control wafer may further have a wafer enable pin. In this case, the power supply device may further include: a pull-up resistor coupled between the power pin of the control chip and the chip enable pin, and configured to activate the control chip.

In an exemplary embodiment of the invention, the control chip may further have a compensation pin. In this case, the power supply device may further include: a resistor-capacitor network coupled between the compensation pin of the control chip and the ground potential, and configured to perform a system frequency response of the power supply device. Compensation to stabilize the operation of the power supply unit.

In an exemplary embodiment of the invention, the control chip may further have a feedback pin. In this case, the power supply device may further include: an output feedback circuit coupled between the DC output voltage and the ground potential, and configured to provide a voltage associated with the DC output voltage The voltage is applied to the feedback pin of the control chip, so that the control chip adjusts the output pulse width modulation signal, thereby adjusting and stabilizing the DC output voltage provided by the power conversion line.

In an exemplary embodiment of the present invention, the power supply device may further include: a set capacitor coupled between the soft start pin and the ground pin of the control chip, and configured to set the power supply device Soft start time.

In an exemplary embodiment of the present invention, the topology of the power conversion line includes at least a buck power conversion topology, a boost power conversion topology, a buck-boost power conversion topology, a reverse power conversion topology, and a forward direction. Power conversion topology or a combination between them.

Based on the above, the present invention proposes a power supply device associated with DC voltage conversion and having a short circuit protection function. When the load is short-circuited, the level of the soft-start pin of the control chip is pulled to ground based on the set short-circuit protection line. Under this condition, the frequency and duty cycle of the output pulse width modulation signal generated by the control chip will be greatly reduced, thereby greatly reducing the current flowing through the short-circuit load, thereby greatly reducing the power supply device itself or the load. The temperature of the internal components when the load is short-circuited and the risk of damage.

It is to be understood that the foregoing general description and claims

10‧‧‧Power supply unit

20‧‧‧ load

101‧‧‧Power conversion circuit

103‧‧‧Control chip

105‧‧‧Short circuit protection circuit

107‧‧‧Resistor Capacitor Network

109‧‧‧Output feedback line

CBY‧‧‧ bypass capacitor

CBS‧‧‧ bootstrap capacitor

RPU‧‧‧ Pull-up resistor

CSET‧‧‧Set Capacitor

CP1, CP2‧‧‧ compensation capacitor

RF1, RF2‧‧‧ feedback resistor

RP1‧‧‧compensation resistor

R1~R3‧‧‧ resistor

C1~C3‧‧‧ capacitor

D1‧‧‧ diode

B1‧‧‧PNP type double carrier junction transistor

MN‧‧‧N type transistor

DC_IN‧‧‧DC input voltage

DC_OUT‧‧‧DC output voltage

VFB‧‧‧ feedback voltage

Vgs‧‧‧gate source voltage

PWM_O‧‧‧ output pulse width modulation signal

IN‧‧‧ control chip power pin

GND‧‧‧Control chip grounding pin

EN‧‧‧Control chip wafer enable pin

SS‧‧‧ control chip soft start pin

BS‧‧‧Controlled wafer bootstrap

SW‧‧‧ control chip output pin

FB‧‧‧ control chip feedback pin

COMP‧‧‧ control chip compensation pin

The following drawings are a part of the specification of the disclosure, and illustrate the embodiments of the disclosure, together with the description of the description.

FIG. 1 is a schematic diagram of a power supply apparatus 10 according to an exemplary embodiment of the present invention.

2 is a schematic diagram showing the use of the bootstrap capacitor CBS of FIG. 1.

FIG. 3 is a schematic diagram of an implementation of a short circuit protection circuit 105 according to an exemplary embodiment of the invention.

FIG. 4 is a schematic diagram of an implementation of a short circuit protection circuit 105 according to another exemplary embodiment of the present invention.

FIG. 5 illustrates a short circuit protection line 105 according to still another exemplary embodiment of the present invention. Implementation diagram.

DETAILED DESCRIPTION OF THE INVENTION Reference will now be made in detail to the exemplary embodiments embodiments In addition, wherever possible, the same reference numerals in the drawings

FIG. 1 is a schematic diagram of a power supply apparatus 10 according to an exemplary embodiment of the present invention. Referring to FIG. 1, the architecture of the power supply device 10 may be a DC voltage conversion configuration, and the power supply device 10 has a short protection function.

In the present exemplary embodiment, the power supply device 10 includes a power conversion circuit 101, a control chip with a soft-start function 103, and a short protection circuit. 105, RC network 107, output feedback circuit 109, bypass capacitor CBY, bootstrap capacitor CBS, pull-up resistor RPU, and setting capacitor CSET.

The power conversion line 101 is configured to provide a DC output voltage DC_OUT to the load (for example, in response to an output pulse-width-modulation (PWM) signal PWM_O from the control chip 103. Electronic device, but not limited to this) 20. In this exemplary implementation For example, the topology of the power conversion line 101 can be a buck power conversion topology, a boost power conversion topology, a boost-buck (boost-buck) depending on actual design/application requirements. A power conversion topology, a flyback power conversion topology, a forward power conversion topology, or a combination thereof, but is not limited thereto.

The control chip 103 having a soft start function may have a plurality of pins, for example, a power pin IN, a ground pin GND, and a chip enable pin. EN, soft-start pin SS, bootstrap pin BS, output pin SW, feedback pin FB, and compensation pin (compensation pin) ) COMP. Of course, based on actual design/application requirements, other function pins (overvoltage detection pin, overcurrent detection pin, etc., etc., but not limited thereto) may be added to the control chip 103, or the control chip 103 may be deleted. Existing function feet.

Basically, in order for the control chip 103 to operate normally, the control chip 103 passes through the power supply pin VDD to receive the DC input voltage DC_IN required for its operation, and is coupled to the ground potential (0V) through the ground pin GND. . In other words, the control wafer 103 operates under the DC input voltage DC_IN. In this way, the voltage regulator (not shown) provided inside the control chip 103 can adjust the received DC input voltage DC_IN (for example, step up/down), thereby generating/obtaining the control wafer 103. The working voltage required for the internal internal functional circuit.

In addition, the bypass capacitor CBY is coupled to the power pin of the control chip 103. The IN is coupled to the ground pin GND and is configured to reduce power noise input to the control die 103 to stabilize control of the operation of the wafer 103. Of course, the bypass capacitor CBY is optional/optional.

Furthermore, in order to activate the control chip 103, the pull-up resistor RPU can be coupled between the power pin IN of the control chip 103 and the chip enable pin EN. The pull up resistor RPU is configured to activate the control wafer 103. In other words, if a signal that is continuously maintained at a high level is input to the wafer enable pin EN of the control chip 103, the control chip 103 can be activated, so that the control chip 103 is in an operational state; At the low level signal to the wafer enable pin EN of the control wafer 103, the control wafer 103 can be shut down, thereby causing the control wafer 103 to be in a off/standby state.

In the present exemplary embodiment, the control chip 103 is coupled to the power conversion line 101 and configured to generate an output pulse width modulation signal PWM_O, and output the generated output pulse width modulation signal PWM_O through the output pin SW. To control the operation of the power conversion line 101. It is worth mentioning that, in the case that the power supply device 10 is in normal operation, the duty cycle of the output pulse width modulation signal PWM_O generated by the control chip 103 can be maintained at about 70.4%, and the control chip is controlled. The frequency of the output pulse width modulation signal PWM_O generated by 103 can be maintained at about 370 KHz, but is not limited thereto.

In addition, in order to make the high level of the output pulse width modulation signal PWM_O as close as possible to the DC input voltage DC_IN, the bootstrap capacitor CBS can be coupled to the bootstrap pin BS and output of the control chip 103. Foot SW between. The bootstrap capacitor CBS is configured to enhance a high-side N-type transistor (shown in FIG. 2) that is coupled between the power supply pin IN and the output pin SW within the control chip 103. The driving voltage of MN (ie, gate source voltage Vgs). In other words, the purpose of setting the bootstrap capacitor CBS between the bootstrap bit BS and the output pin SW of the control chip 103 is to enable the control chip 103 to smoothly generate the output pulse width modulation signal PWM_O.

In addition, in order to stabilize the operation of the power supply device 10, the resistor-capacitor network 107 can be coupled between the compensation pin COMP of the control chip 103 and the ground potential (0 V). The resistor-capacitor network 107 is configured to compensate for the system frequency response of the power supply device 10. In the present exemplary embodiment, the resistor-capacitor network 107 can be composed of a compensation capacitor (CP1, CP2) and a resistor RP1. The compensation capacitor CP1 and the compensation resistor RP1 are connected in series between the compensation pin COMP of the control chip 103 and the ground potential (0V), and the compensation capacitor CP2 is connected in parallel with the series-connected capacitor-resistors (CP1, RP1). It is worth mentioning here that the compensation capacitor CP2 is optional/optional.

Furthermore, in order to stabilize the DC output voltage DC_OUT provided by the power conversion line 101, the output feedback line 109 can be coupled between the DC output voltage DC_OUT and the ground potential (0V). The output feedback line 109 is configured to provide a feedback voltage VFB associated with the DC output voltage DC_OUT to the feedback pin FB of the control wafer 103, thereby causing the control wafer 103 to adjust its output pulse accordingly. Wide-tuning PWM_O (for example, adjusting the duty cycle of the output pulse width modulation signal PWM_O) to adjust and stabilize the power conversion circuit The DC output voltage DC_OUT provided by 101. In the present exemplary embodiment, the output feedback line 109 may be composed of a feedback resistor (RF1, RF2) connected in series between the DC output voltage DC_OUT and the ground potential (0V), but is not limited thereto. Under this condition, the feedback voltage VFB can be regarded as a voltage-dividing signal of the DC output voltage DC_OUT, that is, VFB=DC_OUT*(RF2/(RF1+RF2)).

In addition to this, since the control wafer 103 is provided with a soft start function, it is possible to prevent an impact on the circuit of the rear stage load 20. Under this condition, the set capacitor CSET can be coupled between the soft start pin SS of the control chip 103 and the ground pin GND. The set capacitor CSET is configured to set a soft-start time of the power supply device 10, that is, a process in which the DC output voltage DC_OUT is gradually increased from zero volts (0 V) to a rated voltage. It is worth mentioning that the soft start time of the power supply device 10 can be correspondingly determined by changing the capacitance of the set capacitor CSET. However, if the soft start function of the control chip 103 is not activated, the control can be suspended. The soft start pin SS of the wafer 103. In addition, the capacitance of the set capacitor CSET must be set lower than the preset upper-limit time of the control chip 103 to complete the soft start function.

As can be seen from the disclosure of the prior art, a DC-DC converter that adopts a PWM-based control mechanism is not used when the output (load) is short-circuited. With any additional short-circuit protection, the DC-DC converter will continuously generate/output an abnormally large current to flow through the short-circuited load. As a result, it will likely lead to DC-DC An abnormal rise in the temperature of the converter itself or the components inside the load increases the risk of damage to the components of the DC-DC converter itself or within the load.

In order to solve the problems described in the prior art, the present exemplary embodiment greatly reduces the temperature of the power supply device 10 itself or the components inside the load 20 when the load 20 is short-circuited and the risk of damage through the short circuit protection line 105. More specifically, the short circuit protection line 105 is coupled to the control wafer 103 and is configured to pull down the level of the soft start pin SS of the control wafer 103 in response to a short circuit of the load 20 (eg, pull down to ground, but Therefore, the frequency and duty cycle of the output pulse width modulation signal PWM_O are greatly reduced, thereby greatly reducing the current flowing through the short-circuit load 20.

As shown in FIG. 3, it is a schematic diagram of the implementation of the short circuit protection circuit 105 according to an exemplary embodiment of the present invention. Referring to FIG. 1 and FIG. 3 together, the short circuit protection circuit 105 includes: a PNP-type bipolar junction transistor (BJT) B1, capacitors C1 to C3, resistors R1 to R3, and two poles. Diode D1.

In the present exemplary embodiment, the emitter of the PNP-type bipolar junction transistor B1 is coupled to the soft start pin SS of the control wafer 103, and the collector of the PNP type dual carrier junction transistor B1. (collector) is coupled to the ground potential (0V). The first end of the capacitor C1 is for receiving the DC input voltage DC_IN, and the second end of the capacitor C1 is coupled to the base of the PNP type bipolar junction transistor B1. The first end of the resistor R1 is coupled to the base of the PNP type bipolar junction transistor B1, and the second end of the resistor R1 is coupled to the ground potential (0V). Capacitor C2 is connected in parallel with resistor R1. resistance The first end of the R2 is coupled to the base of the PNP-type bipolar junction transistor B1, and the second end of the resistor R2 is coupled to the output pin SW of the control wafer 103.

The capacitor C3 is connected across the emitter and collector of the PNP type bipolar junction transistor B1. It is worth mentioning here that the capacitor C3 is optional/optional. The first end of the resistor R3 is coupled to the base of the PNP type bipolar junction transistor B1, the anode of the diode D1 is coupled to the second end of the resistor R3, and the cathode of the diode D1 is coupled. The output pin SW of the wafer 103 is controlled.

Based on the above, in the case that the power supply device 10 is in normal operation (for example, the load 20 is not short-circuited), the control chip 103 can generate an output pulse width modulation signal PWM_O with a duty cycle of about 70.4% and a frequency of about 370 KHz. The operation of the power conversion line 101 is controlled so that the power conversion line 101 stably supplies the DC output voltage DC_OUT to the load 20. At the same time, the current flowing through the load 20 (i.e., the output current of the power supply device 10) may be, for example, an output current of a desired design (for example, 1.8 A, but is not limited thereto). Under this condition, since the power supply device 10 is in normal operation (ie, the load 20 is not short-circuited), the level of the soft start pin SS of the control chip 103 is about 1.5 to 2.0 V (but not limited). Here, the voltage across the resistor R1 or the capacitor C2 is about 3 to 4V. Therefore, the PNP type bipolar junction transistor B1 will be in a turn-off state. In other words, in the case where the power supply device 10 is in normal operation (ie, the load 20 is not short-circuited), the short circuit protection line 105 may be in an inactivated state.

On the other hand, once the load 20 is short-circuited, the level of the output pin SW of the control chip 103 is greatly reduced, so that the resistor R1 or the capacitor C2 The cross-pressure will also be greatly reduced. At the same time, the PNP type bipolar junction transistor B1 in the short circuit protection line 105 will react to the short circuit of the load 20 and be transiently turned-on (that is, when the load 20 is short-circuited, the short-circuit protection circuit 105 will be in an activated state), thereby pulling the level of the soft start pin SS of the control wafer 103 to ground. Under this condition, according to the characteristics of the control chip 103 itself, the frequency and duty cycle of the output pulse width modulation signal PWM_O generated by the control chip 103 will be greatly reduced (for example, the duty cycle will be reduced from the original 70.4%). 3.5%, and the frequency will drop from the original 370KHz to 44KHz, but is not limited to this, thereby greatly reducing the current flowing through the short-circuit load 20 (for example, 0.8~0.94A, but is not limited thereto). The power supply device 10 may continuously output a short-circuit current of about 4.64 A as compared with the case where the short-circuit protection line 105 is not provided. Obviously, the power supply device 10 provided with the short circuit protection line 105 can greatly reduce the temperature of the power supply device 10 itself or the components inside the load 20 when the load 20 is short-circuited and the risk of damage.

In practical applications, if the power supply topology of the power conversion line 101 is a buck power conversion topology, the DC input voltage DC_IN can be assumed to be 18V, and the DC output voltage DC_OUT can be assumed to be 12V. Under this condition, in the short-circuit protection line 105 shown in FIG. 3, the capacitance of the capacitor C1 can be selected as 104PF, the capacitance of the capacitor C2 can be selected as 474PF, the capacitance of the capacitor C3 can be selected as 473PF, and the resistance of the resistor R1 can be selected. 150KΩ is selected, the resistance of resistor R2 can be 270KΩ, the resistance of resistor R3 can be 91KΩ, and the diode D1 can be selected as the diode component of IN4148. Of course, the short circuit protection line shown in Figure 3. In the path 105, the capacitance values of the capacitors C1 to C3 and the resistance values of the resistors R1 to R3 can be adjusted according to actual design/application requirements. Moreover, according to other types of power conversion topologies different from the buck power supply topology, in the short circuit protection line 105 shown in FIG. 3, the capacitance values of the capacitors C1 to C3 and the resistance values of the resistors R1 to R3 can also be visually designed. /Adjustment of application requirements.

It is worth mentioning here that the embodiment of the short circuit protection line 105 provided/applied in the power supply device 10 of the present invention is not limited to the embodiment shown in FIG. More clearly, FIG. 4 is a schematic diagram of an implementation of a short circuit protection circuit 105 according to another exemplary embodiment of the present invention. Referring to FIG. 3 and FIG. 4 together, the implementation of the short-circuit protection line 105 shown in FIG. 4 is different from that of FIG. 3 only in that: 1) the anode of the diode D1 is coupled to the output of the control wafer 103. a pin SW; 2) the cathode of the diode D1 is coupled to the second end of the resistor R2; and 3) the resistor R3 is coupled to the second end of the capacitor C1 and the PNP type bipolar junction transistor Between the bases of B1. However, the short circuit protection line 105 shown in FIG. 4 can achieve similar technical effects as the short circuit protection line 105 shown in FIG.

In practical applications, if the power supply topology of the power conversion line 101 is a buck power conversion topology, the DC input voltage DC_IN can be assumed to be 18V, and the DC output voltage DC_OUT can be assumed to be 12V. Under this condition, in the short-circuit protection line 105 shown in FIG. 4, the capacitance of the capacitor C1 can be selected as 105PF, the capacitance of the capacitor C2 can be selected as 474PF, the capacitance of the capacitor C3 can be selected as 473PF, and the resistance of the resistor R1 can be selected. 330KΩ is selected, the resistance of resistor R2 can be selected as 1MΩ, the resistance of resistor R3 can be selected as 330KΩ, and diode D1 can be selected. Use a diode component numbered IN4148. Similarly, in the short circuit protection line 105 shown in FIG. 4, the capacitance values of the capacitors C1 to C3 and the resistance values of the resistors R1 to R3 can be adjusted according to actual design/application requirements. Moreover, according to other types of power conversion topologies different from the buck power supply topology, in the short circuit protection line 105 shown in FIG. 4, the capacitance values of the capacitors C1 to C3 and the resistance values of the resistors R1 to R3 can also be visually designed. /Adjustment of application requirements.

In addition, FIG. 5 is a schematic diagram of an implementation of the short circuit protection circuit 105 according to still another exemplary embodiment of the present invention. Referring to FIG. 4 and FIG. 5 together, the implementation of the short-circuit protection line 105 shown in FIG. 5 is different from that of FIG. 4 only in that the resistor R3 and the diode D1 are omitted. In other words, in the short circuit protection line 105 shown in FIG. 5, the second end of the capacitor C1 is coupled to the base of the PNP type bipolar junction transistor B1, and the second end of the resistor R2 is coupled. Connected to the output pin SW of the control chip 103. However, the short circuit protection line 105 shown in FIG. 5 can achieve similar technical effects as the short circuit protection line 105 shown in FIG.

In practical applications, if the power supply topology of the power conversion line 101 is a buck power conversion topology, the DC input voltage DC_IN can be assumed to be 18V, and the DC output voltage DC_OUT can be assumed to be 12V. Under this condition, in the short-circuit protection line 105 shown in FIG. 5, the capacitance of the capacitor C1 can be selected as 104PF, the capacitance of the capacitor C2 can be selected as 474PF, the capacitance of the capacitor C3 can be selected as 473PF, and the resistance of the resistor R1 can be selected. 330KΩ is used, and the resistance of resistor R2 can be 1MΩ. Similarly, in the short circuit protection line 105 shown in FIG. 5, the capacitance values of the capacitors C1 to C3 and the resistance values of the resistors (R1, R2) can be visually designed/applied. And adjust. Moreover, according to other types of power conversion topologies different from the buck power supply topology, in the short circuit protection line 105 shown in FIG. 5, the capacitance values of the capacitors C1 to C3 and the resistance values of the resistors (R1, R2) are also visible. Adjusted for actual design/application requirements.

It is worth mentioning that, in the short circuit protection line 105 shown in FIG. 5, the reason for omitting the resistor R3 of FIG. 4 and changing the capacitance value of the capacitor C1 of FIG. 4 to 104P is to improve the control wafer 103. The reason for the soft-start function; in addition, the reason for omitting the diode D1 of FIG. 4 is to reduce the voltage across the resistor R1 when the load 20 is short-circuited, thereby reducing the responsibility of the output pulse width modulation signal PWM_O generated by the control chip 103. The cycle, in turn, reduces the short circuit current output by the power supply device 10 when the load 20 is short-circuited.

In addition, the capacitance values of the capacitors C1 and C2 in FIGS. 3 to 5 are selected as follows: when the load 20 is short-circuited, an acceptable balance is obtained between the voltage across the resistor R1 and the time at which the wafer 103 is controlled to complete the soft-start function. Just fine. In other words, when the load 20 is short-circuited, as long as the voltage across the resistor R1 is over-shooted, and the control wafer 103 can complete the soft-start function within the preset upper limit time.

Furthermore, the short circuit protection line 105 shown in FIGS. 3 to 5 is particularly suitable for a control wafer having a soft start function and an output of a non-latch type. The so-called "output is non-latching type" means that when the load is short-circuited, the control chip will continue to generate an output pulse width modulation signal with a certain duty cycle and frequency.

Even though the above exemplary embodiment reduces the output pulse width modulation signal PWM_O by pulling down the level of the soft start pin SS of the control chip 103. An example of the duty cycle is described, but the invention is not limited thereto. More specifically, as long as the control chip 103 has other characteristics similar to the soft start pin SS (ie, the pin level is lowered to further reduce the duty cycle of the output pulse width modulation signal PWM_O) It can be applied, and everything depends on the actual design/application requirements.

In summary, the present invention proposes a power supply device 10 associated with DC voltage conversion and having a short circuit protection function. When the load 20 is short-circuited, based on the set short-circuit protection line 105, the level of the soft-start pin SS of the control wafer 103 is pulled down to ground. Under this condition, the frequency and duty cycle of the output pulse width modulation signal PWM_O generated by the control chip 103 will be greatly reduced, thereby greatly reducing the current flowing through the short-circuit load 20, thereby greatly reducing the power supply device. The temperature of the component 10 itself or the component inside the load 20 when the load 20 is short-circuited and the risk of damage.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

10‧‧‧Power supply unit

20‧‧‧ load

101‧‧‧Power conversion line

103‧‧‧Control chip

105‧‧‧Short circuit protection circuit

107‧‧‧Resistor Capacitor Network

109‧‧‧Output feedback line

CBY‧‧‧ bypass capacitor

CBS‧‧‧ bootstrap capacitor

RPU‧‧‧ Pull-up resistor

CSET‧‧‧Set Capacitor

CP1, CP2‧‧‧ compensation capacitor

RF1, RF2‧‧‧ feedback resistor

RP1‧‧‧compensation resistor

DC_IN‧‧‧DC input voltage

DC_OUT‧‧‧DC output voltage

VFB‧‧‧ feedback voltage

PWM_O‧‧‧ output pulse width modulation signal

IN‧‧‧ control chip power pin

GND‧‧‧Control chip grounding pin

EN‧‧‧Control chip wafer enable pin

SS‧‧‧ control chip soft start pin

BS‧‧‧Controlled wafer bootstrap

SW‧‧‧ control chip output pin

FB‧‧‧ control chip feedback pin

COMP‧‧‧ control chip compensation pin

Claims (13)

A power supply device includes: a power conversion circuit configured to provide a DC output voltage to a load in response to an output pulse width modulation signal; a control chip having a soft start function coupled to the power conversion line The control chip is operated at a DC input voltage and configured to generate the output pulse width modulation signal to control operation of the power conversion line; and a short circuit protection line coupled to the control chip and configured Reducing the level of a soft-start pin of the control chip in response to a short circuit of the load, thereby substantially reducing the frequency and duty cycle of the output pulse width modulation signal, thereby substantially reducing The current flowing through the shorted load. The power supply device of claim 1, wherein the control chip further has an output pin for outputting the generated output pulse width modulation signal, and the short circuit protection circuit comprises: a PNP a dual-carrier junction transistor having an emitter coupled to the soft start pin and a collector coupled to a ground potential; a first capacitor having a first terminal for receiving the DC input voltage The second end is coupled to the base of the PNP type bipolar junction transistor; a first resistor having a first end coupled to the base of the PNP type bipolar junction transistor, and a second The end is coupled to the ground potential; a second capacitor is coupled to the first resistor; and a second resistor is coupled to the base of the PNP type bipolar junction transistor The second end is coupled to the output pin. The power supply device of claim 2, wherein the short circuit protection circuit further comprises: a third capacitor connected between the emitter and the collector of the PNP type bipolar junction transistor. The power supply device of claim 3, wherein the short circuit protection circuit further comprises: a diode having an anode coupled to the output pin and a cathode coupled to the second end of the second resistor And a third resistor having a first end coupled to the second end of the first capacitor and a second end coupled to the base of the PNP-type bipolar junction transistor. The power supply device of claim 3, wherein the short circuit protection circuit further comprises: a third resistor, the first end of which is coupled to the base of the PNP type bipolar junction transistor; and one or two The pole body has an anode coupled to the second end of the third resistor and a cathode coupled to the output pin. The power supply device of claim 2, wherein: the control chip further has a power pin to receive the DC input voltage required for operation; and the control chip further has a ground pin coupled to The ground potential. For example, the power supply device described in claim 6 of the patent scope further includes: A bypass capacitor coupled between the power pin and the ground pin and configured to reduce power noise input to the control chip. The power supply device of claim 6, wherein the control chip further has a bootstrap pin, and the power supply device further includes: a bootstrap capacitor coupled to the bootstrap pin Between the bit and the output pin, and configured to boost a driving voltage of a high side N-type transistor coupled between the power pin and the output pin inside the control chip. The power supply device of claim 6, wherein the control chip further has a chip enable pin, and the power supply device further includes: a pull-up resistor coupled to the power pin and the chip Between the enable pins, and configured to activate the control wafer. The power supply device of claim 6, wherein the control chip further has a compensation pin, and the power supply device further includes: a resistor-capacitor network coupled to the compensation pin and the ground potential Between and configured to compensate for a system frequency response of the power supply device to stabilize operation of the power supply device. The power supply device of claim 6, wherein the control chip further has a feedback pin, and the power supply device further includes: an output feedback circuit coupled to the DC output voltage and the ground Between the potentials, and configured to provide a feedback voltage associated with the DC output voltage to the feedback pin, thereby causing the control chip to adjust the output pulse width modulation signal, thereby Adjust and stabilize the DC output voltage provided by the power conversion line. The power supply device of claim 6, further comprising: a set capacitor coupled between the soft start pin and the ground pin, and configured to set a soft state of the power supply device Start Time. The power supply device of claim 1, wherein the topology of the power conversion circuit includes at least a buck power conversion topology, a boost power conversion topology, a buck-boost power conversion topology, and a A flyback power conversion topology, a forward power conversion topology, or a combination thereof.