JP4896754B2 - Overcurrent protection circuit and power supply device using the same - Google Patents

Description

  The present invention relates to an abnormality protection technique (overcurrent protection technique) for a power supply device using an output transistor.

  Conventional power supply apparatuses are generally equipped with overcurrent protection circuits as abnormality protection means for performing a predetermined protection operation when a circuit abnormality is detected (see, for example, Patent Document 1).

  FIG. 4 is a circuit diagram showing a conventional example of an overcurrent protection circuit.

The overcurrent protection circuit (circuit portion surrounded by a broken line in the figure) shown in this figure compares the switch voltage Vsw drawn from one end of the output transistor Tr with a predetermined threshold voltage Vth, thereby detecting an overcurrent detection signal. This is a means for generating OCP (a signal indicating whether or not the current flowing when the output transistor Tr is on is in an overcurrent state).
JP-A-10-243646

  Certainly, with the above-described conventional overcurrent protection circuit, it is possible to detect that the current flowing when the output transistor Tr is on is in an overcurrent state, and to perform an appropriate protection operation.

  However, since the threshold voltage Vth is fixedly set in the conventional overcurrent protection circuit, the gate voltage (buffer BUF is driven) that is applied when the output transistor Tr is turned on due to the fluctuation or reduction of the power supply voltage. When the adjustment voltage Vreg) varies, the on-resistance of the output transistor Tr varies, and the voltage value of the switch voltage Vsw (and thus the current detection value of the overcurrent protection circuit) varies depending on this. For this reason, there is a possibility that the detection accuracy of the overcurrent is lowered.

  Further, in the conventional overcurrent protection circuit described above, there is a possibility that the detection accuracy of the overcurrent may be lowered due to a change in the ambient temperature and manufacturing variations of the output transistor Tr.

  In view of the above problems, the present invention provides an overcurrent protection circuit capable of always detecting an overcurrent accurately without depending on fluctuations in power supply voltage, changes in ambient temperature, and manufacturing variations in output transistors. An object is to provide a power supply device used.

  In order to achieve the above object, an overcurrent protection circuit according to the present invention includes an overcurrent detection circuit that compares a threshold voltage generating unit that generates a threshold voltage with a switch voltage drawn from one end of an output transistor and the threshold voltage. An overcurrent protection circuit including a comparator for generating a signal, wherein the threshold voltage generation unit is configured to reduce the switching voltage generated due to a variation in gate voltage applied when the output transistor is turned on. The configuration is such that the voltage value of the threshold voltage is changed (first configuration) so as to cancel the fluctuation.

  In the overcurrent protection circuit having the first configuration, the threshold voltage generation unit includes a variable resistance circuit in which at least one transistor and a resistor are connected in series, and a predetermined constant current in the variable resistance circuit. And generating the threshold voltage based on a voltage drawn from one end of the variable resistance circuit, and a gate of a transistor constituting the threshold voltage generator The power supply voltage or adjustment voltage used when generating the gate voltage of the output transistor may be applied (second configuration).

  Further, in the overcurrent protection circuit having the second configuration, the output transistor and the transistor constituting the threshold voltage generation unit are configured to have a pair property (third configuration). Good.

  Further, the power supply device according to the present invention has an output transistor in which a predetermined voltage is applied to one end and a pulsed switch voltage is drawn from the other end according to its own switching drive, and the switch voltage is smoothed to a desired level. A configuration (fourth configuration) is provided that includes a smoothing circuit that generates an output voltage and an overcurrent protection circuit having any one of the first to third configurations.

  The power supply device having the fourth configuration generates an error voltage by amplifying a feedback voltage generation circuit that generates a feedback voltage corresponding to the output voltage, and a difference between the feedback voltage and a predetermined target voltage. An error amplifier, an oscillator that generates a clock signal having a predetermined frequency, a slope voltage generation circuit that generates a slope voltage of a triangular waveform or a ramp waveform based on the clock signal, and the error voltage and the slope voltage are compared. A PWM comparator for generating a pulse width modulation signal; a drive control circuit for generating an open / close control signal for the output transistor based on the clock signal and the pulse width modulation signal; and a gate for the output transistor based on the open / close control signal. A configuration including a level shifter and a buffer for generating a voltage (fifth configuration) is preferable.

  Further, in the power supply device having the fifth configuration, the drive control circuit stops the switching drive of the output transistor when the overcurrent detection signal indicates an overcurrent state (sixth configuration). It is good to.

  The overcurrent protection circuit according to the present invention can always detect an overcurrent accurately without depending on fluctuations in the power supply voltage, changes in ambient temperature, and manufacturing variations in the output transistor. It becomes possible to improve the reliability of the power supply device used.

  Hereinafter, a detailed description will be given by taking as an example a configuration in which the present invention is applied to a synchronous rectification step-down switching regulator.

  FIG. 1 is a circuit block diagram showing an embodiment of a switching regulator according to the present invention.

  As shown in the figure, the switching regulator of this embodiment includes an external inductor L1, a diode D1, resistors R1 to R3, and capacitors C1 to C5 in addition to the switching power supply IC100, and an input voltage Vin. Is a step-down switching regulator (chopper type regulator) that generates a desired output voltage Vout from the output voltage Vout.

  The switching power supply IC100 includes an output transistor 1a (N-channel MOS field effect transistor), a synchronous rectification transistor 1b (N-channel MOS field effect transistor), buffers 2a to 2b, level shifters 3a to 3b, and a drive control circuit 4 An error amplifier 5, a soft start control circuit 6, a pnp bipolar transistor 7, a slope voltage generation circuit 8, a PWM [Pulse Width Modulation] comparator 9, a reference voltage generation circuit 10, an oscillator 11, and a resistor 12 a to 12 b, an adjustment voltage generation circuit 13, a diode 14, an undervoltage lockout circuit 15, a thermal shutdown circuit 16, and an overcurrent protection circuit 17.

  In addition, the switching power supply IC 100 has an enable terminal EN, a feedback terminal FB, a phase compensation terminal CP, a soft start terminal SS, a bootstrap terminal BST, an input terminal VIN, A switch terminal SW and a ground terminal GND are provided.

  Outside the switching power supply IC100, the input terminal VIN is connected to an application terminal for an input voltage Vin (for example, 12V), and is also connected to a ground terminal through a capacitor C1. The switch terminal SW is connected to the cathode of the diode D1 and one end of the inductor L1. The anode of the diode D1 is connected to the ground terminal. The other end of the inductor L1 is connected to the output terminal of the output voltage Vout, and is also connected to one end of the capacitor C3 and one end of the resistor R1. The other end of the capacitor C3 is connected to the ground terminal. The other end of the resistor R1 is connected to the ground terminal via the resistor R2. A connection node between the resistor R1 and the resistor R2 is connected to the feedback terminal FB as a lead-out end of the feedback voltage Vfb. A capacitor C2 is connected between the switch terminal SW and the bootstrap terminal BST. The enable terminal EN is a terminal to which an enable signal for controlling whether or not the switching power supply IC 100 can be driven is applied, and is open in a normal state. The phase compensation terminal CP is connected to the ground terminal via the capacitor C4 and the resistor R3. The soft start terminal SS is connected to the ground terminal via the capacitor C5.

  The inductor L1, the diode D1, and the capacitor C3 function as a smoothing circuit that smoothes the switch voltage Vsw drawn from the switch terminal SW and generates a desired output voltage Vout. The resistors R1 and R2 function as a feedback voltage generation circuit (resistance voltage dividing circuit) that generates a feedback voltage Vfb corresponding to the output voltage Vout.

  Next, the internal configuration of the switching power supply IC 100 will be described.

  The output transistor 1a and the synchronous rectification transistor 1b are a pair of switch elements connected in series between the input terminal VIN (the end to which the input voltage Vin is applied) and the ground terminal GND. , An output stage for generating a pulsed switch voltage Vsw from the input voltage Vin. Specifically speaking, the drain of the transistor 1a is connected to the input terminal VIN. The source of the transistor 1a is connected to the switch terminal SW. The drain of the transistor 1b is connected to the switch terminal SW. The source of the transistor 1b is connected to the ground terminal GND.

  Note that the term “complementary” used in this specification refers to the case where the transistors 1a and 1b are turned on / off from the viewpoint of preventing through current, as well as the case where the transistors 1a and 1b are completely turned on / off. The case where a predetermined delay is given to the off transition timing is also included.

  The buffers 2a and 2b are means for generating gate voltages of the transistors 1a and 1b based on the output signals of the level shifters 3a and 3b, respectively. The positive power supply terminal of the buffer 2a is connected to the bootstrap terminal BST (application terminal of the bootstrap voltage Vbst). Both the negative power supply terminal of the buffer 2a and the positive power supply terminal of the buffer 2b are connected to the switch terminal SW.

  The level shifters 3a and 3b are means for raising the voltage level of the open / close control signal input from the drive control circuit 4, respectively. The positive power supply terminal of the level shifter 3a is connected to the bootstrap terminal BST. The negative power supply terminal of the level shifter 3a is connected to the switch terminal SW.

  The drive control circuit 4 is a logic unit that generates an open / close control signal for the transistors 1a and 1b based on the clock signal CLK and the pulse width modulation signal PWM.

  The error amplifier 5 is means for amplifying a difference between the feedback voltage Vfb and a predetermined target voltage Vtg to generate an error voltage Verr. The connection relationship will be described. The inverting input terminal (−) of the error amplifier 5 is connected to the feedback terminal FB, and the feedback voltage Vfb (corresponding to the actual value of the output voltage Vout) is applied. The non-inverting input terminal (+) of the error amplifier 5 is connected to a connection node between the resistor 12a and the resistor 12b, and a predetermined target voltage Vtg (corresponding to a target set value of the output voltage Vout) is applied.

  The soft start control circuit 6 starts charging the capacitor C5 connected to the soft start terminal SS along with the activation of the switching regulator, and supplies the error voltage Verr through the transistor 7 to a predetermined soft start voltage Vss (charge voltage of the capacitor C5). + Means for clamping to the base-emitter voltage of the transistor 7). By performing such soft start control, overshoot of the output voltage Vout and inrush current to the load can be prevented in advance. Note that the soft start control is terminated because the transistor 7 is deactivated when the error voltage Verr is lower than the soft start voltage Vss.

  The transistor 7 is means for clamping the error voltage Verr to the soft start voltage Vss when the switching regulator is started based on an instruction from the soft start control circuit 6. The connection relationship will be specifically described. The emitter of the transistor 7 is connected to the output terminal of the error amplifier 5. The collector of the transistor 7 is connected to the ground terminal GND. The base of the transistor 7 is connected to the soft start terminal SS via the soft start control circuit 6.

  The slope voltage generation circuit 8 is means for generating a slope voltage Vslope having a triangular waveform or a ramp waveform based on the clock signal CLK generated by the oscillator 11 and sending this to the PWM comparator 9.

  The PWM comparator 9 is a means for generating a pulse width modulation signal PWM for determining the switching duty by comparing the error voltage Verr and the slope voltage Vslope and sending it to the drive control circuit 4. However, the upper limit of the switching duty is limited to the maximum duty determined in the circuit, and does not become 100%. The connection relationship will be specifically described. The non-inverting input terminal (+) of the PWM comparator 9 is connected to the output terminal of the slope voltage generation circuit 8. The inverting input terminal (−) of the PWM comparator 9 is connected to the output terminal of the error amplifier 5 and the phase compensation terminal CP.

  The reference voltage generation circuit 10 is a means for generating a reference voltage Vref (for example, 2.9 V) from the power supply voltage Vcc and supplying it to each part of the switching power supply IC100 as an internal drive voltage.

  The oscillator 11 is a means for receiving a reference voltage Vref, generating a rectangular wave clock signal CLK having a predetermined frequency, and supplying it to the drive control circuit 4 and the slope voltage generation circuit 8.

  The resistors 12 a to 12 b are means for generating a desired target voltage Vtg by dividing the reference voltage Vref and applying it to the non-inverting input terminal (+) of the error amplifier 5. The connection relationship will be specifically described. The resistors 12a to 12b are connected in series between the output terminal (application terminal of the reference voltage Vref) of the reference voltage generation circuit 10 and the ground terminal GND. The non-inverting input terminal (+) of the error amplifier 5 is connected.

  The adjustment voltage generation circuit 13 is means for generating a predetermined adjustment voltage Vreg (for example, 5 V) from the power supply voltage Vcc.

  The diode 14 is connected between the output terminal of the adjustment voltage generation circuit 13 (the output terminal of the adjustment voltage Vreg) and the bootstrap terminal BST, and constitutes a bootstrap circuit together with the capacitor C2. From the cathode, A desired bootstrap voltage Vbst is extracted as a drive voltage for the buffer 2a and the level shifter 3a. Note that the bootstrap voltage Vbst has a voltage value higher than the switch voltage Vsw by a charge voltage of the capacitor C2 (a voltage obtained by subtracting the forward drop voltage Vf of the diode 14 from the adjustment voltage Vreg).

  The low voltage lockout circuit 15 is an abnormality protection unit that operates upon receiving the supply of the reference voltage Vreg and shuts down the switching power supply IC 100 when it detects a decrease in the power supply voltage Vcc.

  The thermal shutdown circuit 16 is an abnormality protection unit that operates by receiving the reference voltage Vreg and shuts down the switching power supply IC 100 when the monitored temperature reaches a predetermined threshold (for example, 175 ° C.).

  The overcurrent protection circuit 17 operates in response to the supply of the reference voltage Vreg and the input voltage Vin, and generates an overcurrent detection signal OCP indicating whether or not the current flowing when the output transistor 1a is on is in an overcurrent state. It is. The overcurrent detection signal OCP is used as a reset signal for the drive control circuit 4 and the soft start control circuit 6.

  First, the basic operation (stabilized output control of the output voltage Vout) of the switching regulator configured as described above will be described.

  In the switching power supply IC100, the error amplifier 5 amplifies the difference between the feedback voltage Vfb and the target voltage VTg to generate the error voltage Verr. The PWM comparator 9 compares the error voltage Verr and the slope voltage Vslope to generate a pulse width modulation signal PWM. At this time, the logic of the pulse width modulation signal PWM is at a low level if the error voltage Verr is higher than the slope voltage Vslope, and is at a high level if the error voltage Verr is the opposite. That is, the higher the error voltage Verr, the longer the low level period that occupies one cycle of the pulse width modulation signal PWM. Conversely, the lower the error voltage Verr, the one cycle of the pulse width modulation signal PWM. The low level period occupied by is shortened.

  The drive control circuit 4 prevents the transistors 1a and 1b from being simultaneously turned on based on the clock signal CLK and the pulse width modulation signal PWM, and turns on the transistor 1a during the low level period of the pulse width modulation signal PWM, On the contrary, during the high level period of the pulse width modulation signal PWM, an open / close control signal for the transistors 1a and 1b is generated so that the transistor 1a is turned off and the transistor 1b is turned on.

  Through the above feedback control, the transistors 1a and 1b are subjected to switching control so that the feedback voltage Vfb matches the target voltage Vtg, in other words, the output voltage Vout matches the desired target set value. .

  Next, the configuration of the overcurrent protection circuit 17 and its basic operation (overcurrent protection operation) will be described in detail with reference to FIG.

  FIG. 2 is a circuit block diagram showing a configuration example of the overcurrent protection circuit 17.

  As shown in FIG. 2, the overcurrent protection circuit 17 compares the threshold voltage generator 171 that generates the threshold voltage Vth with the switch voltage Vsw drawn from one end of the transistor 1a and the threshold voltage Vth, and detects the overcurrent detection signal OCP. Which is connected between the switch terminal SW and the non-inverting input terminal (+) of the comparator 172 and controlled to be opened and closed in synchronization with the transistor 1a, and when the switch 173 is off, the comparator 172 And a resistor 174 for pulling up the non-inverting input terminal (+) to the input voltage Vin.

  In the overcurrent protection circuit 17 configured as described above, the switch 173 is turned on when the transistor 1a is turned on and turned off when the transistor 1a is turned off. Accordingly, the switch voltage Vsw ′ applied to the non-inverting input terminal (+) of the comparator 172 coincides with the switch voltage Vsw when the transistor 1a is on, and becomes the input voltage Vin when the transistor 1a is off.

  Here, the switch voltage Vsw obtained when the transistor 1a is on is a voltage value (Vin−Ron × I) obtained by subtracting the integrated value of the on-resistance Ron of the transistor 1a and the current I flowing through the input voltage Vin. Therefore, if the on-resistance Ron of the transistor 1a is regarded as a constant value, the voltage value decreases as the current I increases.

  Therefore, the comparator 172 can detect the overcurrent by comparing the switch voltage Vsw ′ with the threshold voltage Vth. In the case of the present embodiment, if the switch voltage Vsw ′ is higher than the threshold voltage Vth, the overcurrent detection signal OCP becomes high level (logic indicating a normal state), and conversely, the switch voltage Vsw ′ is higher than the threshold voltage Vth. Is too low, the overcurrent detection signal OCP is at a low level (logic indicating an overcurrent state).

  Note that when the overcurrent detection signal OCP transitions to a logic (low level) indicating an overcurrent state, the drive control circuit 4 stops the switching drive of the transistors 1a and 1b and shuts down the switching power supply IC100. The soft start control circuit 6 discharges the capacitor C5 in preparation for the restart of C.

  As described above, if the overcurrent detection detection circuit 17 generates the overcurrent detection signal OCP by comparing the switch voltage Vsw (switch voltage Vsw ′) with the threshold voltage Vth, the output voltage Vout can be detected as overcurrent detection means. Since it is not necessary to insert a sense resistor on the supply path, it is possible to reduce costs and improve output efficiency.

  By the way, in the switching regulator configured as described above, if the threshold voltage Vth is fixedly set, the transistor 1a is turned on when the power supply voltage Vcc (and thus the adjustment voltage Vreg and the bootstrap voltage Vbst) fluctuates. The on-resistance Ron of the transistor 1a fluctuates in accordance with the amount of fluctuation of the gate voltage given at the time, and the voltage value of the switch voltage Vsw (and thus the current detection value of the overcurrent protection circuit) fluctuates depending on this. Therefore, the overcurrent detection accuracy may be reduced.

  Therefore, the threshold voltage generation unit 171 of the present embodiment sets the voltage value of the threshold voltage Vth so as to cancel the fluctuation of the switch voltage Vsw caused by the fluctuation of the gate voltage given when the transistor 1a is turned on. It is configured to change.

  Hereinafter, the configuration and operation of the threshold voltage generation unit 171 will be described in detail.

  As shown in FIG. 2, the threshold voltage generation unit 171 includes a variable resistance circuit formed by connecting at least one transistor N1 to Nm (m is an integer of 1 or more) and a resistor Ra in series, and the variable resistance circuit. A constant current source I1 for supplying a predetermined constant current, and an output stage (pnp type bipolar transistor Q1, npn type bipolar) that generates a threshold voltage Vth based on a voltage Va drawn from one end of the variable resistance circuit (one end of the resistor Ra) Transistor Q2 and resistors Rb to Rd).

  Specifically, the connection relationship will be described. The constant current source I1 and the variable resistance circuit (the resistor Ra and the transistors N1 to Nm) are connected in series between the application terminal of the reference voltage Vref and the ground terminal GND. Yes. The gates of the transistors N1 to Nm are all connected to the application terminal of the adjustment voltage Vreg. The emitter of the transistor Q1 is connected to the application end of the reference voltage Vref via the resistor Rb. The collector of the transistor Q1 is connected to the ground terminal GND. The base of the transistor Q1 is connected to a connection node between the constant current source I1 and the resistor Ra. The collector of the transistor Q2 is connected to the input terminal of the input voltage Vin through the resistor Rc, and is also connected to the inverting input terminal (−) of the comparator 172 as the output terminal of the threshold voltage Vth. The emitter of the transistor Q2 is connected to the ground terminal GND through the resistor Rd. The base of the transistor Q2 is connected to the emitter of the transistor Q1.

  In the threshold voltage generation unit 171 configured as described above, a predetermined constant current is fed from the constant current source I1 into the variable resistance circuit including the resistor Ra and the transistors N1 to Nm, and the voltage Va is drawn from one end of the resistor Ra. . Note that the on-resistances of the transistors N1 to Nm (and hence the voltage value of the voltage Va) vary according to the adjustment voltage Vreg applied to the gates of the transistors N1 to Nm.

  On the other hand, in the output stage composed of the transistors Q1 to Q2 and the resistors Rb to Rd, the voltage Va is applied to the base of the transistor Q1, and the voltage Vb (= Va + Vf1) higher than this by the base-emitter voltage Vf1 of the transistor Q1. Is applied to the base of transistor Q2. Therefore, a voltage Vc (= Va + Vf1−Vf2) lower than the voltage Vb by the base-emitter voltage Vf2 is applied to one end of the resistor Rd (the emitter of the transistor Q2). As a result, in a current path formed by the resistor Rc (resistance value: rc), the transistor Q2, and the resistor Rd (resistance value: rd), a current i determined by the voltage Vc and the resistance value rd (= Vc / rd) Therefore, the threshold voltage Vth drawn from the collector of the transistor Q2 is calculated by the relational expression Vth = Vin−rc × i = Vin− (rc / rd) × (Va + Vf1−Vf2). When the threshold voltage generator 171 is designed so that rc = rd and Vf1 = Vf2 for the various parameters described above, the threshold voltage Vth is a voltage value lower than the input voltage Vin by the voltage Va.

  As described above, the threshold voltage generation unit 171 of this embodiment determines the on-resistance Ron of the transistor 1a as the element that determines the variable value element that varies depending on the gate voltage of the transistor 1a and the wiring resistance (source of the transistor 1a And a fixed value element depending on the wiring resistance of the aluminum connected to the drain), transistors N1 to Nm for simulating the former element, and a resistor Ra for simulating the latter element, Are connected in series to form a variable resistance circuit, and a threshold voltage Vth is generated based on a voltage Va obtained by passing a predetermined constant current through the variable resistance circuit.

  With such a configuration, the threshold voltage generation unit 171 has a voltage value of the threshold voltage Vth so as to cancel the fluctuation of the switch voltage Vsw caused by the fluctuation of the gate voltage given when the transistor 1a is turned on. Will be changed.

  For example, when the gate voltage applied when the transistor 1a is turned on decreases with the decrease of the adjustment voltage Vreg, the on-resistance Ron of the transistor 1a increases and the switch voltage Vsw decreases, but the threshold voltage generator Also in 171, as the adjustment voltage Vreg decreases, the on-resistances of the transistors N <b> 1 to Nm increase, so the voltage Va increases, the threshold voltage Vth decreases, and the change in the switch voltage Vsw is cancelled. As a result, the overcurrent detection accuracy can be improved.

  The aluminum wiring of the transistor 1a has a resistance value of about 10 [mΩ] per count. When the on-resistance Ron of the transistor 1a is only several tens to several hundreds [mΩ], the on-resistance Ron Since the ratio of the wiring resistance occupying the whole becomes large, it is important to insert the resistor Ra simulating this.

  Further, the number of series stages of the transistors N1 to Nm can be increased by increasing the on-resistance value of the variable resistance circuit. Therefore, when the desired voltage Va is generated, it should be generated by the constant current source I1. The current value can be kept small.

  In the overcurrent protection circuit 17 having the above-described configuration, the transistor 1a and the transistors N1 to Nm are preferably formed to have a pair property when integrated in a semiconductor device. With such a configuration, not only the fluctuation of the power supply voltage Vcc (and thus the adjustment voltage Vreg and the bootstrap voltage Vbst), but also the fluctuation of the switch voltage Vsw caused by the change of the ambient temperature and the manufacturing variation of the output transistor. Since the minutes can be canceled, it is possible to always detect the overcurrent with high accuracy.

  In the above embodiment, the configuration in which the present invention is applied to the synchronous rectification step-down switching regulator has been described as an example. However, the application target of the present invention is not limited to this, and FIG. As shown in FIG. 3, it can also be applied to a step-up switching regulator. In this case, unlike the above-described embodiment, the threshold voltage Vth is generated with reference to the ground voltage. Therefore, the threshold voltage Vth may be directly extracted from one end of the resistor Ra. The resistor 174 may be connected so as to pull down the non-inverting input terminal (+) of the comparator 172 to the ground voltage when the switch 173 is turned off.

  The configuration of the present invention can be variously modified within the scope of the present invention in addition to the above embodiment.

  For example, in the above-described embodiment, the configuration in which the threshold voltage Vth is changed based on the adjustment voltage Vreg has been described as an example. However, the configuration of the present invention is not limited to this and is based on the power supply voltage Vcc. The threshold voltage Vth may be varied.

  The present invention is a technique useful for improving the detection accuracy of an overcurrent protection circuit.

These are the circuit block diagrams which show one Embodiment of the switching regulator which concerns on this invention. FIG. 3 is a circuit block diagram showing a configuration example of an overcurrent protection circuit 17. These are circuit block diagrams which show the structure which applied this invention to the step-up type switching regulator. These are circuit diagrams which show a prior art example of an overcurrent protection circuit.

Explanation of symbols

100 switching power supply IC
1a Output transistor (N-channel MOS field effect transistor)
1b Synchronous rectification transistor (N-channel MOS field effect transistor)
1c Output transistor (N-channel MOS field effect transistor)
2a, 2b, 2c buffer 3a, 3b level shifter 4 drive control circuit 5 error amplifier 6 soft start control circuit 7 pnp type bipolar transistor 8 slope voltage generation circuit 9 PWM comparator 10 reference voltage generation circuit 11 oscillator 12a, 12b resistance 13 adjustment voltage generation Circuit 14 Diode 15 Undervoltage lockout circuit 16 Thermal shutdown circuit 17 Overcurrent protection circuit 171 Threshold voltage generation circuit 172 Comparator 173 Switch 174 Resistor L1, L2 Inductor D1, D2 Diode R1-R3 Resistor C1-C5 Capacitance Ra, Rb, Rc , Rd resistance N1 to Nm N-channel MOS field effect transistor Q1 pnp bipolar transistor Q2 npn bipolar transistor I1 constant current source EN enable Child FB feedback terminal CP phase compensation terminal SS soft start terminal BST bootstrap terminal VIN input terminal SW switch terminal GND ground terminal

Claims (6)

An overcurrent protection circuit comprising: a threshold voltage generation unit that generates a threshold voltage; and a comparator that compares the switch voltage drawn from one end of the output transistor with the threshold voltage to generate an overcurrent detection signal. And
The threshold voltage generator is
A variable resistance circuit formed by connecting in series at least one transistor that simulates an on-resistance that varies depending on a gate voltage of the output transistor, and a resistor that simulates a wiring resistance of the output transistor;
A constant current source for supplying a predetermined constant current to the variable resistance circuit;
And the threshold voltage is generated based on a voltage drawn from one end of the variable resistance circuit. The gates of the transistors constituting the pre-Symbol threshold voltage generator, an overcurrent of claim 1, characterized in that the power supply voltage or adjusting voltage used in generating the gate voltage of the output transistor is applied Protection circuit.   The overcurrent protection circuit according to claim 2, wherein the output transistor and the transistors constituting the threshold voltage generation unit are formed to have a pair property.   An output transistor in which a predetermined voltage is applied to one end and a pulsed switch voltage corresponding to its own switching drive is extracted from the other end; a smoothing circuit that smoothes the switch voltage to generate a desired output voltage; and A power supply apparatus comprising: the overcurrent protection circuit according to any one of claims 1 to 3.   A feedback voltage generation circuit that generates a feedback voltage corresponding to the output voltage, an error amplifier that generates an error voltage by amplifying a difference between the feedback voltage and a predetermined target voltage, and an oscillator that generates a clock signal having a predetermined frequency A slope voltage generation circuit that generates a slope voltage of a triangular waveform or a ramp waveform based on the clock signal, a PWM comparator that generates a pulse width modulation signal by comparing the error voltage and the slope voltage, and the clock A drive control circuit for generating an open / close control signal for the output transistor based on the signal and the pulse width modulation signal, and a level shifter and a buffer for generating a gate voltage for the output transistor based on the open / close control signal. The power supply device according to claim 4, wherein the power supply device is formed.   The power supply device according to claim 5, wherein the drive control circuit stops switching driving of the output transistor when the overcurrent detection signal indicates an overcurrent state.

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