TW201415744A - Controller with protection function - Google Patents

Abstract

A controller with protection function, comprising a feedback circuit, a logic control circuit, an over-state judgment circuit, and a protection control circuit, is disclosed. The feedback circuit generates a modulation signal in response to an output of a converting circuit. The logic control circuit is coupled to the feedback circuit and controls the converting circuit according to the modulation signal for stabilizing the output of the converting circuit. The over-state judgment circuit receives an over-state reference signal and a detecting signal, and generates a protection signal in response to levels of the detecting signal and the over-state reference signal. The protection control circuit is coupled to the logic control circuit and the over-state judgment circuit and controls the logic control circuit to lower the output of the converting circuit when receiving the protection signal.

Description

Controller with protection function

The present invention relates to a controller, and more particularly to a controller having a protection function.

The traditional power supply control integrated circuit (IC, Integrated Circuit), when determining the abnormal operation of the system and triggering protection (such as over temperature protection, over voltage protection, under voltage protection, over current protection, etc.), the power control integrated circuit will immediately Stop operation and latch (Latch) to avoid possible damage to the integrated circuit and system circuitry, thus ensuring the safety and reliability of the integrated circuit.

Please refer to the first figure, which is a circuit diagram of a conventional DC-to-DC buck conversion circuit. The DC to DC buck conversion circuit includes a controller and a conversion circuit. The controller includes a feedback circuit 10, an overvoltage determination circuit 15, a logic control circuit 20, and a latch protection circuit 25. The conversion circuit includes an upper arm transistor switch SW1, a lower arm transistor switch SW2, an inductor L and an output capacitor C. The upper arm transistor switch SW1 is connected in series with the lower arm transistor switch SW2. One end of the upper arm transistor switch SW1 is coupled to an input voltage Vin, and the other end is coupled to one end of the inductor L and one end of the lower arm transistor switch SW2. The other end of the lower arm transistor switch SW2 is grounded. The other end of the inductor L is coupled to the output capacitor C to provide an output voltage Vout. An output voltage detecting circuit VD is coupled to the conversion circuit to generate a feedback signal VFB according to the output voltage Vout. The feedback circuit 10 generates a control signal Sp according to the feedback signal VFB and a reference signal Vr. The logic control circuit 20 generates control signals S1 and S2 according to the control signal Sp to control the on and off of the upper arm transistor switch SW1 and the lower arm transistor switch SW2, respectively. The overvoltage determination circuit 15 receives the feedback signal VFB and an overvoltage reference signal Vov. When the level of the feedback signal VFB is higher than a level of the overvoltage reference signal Vov, the overvoltage determination circuit 15 generates a high level. Signal. The latch protection circuit 25 receives the high level signal generated by the overvoltage determination circuit 15 No., a latch signal LS is immediately generated until the controller is restarted. When the logic control circuit 20 receives the latch signal LS, the logic control circuit 20 stops generating the control signals S1, S2, and turns off the upper arm transistor switch SW1 and the lower arm transistor switch SW2 of the conversion circuit.

However, some specific application environments, such as the power supply of the aerospace model, if the traditional control method is adopted, when the protection is triggered, the controller immediately stops causing the aeromodel to “out of control”. If the power supply system cannot be recovered in a short time, the model will lose control and be broken.

In view of the fact that the latch protection of the controller in the prior art is not suitable for an application environment requiring continuous power supply, the present invention adopts a "soft protection mechanism", and while effectively protecting the system and the power supply control integrated circuit, the system is not out of control and the system is damaged. At the same time, the system is given sufficient reaction time to return to normal.

To achieve the above object, the present invention provides a controller having a protection function, including a feedback circuit, a logic control circuit, an over-state determination circuit, and a protection control circuit. The feedback circuit generates a control signal according to an output of one of the conversion circuits. The logic control circuit is coupled to the feedback circuit to control the conversion circuit according to the control signal to stabilize the output of the conversion circuit. The over-state determination circuit receives an over-state reference level signal and a detection signal, and determines whether a protection signal is generated according to one of the status reference level signal and the detection signal. The protection control circuit is coupled to the logic control circuit and the over-state determination circuit to control the logic control circuit to reduce the output of the conversion circuit when receiving the protection signal.

The invention also provides a controller with a protection function, comprising a feedback circuit, a logic control circuit, an under-state determination circuit and a protection control circuit. The feedback circuit generates a control signal according to an output of one of the conversion circuits. The logic control circuit is coupled to the feedback circuit to control the conversion circuit according to the control signal to stabilize the output of the conversion circuit. The under-state judging circuit receives an under-state reference The bit signal and a detection signal are counted when one of the detection signals is lower than the under-state reference level signal, and a protection signal is generated when the count reaches a predetermined length of time. The protection control circuit is coupled to the logic control circuit and the under-state determination circuit to control the logic control circuit to stop the conversion circuit when receiving the protection signal.

The above summary and the following detailed description are exemplary in order to further illustrate the scope of the claims. Other objects and advantages of the present invention will be described in the following description and drawings.

Please refer to the second figure, which is a circuit block diagram of a DC-to-DC buck conversion circuit according to the present invention. The DC to DC buck conversion circuit includes a controller 100 and a conversion circuit for providing an output to a load (not shown). The controller 100 includes a feedback circuit 110, an abnormal state determination circuit 115, a logic control circuit 120, and a protection control circuit 125. The conversion circuit includes an upper arm transistor switch SW1, a lower arm transistor switch SW2, an inductor L and an output capacitor C. The upper arm transistor switch SW1 is connected in series with the lower arm transistor switch SW2. One end of the upper arm transistor switch SW1 is coupled to an input voltage Vin, and the other end is coupled to one end of the inductor L and one end of the lower arm transistor switch SW2. The other end of the lower arm transistor switch SW2 is grounded. The other end of the inductor L is coupled to the output capacitor C to provide an output voltage Vout. The feedback circuit 110 generates a control signal Sp according to a feedback signal VFB generated by one of the conversion circuits and a reference signal Vr. In this embodiment, the feedback signal VFB is generated by an output voltage detecting circuit VD coupled to the conversion circuit to represent the output voltage Vout of the conversion circuit. In other applications, the feedback signal VFB can be an output current representative of the conversion circuit. The logic control circuit 120 is coupled to the feedback circuit 110 to generate control signals S1 and S2 according to the control signal Sp to respectively control the upper arm transistor switch SW1 and the lower arm transistor switch SW2 in the conversion circuit to make the output voltage of the conversion circuit Vout Maintain stability. The abnormal state determining circuit 115 receives an abnormal state reference level signal Vos and a detecting signal Vde, and determines an abnormal operation according to the abnormal state. A protection signal Pr is generated, wherein the detection signal Vde can be the feedback signal VFB, and the output current of the conversion circuit is a detection signal of a voltage or current of a node in the conversion circuit. When the protection control circuit 125 receives the protection signal Pr, it generates a temporary protection signal PS, so that the logic control circuit 120 controls the conversion circuit to lower the output of the conversion circuit. In this way, when the conversion circuit still maintains a lower output, the load coupled to the conversion circuit does not immediately stop the operation, so that the problem of loss of control due to protection in the prior art can be avoided.

Please refer to the third figure, which is a circuit diagram of a DC-to-DC buck conversion circuit according to a first embodiment of the present invention. The DC-to-DC buck conversion circuit includes a controller 200 and a conversion circuit for providing an output voltage Vout to a load (not shown). The controller 200 includes an error amplifying circuit 210, an under-state determining circuit 212, an over-state determining circuit 214, a logic control circuit 220, a protection control circuit 225, and an energy bleeder circuit 235. The conversion circuit includes an upper arm transistor switch SW1, a lower arm transistor switch SW2, an inductor L and an output capacitor C. The upper arm transistor switch SW1 is connected in series with the lower arm transistor switch SW2. One end of the upper arm transistor switch SW1 is coupled to an input voltage Vin, and the other end is coupled to one end of the inductor L and one end of the lower arm transistor switch SW2. The other end of the lower arm transistor switch SW2 is grounded. The other end of the inductor L is coupled to the output capacitor C to provide an output voltage Vout. An output voltage detecting circuit VD is coupled to one of the output terminals of the conversion circuit to generate a feedback signal VFB according to the output voltage Vout. The error amplifying circuit 210 generates a control signal Sp according to a reference signal Vr and a feedback signal VFB. The logic control circuit 220 is coupled to the error amplifying circuit 210 to generate the control signals S1 and S2 according to the control signal Sp to respectively control the upper arm transistor switch SW1 and the lower arm transistor switch SW2 in the conversion circuit to make the output voltage of the conversion circuit Vout Maintain stability.

Please also refer to FIG. 3A, which is a circuit diagram of the under-state judging circuit according to a preferred embodiment of the present invention. In the present embodiment, the under-state determination circuit 212 is an over-voltage detection circuit, and includes an over-voltage comparator 213, an occlusion circuit 227, a counter circuit 228, and a protection circuit 229. Low pressure ratio A non-inverting input terminal of the comparator 213 receives an under-state reference level signal Vr1, and an inverting input terminal receives the feedback signal VFB. When the output voltage Vout of the conversion circuit is lower than a predetermined over-voltage value, a high is generated. The level signal stops generating the high level signal when the output voltage Vout returns to a value higher than the predetermined excessive low voltage value. One of the under-state reference level signal Vr1 is lower than the reference signal Vr, and can be designed, for example, to be 0.5 times the reference signal Vr. The counting circuit 228 is coupled to the low voltage comparator 213, and is counted according to a clock signal during the period when the high voltage comparator 213 receives the high level signal, and when the counting reaches a predetermined number of clocks (ie, a predetermined length of time), A high level signal is generated to trigger the protection circuit 229 to generate an overvoltage protection signal UVS to the protection control circuit 225. If the overvoltage comparator 213 does not continuously generate a high level signal for a predetermined length of time, the count of the counting circuit 228 will be zeroed. The mask circuit 227 performs signal blanking during the soft start of the controller 200 to cover the counter circuit 228 to generate a high level signal to prevent the output voltage Vout from being immediately raised above the predetermined excessive low voltage value during the soft start. And false triggering low voltage protection. The protection circuit 229 can also be a latch circuit, which is activated according to an activation signal or a Power On Reset signal, and is latch-protected when a low voltage is confirmed. Through the above design, when a low voltage abnormality occurs, the protection is performed after a delay, so that the load coupled to the conversion circuit does not immediately stop the operation, so that the problem of immediately losing control due to protection in the prior art can be avoided.

Please also refer to FIG. 3B, which is a circuit diagram of an over-state determination circuit according to a preferred embodiment of the present invention. The over-state determination circuit 214 is an over-voltage determination circuit including an over-voltage comparator 215 and a delay circuit 226. An inverting input terminal of the overvoltage comparator 215 receives an over-state reference level signal Vr2, and a non-inverting input terminal receives the feedback signal VFB, which is generated when the output voltage Vout of the conversion circuit is higher than a predetermined overvoltage value. A high level signal, wherein one of the over-state reference level signals Vr2 is higher than one of the reference signals Vr. In this embodiment, the overvoltage comparator 215 can be a hysteresis comparator, and can be designed, for example, to generate a high level signal, which is 1.05 times the reference signal Vr, when the reference signal is 1.25 times of the reference signal Vr. Stop generating high level signals. So designed, When the temporary overvoltage abnormal state is released, the controller 200 of the present invention can be restored to a normal operation. The delay circuit 226 is coupled to the overvoltage comparator 215. After receiving the high level signal generated by the overvoltage comparator 215, an overvoltage protection signal OVS is generated after a time delay to avoid possible noise. Misjudgment of pressure abnormality.

Referring to the third figure, when the protection control circuit 225 receives any one of the overvoltage protection signal OVS or the overvoltage protection signal UVS, a temporary protection signal PS is generated to the logic control circuit 220 to stop the control signal. The production of S1 and S2. Then, if the overvoltage protection signal OVS and the overvoltage protection signal UVS stop generating, the protection control circuit 225 also stops generating the temporary protection signal PS, causing the logic control circuit 220 to resume generating the control signals S1, S2. The energy bleeder circuit 235 is directly connected to the output capacitor C of the conversion circuit. The overvoltage protection signal OVS is also simultaneously transmitted to the energy bleeder circuit 235, so that the energy bleeder circuit 235 provides an energy bleed path to bleed the power stored by the output capacitor C during the reception of the overvoltage protection signal OVS. Of course, the energy bleeder circuit 235 is not a necessary circuit. The controller of the present invention can also generate the control signal S2 to turn on the lower arm transistor switch SW2 to reduce the output voltage Vout when the overvoltage abnormal state occurs. However, the conduction of the lower arm transistor switch SW2 causes some of the energy of the output capacitor C to be transferred to the inductor L, which may cause unnecessary voltage or current oscillation. This can be avoided by using an additional energy bleeder circuit 235.

Please refer to the fourth figure, which is a circuit diagram of a DC-to-DC boost converter circuit according to a second embodiment of the present invention. The DC-to-DC boost converter circuit includes a controller 300 and a conversion circuit for providing a stable output current Iout to a load (not shown). The controller 300 includes a chopper control circuit 310, an overcurrent determination circuit 335, an over temperature determination circuit 345, a logic control circuit 320, and a protection control circuit 325. The conversion circuit includes a transistor switch SW3, an inductor L, a diode D, and an output capacitor C. One end of the inductance L and the series inductance L of the transistor switch SW3 is coupled to an input voltage Vin, and the other end One end of the diode D and one end of the transistor switch SW3 are coupled. The other end of the transistor switch SW3 is grounded. One of the negative terminals of the diode D is coupled to the output capacitor C to provide an output current Iout. An input end of the chopper control circuit 310 is coupled to an output end of the conversion circuit to generate a control signal Sp according to the feedback signal IFB and the reference signal Vr, which are representative of the output current Iout. The logic control circuit 320 is coupled to the chopper control circuit 310 to generate a control signal S3 according to the control signal Sp to control the transistor switch SW3 in the conversion circuit to maintain the output current Iout of the conversion circuit stable. The overcurrent determination circuit 335 is coupled to the conversion circuit. When the current flowing through one of the conversion circuits is higher than a first predetermined overcurrent value, an overcurrent protection signal OCS is generated, and the current flowing through the conversion circuit is lower than a second predetermined When the overcurrent value is exceeded, the overcurrent protection signal OCS is stopped. The first predetermined overcurrent value is greater than the second predetermined overcurrent value. When the overcurrent determination circuit 335 generates the overcurrent protection signal OCS, the trigger protection control circuit 325 generates a temporary protection signal PS, so that the logic control circuit 320 stops generating the control signal S3 until an inductor current IL falls to a second predetermined overcurrent value. . Alternatively, after the overcurrent protection signal OCS is generated, the overcurrent determination circuit 335 may only when the current flowing through the conversion circuit is lower than the second predetermined overcurrent value and the output current Iout or the output voltage Vout of the conversion circuit is lower than a predetermined value. Stop generating overcurrent protection signal OCS. In this way, it is ensured that the controller 300 operates again after the overcurrent abnormality occurs, not only the energy of the inductor but also the energy stored in the conversion circuit. The over temperature determining circuit 345 generates an over temperature protection signal OTS to reduce the first predetermined overcurrent value and the second of the overcurrent determining circuit 335 when the operating temperature of one of the controllers 300 is higher than a first predetermined over temperature value. Schedule an overcurrent value. As such, the heat generation of the controller 300 can be reduced, especially if the transistor switch SW3 is built into the controller 300, allowing the controller 300 to more quickly lower the operating temperature below a second predetermined over temperature value. Whether it is an overcurrent abnormal state or an over temperature abnormal state, the controller 300 of the present invention continuously controls the conversion circuit to provide an output to the load, so that the load can still maintain the operation to prevent the prior art from stopping the supply of power and causing the system to lose control and damage the system. problem.

Please refer to FIG. 4A, which is a power supply according to a preferred embodiment of the present invention. Circuit diagram of the flow judging circuit. In the present embodiment, the overcurrent determination circuit 335 includes an overcurrent reference signal generator 336, an overcurrent hysteresis comparator 337, a protection reset comparator 338, and an SR flip flop 339. The overcurrent reference signal generator 336 generates an overcurrent reference signal Ir. The overcurrent hysteresis comparator 337 determines whether the inductor current IL is higher than the first predetermined overcurrent value or lower than the second predetermined overcurrent value according to the overcurrent reference signal Ir and a detection signal CS. When the inductor current IL is higher than the first predetermined overcurrent value, the overcurrent hysteresis comparator 337 generates a high level signal to the set terminal S of the SR flip-flop 339, so that the SR flip-flop 339 generates an overcurrent protection signal OCS. . One of the non-inverting terminals of the protection reset comparator 338 receives a reset reference signal Vr', and an inverting terminal receives the feedback signal VFB representing the output voltage. When one of the feedback signals VFB is lower than one of the reset reference signals Vr', the power provided by the conversion circuit is reduced to a predetermined level, and the protection reset comparator 338 generates a high level signal to A reset terminal R of the SR flip-flop 339 causes the SR flip-flop 339 to stop generating the overcurrent protection signal OCS.

Please also refer to the fourth B diagram, which is the waveform diagram of the over-current judgment value when the over-temperature abnormality occurs. When the over temperature abnormality state occurs at the time point t1, the over temperature determination circuit 345 generates the over temperature protection signal OTS to the overcurrent reference signal generator 336. At this time, the overcurrent reference signal generator 336 adjusts the level of the overcurrent reference signal Ir from a first level value Ir1 to a second level value Ir2. In this way, the heat generation can be quickly reduced to relieve the over temperature abnormality.

When the controller of the present invention has a state abnormality, for example, overvoltage, overtemperature, and overcurrent, the output of the conversion circuit is lowered, and the output of the conversion circuit is lowered to reduce the duty cycle (Duty). Cycle), reducing the output voltage, reducing the output current, reducing the operating frequency, etc. When the undervoltage condition of the system is abnormal, the output of the conversion circuit is not directly turned off, but is turned off after a preset time. In this way, the system does not provide protection when the system is under voltage due to a short circuit.

As described above, the present invention fully complies with the three requirements of the patent: novelty, advancement, and industrial applicability. The present invention has been disclosed above in the preferred embodiments, It is to be understood by those skilled in the art that the present invention is not intended to limit the scope of the invention. It should be noted that variations and permutations equivalent to those of the embodiments are intended to be included within the scope of the present invention. Therefore, the scope of the invention is defined by the scope of the following claims.

Prior art:

10‧‧‧Return circuit

15‧‧‧Overvoltage judgment circuit

20‧‧‧Logic Control Circuit

25‧‧‧Latch protection circuit

SW1‧‧‧Upper arm transistor switch

SW2‧‧‧ lower arm transistor switch

L‧‧‧Inductance

C‧‧‧ output capacitor

Vin‧‧‧Input voltage

Vout‧‧‧ output voltage

VFB‧‧‧ feedback signal

Vr‧‧‧ reference signal

VD‧‧‧Output voltage detection circuit

S1, S2‧‧‧ control signals

Sp‧‧‧ regulation signal

Vov‧‧‧Overvoltage reference signal

LS‧‧‧Latch signal

this invention:

100, 200, 300‧ ‧ controller

110‧‧‧Return circuit

115‧‧‧Exception state judgment circuit

120, 220, 320‧‧‧ logic control circuit

125, 225, 325 ‧ ‧ protection control circuit

SW1‧‧‧Upper arm transistor switch

SW2‧‧‧ lower arm transistor switch

L‧‧‧Inductance

C‧‧‧ output capacitor

Vin‧‧‧Input voltage

Vout‧‧‧ output voltage

Sp‧‧‧ regulation signal

Vr‧‧‧ reference signal

VFB, IFB‧‧‧ feedback signal

VD‧‧‧Output voltage detection circuit

S1, S2, S3‧‧‧ control signals

Vos‧‧‧Abnormal state reference level signal

Vde‧‧‧ detection signal

Pr‧‧‧protection signal

PS‧‧‧ temporary protection signal

210‧‧‧Error Amplifying Circuit

212‧‧‧Understate judgment circuit

214‧‧‧Over state judgment circuit

235‧‧‧Energy bleeder circuit

Vr‧‧‧ reference signal

213‧‧‧Overvoltage comparator

227‧‧‧mask circuit

228‧‧‧Counting circuit

229‧‧‧Protection circuit

Vr1‧‧‧ Understate Reference Level Signal

UVS‧‧‧ low voltage protection signal

215‧‧‧Overvoltage comparator

226‧‧‧Delay circuit

Vr2‧‧‧Over-state reference level signal

OVS‧‧‧Overvoltage protection signal

310‧‧‧Chopper control circuit

335‧‧‧Overcurrent judgment circuit

345‧‧‧Over temperature judgment circuit

SW3‧‧‧Chip Switch

D‧‧‧ diode

Iout‧‧‧Output current

OCS‧‧‧Overcurrent protection signal

IL‧‧‧Inductor Current

OTS‧‧‧Over temperature protection signal

336‧‧‧Overcurrent reference signal generator

337‧‧‧Overcurrent hysteresis comparator

338‧‧‧Protection reset comparator

339‧‧‧SR positive and negative

Ir‧‧‧Overcurrent reference signal

CS‧‧‧Detection signal

S‧‧‧Setting end

R‧‧‧Reset

Vr’‧‧‧Reset reference signal

Ir1‧‧‧ first level value

Ir2‧‧‧ second level value

The first picture shows the circuit diagram of a conventional DC-to-DC buck conversion circuit.

The second figure is a circuit block diagram of a DC-to-DC buck conversion circuit according to the present invention.

The third figure is a circuit diagram of a DC-to-DC buck conversion circuit according to a first embodiment of the present invention.

Figure 3A is a circuit diagram of an under-state determination circuit in accordance with a preferred embodiment of the present invention.

Figure 3B is a circuit diagram of an over-state determination circuit in accordance with a preferred embodiment of the present invention.

The fourth figure is a circuit diagram of a DC-to-DC boost converter circuit according to a second embodiment of the present invention.

Figure 4A is a circuit diagram of an overcurrent judging circuit in accordance with a preferred embodiment of the present invention.

The fourth B diagram is a waveform diagram of the value of the overshoot and overcurrent determination when an over temperature abnormality occurs.

100‧‧‧ Controller

110‧‧‧Return circuit

115‧‧‧Exception state judgment circuit

120‧‧‧Logic Control Circuit

125‧‧‧Protection control circuit

SW1‧‧‧Upper arm transistor switch

SW2‧‧‧ lower arm transistor switch

L‧‧‧Inductance

C‧‧‧ output capacitor

Vin‧‧‧Input voltage

Vout‧‧‧ output voltage

Sp‧‧‧ regulation signal

Vr‧‧‧ reference signal

VFB‧‧‧ feedback signal

VD‧‧‧Output voltage detection circuit

S1, S2‧‧‧ control signals

Vos‧‧‧Abnormal state reference level signal

Vde‧‧‧ detection signal

Pr‧‧‧protection signal

PS‧‧‧ temporary protection signal

Claims (9)

A controller having a protection function includes: a feedback circuit that generates a control signal according to an output of a conversion circuit; and a logic control circuit coupled to the feedback circuit to control the conversion circuit according to the control signal, so that The output of the conversion circuit is stable; an over-state determination circuit receives an over-state reference level signal and a detection signal, and is based on one of the over-state reference level signals and one of the detection signals. The bit determines whether a protection signal is generated; and a protection control circuit coupled to the logic control circuit and the over-state determination circuit to control the logic control circuit to reduce the output of the conversion circuit when receiving the protection signal. The controller having the protection function as described in claim 1 further includes an energy bleeder circuit coupled to the over-state determination circuit, wherein the conversion circuit has an output capacitor for storing power to provide the output. The energy bleeder circuit directly connects the output capacitor and, when receiving the protection signal, provides an energy bleed path to bleed the power stored by the output capacitor. The controller having the protection function according to the first or second aspect of the patent application, wherein the over-state judging circuit is an over-voltage judging circuit, and an output voltage of one of the converting circuits is higher than a first predetermined over-voltage When the value is generated, the protection signal is generated, and when the output voltage is lower than a second predetermined overvoltage value, the protection signal is stopped, wherein the first predetermined overvoltage value is greater than the second predetermined overvoltage value. For example, the controller having the protection function described in claim 1 or 2, wherein the over-state judging circuit is an over-temperature judging circuit, and the operating temperature of one of the controllers having the protection function is higher than one The protection signal is generated when a predetermined temperature value is exceeded, and the protection signal is stopped when the operating temperature is lower than a second predetermined over temperature value, wherein the first predetermined over temperature value is greater than the second predetermined over temperature value . The controller having the protection function according to the first or the second aspect of the patent application, wherein the over-state judging circuit is an over-current judging circuit, and the current flowing through the one of the converting circuits is higher than a first predetermined When the current value is generated, the protection signal is generated, and when the current is lower than a second predetermined overcurrent value, the protection signal is stopped, wherein the first predetermined overcurrent value is greater than the second predetermined overcurrent value. The controller with protection function as described in claim 5 of the patent scope further includes an over temperature judging circuit, and when the operating temperature of the controller having the protection function is higher than a first predetermined over temperature value, the controller is lowered. The first predetermined overcurrent value and the second predetermined overcurrent value stop reducing the first predetermined overcurrent value and the second predetermined overcurrent value when the operating temperature is lower than a second predetermined over temperature value, Wherein the first predetermined over temperature value is greater than the second predetermined over temperature value. A controller having a protection function includes: a feedback circuit that generates a control signal according to an output of a conversion circuit; and a logic control circuit coupled to the feedback circuit to control the conversion circuit according to the control signal, so that The output of the conversion circuit is stable; an under-state determination circuit receives an under-state reference level signal and a detection signal, and performs one when the level of the detection signal is lower than the under-state reference level signal. Counting, and generating a protection signal when the count reaches a predetermined length of time; and a protection control circuit coupled to the logic control circuit and the under-state determination circuit to control the logic control circuit to stop when receiving the protection signal The conversion circuit. The controller with protection function according to claim 7 , wherein the under-state judging circuit is an over-voltage determining circuit, and the protection is generated when an output voltage of one of the converting circuits is lower than a predetermined over-voltage value. Signal. The controller having the protection function according to the seventh or eighth aspect of the patent application, wherein the under-state judging circuit further comprises a blanking circuit, wherein the obscuring circuit is in a soft start of the controller with the protection function During the period, the under-state determination circuit is suppressed from generating the protection signal.