TW201405843A - III-V based solar cells having roughened microdome array structure and manufacturing method for the same - Google Patents

Abstract

The present invention discloses a III-V based solar cells having roughened microdome array structure and manufacturing method thereof. A n-type (or p-type) semiconductor layer having a roughened microdome array structure is epitaxially grown on an intrinsic semiconductor layer by controlling reaction temperatures and a flow ratio of reactive gases in a process of metal organic chemical vapor deposition (MOCVD) to form the III-V based solar cells of the present invention. In addition to simple processing procedure and low manufacturing cost, the present invention further brings the advantages of high structural robustness, good stability and high photoelectric conversion efficiency.

Description

Three-five-type solar cell with micron bell roughening array structure and manufacturing method thereof

The present invention relates to a three-five-type solar cell, and more particularly to a three-five-group solar cell having a micron-roughened array structure and a method of fabricating the same.

A solar cell is an energy-converting photoelectric element that converts light energy into electrical energy after being irradiated by sunlight. This photoelectric element is called a solar cell, and is also called a photovoltaic (PV) battery. .

There are many types of solar cells, and the materials and structures are different. However, the most basic structure of solar cells includes N-type and P-type semiconductor layers, anti-reflection layers and electrode layers. The main part. The N-type and P-type semiconductor layers are sources of photovoltaic specific effects; the anti-reflective layer is used to reduce the reflection of incident light to enhance the current; the electrode layer is used to connect the semiconductor layer and the external load.

Conventionally, the anti-reflection layer is generally formed by a yellow light photolithography process and an etching technique to form a roughened structural layer on the surface of the solar cell, and the roughened structural layer can be composed of a plurality of columns or cones. It is composed of a structure such as a body. However, since the roughened structural layer is not integrally formed and is easily broken after collision, the overall structure is less robust, and there is a disadvantage of poor stability. In addition, the N-type and P-type semiconductor layers are also damaged to some extent by the subsequent etching process, thereby affecting the photoelectric conversion efficiency thereof.

In addition to the problems of cumbersome processing procedures and high production costs, the above-mentioned conventional anti-reflection layer has problems such as poor stability of the semiconductor layer due to poor structural stability and damage of the semiconductor layer caused by the etching process. Therefore, it is necessary to provide a new method of manufacturing a roughened structure to solve the above problems.

In view of this, the present invention provides a three-fold roughening array structure A five-group solar cell and a manufacturing method thereof for improving the cumbersome processing procedure and high production cost existing in the prior art, and the poor structural stability and the semiconductor layer damage caused by the etching process, resulting in poor photoelectric conversion efficiency, etc. problem.

The present invention provides a three-five-type solar cell having a micron-roughened array structure, comprising: a transparent substrate; a first doped semiconductor layer disposed on the transparent substrate; An intrinsic semiconductor layer is disposed on the first doped semiconductor layer; a second doped semiconductor layer is disposed on the intrinsic semiconductor layer, and the second doped semiconductor layer has an integrally formed micron bell And a transparent electrode layer disposed on the second doped semiconductor layer.

In an embodiment of the invention, each micron clock has a diameter ranging from 0.2 micrometers to 1 micrometer, and each micrometer has a height ranging from 0.2 micrometers to 0.8 micrometers.

In an embodiment of the invention, the first doped semiconductor layer is a P-type semiconductor, and the second doped semiconductor layer is an N-type semiconductor.

In an embodiment of the invention, the first doped semiconductor layer is an N-type semiconductor, and the second doped semiconductor layer is a P-type semiconductor.

In an embodiment of the invention, the material of the first doped semiconductor layer and the second doped semiconductor layer is gallium nitride (GaN).

In an embodiment of the invention, the intrinsic semiconductor layer comprises an indium gallium nitride/gallium nitride multilayer quantum well (InGaN/GaN MQW) structure.

In an embodiment of the invention, the multi-layer quantum well structure is one of a green quantum well structure and a blue quantum well structure.

In an embodiment of the invention, the transparent substrate is made of glass, quartz, transparent plastic, sapphire substrate or transparent flexible material.

In an embodiment of the invention, the transparent electrode layer is made of a transparent conductive oxide.

Furthermore, the present invention provides a three-five family with a micron bell roughening array structure. A method of manufacturing a solar cell, comprising the steps of: providing a transparent substrate; depositing a first doped semiconductor layer on the transparent substrate; depositing an intrinsic semiconductor layer on the first doped semiconductor layer; Metal chemical vapor deposition to form a second doped semiconductor layer by epitaxial growth on the intrinsic semiconductor layer by controlling the reaction temperature of the organometallic chemical vapor deposition method and the reaction gas flow ratio And roughening the second doped semiconductor layer of the array structure; and depositing a transparent electrode layer on the second doped semiconductor layer.

In an embodiment of the invention, the reaction temperature is between 850 ° C and 950 ° C.

In an embodiment of the invention, the reaction gas comprises ammonia gas and trimethyl gallium; the flow rate of the ammonia gas is between 3000 sccm and 5000 sccm, and the flow rate of trimethyl gallium is between 50 μmol/min and Between 100 μmol/min.

In an embodiment of the invention, each micron clock has a diameter ranging from 0.2 micrometers to 1 micrometer, and each micrometer has a height ranging from 0.2 micrometers to 0.8 micrometers.

In an embodiment of the invention, the first doped semiconductor layer is a P-type semiconductor, and the second doped semiconductor layer is an N-type semiconductor.

In an embodiment of the invention, the first doped semiconductor layer is an N-type semiconductor, and the second doped semiconductor layer is a P-type semiconductor.

In an embodiment of the invention, the first doped semiconductor layer and the second doped semiconductor layer are formed of gallium nitride.

In an embodiment of the invention, the step of depositing the intrinsic semiconductor layer includes forming an intrinsic semiconductor layer having an indium gallium nitride/gallium nitride multilayer quantum well structure.

In an embodiment of the invention, the multi-layer quantum well structure is one of a green quantum well structure and a blue quantum well structure.

In an embodiment of the invention, the transparent substrate is made of glass, quartz, transparent plastic, sapphire substrate or transparent flexible material.

In an embodiment of the invention, the transparent electrode layer is made of a transparent conductive oxide.

Compared to the prior art, the present invention has significant advantages and advantageous effects. By the above technical means, the tri-five solar cell having the micron bell roughening array structure of the present invention and the manufacturing method thereof have at least the following advantages and effects: the present invention controls the reaction temperature in the organometallic chemical vapor deposition method and The reaction gas flow ratio is epitaxially grown on the intrinsic semiconductor layer to form an N-type or P-type semiconductor layer having a micron-roughened array structure. In addition to the simple processing procedure, the invention has the advantages of strong structure and good stability, thereby reducing production costs.

In order to explain the technical content, structural features, objectives and effects of the present invention in detail, the following detailed description is given by way of example.

Referring to FIG. 1 , which is a side view of a structure of a three-five-type solar cell having a micron bell roughening array structure according to an embodiment of the present invention, the three-five solar cell 1 includes a transparent substrate 10 and a first doping. The semiconductor layer 20, an intrinsic semiconductor layer 30, a second doped semiconductor layer 40, and a transparent electrode layer 50. The first doped semiconductor layer 20 is disposed on the transparent substrate 10, the intrinsic semiconductor layer 30 is disposed on the first doped semiconductor layer 20, and the second doped semiconductor layer 40 is And disposed on the intrinsic semiconductor layer 30, wherein if the first doped semiconductor layer 20 is a P-type semiconductor, the second doped semiconductor layer 40 is an N-type semiconductor; When the impurity semiconductor layer 20 is an N-type semiconductor, the second doped semiconductor layer 40 is a P-type semiconductor.

The second doped semiconductor layer 40 has an integrally formed micron bell roughening array structure, which is composed of a plurality of micrometer clocks. Please refer to the actual micron bell roughening shown in the second figure. Array structure, the micrometer clocks have irregular size and shape, and exhibit a random and uniform arrangement, wherein the top of each micrometer clock is a curved surface, and the diameter range of each micrometer clock is introduced. Between 0.2 micrometers (μm) and 1 μm, the height range is between 0.2 μm and 0.8 μm.

The material of the transparent substrate 10 may be one of glass, quartz, transparent plastic, sapphire substrate and transparent flexible material. The first doped semiconductor layer 20 and the second doped semiconductor layer 40 are both made of gallium nitride (GaN). The intrinsic semiconductor layer 30 includes an InGaN/GaN Multiple Quantum Well (MQW) structure, wherein the multilayer quantum well structure can be a green quantum well structure or a blue quantum well structure.

The transparent electrode layer 50 is disposed on the second doped semiconductor layer 40, and the transparent electrode layer 50 is made of Transparent Conductive Oxide (TCO), such as transparent conductive oxide. Oxide, nitride or fluoride, such as Indium Tin Oxide (ITO), Antimony Tin Oxide (ATO), Fluorine-doped Tin Oxide (FTO), One or several of aluminum-doped Zinc Oxide (AZO), gallium-doped Zinc Oxide (GZO), and Indium-doped Zinc Oxide (IZO) a group of people.

Please refer to FIG. 1 and FIG. 3 respectively, which are respectively a side view of a structure of a method for manufacturing a three-five-type solar cell having a micron-roughened array structure and a method step thereof. The manufacturing method includes the following steps. step:

In step S11, a transparent substrate 10 is provided. In this embodiment, the material of the transparent substrate 10 may be one of glass, quartz, transparent plastic, sapphire substrate and transparent flexible material.

In step S12, a first doped semiconductor layer 20 is deposited on the transparent substrate 10. The first doped semiconductor layer 20 is made of gallium nitride, and the first doped semiconductor layer 20 may be one of a P-type semiconductor and an N-type semiconductor. The deposition step of the first doped semiconductor layer 20 is preferably performed by a metal organic chemical vapor deposition method (Metal Organic Chemical Vapor Deposition, MOCVD).

In step S13, the intrinsic semiconductor layer 30 is deposited on the first doped semiconductor layer 20. The step of depositing the intrinsic (I-type) semiconductor layer 30 includes forming an intrinsic semiconductor layer having an indium gallium nitride/gallium nitride multilayer quantum well structure, wherein the multi-layer quantum well structure may be a green quantum well structure or a blue quantum well structure. The deposition step of the intrinsic semiconductor layer 30 is preferably performed by an organometallic chemical vapor deposition method.

In step S14, a second doped semiconductor layer 40 having a micron-roughened array structure is deposited on the intrinsic semiconductor layer 30 by an organometallic chemical vapor deposition method by controlling organometallic chemical vapor deposition. In the method, the reaction temperature and the reaction gas flow ratio are such that the epitaxial growth of the micron-roughened array structure is performed. The second doped semiconductor layer 40 is made, for example, of gallium nitride, and the deposition step is formed by controlling the reaction temperature and the reaction gas flow ratio in the organometallic chemical vapor deposition method to grow the micron bell roughening array structure. Wherein the reaction temperature is between 850 ° C and 950 ° C; the reaction gas comprises, for example, ammonia gas and trimethyl gallium, and the flow rate of the ammonia gas is between 3000 cubic centimeters per minute (standard cubic centimeter per minute, The sccm) is between 5000 sccm and the flow rate of the trimethylgallium is between 50 micromoles (μmol/min) and 100 μmol/min per minute. The diameter of each micrometer grown by epitaxy ranges from 0.2 μm to 1 μm, and the height range is between 0.2 μm and 0.8 μm. If the first doped semiconductor layer 20 in the foregoing step S12 is a P-type semiconductor, the second doped semiconductor layer 40 is an N-type semiconductor; if the first doped semiconductor layer 20 is In the case of an N-type semiconductor, the second doped semiconductor layer 40 is a P-type semiconductor.

In step S15, a transparent electrode layer 50 is deposited on the second doped semiconductor layer 40. The transparent electrode layer 50 is made of a transparent conductive oxide such as an oxide, a nitride or a fluoride having transparent conductivity, such as indium tin oxide (ITO) or antimony tin oxide (ATO). a deposition step of one or more of fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), gallium-doped zinc oxide (GZO), and indium-doped zinc oxide (IZO) Can pack Coating method, electron beam evaporation method, plasma chemical vapor deposition method and sputtering method.

According to the manufacturing method of the above embodiment, the present invention proposes the following specific embodiments: firstly depositing a germanium-doped N-type gallium nitride semiconductor layer having a thickness of about 2.5 μm on a sapphire substrate by organometallic chemical vapor deposition, and then On the germanium-doped N-type gallium nitride semiconductor layer, a type I indium gallium nitride/gallium nitride multilayer quantum well semiconductor layer having a thickness of about 0.24 μm is deposited by organometallic chemical vapor deposition. The sapphire substrate on which the I-type indium gallium nitride/gallium nitride multi-layer quantum well semiconductor layer is deposited is heated to 900 ° C, after introducing 4000 sccm of ammonia gas and 80 μmol/min of trimethyl gallium gas, An organometallic chemical vapor deposition method is used to epitaxially grow a magnesium-doped P-type nitride having a thickness of about 0.5 μm and having a micron bell roughening array structure on the I-type indium gallium nitride/gallium nitride multilayer quantum well semiconductor layer. Gallium semiconductor layer. Finally, an indium tin oxide layer having a thickness of about 0.3 μm is deposited on the magnesium-doped P-type gallium nitride semiconductor layer by plasma chemical vapor deposition to obtain a three-five-type solar cell having a micron-roughened array structure. .

As described above, the three-five-type solar cell having the micron-roughened array structure of the present invention and the method of fabricating the same are used to control the reaction temperature and the reaction gas flow ratio in the organometallic chemical vapor deposition method. An N-type or P-type semiconductor layer having a micron bell roughened array structure is grown directly on the epitaxial layer to serve as an anti-reflection layer. Since the N-type or P-type semiconductor layer having the micron bell roughening array structure is also an anti-reflection layer at the same time, the integrally formed anti-reflection layer has the advantages of strong structure and good stability. The invention has the advantages of simple processing procedure, low production cost and the above advantages, because the anti-reflection layer structure formed by the manufacturing method has good structural uniformity, high breakage and an irregularity of the top of each micrometer clock. Surface and other related characteristics make it more good battery element characteristics (such as quantum efficiency, fill factor, photo-separator separation/collection, piezoelectricity, etc.), thus effectively improving its photoelectric conversion efficiency.

While the invention has been described above in terms of the preferred embodiments, the invention is not intended to limit the invention, and the invention may be practiced without departing from the spirit and scope of the invention. Retouching, therefore the invention The scope of protection is subject to the definition of the scope of the patent application.

1‧‧‧Three-five solar cells

10‧‧‧Transparent substrate

20‧‧‧First doped semiconductor layer

30‧‧‧Intrinsic semiconductor layer

40‧‧‧Second doped semiconductor layer

50‧‧‧Transparent electrode layer

S11~S15‧‧‧Steps

The first figure is a side view of the structure of a three-five-type solar cell having a micron-roughened array structure in an embodiment of the present invention.

The second figure is a scanning electron microscope (SEM) photograph of a second doped semiconductor layer of a three-five solar cell fabricated by the method of the present invention.

The third figure is a flow chart of the steps of the method for manufacturing the three-five-type solar cell having the micron bell roughening array structure in the embodiment of the present invention.

1‧‧‧Three-five solar cells

10‧‧‧Transparent substrate

20‧‧‧First doped semiconductor layer

30‧‧‧Intrinsic semiconductor layer

40‧‧‧Second doped semiconductor layer

50‧‧‧Transparent electrode layer

Claims (20)

A three-five-type solar cell having a micron-roughened array structure, comprising: a transparent substrate; a first doped semiconductor layer disposed on the transparent substrate; and an intrinsic semiconductor layer disposed on the first doped a second doped semiconductor layer disposed on the intrinsic semiconductor layer, the second doped semiconductor layer having an integrally formed micron-roughened array structure; and a transparent electrode layer disposed On the second doped semiconductor layer. The three or five solar cells of claim 1, wherein each micrometer has a diameter ranging from 0.2 micrometers to 1 micrometer, and each micrometer has a height ranging from 0.2 micrometers to 0.8 micrometers. between. The three-five-type solar cell according to claim 1, wherein the first doped semiconductor layer is a P-type semiconductor, and the second doped semiconductor layer is an N-type semiconductor. The three-five-type solar cell according to claim 1, wherein the first doped semiconductor layer is an N-type semiconductor, and the second doped semiconductor layer is a P-type semiconductor. The three-five-type solar cell according to claim 1, wherein the material of the first doped semiconductor layer and the second doped semiconductor layer is gallium nitride (GaN). The three-five-type solar cell according to claim 1, wherein the intrinsic semiconductor layer comprises an indium gallium nitride/gallium nitride multilayer quantum well (InGaN/GaN MQW) structure. For example, the three-five-type solar cell described in claim 6 wherein the multi-layer quantum well structure is one of a green quantum well structure and a blue quantum well structure. For example, the three or five solar cells described in claim 1 wherein the transparent substrate is made of glass, quartz, transparent plastic, sapphire substrate or Flexible material. The three-five-type solar cell of claim 1, wherein the transparent electrode layer is made of a transparent conductive oxide. A method for manufacturing a three-five-type solar cell having a micron-roughened array structure, comprising the steps of: providing a transparent substrate; depositing a first doped semiconductor layer on the transparent substrate; and forming the first doped semiconductor on the transparent substrate Depositing an intrinsic semiconductor layer on the layer; forming a second doped semiconductor layer by organometallic chemical vapor deposition by controlling the reaction temperature and the reaction gas flow ratio in the organometallic chemical vapor deposition method A second doped semiconductor layer having a micron bell roughened array structure is epitaxially grown on the intrinsic semiconductor layer; and a transparent electrode layer is deposited on the second doped semiconductor layer. The manufacturing method according to claim 10, wherein the reaction temperature is between 850 ° C and 950 ° C. The manufacturing method according to claim 10, wherein the reaction gas comprises ammonia gas and trimethyl gallium; the flow rate of the ammonia gas is between 3000 sccm and 5000 sccm, and the flow rate of trimethyl gallium is between Between 50 μmol/min and 100 μmol/min. The manufacturing method of claim 10, wherein each micrometer has a diameter ranging from 0.2 micrometers to 1 micrometer, and each micrometer has a height ranging from 0.2 micrometers to 0.8 micrometers. The manufacturing method according to claim 10, wherein the first doped semiconductor layer is a P-type semiconductor, and the second doped semiconductor layer is an N-type semiconductor. The manufacturing method according to claim 10, wherein the first doped semiconductor layer is an N-type semiconductor, and the second doped semiconductor layer is a P-type semiconductor. The manufacturing method according to claim 10, wherein the first doped semiconductor layer and the second doped semiconductor layer are formed of gallium nitride. The manufacturing method of claim 10, wherein the depositing the intrinsic semiconductor layer comprises forming an intrinsic semiconductor layer having an indium gallium nitride/gallium nitride multilayer quantum well structure. The manufacturing method according to claim 17, wherein the multi-layer quantum well structure is one of a green quantum well structure and a blue quantum well structure. The manufacturing method according to claim 10, wherein the transparent substrate is made of glass, quartz, transparent plastic, sapphire substrate or transparent flexible material. The manufacturing method according to claim 10, wherein the transparent electrode layer is made of a transparent conductive oxide.