TW201405664A - Silicon dioxide layer fabricating process - Google Patents

Abstract

A method for fabricating silicon dioxide layer is disclosed. The method includes the following steps. Firstly, a semiconductor substrate is provided. Next, the semiconductor substrate is cleaned with a solution containing hydrogen peroxide to form a chemical oxide layer on the semiconductor substrate. Then, the chemical oxide layer is heated in no oxygen atmosphere, such that the chemical oxide layer forms a compact layer. Then, the semiconductor substrate is heated in oxygen atmosphere to form a silicon dioxide layer between the semiconductor substrate and the compact layer.

Description

Method for forming tantalum oxide layer

The present invention relates to a method of forming a tantalum oxide layer, and more particularly to a method of forming a dense tantalum oxide layer.

In the field of semiconductors, tantalum oxide layers are widely used as insulating structures. For example, in a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), a gate dielectric layer is used to block the gate and the substrate.

However, if the structure of the gate dielectric layer is loose, unnecessary particles are easily diffused into the semiconductor substrate, causing the electrical drift of the transistor.

The present invention is directed to a method of forming a tantalum oxide layer that blocks or reduces unwanted particles from entering the semiconductor substrate.

According to an embodiment of the present invention, a method of forming a tantalum oxide layer is proposed. The method of forming the tantalum oxide layer includes the following steps. Providing a semiconductor substrate; cleaning the semiconductor substrate with a hydrogen peroxide solution to form a chemical oxide layer on the semiconductor substrate; heating the chemical oxide layer without oxygen to form a uniform layer of the chemical oxide layer; and heating in an oxygen atmosphere The semiconductor substrate forms a tantalum oxide layer between the semiconductor substrate and the dense layer.

According to an embodiment of the invention, a formation of a tantalum oxide layer is proposed method. The method of forming the tantalum oxide layer includes the following steps. Providing a semiconductor substrate; cleaning the semiconductor substrate with an aqueous ozone solution to form a chemical oxide layer on the semiconductor substrate; heating the chemical oxide layer without oxygen to form a uniform dense layer of the chemical oxide layer; and heating the semiconductor substrate in an oxygen atmosphere Forming a tantalum oxide layer between the semiconductor substrate and the dense layer.

In order to provide a better understanding of the above and other aspects of the present invention, the following detailed description of the embodiments and the accompanying drawings

Please refer to FIGS. 1A to 1D for illustrating a process of forming a tantalum oxide layer according to an embodiment of the present invention.

As shown in FIG. 1A, a semiconductor substrate 110 is provided, wherein the semiconductor substrate 110 is a germanium substrate such as a P-type germanium substrate.

As shown in Fig. 1B, the semiconductor substrate 110 is cleaned using an SC1 solution containing a high concentration of hydrogen peroxide to form a chemical oxide layer 120' on the semiconductor substrate 110. The high-concentration hydrogen peroxide solution is, for example, a SC1 (standard clean 1) solution in which the components of the SC1 solution include ammonia, hydrogen peroxide, and deionized water, which remove particles remaining on the semiconductor substrate 110. In this embodiment, the ratio of hydrogen peroxide, ammonia, and deionized water of the SC1 solution is 2 to 10:1:50, respectively.

In another embodiment, the semiconductor substrate 110 may also be cleaned using an aqueous ozone solution (O ₃ /DIW). The composition of the aqueous ozone solution comprises ozone and deionized water, wherein the concentration of ozone is between about 60 and 110 ppm.

As shown in Fig. 1C, the chemical oxide layer 120' is heated to form the chemically-etched layer 120' (Fig. 1B) into the uniform dense layer 120. This heating step can be used without This is done in an oxygen environment, such as nitrogen, and the heating temperature is, for example, between 950 and 1050 degrees Celsius, and the heating time is, for example, between about 30 and 60 seconds.

Since the heating step causes the dangling bond in the chemical oxide layer 120' (Fig. 1B) to be bonded to bond more oxygen and helium bonds, a dense dense layer 120 is formed. In terms of density, the density of the dense layer 120 is greater than the density of the chemical oxide layer 120'. In terms of thickness, the dense layer 120 has a thickness smaller than that of the chemical oxide layer 120'. For example, the chemical oxide layer 120' has a thickness of about 5 angstroms, and the dense layer 120 is formed to have a density of 2 to 3 angstroms.

Since the semiconductor substrate 110 is cleaned using the SC1 solution or the ozone aqueous solution containing a high concentration of hydrogen peroxide in the present embodiment, the number of oxygen atoms in the dense layer 120 can be increased to cause oxygen and ruthenium in the subsequently formed tantalum oxide 130 (Fig. 1D). The ratio of (cerium oxide) is close to the ideal ratio (i.e., 2 to 1), and the nearly ideal ratio of the tantalum oxide 130 forms a resistance to nitrogen atoms in the subsequent nitriding treatment, preventing the nitrogen atoms from diffusing into the semiconductor substrate 110. The relationship between the oxygen ratio of the cerium oxide 130 is described later.

As shown in FIG. 1D, the semiconductor substrate 110 may be heated by, for example, an in-situ stream generator (ISSG) method or another oxidation process to form a portion of the semiconductor substrate 110 to form a tantalum oxide 130 and be located on the semiconductor substrate. Between 110 and dense layer 120, the thickness of tantalum oxide 130 is between about 7 and 8 angstroms. This ISSG step is done under an oxygen atmosphere and the heating temperature is approximately 900 degrees Celsius.

The proportion of oxonium in the cerium oxide 130 can be determined by the cleaning liquid used in the above washing step. For example, when the semiconductor substrate is cleaned with an SC1 solution containing a high concentration of hydrogen peroxide, the proportion of oxonium oxide in the lanthanum oxide 130 is about 0.96. 1; When the semiconductor substrate 110 is cleaned with an aqueous ozone solution, the proportion of oxygen oxide in the tantalum oxide 130 is about 1.43 to 1. When the ratio of oxygen to cerium in the cerium oxide 130 is closer to a desired ratio, the cerium oxide 130 becomes denser and the quality thereof is better, and the bonding with the semiconductor substrate 110 is also better.

The tantalum oxide obtained by cleaning the semiconductor substrate 110 with the SC1 solution having a low concentration of hydrogen peroxide has a ratio of oxygen to germanium in the tantalum oxide 130 of the present embodiment closer to a desired ratio, so that the tantalum oxide 130 and the semiconductor substrate 110 are used. The combination is good. Further, the cerium oxide 130 forms a resistance to nitrogen atoms in the subsequent nitriding treatment, avoiding diffusion of nitrogen atoms. According to the experimental data, the cerium oxide obtained by cleaning the semiconductor substrate 110 with a low concentration of hydrogen peroxide in the SC1 solution, the diffusion depth of the nitrogen atom to the cerium oxide is as deep as 35 angstroms; in contrast, the nitrogen atom oxidizes the cerium in this embodiment. The diffusion depth of the object 130 is only about 25 angstroms. From this, it is understood that the tantalum oxide 130 of the present embodiment has an effective diffusion resistance against nitrogen, and nitrogen diffusion into the semiconductor substrate 110 during the nitriding treatment is prevented.

The above-described method of forming a tantalum oxide layer can be applied to many semiconductor elements, such as active elements. Hereinafter, several methods of forming an active device using the above-described tantalum oxide layer forming method will be described using a MOSFET as an example.

Please refer to FIGS. 2A-2B, which illustrate a process of forming an active device in accordance with an embodiment of the present invention.

As shown in FIG. 2A, a MOSFET structure 200' is formed, which includes a dense layer 120, a germanium oxide 130, a gate dielectric layer 240, a gate 250, a first doped region 260, and a second doped region 265 in a semiconductor. On the substrate 110, a gate dielectric layer 240 is formed between the semiconductor substrate 110 and the gate 250. The first doped region 260 and the second doped region 265 are respectively located at the gate The dielectric layer 240 is in the opposite side of the semiconductor substrate 110. The first doped region 260 and the second doped region 265 are, for example, n-type lightly doped regions, and can serve as drains and sources, respectively.

Since the germanium oxide 130 of the present embodiment has good bonding property with the semiconductor substrate 110, the electron mobility of the channel in the device can be improved. According to the experimental data, the denser tantalum oxide layer 130 of this embodiment improves the electron mobility of the channels in the element by about 14% compared to the conventional structure of the tantalum oxide.

In addition, since the bonding property of the tantalum oxide 130 and the semiconductor substrate 110 is good in the present embodiment, the turn-on current of the element is increased. According to the experimental data, with the same shutdown current (such as 10 ^-8 A/μm) as a comparison, the denser tantalum oxide layer 130 of the present embodiment makes the component more compact than the conventional structure of the tantalum oxide. The turn-on current boost is about 5.3%.

As shown in FIG. 2A, a dielectric layer 270 is formed over the MOSFET structure 200'.

The gate dielectric layer 240 may be a high dielectric constant material, the gate 250 may be a metal gate, and the metal gate is further composed of a work function material layer and a low resistance metal layer (or barrier layer). The process can be formed by using a metal gate after the high dielectric constant material is formed, or a metal gate is used to form a high dielectric constant material. When the high dielectric constant material is formed after the metal gate is formed, the tantalum oxide 130 and the dense layer 120 may be pre-made or post-made. Hereinafter, the process of preparing the tantalum oxide 130 and the dense layer 120, the metal gate post-production, and the high dielectric constant material is described in detail, and the dielectric layer 270 as shown in FIG. 2A is ground to expose the dummy gate 250. . Then, for example, an etch process can be used to remove the dummy gate dielectric layer 240 and the dummy gate 250 to form A recess 271 is formed.

As shown in FIG. 2B, a high dielectric constant gate dielectric layer 240 may be formed on the dense layer 120 by, for example, chemical vapor deposition (CVD) or physical vapor deposition (PVD), wherein the high dielectric constant is high. The gate dielectric layer 240 is formed in conformity with the contour of the upper surface of the dense layer 120 and the sidewall profile of the recess 271. In addition, gate dielectric layer 240 has a high dielectric constant and a thickness of about 30 angstroms.

In order to improve the reliability of the device, after the high dielectric constant gate dielectric layer 240 is formed, the nitridation process can be performed on the high dielectric constant gate dielectric layer 240.

As shown in FIG. 2B, a conductive layer 290 can be formed on the gate dielectric layer 240 by, for example, a deposition method, wherein the conductive layer 290 is formed in conformity with the structure of the gate dielectric layer 240. In this embodiment, the conductive layer 290 is a work function conductive layer, such as titanium nitride (TiN) or titanium aluminide (TiAl).

In FIG. 2B, a conductive layer 295 may be formed on the conductive layer 290 by, for example, a deposition method, wherein the conductive layer 295 fills the recess 271. Conductive layer 295 is, for example, a low resistance conductive layer such as aluminum metal. Conductive layer 295 and conductive layer 290 form a gate 250 of the MOSFET structure.

As shown in FIG. 2B, the dielectric layer 170 is formed to cover the gate 250 and the dielectric layer 270 to form the MOSFET structure 200.

Although the method for forming the active device of the above embodiment is described by taking the process of “pre-manganese oxide first, gate dielectric layer post-production and gate post-production” as an example, it is not intended to limit the embodiments of the present invention. Explain another process of “pre-manufacturing of tantalum oxide, first implementation of gate dielectric layer and post-gate fabrication”.

Please refer to FIG. 2C, which illustrates a process of forming an active device according to another embodiment of the present invention. In this embodiment, the gate 250 of FIG. 2A is etched, but the gate dielectric layer 240 having a high dielectric constant is retained. Then, shape A conductive layer 290 is formed on the gate dielectric layer 240. Then, a conductive layer 295 is formed to fill the recess 271, wherein the conductive layer 295 and the conductive layer 290 constitute the gate 250 of the MOSFET structure. Then, the dielectric layer 170 is formed to cover the gate 250 and the dielectric layer 270 to form the MOSFET structure 300 of FIG.

In conclusion, the present invention has been disclosed in the above embodiments, but it is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

110‧‧‧Semiconductor substrate

120'‧‧‧Chemical Oxide

120‧‧‧Dense layer

130‧‧‧矽Oxide

170, 270‧‧‧ dielectric layer

200, 300‧‧‧ active components

240‧‧‧gate dielectric layer

250‧‧‧ gate

260‧‧‧First doped region

265‧‧‧Second doped region

271‧‧‧ recess

290, 295‧‧‧ conductive layer

1A to 1D are views showing a process of forming a tantalum oxide layer according to an embodiment of the present invention.

2A-2B are diagrams showing a process of forming an active device in accordance with an embodiment of the present invention.

FIG. 2C is a diagram showing a process of forming an active device according to another embodiment of the present invention.

110‧‧‧Semiconductor substrate

120‧‧‧Dense layer

130‧‧‧矽Oxide

Claims (16)

A method for forming a tantalum oxide layer, comprising: providing a semiconductor substrate; cleaning the semiconductor substrate with a solution containing hydrogen peroxide to form a chemical oxide layer on the semiconductor substrate; The chemical oxide layer is formed into a uniform compact layer; and the semiconductor substrate is heated in an oxygen atmosphere to form a tantalum oxide layer between the semiconductor substrate and the dense layer. A method of forming a tantalum oxide layer as described in claim 1, wherein the step of heating the chemical oxide layer is performed in a nitrogen atmosphere. The method for forming a tantalum oxide layer according to claim 1, wherein in the step of heating the chemical oxide layer, the heating temperature is between 950 and 1000 degrees Celsius. The method for forming a tantalum oxide layer as described in claim 1, wherein in the step of heating the chemical oxide layer, the heating time is between 30 and 60 seconds. The method for forming a tantalum oxide layer according to claim 1, wherein the SC1 solution is composed of hydrogen peroxide, ammonia and deionized water, wherein the ratio of hydrogen peroxide, ammonia and deionized water is 2 respectively. ~10:1:50. A method of forming a tantalum oxide layer as described in claim 1, wherein the dense layer has a thickness of between 2 and 3 angstroms. The method for forming a tantalum oxide layer according to claim 1, further comprising: forming a high dielectric constant high-k layer on the dense layer. The method for forming a tantalum oxide layer according to claim 1, wherein the density of the dense layer is greater than the density of the chemical oxide layer. A method for forming a tantalum oxide layer, comprising: providing a semiconductor substrate; cleaning the semiconductor substrate with an aqueous ozone solution to form a chemical oxide layer on the semiconductor substrate; and heating the chemical oxide layer without oxygen to make the chemical oxide layer Forming a uniform dense layer; and heating the semiconductor substrate in an oxygen atmosphere to form a tantalum oxide layer between the semiconductor substrate and the dense layer. A method of forming a tantalum oxide layer as described in claim 9, wherein the step of heating the chemical oxide layer is performed in a nitrogen atmosphere. Formation of a tantalum oxide layer as described in claim 9 The method wherein, in the step of heating the chemical oxide layer, the heating temperature is between 950 and 1000 degrees Celsius. The method for forming a tantalum oxide layer according to claim 9, wherein in the step of heating the chemical oxide layer, the heating time is between 30 and 60 seconds. The method for forming a tantalum oxide layer according to claim 9, wherein the ozone aqueous solution has a concentration of ozone of between 60 and 110 ppm. The method for forming a tantalum oxide layer according to claim 9, wherein the dense layer has a thickness of between 2 and 3 angstroms. The method for forming a tantalum oxide layer according to claim 9 further comprises: forming a high dielectric constant gate dielectric layer on the dense layer. The method for forming a tantalum oxide layer according to claim 9, wherein the density of the dense layer is greater than the density of the chemical oxide layer.