TW201401594A - Hall sensor - Google Patents

Abstract

A Hall sensor readily produced and capable of readily removing off-set voltage, without increasing chip size, as a result of having a magnetically sensitive receptor for a square or cross-shaped second n-type impurity region, and a control current input terminal and a Hall voltage output terminal for n-type high-density impurity regions at a first n-type impurity region for a depletion layer suppressing layer and at each peak and end section thereof.

Description

Hall sensor

The present invention relates to a semiconductor Hall sensor for a Hall sensor with high sensitivity and a removable bias voltage.

Explain the principle of magnetic detection of Hall elements. When a vertical magnetic field is applied to a current flowing through the substance, an electric field (Hall voltage) is generated in a direction perpendicular to both the current and the magnetic field.

When considering a Hall element as shown in FIG. 3, the width W, the length L, the electron mobility μ of the Hall element magnetic sensing portion 1, the applied voltage Vdd of the power source 2 through which the current flows, and the applied magnetic field B are used. At the time, the Hall voltage outputted by the voltmeter 3 is expressed as: VH = μB (W / L) Vdd, and the susceptibility Kh of the Hall element is expressed as: Kh = μ (W / L) Vdd . From this relationship, it is known that one of the methods for high sensitivity is to increase the W/L ratio.

On the other hand, in an actual Hall element, an output voltage is generated even when a magnetic field is not applied. The voltage that is output when the magnetic field is zero is referred to as a bias voltage. The reason why the bias voltage is generated is considered to be caused by an imbalance in the internal potential distribution of the element due to mechanical stress applied to the element from the outside or a calibration offset in the manufacturing process.

The method of compensating the bias voltage is generally performed in the following manner.

Figure 3 shows the offset cancellation circuit due to the spin current. The Hall element 100 has a symmetrical shape, and has four terminals T1, T2, T3, and T4 that output a control current to one pair of input terminals and an output voltage from the other pair of output terminals. When one of the pair of terminals T1 and T2 of the Hall element serves as the control current input terminal, the other pair of terminals T3 and T4 become the Hall voltage output terminal. At this time, when the voltage Vin is applied to the input terminal, the output voltage Vh+Vos is generated at the output terminal. Here, Vh denotes a Hall voltage proportional to the magnetic field of the Hall element, and Vos denotes a bias voltage. Next, T3 and T4 are set as control current output terminals, and T1 and T2 are set as Hall voltage output terminals. When the input voltage Vin is applied between T3 and T4, voltage -Vh+Vos is generated at the output terminal.

By reducing the output voltage when the current flows in the above two directions, the bias voltage Vos is eliminated, and an output voltage 2Vh proportional to the magnetic field can be obtained.

However, the offset cancellation circuit cannot completely eliminate the bias voltage. The reason is explained below.

The Hall element is represented by the equivalent circuit shown in FIG. Hall element system The four terminals are represented as bridge circuits connected by four resistors R1, R2, R3, and R4. As described above, the bias voltage is eliminated by reducing the output voltage when the current flows in the two directions.

When a voltage Vin is applied to one of the pair of terminals T1 and T2 of the Hall element, the Hall voltage Vouta=(R2*R4-R1*R3)/(R1+) is output between the other pair of terminals T3 and T4. R4) / (R2+R3) * Vin. On the other hand, when the voltage Vin is applied to the terminals T3 and T4, the Hall voltage Voutb=(R1*R3-R2*R4)/(R3+R4)/(R1+R2)*Vin is outputted at T1 and T2. . When the difference between the output voltages in the two directions is obtained, it is: Vouta-Voutb=(R1-R3)*(R2-R4)*(R2*R4-R1*R3)/(R1+R4)/(R2+R3 ) / (R3 + R4) / (R1 + R2) * Vin. Therefore, the bias voltage can eliminate the offset even when the resistances R1, R2, R3, and R4 of the respective equivalent circuits are different. However, if the values of the resistors R1, R2, R3, and R4 change depending on the direction in which the current is applied and the voltage is applied, since the above equation is not satisfied, the offset cannot be eliminated.

Fig. 5 is a cross-sectional view of a general Hall element (see, for example, Patent Document 1). The peripheral portion of the N-type impurity region which becomes the magnetic sensing portion of the Hall element is surrounded by the P-type impurity region due to the separation. When a voltage is applied to the Hall current application terminal, the depletion layer expands at the boundary between the magnetic sensing portion of the Hall element and its peripheral portion. The Hall current does not flow in the depletion layer, so in the region where the depletion layer is expanded, the Hall current is suppressed and the resistance is increased. In addition, the width of the depletion layer depends on the applied voltage. Therefore, the resistance values R1, R2, R3, and R4 of the equivalent circuit shown in FIG. 4 are changed depending on the direction in which the voltage is applied. Therefore, the offset cancellation circuit cannot eliminate the magnetic gas bias.

The depletion layer control electrode is disposed on the periphery of the element and the element, and the depletion layer is extended in the Hall element, and a method of suppressing the depletion layer by adjusting the voltage applied to each electrode is also employed (see, for example, Patent Document 2).

[Previous Technical Literature] [Patent Literature]

[Patent Document 1] International Publication WO2007/116823

[Patent Document 2] Japanese Laid-Open Patent Publication No. 08-330646

In the method of Patent Document 1, when a voltage is applied to the Hall element, the thin N-type impurity region, that is, the Hall element magnetic sensing portion, and the P-type substrate, that is, the junction portion between the peripheral portion and the bottom portion, are depleted. The layer will expand. The depletion layer suppresses the current flowing into the Hall element and the resistance value changes. The width of the depletion layer varies depending on the applied voltage and its direction. Therefore, the bias voltage due to the spin current by the aforementioned offset canceling circuit cannot be removed.

Further, in the method of Patent Document 2, the depletion layer width is controlled by the depletion layer control electrode, and the offset cancellation circuit can be used to remove the bias voltage. However, the use of a plurality of depletion layer control electrodes also requires a complicated control circuit, and thus there is a disadvantage that the wafer size becomes large, resulting in an increase in cost.

Therefore, the subject of the present invention is to provide a wide layer of vacant layer which is difficult to change. Variable, Hall sensor that removes bias voltage without the use of complex control circuitry.

In order to solve the above problems, the present invention has the following constitution.

First, it is formed as a Hall sensor, which is characterized in that a control current flowing in a Hall element can be associated with a Hall element magnetic sensing portion belonging to an N-type impurity region and a peripheral portion belonging to a P-type substrate. The joints are separated to flow.

Further, it is formed as a Hall sensor having a magnetic sensing portion of a square or cross type 2N-type impurity region and a first N-type impurity region of the depletion layer suppression layer, and respective vertices and end portions thereof. The control current input terminal and the Hall voltage output terminal of the N-type high-concentration impurity region.

Further, a Hall sensor is characterized in that the first N-type impurity region belonging to the depletion layer suppression region is deeper and has a lower concentration than the second N-type impurity region of the magnetic sensing portion.

Further, it is formed as a Hall sensor characterized in that the control current input terminal and the Hall voltage output terminal have the same depth as the Hall magnetic sensing portion.

Furthermore, it is formed as a Hall sensor characterized in that the bias voltage can be removed by a spin current.

By using the above means, the control electricity flowing in the Hall element can be The flow flows apart from the junction of the Hall element magnetic sensing portion belonging to the N-type impurity region and the peripheral portion belonging to the P-type substrate. Therefore, the depletion layer is suppressed from being elongated in the magnetic sensing portion of the Hall element, and the resistance between the respective terminals does not change depending on the applied voltage and its direction. Therefore, the bias voltage can be removed by the spin current.

In addition, since the structure of the depletion layer suppression region is disposed under the magnetic sensing portion of the Hall element, the resistance value change due to the depletion layer can be suppressed without using the depletion layer suppression electrode or the complicated circuit, and thus the bias voltage can be removed. And it is possible to reduce the size of the wafer and suppress the cost.

2, 12‧‧‧ power supply

3, 13‧‧‧ voltmeter

10, 120‧‧‧ Hall element

11, 12, 13, 14‧‧‧ Hall voltage output terminal and control current input terminal

100‧‧‧P type substrate

110‧‧‧N type high concentration impurity area

121‧‧‧2N type impurity region

122‧‧‧1N type impurity region

S1, S2, S3, S4‧‧‧ sensor terminal switching means

T1, T2, T3, T4‧‧‧ terminals

R1, R2, R3, R4‧‧‧ resistance

Fig. 1 is a view showing the configuration of a Hall element of the present invention. (A) is the above figure, and (B) is a side view.

Figure 2 is a diagram for explaining the principle of an ideal Hall effect.

Fig. 3 is a view for explaining a method of removing a bias voltage due to a spin current.

4 is an equivalent circuit diagram for explaining a bias voltage of a Hall element.

Fig. 5 is a cross-sectional structural view of a general Hall element.

Fig. 1 is a view showing the configuration of a Hall element of the present invention. The Hall element of the present invention is a magnetic sensing portion of a square second N-type impurity region 121 having a side of 50 to 150 μm on one side, and a first N in the lower portion of the magnetic sensing portion having an impurity concentration lower than that of the second N-type impurity region 121. The depletion layer suppression region of the impurity region 122 and its vertices have control current input terminals and Hall voltage output terminals 11, 12, 13, and 14 of an N-type high concentration impurity region. Preferably, the N-type impurity region of the magnetic sensing portion has a depth of about 300 to 500 nm, and the impurity concentration is 1×10 ¹⁶ (atoms/cm ³ )≦N≦5×10 ¹⁶ (atoms/cm ³ ), which belongs to the depletion layer suppression region. The second N-type impurity region 121 has a depth of about 2 to 3 μm, and has a concentration of 8 × 10 ¹⁴ (atoms/cm ³ ) ≦N ≦ 3 × 10 ¹⁵ (atoms/cm ³ ), and serves as a control current input terminal and a Hall voltage output. The depth of the high-concentration N-type impurity region of the terminal is about 300 nm. That is, the depletion layer suppression region is deeper than the magnetic sensing portion and reduces the impurity concentration. Further, the control current input terminal and the Hall voltage output terminal have the same depth as the Hall magnetic sensing portion.

By maintaining the above relationship, the control current can flow to the Hall magnetic sensing portion without being affected by the depletion layer generated in the joint portion between the depletion layer suppression region and the P-type substrate region at the peripheral portion thereof. Therefore, the Hall voltage output terminals are set to 11, 13 and the resistance values between the terminals when the control current input terminals are 12 or 14, and the Hall voltage output terminals are set to 12 and 14, and the control current input terminal is set. The resistance values between the terminals of 11 and 13 are constant. Thereby, the bias voltage can be eliminated by the spin current.

Further, the method of manufacturing the Hall element of the present invention is also easy. First, a first N-type impurity region 122 as a depletion layer suppression layer is formed on a P-type substrate. At this time, the first N-type impurity region 122 has a depth of 2 to 3 μm and an impurity concentration of 8 × 10 ¹⁴ (atoms/cm ³ ) ≦N ≦ 3 × 10 ¹⁵ (atoms/cm ³ ). This is the same concentration and depth as the n well. Further, since the first N-type impurity region 122 is used as the depletion layer suppression region, even if the manufacturing unevenness of the n-well is large, the sensitivity or other characteristics of the Hall element are not affected. Therefore, it can be formed in common with the n wells of other elements.

Next, a second N-type impurity region 121 as a Hall magnetic sensing portion is formed. At this time, the first N-type impurity region 122 is formed to have a depth of 300 to 500 nm and a concentration of 1 × 10 ¹⁶ (atoms/cm ³ ) ≦N ≦ 5 × 10 ¹⁶ (atoms/cm ³ ). The impurity region of the depth and concentration can be formed by a general ion implantation apparatus, and the concentration and depth unevenness can be made smaller than the n well. The Hall element sensing portion is formed by ion implantation, thereby forming a Hall element having a small sensitivity unevenness.

Finally, a high-concentration impurity region as a control current input terminal and a Hall voltage output terminal is formed. The high-concentration impurity region has a depth of 300 nm and can be formed in common without special needs of other elements and other engineering.

Further, the shape of the Hall element having the control current input terminal and the Hall voltage output terminal in the square magnetic sensing portion, the depletion layer suppression region, and each vertex thereof is taken as an example, but the shape is not limited thereto. In the magnetic sensing portion of the second N-type impurity region and the lower portion of the magnetic sensing portion, the depletion layer suppression region of the first N-type impurity region having an impurity concentration lower than that of the second N-type impurity region, and each of the vertices thereof have an N-type high concentration The control current input terminal of the impurity region and the Hall voltage output terminal may be symmetrical Hall elements which can eliminate the shape of the bias voltage due to the spin current. For example, even in the first N-type impurity region of the cross-type depletion layer suppression region inclined at 45°, the second N-type impurity region of the Hall element magnetic sensing portion, and each end portion thereof, the N-type high-concentration impurity region is disposed. Current control electrode The same effect can be obtained in addition to the square shape such as the shape of the Hall voltage output terminal.

By adopting the structure shown in FIG. 1 , it is possible to suppress the influence of the depletion layer on the control current without using a complicated circuit or a complicated structure, and without adding special engineering, and can be eliminated by the spin current. The bias voltage enables a Hall sensor with a small and inexpensive wafer size.

11, 12, 13, 14‧‧‧ Hall voltage output terminal and control current input terminal

100‧‧‧P type substrate

110‧‧‧N type high concentration impurity area

121‧‧‧2N type impurity region

122‧‧‧1N type impurity region

Claims (3)

A Hall sensor characterized in that a control current flowing in a Hall element is separated from a magnetic sensing portion belonging to an N-type impurity region and a peripheral portion of the magnetic sensing portion belonging to a P-type substrate In the manner in which the portion flows, the magnetic sensing portion is covered by the depletion layer suppression region belonging to the N-type impurity region which is diffused deeper and has a lower impurity concentration, and the control current input terminal and the Hall voltage output terminal are disposed in the In the magnetic sensing portion, the control current input terminal and the Hall voltage output terminal have the same depth as the magnetic sensing portion. The hall sensor according to claim 1, wherein the magnetic sensing portion is a square or a cross type, and a control current input terminal and a Hall voltage output having an N-type high-concentration impurity region at each vertex and end portion thereof are provided. Terminal. A Hall sensor according to claim 1, wherein the bias voltage can be removed by a spin current.