TW201401029A - Multi-motherboard architecture for electrical data communication of power supply - Google Patents

Abstract

A multi-motherboard architecture for electrical data communication of a power supply comprises at least one power supply unit, a data communication control unit, a first motherboard, and a second motherboard. The power supply unit comprises a power management unit for generating at least one working parameter according to the working status of the power supply unit. The data communication control unit comprises at least one power management connection port for obtaining the working parameter of the power supply unit, a buffering memory unit for storing the working parameter, and a first data output port and a second data output port for outputting the working parameter. The first and second motherboards are respectively electrically connected with the first and second data output ports to individually read the working parameter stored in the buffering memory unit.

Description

Power supply power data communication multi-board architecture

The present invention relates to a power data communication architecture, and more particularly to an architecture for power data communication between an electronic device having a power supply unit and a multi-board.

With the advancement of computer technology, computer systems can provide a variety of functions, including data processing or entertainment, in response to user needs, and require stable high-power power supply because of its continuous processing of large and complex information. In order to prevent sudden power failure of the power supply source or damage to expensive and complicated electrical equipment caused by switching to standby power, or to make the processing information disappear instantly, the high-end computer system adopts N+M backup power supply system (Redundant) Power Supply) to maintain normal operation without interrupting power supply, N is the number of power supplies that should be combined with the total power load value required for the electrical equipment, and M is the number of power supply that can be allowed to be damaged, and N≧1 and M ≧1. The backup power supply system includes N+M power supplies, each of which includes a standing power unit that is resident in output DC power, and a main power unit that outputs DC power in a powered state. A number of redundant power supply systems have been developed to enhance redundancy or fault tolerance. For example, a backup power supply with AC and DC power input is shown in US Patent No. 7,394,674. The auxiliary power supply is designed so that the power supply can continue to output DC power to the normal operation of the electrical equipment when any power input source is interrupted.

In order to meet the needs of the continuous improvement of the performance of the computer system and the need for a large number of power supplies, although it is possible to increase sufficient power, such as the use of N+M backup power supply systems, but in the trend of green technology, the importance of power management systems Gradually valued. Today's commonly used power management systems include Advanced Power Management (APM) and Advanced Configuration and Power Interface (ACPI). Traditional high-order power management (APM) is controlled by the firmware of the Basic Input/Output System (BIOS). It is difficult to input commands or decisions, and it is not possible to effectively adjust the power according to changes in the writing system. The Advanced Architecture Power Interface (ACPI) is a new power management technology that allows users to manage power through the operating system and view the status of power consumption. Because the advanced architecture power interface replaces the traditional use of the basic input/output system (BIOS) to manage power by using a hardware system that can control the hardware extensively, it effectively improves the efficiency of power management. Advanced Architecture Power Interface (ACPI) power management with hardware can record and control the power consumption of many devices. The monitored items are quite extensive, including power supply voltage, motherboard temperature, and fan speed.

However, under the architecture of the N+M backup power supply system, if the motherboard wants to perform power management between different power supplies, in order to obtain the monitored power information in different power supplies, the motherboard must be modified. The firmware, or the addition of electrical contacts to the power supply, can identify multiple power supplies and cannot be easily applied to motherboards that have already completed the architecture.

The main purpose of the present invention is to solve the problem that a conventional motherboard needs to change firmware or hardware when applied to an N+M backup power supply system. In order to achieve the above object, the present invention provides a power supply device power data communication multi-board structure, which is disposed in an electronic device, including at least one power supply unit that provides power for operation of the electronic device, and a data communication control unit. The first motherboard and a second motherboard. The power supply unit includes a power management unit that generates at least one operating parameter according to an operating state of the power supply unit. The data communication control unit includes at least one power management port that obtains the operating parameter of the power supply unit, a buffer memory unit that stores the working parameter, and one that is electrically connected to the buffer memory unit to output the working parameter. The first data output port and the second data output port. The first motherboard and the second motherboard are electrically connected to the first data output port and the second data output port respectively to read the working parameters stored in the buffer memory unit.

In an embodiment, the first motherboard includes a first serial data line connected to the first data output port of the data communication control unit and a first serial clock line.

In an embodiment, the second motherboard includes a second serial data line connected to the second data output port of the data communication control unit and a second serial clock line.

In one embodiment, the data communication control unit includes a third serial data line connected to the power management unit and a third serial clock line.

In an embodiment, the operating parameter is a voltage value of the operating power.

In an embodiment, the power management unit is electrically connected to a temperature sensing unit, and the operating parameter is a temperature inside the power supply unit.

In one embodiment, the power management unit is electrically connected to a cooling fan, and the operating parameter is the rotation speed of the cooling fan.

In one embodiment, the power supply unit includes a rectifying and filtering unit connected to an external power source, a power factor correcting unit connected to the rectifying and filtering unit, a transformer, a pulse width control unit, a switching element, and a rectifying output unit. .

In one embodiment, the power supply unit is electrically connected to an external power source to convert and output the operating power that drives the electronic device to operate.

In an embodiment, the data communication control unit includes a micro control unit electrically connected to the power management port.

In an embodiment, the power supply data communication multi-board architecture includes a first power supply unit and a second power supply unit, and the first power supply unit includes a work according to the first power supply unit. a first power management unit that generates a corresponding at least one first operating parameter, the second power supply unit includes a second power management unit that generates a corresponding at least one second operating parameter according to an operating state of the second power supply unit .

In an embodiment, the power supply data communication multi-board architecture includes a first power management port connected to the first power management unit and a second power management device connected to the second power management unit. Connection 埠.

The power supply device power data communication multi-master board structure of the present invention, a data communication control unit is disposed between the power supply unit and the motherboard, and the data communication control unit can respectively obtain working parameters of different power supply units, and Stored for reading to the backend's motherboard. Therefore, the motherboard does not need to modify the software or firmware for different numbers of power supply units, and can be applied to the N+M backup power supply system architecture.

The detailed description and technical contents of the present invention will now be described as follows:

Please refer to FIG. 1 , which is a circuit block diagram of an embodiment of a power supply data communication multi-board of the power supply of the present invention. As shown in the figure, the present invention is a power supply power data communication multi-board architecture. It is disposed in an electronic device. In the embodiment, the electronic device is a computer system. The computer system includes a first motherboard 10 and a second motherboard 20 that are parallelizable, and a first power supply unit 30 and a second power supply unit 30a that independently output an operating power in parallel. The first motherboard 10 and the second motherboard 20 respectively include at least one central processing unit (CPU) and other electronic components and circuit layouts. The N first power supply units 30 and the M second power supply units 30a can be combined with each other to form an N+M backup power supply system, where N≧1 and M≧1; in this embodiment, It is represented by N=1 and M=1. The first power supply unit 30 and the second power supply unit 30a respectively include a rectifying and filtering unit 31, 31a connecting the external power sources 40, 40a, and a power factor correcting unit 32, 32a connecting the rectifying and filtering units 31, 31a. A transformer 33, 33a, a pulse width control unit 34, 34a, a switching element 35, 35a and a rectification output unit 36, 36a. After the AC external power outputted by the external power source 40, 40a passes through the rectifying and filtering units 31, 31a and the power factor correcting unit 32, 32a, the power factor correcting unit 32, 32a adjusts the external portion by using an internal variable voltage power level. Power factor and voltage of electricity. The pulse width control units 34, 34a determine the duty cycle of the switching elements 35, 35a to adjust the coil current through the transformers 33, 33a. Finally, an operating power 301, 301a is generated via the rectification output unit 36, 36a, and the operating power 301, 301a is transmitted to the first motherboard 10 and the second motherboard 20. In addition, the first power supply unit 30 and the second power supply unit 30a can be electrically connected to at least one power integration control unit (not shown). The first power supply unit 30 and the second power supply unit 30a include at least one heat dissipation fan 38, 38a and a temperature sensing unit 39, 39a, and the heat dissipation fan 38, 38a and the temperature sensing unit 39, 39a goes further with the first and second power management units 37, 37a.

In the present invention, the first power supply unit 30 includes a first power management unit 37, and the first power management unit 37 generates corresponding at least one first operating parameter according to the operating state of the first power supply unit 30. The second power supply unit 30a includes a second power management unit 37a. The second power management unit 37a generates at least one second operating parameter according to the operating state of the second power supply unit 30a. The first operating parameter and the second operating parameter may be a voltage value of the operating power 301, 301a, a temperature inside the first and second power supply units 30, 30a, or a rotational speed of the cooling fan 38, 38a, and the like.

The computer system further includes a first power supply unit 30 electrically connected to the first power supply unit 30, and the data communication control unit 50 of the first motherboard 10 and the second motherboard 20. The data communication control unit 50 includes a first power management port 51 connected to the first power management unit 37 and a second power management port 51a connected to the second power management unit 37a. 1. The second power management port 51, 51a obtains the first control parameter of the first power supply unit 30 and the second control parameter of the second supply unit 30a, respectively. The micro control unit 52 includes a buffer memory unit 521 that stores the first operating parameter and the second operating parameter. In addition, the information communication control unit 50 includes a first data output port 53 electrically connected to the buffer memory unit 521 in the control unit 52 to output the first operating parameter, and a second outputting the second operating parameter. Data output 埠54. The first motherboard 10 and the second motherboard 20 are electrically connected to the first data output port 53 and the second data output port 54 respectively. The first motherboard 10 can read the first operating parameter and/or the second operating parameter stored in the buffer memory unit 521 through the first data output port 53. The second motherboard 20 reads the first operating parameter and/or the second operating parameter stored in the buffer memory unit 521 through the second data output port 54. When the first motherboard 10 or the second motherboard 20 is to monitor or manage the first power supply unit 30 or the second power supply unit 30a, it can be stored in the buffer memory unit 521 through software selection. After the first working parameter or the second working parameter, the first power supply unit 30 and/or the second power supply unit 30a are powered by the central processing unit of the first motherboard 10 or the second motherboard 20 management. In this embodiment, the data communication control unit 50 and the first and second power supply units 30, 30a, or the first and second motherboards 10, 20 are connected by an internal integrated circuit (Inter- Integrated Circuit, I ² C) bus, for example, the data communication control unit 50 of power management of the first port 51 and second power management port 51a are connected to the first comprises a power management unit 37, the A third serial data line 511, 511a of the second power management unit 37a and a third serial clock line 512, 512a. The first motherboard 10 includes a first serial data line 11 connected to the first data output port 53 of the data communication control unit 50 and a first serial clock line 12. The second motherboard 20 includes a second serial data line 21 connected to the second data output port 54 of the data communication control unit 50 and a second serial clock line 22. The first serial data line 11, the second serial data line 21, and the third serial data line 511, 511a are used for bidirectional transmission of data and address, the first serial clock line 12, the The second series of clock lines 22 and the third series of clock lines 512, 512a are used to transmit the clock in both directions.

The architecture of the power supply data communication multi-board of the present invention provides a data communication control unit between the motherboard and the power supply units, and can store the working parameters of the plurality of power supply units, different motherboards. Then, through the corresponding data output, the power parameters of different power supply units are obtained for power management. In this way, the motherboards do not need to modify the firmware or increase the electrical contacts in response to different numbers of power supply units, and the electronic device architecture composed of the plurality of power supply units and the plurality of motherboards is widely used. The present invention has been described in detail above, but the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Variations and modifications are still within the scope of the patents of the present invention.

10. . . First motherboard

11. . . First serial data line

12. . . First series of clock lines

20. . . Second motherboard

twenty one. . . Second serial data line

twenty two. . . Second series of clock lines

30. . . First power supply unit

30a. . . Second power supply unit

301, 301a. . . Operating electricity

31, 31a. . . Rectifier filter unit

32, 32a. . . Power factor correction unit

33, 33a. . . transformer

34, 34a. . . Pulse width control unit

35, 35a. . . Switching element

36, 36a. . . Rectifier output unit

37. . . First power management unit

37a. . . Second power management unit

38, 38a. . . Cooling fan

39, 39a. . . Temperature sensing unit

40, 40a. . . External power source

50. . . Data communication control unit

51. . . First power management port埠

511, 511a. . . Third serial data line

512, 512a. . . Third series of clock lines

51a. . . Second power management port埠

52. . . Micro control unit

521. . . Buffer memory unit

53. . . First data output埠

54. . . Second data output埠

FIG. 1 is a circuit block diagram showing an embodiment of an architecture of a power supply data communication multi-board of the power supply of the present invention.

10. . . First motherboard

11. . . First serial data line

12. . . First series of clock lines

20. . . Second motherboard

twenty one. . . Second serial data line

twenty two. . . Second series of clock lines

30. . . First power supply unit

30a. . . Second power supply unit

301, 301a. . . Operating electricity

31, 31a. . . Rectifier filter unit

32, 32a. . . Power factor correction unit

33, 33a. . . transformer

34, 34a. . . Pulse width control unit

35, 35a. . . Switching element

36, 36a. . . Rectifier output unit

37. . . First power management unit

37a. . . Second power management unit

38, 38a. . . Cooling fan

39, 39a. . . Temperature sensing unit

40, 40a. . . External power source

50. . . Data communication control unit

51. . . First power management port埠

511, 511a. . . Third serial data line

512, 512a. . . Third series of clock lines

51a. . . Second power management port埠

52. . . Micro control unit

521. . . Buffer memory unit

53. . . First data output埠

54. . . Second data output埠

Claims (12)

A power supply power data communication multi-board architecture is provided in an electronic device, including:
The at least one power supply unit provides an operating power of the electronic device, and includes a power management unit that generates at least one operating parameter according to an operating state of the power supply unit;
a data communication control unit, comprising: at least one power management connection port for obtaining the working parameter of the power supply unit, a buffer memory unit for storing the working parameter, and electrically connecting the buffer memory unit to output the working parameter respectively a first data output port and a second data output port; and a first motherboard and a second motherboard are electrically connected to the first data output port and the second data output port respectively for reading and storing The operating parameter in the buffer memory unit. The architecture of the power supply power data communication multi-board according to claim 1, wherein the first motherboard includes a first serial of the first data output port connected to the data communication control unit. The data line and a first series of clock lines. The architecture of the power supply power data communication multi-master board according to claim 1, wherein the second motherboard includes a second serial data of the second data output port connected to the data communication control unit. A line and a second series of clock lines. The architecture of the power supply power data communication multi-board according to claim 1, wherein the data communication control unit comprises a third serial data line connected to the power management unit and a third serial Clock line. For example, the architecture of the power supply power data communication multi-master board according to the first aspect of the patent application, wherein the working parameter is the voltage value of the operating power. The architecture of the power supply power data communication multi-board according to claim 1, wherein the power management unit is electrically connected to a temperature sensing unit, and the operating parameter is a temperature inside the power supply unit. The architecture of the power supply power data communication multi-board according to the first aspect of the invention, wherein the power management unit is electrically connected to a cooling fan, and the operating parameter is the rotation speed of the cooling fan. The power supply unit includes a rectifying and filtering unit connected to an external power source, a power factor correcting unit connected to the rectifying and filtering unit, and the power supply unit of the power supply unit, wherein the power supply unit comprises: A transformer, a pulse width control unit, a switching element, and a rectifying output unit. The architecture of the power supply power data communication multi-master board according to claim 1, wherein the power supply unit is electrically connected to an external power source to convert and output the operating power for driving the electronic device. The architecture of the power supply power data communication multi-board according to claim 1, wherein the data communication control unit comprises a micro control unit electrically connected to the power management port. The architecture of the power supply power data communication multi-board according to claim 1, comprising a first power supply unit and a second power supply unit, the first power supply unit having a first power supply according to the first power supply unit And generating, by the working state of the unit, a first power management unit corresponding to the at least one first operating parameter, where the second power supply unit includes a second corresponding to the at least one second operating parameter according to the working state of the second power supply unit Power management unit. The architecture of the power supply power data communication multi-master board according to claim 11, wherein the data communication control unit comprises a first power management connection port connected to the first power management unit, and a connection to the The second power management port of the second power management unit.