TW201351661A - Thin film transistor structure and array substrate using the same - Google Patents

Abstract

A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protect layer contacting the first active layer, and a second protect layer contacting the second active layer. The oxygen contents of the first and the second protect layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors.

Description

Thin film transistor structure and array substrate thereof

The present invention relates to the structure of a semiconductor device, and more particularly to the structure of a thin film transistor.

When the active layer of the thin film transistor is composed of a metal oxide semiconductor material, the positive bias stress (PBS) and the negative bias stress (NBS) of the active layer are resistant to metal. Oxygen vacancies in oxide semiconductor materials are related. When the metal oxide semiconductor material has more oxygen vacancies, the thin film transistor is better resistant to PBS, but less resistant to NBS. When the metal oxide semiconductor material has less oxygen vacancies, the thin film transistor is better tolerant to NBS, but less resistant to PBS.

Some thin film transistors require better PBS tolerance due to the different use of thin film transistors for different purposes in displays, and some thin film transistors require better NBS tolerance. For example, in an organic light emitting diode display, each pixel requires two thin film transistors, one being a switching transistor and one being a driving transistor. The switching transistor has a longer turn-off time and therefore requires better NBS tolerance. While the drive transistor is turned on for a longer period of time, better PBS tolerance is required. Therefore, how to meet the needs of different thin film transistors at the same time is a problem to be solved.

Therefore, one aspect of the present invention is to provide a thin film transistor junction. The structure can adjust the tolerance of its NBS and PBS.

The thin film transistor structure described above includes a first transistor, a second transistor, a first protective layer and a second protective layer. The first transistor includes a first gate, a gate dielectric layer, a first active layer, a first source, and a first drain. The first gate, the gate dielectric layer and the first active layer are sequentially stacked on the substrate. The first source and the first drain are respectively located at two sides of the first gate and connected to the first active layer. The second transistor includes a second gate, a gate dielectric layer, a second active layer, a second source, and a second drain. The second gate, the gate dielectric layer and the second active layer are sequentially stacked on the substrate. The second source and the second drain are respectively located on two sides of the second gate and connected to the second active layer. The material of the first active layer and the second active layer is a metal oxide semiconductor. The thin film transistor structure further includes a first protective layer and a second protective layer, respectively located on the first active layer and the second active layer. The materials of the first protective layer and the second protective layer are yttrium oxide SiO _x and yttrium oxide SiO _y , respectively, and x>y.

According to an embodiment of the invention, the first protective layer has a refractive index of 1.40 to 1.47.

According to another embodiment of the present invention, the second protective layer has a refractive index of 1.47 - 1.50.

According to still another embodiment of the present invention, the first protective layer is formed by a chemical vapor deposition method, and a flow ratio of the reaction gas of nitrous oxide (N ₂ O) to germanium methane (SiH ₄ ) is greater than 120, and The temperature of the reaction chamber is greater than 150 °C.

According to still another embodiment of the present invention, the second protective layer is formed by a chemical vapor deposition method, and a flow ratio of the reaction gas of nitrous oxide (N ₂ O) to methane (SiH ₄ ) is less than or equal to 120, and the temperature of the reaction chamber is less than or equal to 150 °C.

According to still another embodiment of the present invention, the first source and the first drain are located between the first active layer and the first protective layer.

According to still another embodiment of the present invention, the first source and the first drain are located between the gate dielectric layer and the first active layer.

According to still another embodiment of the present invention, the second source and the second drain are located between the gate dielectric layer and the second active layer.

According to still another embodiment of the present invention, the first source and the first drain are located between the first protective layer and the second protective layer, and the first protective layer has a first opening and a second opening to expose a portion of the first The active layer enables the first source and the first drain to be respectively connected to the first active layer.

Another aspect of the present invention is to provide an array substrate comprising a substrate and the above-described thin film transistor structure on the substrate.

According to the embodiment of the present invention, the amount of oxygen vacancies of the first active layer or the second active layer in the first protective layer and the second protective layer is affected to affect the number of oxygen vacancies in the first active layer or the second active layer. Different electrical characteristics requirements of the first transistor and the second transistor.

The Summary of the Invention is intended to provide a simplified summary of the present disclosure in order to provide a basic understanding of the disclosure. This Summary is not an extensive overview of the disclosure, and is not intended to be an The basic spirit and other objects of the present invention, as well as the technical means and implementations of the present invention, will be readily apparent to those skilled in the art of the invention.

According to the above, a structure of a metal oxide semiconductor crystal is provided, To meet the needs of NBS and PBS tolerance of different transistors. In the following description, an exemplary structure of the above metal oxide semiconductor crystal and an exemplary manufacturing method thereof will be described. In order to facilitate an understanding of the described embodiments, a number of technical details are provided below. Of course, not all embodiments require these technical details. At the same time, some well-known structures or elements are only shown in the drawings in a schematic manner to appropriately simplify the contents of the drawings.

In general, when the oxygen vacancy of the metal oxide semiconductor material is increased, the free carrier concentration of the metal oxide semiconductor can be increased, so that the resistance of the metal oxide semiconductor can be lowered and the conductivity can be improved. Moreover, the oxygen content of the metal oxide semiconductor is very susceptible to subsequent processing conditions, so that the oxygen content of the film-formed metal oxide semiconductor layer can be changed by controlling the process conditions of the subsequent thin film material. Some embodiments will be disclosed below to illustrate how to change the oxygen content of a film-formed metal oxide semiconductor layer by controlling subsequent process conditions, thereby changing the tolerance of its PBS and NBS.

Embodiment 1

Please refer to FIG. 1 , which is a cross-sectional structural diagram of a thin film transistor structure according to an embodiment of the invention. In FIG. 1, the first transistor 100a and the second transistor 100b may be disposed on the substrate 110 to form a thin film transistor array substrate. The first transistor 100a belongs to the bottom gate type thin film transistor, and includes a first gate 120a, a gate dielectric layer 130, a first active layer 140a, a first source 152 and a first drain 154. The first gate 120a is located on the substrate 110, and the gate dielectric layer 130 and the first active layer 140a are successively stacked on the first gate 120a. Then, at first The first source 152 and the first drain 154 are formed on both sides of the active layer 140a, that is, the first source 152 and the first drain 154 are located between the first active layer 140a and the first protective layer 160, and then sequentially formed. The first protective layer 160 and the second protective layer 170 are over the first transistor 100a.

The first active layer 140a is composed of a metal oxide semiconductor material, and may be, for example, indium gallium zinc oxide (IGZO), indium gallium oxide (IGO) or indium zinc oxide (IZO), or zinc indium tin oxide (ZITO). When the first transistor 100a is a switching transistor, since the first transistor 100a requires better NBS tolerance, the first active layer 140a requires less oxygen vacancies, that is, more oxygen. Therefore, in this embodiment, the first protective layer 160 directly covering the first active layer 140a is cerium oxide (SiO _x ) having a relatively high oxygen content, and the value of x in the chemical formula ranges from 1.8 to 2.0. The measured refractive index ranges from 1.40 to 1.47.

The method for forming the first protective layer 160 may be, for example, a chemical vapor deposition method, and the flow ratio of the reaction gas nitrous oxide (N ₂ O) to the methane (SiH ₄ ) needs to be greater than 120, and the temperature of the reaction chamber is required. More than 150 ° C. Since the flow rate of the oxygen-containing gas nitrous oxide (N ₂ O) is large during the deposition of the first protective layer 160, the oxygen vacancy of the metal oxide semiconductor material of the first protective layer 160 can be supplemented with oxygen. The atom, while reducing its oxygen vacancy, makes the NBS resistance of the first transistor 100a better.

The second transistor 100b in FIG. 1 also belongs to the bottom gate type thin film transistor, and includes a second gate 120b, a gate dielectric layer 130, a second active layer 140b, a second source 156 and a drain 158. . The second gate 120b is located on the substrate 110, and the gate dielectric layer 130 and the second active layer 140b are successively stacked on the second gate 120b. Then, a second source 156 and a drain 158 are formed on both sides of the second active layer 140b, and then the second protective layer 170 is formed. Above the second transistor 100b.

The second active layer 140b is also composed of a metal oxide semiconductor material and can be formed simultaneously with the first active layer 140a. Therefore, the material of the second active layer 140b may be, for example, indium gallium zinc oxide (IGZO), indium gallium oxide (IGO) or indium zinc oxide (IZO), or zinc indium tin oxide (ZITO). When the second transistor 100b is a driving transistor, since the second transistor 100b requires better PBS tolerance, the second active layer 140b requires more oxygen vacancies, that is, less oxygen. Therefore, in this embodiment, the second protective layer 170 directly covering the second active layer 140b is cerium oxide (SiO _y ) having a small amount of oxygen and a large amount of hydrogen, and the y value of the chemical formula is The range is from 1.4 to 1.8 and the measured refractive index ranges from 1.47 to 1.50. In the second protective layer 170, hydrogen is mostly present in the form of Si-H or Si-OH.

The forming method of the second protective layer 170 may be, for example, a chemical vapor deposition method, wherein a flow rate ratio of the reaction gas nitrous oxide (N ₂ O) to hydrazine methane (SiH ₄ ) is less than or equal to 120, and the temperature of the reaction chamber is less than Or equal to 150 ° C. Since the flow rate of the hydrogen-containing gas germanium methane (SiH ₄ ) is large during the deposition of the second protective layer 170, the metal oxide semiconductor material of the second active layer 140b can be partially reduced, and the number of oxygen vacancies is increased. The PBS of the second transistor 100b is better tolerated.

In the above embodiment, the first protective layer 160 is more oxidized cerium oxide than the second protective layer 170, and may directly contact the first active layer 140a of the first transistor 100a to reduce the first active layer. 140a oxygen vacancies. The second protective layer 170 is a cerium oxide having less oxygen content and more hydrogen content than the first protective layer 160, and can directly contact the second active layer 140b of the second transistor 100b to increase the second active layer. 140b oxygen vacancies. According to another embodiment, the first transistor 100a and the second transistor 100b can also be interchanged, That is, the first transistor 100a is a driving transistor, and the second transistor 100b is a switching transistor, the materials of the first protective layer 160 and the second protective layer 170 also need to be interchanged to satisfy the first transistor 100a and the second transistor. The crystal 100b is each in need of electrical characteristics.

Embodiment 2

Please refer to FIG. 2 , which is a cross-sectional structural diagram of a thin film transistor structure according to another embodiment of the present invention. In the first embodiment, the active layer is formed first, and the source and the drain are formed. The difference between the second embodiment and the first embodiment is that the source and the drain are formed first, and then the active layer is formed. The other parts of the second embodiment are very similar to the first embodiment, and are briefly described as follows.

In FIG. 2, the first transistor 200a includes a first gate 220a, a gate dielectric layer 230, a first source 252, a first drain 254, and a first active layer 240a. The first gate 220a is located on the substrate 210, and the gate dielectric layer 230 is covered on the first gate 220a. Then, a first source 252 and a first drain 254 are formed on both sides of the first gate 220a, and the first active layer 240a, the first protective layer 260 and the second protective layer 270 are sequentially formed. Specifically, the first source 252 and the first drain 254 are located between the gate dielectric layer 230 and the first active layer 240a.

In this embodiment, the first protective layer 260 can still directly contact the first active layer 240a and be formed after the first active layer 240a. Therefore, the first protective layer 260 is a cerium oxide layer containing a large amount of oxygen or a cerium oxide layer containing a large amount of hydrogen, which affects the oxygen vacancy of the metal oxide semiconductor material in the first active layer 240a, and affects the first Electrical characteristics of the transistor 200a. Since the influence of the oxygen content or the hydrogen content of the ruthenium oxide of the first protective layer 160 on the first active layer 140a has been described in detail in the first embodiment, it is no longer here. Describe it.

The second transistor 200b of FIG. 2 includes a second gate 220b, a gate dielectric layer 230, a second source 256, a second drain 258, and a second active layer 240b. The second gate 220b is located on the substrate 210, and the gate dielectric layer 230 is covered on the second gate 220b. Then, a second source 256 and a second drain 258 are formed on both sides of the second gate 220b, and the second active layer 240b and the second protective layer 270 are sequentially formed. Specifically, the second source 256 and the second drain 258 are located between the gate dielectric layer 230 and the second active layer 240b.

In this embodiment, since the second protective layer 270 can directly contact the second active layer 240b, the second protective layer 270 is a cerium oxide layer containing a large amount of oxygen or a cerium oxide layer containing a large amount of hydrogen, which may affect The oxygen vacancies of the metal oxide semiconductor in the second active layer 240b affect the electrical characteristics of the second transistor 200b. Since the influence of the oxygen content or the hydrogen content of the ruthenium oxide of the second protective layer 170 on the second active layer 140b has been described in detail in the first embodiment, it will not be described herein.

Embodiment 3

Please refer to FIG. 3 , which is a cross-sectional structural diagram of a thin film transistor structure according to still another embodiment of the present invention. In the first embodiment, the source and the drain are formed first, and then the first protective layer is formed. In the third embodiment, the first protective layer is formed first, and the source and the drain are formed again. The other parts of the third embodiment are very similar to the first embodiment, and are briefly described as follows.

In FIG. 3, the first transistor 300a includes a first gate 320a, a gate dielectric layer 330, a first active layer 340a, a first source 352, and a first drain 354. The first gate 320a is located on the substrate 310, and the gate dielectric layer 330, the first active layer 340a and the first protective layer 360 are sequentially stacked on the first gate. On 320a. Then, a first opening 362 and a second opening 364 are formed in the first protective layer 360 to expose a portion of the first active layer 340a, so that the first source 352 and the first drain 354 formed on the first protective layer 360 are subsequently formed. The first active layer 340a can be contacted by the first opening 362 and the second opening 364, respectively.

In this embodiment, since the first protective layer 360 is still directly in contact with the first active layer 340a and formed after the first active layer 340a. Therefore, the first protective layer 360 is a cerium oxide layer containing a large amount of oxygen or a cerium oxide layer containing a large amount of hydrogen, which affects the oxygen vacancy of the metal oxide semiconductor material in the first active layer 340a, and affects the first Electrical characteristics of the transistor 300a. Since the influence of the oxygen content or the hydrogen content of the ruthenium oxide of the first protective layer 160 on the first active layer 140a has been described in detail in the first embodiment, it will not be described herein.

The second transistor 300b in FIG. 3 includes a second gate 320b, a gate dielectric layer 330, a second active layer 340b, a second source 356, and a second drain 358. The second gate 320b is located on the substrate 310, and the gate dielectric layer 330 and the second active layer 340b are successively stacked on the second gate 320b. Then, a second source 356 and a second drain 358 are formed on both sides of the second active layer 340b, and a second protective layer 370 is formed on the second transistor 300b. Specifically, the first source 352 and the first drain 354 are located between the first protective layer 360 and the second protective layer 370, and the second source 356 and the second drain 358 are located at the second active layer 340b and Between the two protective layers 370.

In this embodiment, since the second protective layer 370 can directly contact the second active layer 340b, the second protective layer 370 is a cerium oxide layer containing a large amount of oxygen or a cerium oxide layer containing a large amount of hydrogen, which may affect The oxygen deficiency of the metal oxide semiconductor material in the second active layer 340b affects the second transistor Electrical characteristics of the 300b. Since the influence of the oxygen content or the hydrogen content of the ruthenium oxide of the second protective layer 170 on the second active layer 140b has been described in detail in the first embodiment, it will not be described herein.

According to the embodiment of the present invention, the amount of oxygen vacancies of the first active layer or the second active layer in contact with the first protective layer and the second protective layer is affected to meet the number of oxygen vacancies in contact with the first active layer or the second active layer. The different electrical characteristics of a transistor and a second transistor.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.

100a, 200a, 300a‧‧‧ first transistor

100b, 200b, 300b‧‧‧second transistor

110, 210, 310‧‧‧ substrates

120a, 220a, 320a‧‧‧ first gate

120b, 220b, 320b‧‧‧ second gate

130, 230, 330‧‧‧ gate dielectric layer

140a, 240a, 340a‧‧‧ first active layer

140b, 240b, 340b‧‧‧ second active layer

152, 252, 352‧‧‧ first source

154, 254, 354‧‧‧ first bungee

156, 256, 356‧‧‧ second source

158, 258, 358‧‧‧ second bungee

160, 260, 360‧‧‧ first protective layer

170, 270, 370‧‧‧ second protective layer

362‧‧‧ first opening

364‧‧‧second opening

The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Schematic.

2 is a schematic cross-sectional view showing a structure of a thin film transistor according to another embodiment of the present invention.

3 is a cross-sectional structural view showing a thin film transistor structure according to still another embodiment of the present invention.

100a‧‧‧First transistor

100b‧‧‧second transistor

110‧‧‧Substrate

120a‧‧‧first gate

120b‧‧‧second gate

130‧‧‧gate dielectric layer

140a‧‧‧First active layer

140b‧‧‧Second active layer

152‧‧‧first source

154‧‧‧First bungee

156‧‧‧second source

158‧‧‧second bungee

160‧‧‧First protective layer

170‧‧‧Second protective layer

Claims (12)

A thin film transistor structure comprising: a first gate and a second gate on a substrate; a gate dielectric layer covering the first gate and the second gate; a first active layer And a second active layer, respectively located on the gate dielectric layer on the first gate and the second gate, the material of the first active layer and the second active layer is a metal oxide semiconductor; a source and a first drain are respectively located on opposite sides of the first gate and connected to the first active layer; a second source and a second drain are respectively located on opposite sides of the second gate And connected to the second active layer, wherein the first gate, the gate dielectric layer, the first active layer, the first source, and the first drain form a first transistor, and the second The gate, the gate dielectric layer, the second active layer, the second source and the second drain form a second transistor; and a first protective layer and a second protective layer are respectively located at the first an active layer on the second active layer, wherein the first protective layer and the second protective layer material are silicon oxide SiO _x Silicon oxide SiO _y, and x> y. The thin film transistor structure of claim 1, wherein the first protective layer has a refractive index of about 1.40 to 1.47. The thin film transistor structure of claim 1, wherein the second protective layer has a refractive index of about 1.47 - 1.50. The thin film transistor structure according to claim 1, wherein the first protective layer is formed by a chemical vapor deposition method, and a flow ratio of a reaction gas of nitrous oxide (N ₂ O) to methane (SiH ₄ ) is obtained. Greater than 120, and the temperature of the reaction chamber is greater than 150 °C. The thin film transistor structure according to claim 1, wherein the second protective layer is formed by a chemical vapor deposition method, and a flow ratio of a reaction gas of nitrous oxide (N ₂ O) to methane (SiH ₄ ) is obtained. Less than or equal to 120, and the temperature of the reaction chamber is less than or equal to 150 °C. The thin film transistor structure of claim 1, wherein the first source and the first drain are located between the first active layer and the first protective layer. The thin film transistor structure of claim 1, wherein the first source and the first drain are located between the gate dielectric layer and the first active layer. The thin film transistor structure of claim 7, wherein the second source and the second drain are located between the gate dielectric layer and the second active layer. The thin film transistor structure of claim 1, wherein the first source and the first drain are located between the first protective layer and the second protective layer, and the first protective layer has a first opening And a second opening to expose a portion of the first active layer, such that the first source and the first drain are respectively connectable to the first active layer. The thin film transistor structure of claim 1, wherein the value of x The range is approximately 1.8-2.0 and the y value ranges from approximately 1.4-1.8. An array substrate comprising: a substrate; and a thin film transistor structure comprising: a first gate and a second gate on the substrate; a gate dielectric layer covering the first gate and the a first active layer and a second active layer respectively on the gate dielectric layer on the first gate and the second gate, the first active layer and the second active layer The material is a metal oxide semiconductor; a first source and a first drain are respectively located on opposite sides of the first gate and connected to the first active layer; a second source and a second drain, Separatingly located on the two sides of the second gate and connected to the second active layer, wherein the first gate, the gate dielectric layer, the first active layer, the first source, and the first drain a first transistor, the second gate, the gate dielectric layer, the second active layer, the second source and the second drain form a second transistor; and a first protective layer and a second protective layer is respectively disposed on the first active layer and the second active layer, wherein the first protective layer and the first Material of the protective layer are silicon oxide and silicon oxide SiO _x SiO _y, and x> y. The thin film transistor of claim 11, wherein the value of x ranges from about 1.8 to 2.0 and the value of y ranges from about 1.4 to about 1.8.