TW201347229A - Semiconductor light emitting device and a method of manufacturing the same - Google Patents

Abstract

The present invention is directed to a semiconductor light emitting device and a method of manufacturing the device. A substrate has a first surface. A patterned layer having a second surface is formed on the substrate, and an angle is formed between the first surface and the second surface. A first doped layer, a light emitting layer and a second doped layer are formed in sequence above the substrate and the patterned layer and parallel the first surface.

Description

Semiconductor light emitting device and method of manufacturing same

The present invention relates to a semiconductor light emitting device, and more particularly to a light emitting diode and a method of fabricating the same.

Forming a gallium nitride epitaxial layer on a sapphire substrate is a common process technology for manufacturing a light emitting diode (LED). However, the lattice constant between the gallium nitride epitaxial layer and the sapphire substrate is greatly different from the coefficient of thermal expansion (CTE), and therefore, a high-density line difference discharge defect is generated in the gallium nitride epitaxial layer ( Threading dislocation), which has a density of about 10 ⁸ ~ 10 ¹⁰ cm ^-3 . Such high-density line-difference defects greatly limit the luminous efficiency of the light-emitting diode.

The active layer and other layers in the light-emitting diode structure absorb light, thus affecting the luminous efficiency of the light-emitting diode. In addition, the semiconductor material used in the light-emitting diode has a high refractive index, which causes the light generated by the light-emitting diode to be trapped. As shown in the first figure, when the light emitted from the active region reaches the interface between the semiconductor and the surrounding air, if the incident angle of the light is larger than the critical angle of the escape cone (such as the oblique region shown) _{When c} , it will produce total internal reflection. For semiconductors with high refractive index, the critical angle is very small. For example, when the refractive index is 3.3, the total internal reflection angle is only 17°, so most of the light emitted from the active region will be confined to the inside of the semiconductor, and these confined lights may be thicker. The substrate is absorbed. In addition, the electrons and holes in the substrate may also be non-radiatively non-radiative due to poor substrate quality or low efficiency, thereby reducing the luminous efficiency of the light-emitting diode. Therefore, how to effectively extract the light source from the active region of the semiconductor and increase the light extraction efficiency is an important goal of the manufacture of the light-emitting diode.

One of the common methods for increasing the light extraction efficiency of a light-emitting diode is to perform etching patterning of a sapphire substrate before epitaxy to form a patterned sapphire substrate (PSS). By the change of the surface geometry of the substrate, the scattering mechanism of the light-emitting diode can be changed, and the scattered light is guided into the interior of the light-emitting diode, and then emitted from the escape pyramid, thereby increasing the light extraction efficiency.

Various etching techniques are commonly used to process sapphire substrates to improve internal quantum efficiency (IQE) and light extraction efficiency. However, since the sapphire substrate is very hard, etching causes damage to the surface of the sapphire, so that the line difference gradually extends from the substrate to the top end of the gallium nitride epitaxial layer, thereby affecting the epitaxial quality of the light-emitting diode. Further, when the epitaxial layer is grown on the patterned sapphire substrate, it is easy to cause the epitaxial effect to be lowered when the inclined surface and the epitaxial rate on the plane are different on the inclined surface of the patterned sapphire substrate.

Therefore, there is a need to propose a novel semiconductor light-emitting device and a method of fabricating the same, which makes the process easier and more capable of controlling the growth of epitaxial growth.

In view of the above, embodiments of the present invention provide a semiconductor light emitting device and a method of fabricating the same, which are used to reduce line difference defects, increase escape angle of light, and improve internal quantum efficiency (IQE) or/and light extraction efficiency.

According to an embodiment of the invention, a semiconductor light emitting device includes a substrate, a patterned layer, a first doped layer, a light emitting layer, and a second doped layer. The substrate has a first surface. A patterned layer is formed on the substrate having a second surface that forms an angle with the first surface. The first doped layer is formed on the substrate and the patterned layer, the luminescent layer is formed on the first doped layer, the second doped layer is formed on the luminescent layer, and the first doped layer, the luminescent layer and the second doping layer The layer extends parallel to the first surface.

2A to 2D are cross-sectional views showing respective process steps of the semiconductor light emitting device 200 of the embodiment of the present invention. The light-emitting device 200 of the present embodiment may be a light-emitting diode (LED), but is not limited thereto.

As shown in FIG. 2A, a substrate 21 is first provided having a first surface 211, such as a top surface. The substrate 21 of the present embodiment may be made of gallium arsenide (GaAs), germanium (Ge) surface, germanium telluride (SiGe), germanium (Si) surface to form tantalum carbide (SiC), and aluminum (Al) surface to form aluminum oxide. (Al ₂ O ₃ ), gallium nitride (GaN), indium nitride (InN), zinc oxide (ZnO), aluminum nitride (AlN), sapphire, glass, quartz or a combination thereof, but is not limited thereto this. The first surface 211 may be C-plane phase or {0001}, M-plane phase or {101-0}, or A-plane phase or {1-1-20 }). The third figure shows a schematic diagram of the C face, the M face, and the A face. Among them, C faces a polar face, while M faces and A faces belong to a non-polar face.

Next, a patterned layer 22 is formed on the substrate 21. The patterned layer 22 of the present embodiment has a second surface 221 that is oblique to the first surface 211 and thus forms an angle with the first surface 211. As illustrated in FIG. 2A, the top surface of the patterned layer 22 may be flat or sharp, as illustrated in FIG. According to one of the features of the present embodiment, the patterned layer 22 has a void 222 that exposes a portion of the surface of the substrate 21. Thereby, the patterned layer 22 is formed into a plurality of (flat or sharp top) cones, which may be pyramids, having a triangular bottom surface, a rectangular bottom surface, and a pentagonal shape (pentagonal). ) a bottom or hexagonal bottom surface. The tapered body of the patterned layer 22 may also be a cone having a flat or sharp top surface, the bottom surface of which is circular. Furthermore, the top surface of the patterned layer 22 may have a recess such that the patterned layer 22 forms a plurality of volcanoes (not shown), such as the shape of a shield volcano or the shape of a caldera volcano.

In one example, the top surface of the substrate 21 is a C-face, and the side surface 221 (second surface) of the patterned layer 22 is an R-plane phase (R-plane phase or {11-02}). Among them, the R face belongs to the semi polar face. Taking the tapered body of the patterned layer 22 as an example, it has a side face of a plurality of R faces, and a bottom face of a C face. For example, a rectangular pyramid having a quadrangular surface, that is, a side having four R faces, and a bottom surface of a C face. In another example, the top surface of the substrate 21 is M-facing, and the side surface 221 (second surface) of the patterned layer 22 is a C-plane. In another example, the top surface of the substrate 21 is A facing, and the side surface 221 (second surface) of the patterned layer 22 is R facing or N facing.

The material of the patterned layer 22 of the present embodiment is different from the material of the substrate 21. The material of the patterned layer 22 may be cerium oxide (SiO ₂ ), tantalum carbide (SiC), tantalum nitride (SiN _x ) or a combination thereof, but is not limited thereto. Generally, the material of the patterned layer 22 and the substrate 21 of the present embodiment is selected such that the subsequent layers can be easily formed on the first surface 211 of the substrate 21, but are not easily formed on the side surface 221 of the patterned layer 22 (second surface). In other words, subsequent levels are easily formed in a polarization face (for example, C face) or a non-polar face (for example, M face or A face), but are not easily formed in the R face.

In the manufacturing process of the patterned layer 22 of the present embodiment, a crystal film is first formed on the substrate 21, for example, by a plasma enhanced chemical vapor deposition (PECVD) method. Next, a portion of the crystalline film is removed by an etching process, thereby forming a patterned layer 22, for example using chemical wet etching or maskless dry etching.

Next, as illustrated in FIG. 2C, the first doping layer 23, the light emitting layer 24, and the second doping layer 25 are sequentially formed on the substrate 21 and the patterned layer 22. Here, the patterned layer 22 (second A) having a flat top surface is exemplified, however, it may be formed on the patterned layer 22 having a sharp top surface as shown in FIG. In detail, the first doped layer 23 is formed on the substrate 21 and the patterned layer 22 and extends parallel to the first surface 211; the luminescent layer 24 is formed on the first doped layer 23 and extends parallel to the first The surface 211; and the second doping layer 25 is formed on the light emitting layer 24 and extends parallel to the first surface 211. As described above, the first doping layer 23, the light emitting layer 24, and the second doping layer 25 are easily formed on the surface of the substrate 21 (for example, the C surface), but are not easily formed on the side of the patterned layer 22 (for example, the R surface) ). In other words, the first doping layer 23, the light emitting layer 24, and the second doping layer 25 are easily grown along the normal vector direction F1 of the surface (the first surface 211) of the substrate 21, and are not easily along the patterned layer 22. The side surface (second surface 221) grows in the normal vector direction F2, thereby enhancing the epitaxial efficiency of the semiconductor light emitting device 200 and its light extraction efficiency. In this embodiment, the materials of the first doping layer 23, the luminescent layer 24, and the second doping layer 25 may use a group III nitride, such as indium (In), gallium (Ga), aluminum (Al), and nitrogen. The composition of (N) is, for example, indium nitride (InN), indium gallium nitride (InGaN), indium aluminum gallium nitride (InAlGaN), aluminum nitride (AlN), or the like.

In an embodiment, the luminescent layer 24 can comprise a single quantum well (SQW) or multiple quantum wells (MQW). In another embodiment, the luminescent layer 24 may comprise a superlattice structure, which is mainly formed by alternately stacking two sub-layers of different materials, for example, alternating between gallium nitride (GaN) and indium gallium nitride (InGaN). Stacked.

As shown in FIG. 2C, the semiconductor light emitting device 200 may further include a first electrode 26 and a second electrode 27 formed on the first doping layer 23 and the second doping layer 25, respectively.

The processes and structures of the semiconductor light emitting device 200 illustrated in the second to second C diagrams show only the main levels, however, other levels may be additionally added depending on the actual application requirements. As illustrated in FIG. 2D, the semiconductor light emitting device 200 may further include a nucleation layer 28 formed on the substrate 21 and the patterned layer 22 and filling the voids 222 of the patterned layer 21. In addition, an undoped layer 29 may be included, formed between the nucleation layer 28 and the first doped layer 23.

The above description is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the invention should be included in the following Within the scope of the patent application.

200. . . Semiconductor light emitting device

twenty one. . . Substrate

211. . . First surface

twenty two. . . Patterned layer

221. . . Second surface

222. . . Void

twenty three. . . First doped layer

twenty four. . . Luminous layer

25. . . Second doped layer

26. . . First electrode

27. . . Second electrode

28. . . Nucleation layer

29. . . Undoped layer

F1. . . Normal vector of the first surface

F2. . . Normal vector of the second surface

The first figure shows that the light emitted by conventional illumination devices is limited to the semiconductor.
2A to 2D are cross-sectional views showing respective process steps of the semiconductor light emitting device of the embodiment of the present invention.
The third figure shows a schematic diagram of the C face, the M face, and the A face.

200. . . Semiconductor light emitting device

twenty one. . . Substrate

211. . . First surface

twenty two. . . Patterned layer

221. . . Second surface

twenty three. . . First doped layer

twenty four. . . Luminous layer

25. . . Second doped layer

26. . . First electrode

27. . . Second electrode

F1. . . Normal vector of the first surface

F2. . . Normal vector of the second surface

Claims (19)

A semiconductor light emitting device comprising:
a substrate having a first surface;
a patterned layer formed on the substrate, the patterned layer having a second surface, the second surface forming an angle with the first surface;
a first doped layer formed on the substrate and the patterned layer and extending parallel to the first surface;
An illuminating layer is formed on the first doped layer and extends parallel to the first surface; and a second doped layer is formed on the luminescent layer and extends parallel to the first surface. The semiconductor light emitting device of claim 1, wherein the first surface is a top surface of the substrate, and the second surface is a side surface of the patterned layer, wherein the second surface is inclined to the first surface . The semiconductor light-emitting device of claim 1, wherein the substrate is made of gallium arsenide (GaAs) or germanium (Ge), and germanium (SiGe) and germanium (Si) are formed on the surface to form tantalum carbide (SiC). ), aluminum (Al ₂ O ₃ ), gallium nitride (GaN), indium nitride (InN), aluminum nitride (AlN), zinc oxide (ZnO), sapphire, glass , quartz or a combination thereof. The semiconductor light emitting device of claim 1, wherein the first surface is a C surface, an M surface, or an A surface. The semiconductor light emitting device of claim 1, wherein the first surface is a C surface, and the second surface is an R surface; or the first surface is an M surface, and the second surface is a C surface. Or the first surface is A facing, and the second surface is R facing or N facing. The semiconductor light emitting device of claim 1, wherein the patterned layer has a void to expose a portion of the surface of the substrate. The semiconductor light-emitting device of claim 1, wherein the patterned layer comprises a plurality of pyramids, a plurality of cones, and/or a plurality of volcanoes. The semiconductor light-emitting device of claim 1, wherein the material of the patterned layer is different from the material of the substrate. The semiconductor light-emitting device of claim 8, wherein the patterned layer is made of SiO ₂ , SiC, SiN _x or a combination thereof. The semiconductor light-emitting device of claim 8, wherein the patterned layer and the material of the substrate are such that the first doped layer is easily formed on the first surface, but is not easily formed on the second surface. The semiconductor light-emitting device of claim 1, wherein the material of the first doped layer, the light-emitting layer and the second doped layer comprises a group III nitride. The semiconductor light-emitting device of claim 1, wherein the light-emitting layer comprises a single quantum well (SQW) or a multiple quantum well (MQW). The semiconductor light-emitting device of claim 1, wherein the light-emitting layer comprises a superlattice structure. The semiconductor light-emitting device of claim 6, further comprising a nucleation layer formed on the substrate and the patterned layer, filling a void of the patterned layer, and the patterned layer and the substrate The material is such that the nucleation layer is easily formed on the first surface, but is not easily formed on the second surface. The semiconductor light emitting device of claim 14, further comprising an undoped layer formed between the nucleation layer and the first doped layer. A method of manufacturing a semiconductor light emitting device, comprising:
Providing a substrate having a first surface;
Forming a patterned layer on the substrate, the patterned layer having a second surface, the second surface forming an angle with the first surface;
Forming a first doped layer on the substrate and the patterned layer, and extending parallel to the first surface;
Forming a light-emitting layer on the first doped layer and extending parallel to the first surface; and forming a second doped layer on the light-emitting layer and extending parallel to the first surface. The method of fabricating a semiconductor light-emitting device according to claim 16, wherein the step of forming the patterned layer comprises:
Forming a crystalline film; and removing a portion of the crystalline film, thereby forming the patterned layer. The method of fabricating a semiconductor light-emitting device according to claim 17, wherein the step of removing a portion of the crystalline film comprises forming a void to expose a portion of the surface of the substrate. The method for fabricating a semiconductor light emitting device according to claim 18, further comprising forming a nucleation layer and an undoped layer on the substrate and the patterned layer, the nucleation layer filling the patterned layer a void, the undoped layer being between the nucleation layer and the first doped layer.