TW201331684A - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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TW201331684A
TW201331684A TW102101564A TW102101564A TW201331684A TW 201331684 A TW201331684 A TW 201331684A TW 102101564 A TW102101564 A TW 102101564A TW 102101564 A TW102101564 A TW 102101564A TW 201331684 A TW201331684 A TW 201331684A
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Taiwan
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wall
pixel
electrode
liquid crystal
display device
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TW102101564A
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Chinese (zh)
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TWI503611B (en
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Takato Hiratsuka
Osamu Itou
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Japan Display East Inc
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134336Matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133377Cells with plural compartments or having plurality of liquid crystal microcells partitioned by walls, e.g. one microcell per pixel
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134381Hybrid switching mode, i.e. for applying an electric field with components parallel and orthogonal to the substrates

Abstract

A liquid crystal display device using a wall electrode facilitates enclosing of liquid crystal and improves transmittance. The liquid crystal display device includes a plurality of pixels arranged in a matrix. Each of the pixels includes large walls, a small wall, a TFT-side electrode, and a wall electrode. The large walls extend in a long-side direction of the pixel at both ends of the pixel. The small wall extends parallel to the large walls between the large walls. The small wall has a height lower than the large walls. The TFT-side electrode is formed on the small wall. The wall electrode is formed on a side surface of the large wall and formed between the large wall and the small wall. The large walls are separated between the pixels in the long-side direction. The small wall which has a height lower than the large walls is arranged between the separated large walls. Additionally, the liquid crystal display device includes a drain line in the long-side direction of the pixel and a gate line in the short-side direction of the pixel. A common electrode is formed via the small wall in an upper layer of the drain line and the gate line.

Description

液晶顯示裝置 Liquid crystal display device

本發明係關於一種壁電極方式之液晶顯示裝置,尤其係指一種使液晶的封入容易,並提升穿透率之液晶顯示裝置。 The present invention relates to a liquid crystal display device of a wall electrode type, and more particularly to a liquid crystal display device which facilitates sealing of liquid crystal and improves transmittance.

液晶顯示裝置由於顯示品質高,且具有薄型輕量、低消耗電力等特徵,因此廣泛被使用於小型攜帶終端至大型電視。 The liquid crystal display device is widely used in small portable terminals to large-sized televisions because of its high display quality, features such as thinness, light weight, and low power consumption.

另一方面,液晶顯示裝置中有視野角特性的問題,為了實現廣視野角,便被提出有一種IPS(In-Plane Switching)方式之液晶顯示裝置。IPS方式係在將液晶分子水平橫躺狀態下,施加與基板平行方向的電場來使液晶分子於水平面內旋轉,藉以控制背光的光量來顯示畫像。 On the other hand, in the liquid crystal display device, there is a problem of viewing angle characteristics, and in order to realize a wide viewing angle, an IPS (In-Plane Switching) liquid crystal display device has been proposed. The IPS method displays an image by applying an electric field in a direction parallel to the substrate to rotate the liquid crystal molecules in a horizontal plane while the liquid crystal molecules are horizontally lying, thereby controlling the amount of light of the backlight.

專利文獻1中,揭露有一種液晶顯示裝置,其具有m×n個陣列狀畫素、於畫素內動作之元件、施加既定電壓波形之驅動機構、以及於畫素內在上下基板間保有一定間距之電極對,且具有藉由於該電極對間施加平行基板面之電場便會控制液晶分子的配向狀態來獲得光線調整之特定構造。(參看摘要) Patent Document 1 discloses a liquid crystal display device having m×n array pixels, an element operating in a pixel, a driving mechanism for applying a predetermined voltage waveform, and a certain pitch between the upper and lower substrates in the pixel. The electrode pair has a specific structure in which the alignment of the liquid crystal molecules is controlled by applying an electric field parallel to the substrate surface between the pair of electrodes to obtain light adjustment. (see summary)

先前技術文獻 Prior technical literature 專利文獻 Patent literature

專利文獻1:日本特開平6-214244號公報 Patent Document 1: Japanese Patent Laid-Open No. Hei 6-214244

為了實現於上下基板間具有電極對,而藉由對該電極對間施加平行基板面之電場來控制液晶分子之配向狀態的液晶顯示裝置,本發明便先行檢討於配置在畫素長邊方向之壁電極下層配置有汲極線,而於畫素短邊方向之畫素端部配置閘極線之液晶顯示裝置。然而,當壁電極於長邊方向之畫素間連接時,由於短邊方向之液晶層會完全地分離,使得液晶變得難以封入,造成液晶面板在量產時的良率降低,而導致成本提升。 In order to realize a liquid crystal display device having an electrode pair between the upper and lower substrates and applying an electric field parallel to the substrate surface to control the alignment state of the liquid crystal molecules, the present invention firstly reviews the arrangement in the longitudinal direction of the pixel. A liquid crystal display device in which a gate line is disposed in a lower layer of the wall electrode and a gate line is disposed at a pixel end portion in the short side direction of the pixel. However, when the wall electrodes are connected between the pixels in the long-side direction, since the liquid crystal layers in the short-side direction are completely separated, the liquid crystal becomes difficult to be sealed, resulting in a decrease in the yield of the liquid crystal panel during mass production, resulting in cost. Upgrade.

又,在畫素短邊方向及長邊方向進行黑白交互顯示之際,於汲極線及閘極線上未配置遮蔽該等電位影響之電極時,則白顯示之畫素會因該等電位影響而使得白穿透率降低,而黑顯示之畫素便會增大黑穿透率。又,在畫素長邊方向之畫素間隔狹窄的情況,當黑白交互顯示時會因鄰接畫素之電位影響,導致黑顯示之畫素增大黑穿透率,而白穿透率卻降低。如此般,便會受到汲極線、閘極線以及鄰接畫素等之畫素周邊電位影響而使得顯示特性劣化。 In addition, when the black-and-white interactive display is performed in the short-side direction and the long-side direction of the pixel, when the electrode that shields the potential is not disposed on the drain line and the gate line, the pixel of the white display may be affected by the potential. The white penetration rate is lowered, and the black display pixel increases the black transmittance. Moreover, in the case where the pixel interval in the direction of the long side of the pixel is narrow, when the black and white interactive display is performed, the pixel of the black display increases the black transmittance and the white penetration rate decreases due to the influence of the potential of the adjacent pixel. . In this way, the display characteristics are deteriorated by the influence of the peripheral potential of the pixels such as the drain line, the gate line, and the adjacent pixels.

又,在多域(multidomain)構造的情況,於畫素端部會混有液晶配向之順扭轉及逆扭轉之區域,而產生區域(domain)。這是起因於畫素端部之白穿透率降低,而導致降低畫素整體之白穿透率。 Further, in the case of a multi-domain structure, a region in which the liquid crystal alignment is twisted and reverse-twisted is mixed at the end of the pixel, and a domain is generated. This is caused by a decrease in the white penetration rate at the end of the pixel, which results in a decrease in the white penetration rate of the pixel as a whole.

本發明之目的在於讓壁電極方式之液晶顯示裝置中,使液晶的封入容易,並提升穿透率。 An object of the present invention is to make a liquid crystal display device of a wall electrode type easy to seal and improve the transmittance.

為了解決上述課題,本發明之液晶顯示裝置係配置有陣列狀複數畫素,各像素具備有於畫素兩端延伸於畫素之長邊方向的大壁、以及於該大壁之間平行於該大壁延伸且較該大壁之高度要低之小壁,該小壁上形成有TFT側電極,於該大壁側面及該大壁與該小壁之間形成有壁電極,其中該大壁係以長邊方向之像素間而被分斷,分斷後之該大壁之間係配置有較該大壁之高度要低的小壁。 In order to solve the above problems, the liquid crystal display device of the present invention is provided with array-shaped plural pixels, each pixel having a large wall extending at both ends of the pixel in the longitudinal direction of the pixel, and parallel to the large wall between the pixels a small wall extending and lower than a height of the large wall, wherein the small wall is formed with a TFT side electrode, and a wall electrode is formed between the large wall side and the large wall and the small wall, wherein the large wall The wall system is divided between the pixels in the longitudinal direction, and a small wall having a height lower than the height of the large wall is disposed between the large walls after the division.

本發明之液晶顯示裝置中,該各畫素可於畫素兩端連續配置有延伸於畫素短邊方向之該小壁。 In the liquid crystal display device of the present invention, the pixels may be continuously disposed at both ends of the pixel with the small wall extending in the short side direction of the pixel.

又,本發明之液晶顯示裝置中,可具有畫素長邊方向的汲極線及短邊方向的閘極線,於該汲極線及閘極線的上層係透過該小壁而形成有共通(common)電極。 Further, in the liquid crystal display device of the present invention, the drain line in the longitudinal direction of the pixel and the gate line in the short-side direction may be provided, and the upper layer of the drain line and the gate line are formed to have commonalities through the small wall. (common) electrode.

又,本發明之液晶顯示裝置中,該共通電極可與畫素短邊方向及長邊方向的鄰接畫素的共通電極連接。 Moreover, in the liquid crystal display device of the present invention, the common electrode can be connected to a common electrode of a neighboring pixel in the short-side direction and the long-side direction of the pixel.

又,本發明之液晶顯示裝置中,該畫素短邊方向的閘極線上可透過層間絕緣膜而形成共通電極。 Further, in the liquid crystal display device of the present invention, the gate electrode in the short-side direction of the pixel can pass through the interlayer insulating film to form a common electrode.

又,本發明之液晶顯示裝置中,與該TFT側電極連接而形成於基板平面方向之儲存電容電極,與由該 壁電極延伸於基板平面方向之平面電極可透過層間絕緣膜而對向,來形成電容元件。 Further, in the liquid crystal display device of the present invention, the storage capacitor electrode formed in the planar direction of the substrate is connected to the TFT side electrode, and The planar electrode whose wall electrode extends in the planar direction of the substrate can be opposed to the interlayer insulating film to form a capacitor element.

本發明之液晶顯示裝置,其係配置有陣列狀複數畫素,各像素具備有於畫素兩端延伸於畫素之長邊方向的大壁、以及於該大壁之間平行於該大壁延伸且較該大壁之高度要低之小壁,該小壁上形成有TFT側電極來作為共通電極,於該大壁側面及該大壁與該小壁之間形成有壁電極來作為源極電極;其中該小壁的端部係形成有朝向該大壁之彎曲部,該彎曲部上係形成有該共通電極。 In the liquid crystal display device of the present invention, an array of a plurality of pixels is disposed, each of the pixels having a large wall extending at both ends of the pixel in a longitudinal direction of the pixel, and parallel to the large wall between the large walls a small wall extending lower than the height of the large wall, the TFT side electrode is formed as a common electrode on the small wall, and a wall electrode is formed as a source between the large wall side surface and the large wall and the small wall a pole electrode; wherein the end of the small wall is formed with a curved portion facing the large wall, and the common electrode is formed on the curved portion.

本發明之液晶顯示裝置中,該彎曲部前端可形成為銳角或圓形狀。 In the liquid crystal display device of the present invention, the front end of the bent portion may be formed in an acute angle or a circular shape.

又,本發明之液晶顯示裝置中,該大壁與該小壁之間隔可為k,該彎曲部之長度L則為k/4<L<3k/4。 Further, in the liquid crystal display device of the present invention, the distance between the large wall and the small wall may be k, and the length L of the curved portion is k/4 < L < 3 k / 4.

又,本發明之液晶顯示裝置中,與該TFT側電極連接而形成於基板平面方向之儲存電容電極,與由該壁電極延伸於基板平面方向之平面電極可透過層間絕緣膜而對向,來形成電容元件。 Further, in the liquid crystal display device of the present invention, the storage capacitor electrode formed in the planar direction of the substrate connected to the TFT side electrode is opposed to the planar electrode extending in the planar direction of the substrate by the wall electrode, and is opposed to the interlayer insulating film. A capacitive element is formed.

又,本發明之液晶顯示裝置中,該畫素短邊方向的閘極線上可透過層間絕緣膜而形成共通電極。 Further, in the liquid crystal display device of the present invention, the gate electrode in the short-side direction of the pixel can pass through the interlayer insulating film to form a common electrode.

依據本發明,則在液晶顯示裝置製造時,便可穩定地封入液晶,並可因良率提升而達成成本的降低。又,可以遮蔽汲極線、閘極線以及鄰接畫素之電位影響,可達成抑制黑穿透率的增大及抑制白穿透率的降 低。再者,可抑制於畫素端部之區域(domain),並可降低變暗的區域,可於畫素整體獲得高穿透率。 According to the present invention, when the liquid crystal display device is manufactured, the liquid crystal can be stably sealed, and the cost can be reduced due to the improvement in yield. Moreover, it is possible to shield the influence of the potential of the drain line, the gate line, and the adjacent pixels, thereby achieving an increase in suppression of black transmittance and a decrease in white penetration rate. low. Furthermore, it is possible to suppress the domain of the end of the pixel, and to reduce the darkened area, and to obtain high transmittance in the entire pixel.

以下,便就本發明實施形態基於圖式來加以說明。另外,用以說明實施形態之所有圖式中,對於具有相同功能之組件則賦予相同符號,並省略其重複之說明。 Hereinafter, embodiments of the present invention will be described based on the drawings. In the drawings, the same reference numerals will be given to components having the same functions, and the description thereof will be omitted.

(實施例1) (Example 1)

首先,圖14係顯示本發明所適用之液晶顯示裝置之等效電路一例之圖。於基板102上係配設有陣列狀的掃描線104及訊號線103,於掃描線104及訊號線103之各交點處係透過TFT(Thin Film Transistor)元件110而連接有畫素106。於掃描線104及訊號線103分別連接有掃描驅動電路108及訊號驅動電路107,而對掃描線104及訊號線103施加電壓。基板102上係配設有平行於訊號線103之共通線105,而構成為能於所有畫素施加來自共通電壓產生電路109之共通電壓。基板102與基板101之間係封入有液晶組成物,而整體便構成液晶顯示裝置。 First, Fig. 14 is a view showing an example of an equivalent circuit of a liquid crystal display device to which the present invention is applied. An array of scanning lines 104 and signal lines 103 are disposed on the substrate 102, and pixels 103 are connected to the intersections of the scanning lines 104 and the signal lines 103 through the TFT (Thin Film Transistor) element 110. A scan driving circuit 108 and a signal driving circuit 107 are connected to the scanning line 104 and the signal line 103, respectively, and a voltage is applied to the scanning line 104 and the signal line 103. A common line 105 parallel to the signal line 103 is disposed on the substrate 102, and is configured to apply a common voltage from the common voltage generating circuit 109 to all pixels. A liquid crystal composition is sealed between the substrate 102 and the substrate 101, and the liquid crystal display device is formed as a whole.

圖1係顯示本發明實施例1相關之1畫素的平面構造,圖2係顯示圖1之6畫素量之平面構造。又,圖3、圖4(圖5)、圖6(圖7),圖8則分別為圖1之A-A’面、B-B’面、C-C’面、D-D’面所裁切之剖面結構。如 圖1所示,本發明畫素之平面構造具有畫素中央部(A-A’面)與端部不同的剖面構造。另外,以下所記載之平面構造之圖面係由液晶層所見到電極相關之結構。 1 is a plan view showing a planar structure of a pixel associated with Embodiment 1 of the present invention, and FIG. 2 is a plan view showing a plane of a pixel of FIG. 3, FIG. 4 (FIG. 5), FIG. 6 (FIG. 7), and FIG. 8 are the A-A' plane, the B-B' plane, the C-C' plane, and the D-D' plane of FIG. 1, respectively. The cut structure is cut. Such as As shown in Fig. 1, the planar structure of the pixel of the present invention has a cross-sectional structure different from the end portion of the central portion (A-A' plane) of the pixel. Further, the plane of the planar structure described below is a structure related to the electrode seen in the liquid crystal layer.

首先,就畫素中央部之A-A’面進行說明。如圖3所示,A-A’面的剖面構造係具備配置於畫素兩端之大壁構造(以下稱做大壁14),並形成有以電極覆蓋該大壁14側面之壁狀電極211,以及由壁狀電極連接於基板之面而延伸於平面方向的平面電極212。此壁狀電極與平面電極係電性連接,而壁狀電極211及平面電極212並稱為壁電極21。畫素境界之大壁構造之間設有高度較大壁構造要低之低壁結構(以下稱為小壁15)。並覆蓋該小壁15般地形成共通電極(以下稱為TFT側電極16),同時由小壁15與基板連接的面朝平面方向形成有共通電極(以下稱為儲存電容電極17)。上述壁電極21的平面電極212係透過層間絕緣膜20而形成於儲存電容電極17之上層。又,平面電極212與液晶層24之間係配置有絕緣膜22及配向膜23。又,畫素境界的壁電極21之間係配設有一對電極(TFT側電極16及CF側電極26(以下並稱為擬似壁電極))。本實施例中,雖係將畫素兩端的壁電極21作為源極電極,而將擬似壁電極作為共通電極,但亦可將畫素兩端之壁電極作為共通電極,而將擬似壁電極作為源極電極。另外,小壁係至少具有1μm以上高度之壁,於 一畫素內,係配置有大壁14及小壁15兩種類高度的壁結構。 First, the description will be made on the A-A' side of the central part of the pixel. As shown in FIG. 3, the cross-sectional structure of the A-A' plane has a large-wall structure (hereinafter referred to as a large wall 14) disposed at both ends of the pixel, and a wall electrode having an electrode covering the side surface of the large wall 14 is formed. 211, and a planar electrode 212 extending in a planar direction by a wall electrode connected to a surface of the substrate. The wall electrode is electrically connected to the planar electrode, and the wall electrode 211 and the planar electrode 212 are collectively referred to as the wall electrode 21. Between the large-wall structures of the realm of the picture, there is a low-wall structure (hereinafter referred to as a small wall 15) having a relatively high wall structure. A common electrode (hereinafter referred to as a TFT side electrode 16) is formed to cover the small wall 15, and a common electrode (hereinafter referred to as a storage capacitor electrode 17) is formed in a plane direction by a surface of the small wall 15 connected to the substrate. The planar electrode 212 of the wall electrode 21 is formed on the upper layer of the storage capacitor electrode 17 through the interlayer insulating film 20. Further, an insulating film 22 and an alignment film 23 are disposed between the planar electrode 212 and the liquid crystal layer 24. Further, a pair of electrodes (the TFT side electrode 16 and the CF side electrode 26 (hereinafter referred to as a pseudo wall electrode)) are disposed between the wall electrodes 21 of the pixel boundary. In this embodiment, although the wall electrode 21 at both ends of the pixel is used as the source electrode and the pseudo-wall electrode is used as the common electrode, the wall electrode at both ends of the pixel may be used as the common electrode, and the pseudo-wall electrode may be used as the common electrode. Source electrode. In addition, the small wall system has a wall having a height of at least 1 μm, In one pixel, there are two types of wall structures of a large wall 14 and a small wall 15 .

接著,就圖4之B-B’剖面加以說明。如圖4所示,相對於畫素中央部之A-A’面係於汲極線13上層形成有大壁14,B-B’面則是於汲極線13及閘極線11上層透過小壁18而配置有共通電極19。將畫素長邊方向之畫素間作為小壁18的理由在於因為液晶層不僅畫素的長邊方向,於短邊方向之鄰接畫素亦會連接,而可容易將液晶封入之故。又,B-B’面之汲極線上層非薄的層間絕緣膜而是小壁的理由有二。其一為藉由於汲極線13及閘極線11上層形成小壁18,由於汲極線及閘極線與共通電極19便可大大遠離,故便可使寄生於汲極線與閘極線之電容(以下稱為寄生電容)變小,而使得訊號容易傳送之故。另一則為小壁18可與設置於畫素兩端之大壁間的小壁15同樣地形成,因此不需要追加其他層之故。由於該等之故,藉由在畫素端部的B-B’面之汲極線及閘極線上層設置小壁,便可實現容易地封入液晶、抑制汲極線及閘極線的寄生電容以及抑制層數的增加。 Next, the cross section of B-B' of Fig. 4 will be described. As shown in FIG. 4, the A-A' plane of the central portion of the pixel is formed with a large wall 14 on the upper surface of the drain line 13, and the B-B' surface is transmitted through the upper layer of the drain line 13 and the gate line 11. The common electrode 19 is disposed on the small wall 18. The reason why the pixel in the longitudinal direction of the pixel is the small wall 18 is that the liquid crystal layer is not only the longitudinal direction of the pixel, but also the adjacent pixels in the short side direction are connected, and the liquid crystal can be easily sealed. Further, there are two reasons why the non-thin interlayer insulating film on the B-B' plane is not a thin interlayer insulating film. The first one is that the small wall 18 is formed on the upper layer of the drain line 13 and the gate line 11. Since the drain line and the gate line and the common electrode 19 can be greatly separated, the parasitic line and the gate line can be parasitic. The capacitance (hereinafter referred to as parasitic capacitance) becomes small, making the signal easy to transmit. On the other hand, since the small wall 18 can be formed in the same manner as the small wall 15 provided between the large walls at both ends of the pixel, it is not necessary to add another layer. For this reason, by providing a small wall on the drain line and the gate line of the B-B' plane at the end of the pixel, it is possible to easily enclose the liquid crystal and suppress the parasitic line of the drain line and the gate line. The increase in capacitance and the number of suppression layers.

關於共通電極19則如圖2所示,係在畫素長邊方向及短邊方向連接之構造。成為壁電極21之源極電極係透過層間絕緣膜20而形成於共通電極上層,共通電極18係形成於汲極線13及閘極線11上所配置之小壁18上層。只要為此電極構造,則汲極線及閘極線上層 必然存在共通電極或源極電極,因此藉由該等電極便一定可遮蔽汲極線及閘極線的電位影響。除此之外,關於畫素周邊電位,亦必須考量到於畫素長邊方向交互地進行黑白顯示的情況之鄰接畫素的電位影響。針對此課題,本發明構造由於共通電極19係與鄰接畫素連接,故縱使於畫素長邊方向交互地進行黑白顯示,仍可藉由共通電極來遮蔽黑顯示畫素對白顯示畫素的電位影響(以下稱為鄰接畫素的電位影響),故可抑制因鄰接畫素之電位影響導致之黑穿透率增大。又,由於共通電極係與畫素長邊方向及短邊方向之鄰接畫素連接,縱使一位置斷線也不會有無法供應訊號的情況,故關係到良率的提升。由上述可知,本發明能實現抑制汲極線及閘極線的寄生電容、抑制層數增加、以及抑制鄰接畫素之電位影響,而提升製程中的良率。 As shown in FIG. 2, the common electrode 19 has a structure in which the pixels are connected in the longitudinal direction and the short-side direction. The source electrode of the wall electrode 21 is formed in the upper layer of the common electrode through the interlayer insulating film 20, and the common electrode 18 is formed on the upper surface of the small wall 18 disposed on the drain line 13 and the gate line 11. As long as this electrode is constructed, the drain line and the gate line layer Since the common electrode or the source electrode is inevitably present, the potential of the drain line and the gate line can be shielded by the electrodes. In addition to this, regarding the peripheral potential of the pixel, it is necessary to consider the potential influence of the adjacent pixels in the case where the long side of the pixel is interactively displayed in black and white. With respect to this problem, since the common electrode 19 is connected to the adjacent pixels in the structure of the present invention, even if the black and white display is alternately performed in the longitudinal direction of the pixel, the potential of the pixel of the black display pixel can be shielded by the common electrode. Since the influence (hereinafter referred to as the potential influence of the adjacent pixels) is suppressed, the black transmittance due to the influence of the potential of the adjacent pixels can be suppressed from increasing. Further, since the common electrode system is connected to the adjacent pixels in the longitudinal direction and the short-side direction of the pixel, there is no possibility that the signal cannot be supplied even if the position is broken, which is related to the improvement of the yield. As apparent from the above, the present invention can suppress the parasitic capacitance of the drain line and the gate line, suppress the increase in the number of layers, and suppress the influence of the potential of the adjacent pixels, thereby improving the yield in the process.

又,縱使將B-B’面取代圖4構造而為圖5之構造,仍可獲的相同效果。圖5為將圖1之B-B’面裁切之剖面圖,係在汲極線13上層配置有小壁18,而小壁18層及閘極線11上層配置有共通電極19之構造。此構造的液晶層24不僅畫素的長邊方向,連短邊方向之鄰接畫素因亦有連接,故使得液晶的封入變得容易。又,共通電極19由於與汲極線13之間配置有小壁18而與汲極線的距離拉遠,故可抑制汲極線13的寄生電容。關於閘極線11上層,由於閘極線係較汲極線而形成於下層,故縱使沒有小壁也不會有共通電極19與閘極線 11之間的膜厚增厚而變成大的寄生電容。再者,如圖2所示,形成於小壁18上層之共通電極19由於與畫素長邊方向極點邊方向之畫素連接,故可藉由畫素間的共通電極19來遮蔽畫素長邊方向中的鄰接畫素之電位影響。藉此,縱使在畫素長邊方向交互地進行黑白顯示的情況,仍可遮蔽鄰接畫素的電位影響,可抑制因鄰接畫素的電位影響導致之黑穿透率增大。又,由於共通電極19係形成於閘極線11及汲極線13上層,故可完全地遮蔽閘極線及汲極線等之畫素周邊電位的影響。再者,由於共通電極19係與畫素長邊方向及短邊方向之鄰接畫素連接,縱使一位置斷線也不會有無法供應訊號的情況,故關係到良率的提升。由上述可知,圖5的構造亦能實現抑制汲極線的寄生電容、抑制層數增加、以及抑制鄰接畫素之電位影響,而提升良率。 Further, even if the B-B' plane is replaced with the structure of Fig. 4 and the structure of Fig. 5, the same effect can be obtained. Fig. 5 is a cross-sectional view showing the B-B' plane of Fig. 1 in a configuration in which a small wall 18 is disposed above the drain line 13, and a common electrode 19 is disposed on the upper layer of the small wall 18 and the gate line 11. The liquid crystal layer 24 of this structure is not only the longitudinal direction of the pixel, but also the adjacent pixels in the short-side direction are also connected, so that the sealing of the liquid crystal is facilitated. Further, since the common electrode 19 has a small wall 18 disposed between the drain electrode 13 and the distance from the drain line is extended, the parasitic capacitance of the drain line 13 can be suppressed. Regarding the upper layer of the gate line 11, since the gate line is formed in the lower layer than the drain line, there is no common electrode 19 and gate line even if there is no small wall. The film thickness between 11 is increased to become a large parasitic capacitance. Further, as shown in FIG. 2, the common electrode 19 formed on the upper layer of the small wall 18 is connected to the pixel in the direction of the pole side in the longitudinal direction of the pixel, so that the common electrode 19 can be shielded by the common electrode 19 between the pixels. The influence of the potential of the adjacent pixels in the edge direction. Thereby, even if the black and white display is alternately performed in the longitudinal direction of the pixel, the influence of the potential of the adjacent pixels can be shielded, and the increase in the black transmittance due to the influence of the potential of the adjacent pixels can be suppressed. Further, since the common electrode 19 is formed on the upper surface of the gate line 11 and the drain line 13, the influence of the peripheral potential of the pixel such as the gate line and the drain line can be completely blocked. Furthermore, since the common electrode 19 is connected to the adjacent pixels in the longitudinal direction and the short-side direction of the pixel, there is no possibility that the signal cannot be supplied even if the position is broken, which is related to the improvement of the yield. As can be seen from the above, the structure of FIG. 5 can also suppress the parasitic capacitance of the drain line, suppress the increase in the number of layers, and suppress the influence of the potential of the adjacent pixels, thereby improving the yield.

又另一方面,畫素端部由於發生區域時,區域產生部的穿透率會降低,故亦必須考量到區域抑制。於區域抑制必須考量到畫素端部構造之C-C’面及D-D’面。圖6及圖7為C-C’面的一例。圖7係於畫素兩端間配置有連續之小壁18的範例。相對於此,圖6的C-C’面雖未於畫素兩端所配置之小壁18之間配置有小壁,但亦可如圖7般不將小壁圖案化。 On the other hand, since the transmittance of the region generating portion is lowered when the end portion of the pixel is generated, it is necessary to consider the region suppression. The area suppression must take into account the C-C' plane and the D-D' plane of the pixel end structure. 6 and 7 are examples of the C-C' plane. Figure 7 is an example of a continuous small wall 18 disposed between the ends of a pixel. On the other hand, although the C-C' plane of Fig. 6 is not provided with a small wall between the small walls 18 disposed at both ends of the pixel, the small wall may not be patterned as shown in Fig. 7.

又,圖8係顯示D-D’面的剖面構造。如圖8所示,係畫素兩端之大壁14間所形成之小壁15的寬度變廣 之構造,圖9係考量前述畫素端部之C-C’面及D-D’面的畫素之放大圖。關於該理由便使用圖9來加以說明。圖9顯示本發明中畫素端部之放大圖,併記有電場方向及液晶之初期配向方向。另外,液晶相對於初期配向方向朝-θ方向扭轉的情況為順扭轉,朝θ方向扭轉的情況為逆扭轉,對液晶施加電場便會配向於電場方向。區域的發生原因在於畫素內混有該順扭轉與逆扭轉。 Further, Fig. 8 shows a cross-sectional structure of the D-D' plane. As shown in FIG. 8, the width of the small wall 15 formed between the large walls 14 at both ends of the pixel is widened. The structure of Fig. 9 is an enlarged view of the pixels of the C-C' plane and the D-D' plane of the pixel end. This reason will be described using FIG. 9. Fig. 9 is an enlarged view showing the end portion of the pixel in the present invention, and recording the direction of the electric field and the initial alignment direction of the liquid crystal. Further, the liquid crystal is twisted in the -θ direction with respect to the initial alignment direction, and the reverse direction is twisted in the θ direction, and an electric field is applied to the liquid crystal to be aligned in the electric field direction. The reason for the occurrence of the region is that the tuned and reverse twists are mixed in the pixels.

如圖9所示,以容易供應訊號電位的方式來以源極電極包圍彎曲後的小壁周邊時,會在共通電極的前端產生逆扭轉方向的電場,前端部以外則產生順扭轉方向的電場。考量到這樣的情事而就區域抑制來檢討,發現要區域抑制在產生逆扭轉方向電場的區域周邊施加強力順扭轉方向的電場是重要的。如圖9所示,當畫素端部之小壁構造上層所形成之共通電極為彎曲構造時,由於為壁電極之源極電極及共通電極之間的間隔會變短,較未設有彎曲部之情況,壁電極與共通電極間之順扭轉方向的電場會變強。縱使形成彎曲部會產生部份逆扭轉方向的電場,但會因順扭轉方向的強力電場而抑制畫素端部中逆扭轉之液晶傳播,而抑制區域。這樣的情況,即便係在C-C’面的剖面構造為圖6、圖7兩者的情況,由於源極電極與共通電極之位置關係為相同,故能獲得區域抑制效果。另外,為壁電極之源極電極與共通電極之間隔乃為壁電極側 面與彎曲部之前端之距離。 As shown in FIG. 9, when the source electrode is surrounded by the curved small wall periphery so that the signal potential is easily supplied, an electric field in the reverse twist direction is generated at the tip end of the common electrode, and an electric field in the forward direction is generated in the direction other than the tip end portion. . Considering such a situation and reviewing the area suppression, it has been found that it is important to suppress the electric field in the direction of the torsional direction in the region where the electric field in the reverse twist direction is generated. As shown in FIG. 9, when the co-current extremely curved structure formed by the upper layer of the small-wall structure of the pixel end portion is formed, the interval between the source electrode and the common electrode of the wall electrode is shortened, and the bending is not provided. In the case of the portion, the electric field in the direction of the torsion in the direction between the wall electrode and the common electrode becomes strong. Even if the bending portion is formed, an electric field in a part of the reverse torsion direction is generated, but the liquid crystal propagation of the reverse torsion in the end portion of the pixel is suppressed by the strong electric field in the direction of the torsion, and the region is suppressed. In such a case, even if the cross-sectional structure on the C-C' plane is both in Figs. 6 and 7, the positional relationship between the source electrode and the common electrode is the same, so that the area suppressing effect can be obtained. In addition, the distance between the source electrode and the common electrode of the wall electrode is the wall electrode side The distance between the face and the front end of the bend.

該等彎曲部30如圖8所示,較佳為小壁15的上層。其理由為在沒有小壁的情況,共通電極與液晶層24之間便會存在有絕緣膜22,會產生絕緣膜膜厚份量的電壓降低,使得順扭轉方向電場變弱。相對於此,若將共通電極配置在小壁15上層,便電壓不會降低,而可對共通電極與為壁電極之源極電極之間施加強力的順扭轉方向電場。因此,要區域抑制,於小壁15上層形成共通電極之彎曲部30係有效的。 As shown in FIG. 8, the curved portions 30 are preferably upper layers of the small walls 15. The reason for this is that the insulating film 22 is present between the common electrode and the liquid crystal layer 24 in the absence of a small wall, and the voltage of the insulating film is increased in thickness, so that the electric field in the torsional direction becomes weak. On the other hand, if the common electrode is disposed on the upper layer of the small wall 15, the voltage does not decrease, and a strong forward-direction electric field can be applied between the common electrode and the source electrode which is the wall electrode. Therefore, in order to suppress the area, it is effective to form the curved portion 30 of the common electrode in the upper layer of the small wall 15.

表1中,顯示了本發明之區域抑制效果。表1係將小壁之彎曲部長度作為參數情況之畫素的觀察結果。如表1所示,在畫素端部沒有彎曲部的情況,源極電極與共通電極的距離會變長,使得順扭轉方向之電場變弱,故區域會變大。相對於此,不論彎曲部長度而設置彎曲部,確認了可使得畫素端部所產生之區域變小。因此,確認了使得源極電極與共通電極間隔變窄,來於所產生之區域周邊施加順扭轉方向之強力電場,便可將區域加以抑制。另一方面,彎曲部在較長的情況,雖會使得區域變小,但確認了延伸於長邊方向之共通電極與彎取部之共通電極所圍繞之區域會變暗。此理由為以共通電極所圍繞之區域電場將難以到達,而使得液晶難以動作之故。 In Table 1, the area suppression effect of the present invention is shown. Table 1 is an observation result of a pixel in which the length of the curved portion of the small wall is taken as a parameter. As shown in Table 1, in the case where the end portion of the pixel has no bent portion, the distance between the source electrode and the common electrode becomes long, and the electric field in the forward twist direction becomes weak, so that the area becomes large. On the other hand, the curved portion was provided regardless of the length of the curved portion, and it was confirmed that the region where the pixel end portion is generated can be made small. Therefore, it has been confirmed that the source electrode and the common electrode are narrowed to each other, and a strong electric field in the direction of the torsion is applied around the generated region, thereby suppressing the region. On the other hand, in the case where the bent portion is long, the area is made small, but it is confirmed that the area surrounded by the common electrode extending in the longitudinal direction and the common electrode of the bent portion is darkened. The reason for this is that the electric field in the region surrounded by the common electrode is difficult to reach, and the liquid crystal is difficult to operate.

圖10係顯示畫素端部中穿透率之彎曲部長度依存性之圖。另外,規格化後之穿透率係以未有彎曲部 之情況的穿透率為規格基準。在畫素短邊方向中心(小壁15之中心)與大壁側面之間隔為k時,而彎曲部長度為k/4時,會較未有彎曲部的情況大幅提高,而彎曲部長度在3k/4以上時,則會變小。因此,彎曲部30的長度在不會產生區域程度之長度以上,而成為不會增大變暗區域之長度以下乃係重要的。亦即,彎曲部長度L較佳為k/4<L<3k/4。讓彎曲部長度為此範圍,便能讓區域抑制及變暗區域降低之兩者成立,縱使畫素端部亦能實現高穿透率,而可實現畫素整體之高穿透率。 Fig. 10 is a graph showing the dependence of the length of the bending portion of the transmittance in the end portion of the pixel. In addition, the normalized penetration rate is based on the absence of bends. The penetration rate of the case is the specification standard. When the distance between the center of the short side direction of the pixel (the center of the small wall 15) and the side of the large wall is k, and the length of the curved portion is k/4, the case where the curved portion is not increased is greatly improved, and the length of the curved portion is increased. When it is 3k/4 or more, it will become smaller. Therefore, it is important that the length of the curved portion 30 is not longer than the length of the region, and it is not necessary to increase the length of the darkened region. That is, the length L of the bent portion is preferably k/4 < L < 3 k/4. By making the length of the curved portion to this extent, both the suppression of the region and the reduction of the darkened region can be established, and even at the end of the pixel, high transmittance can be achieved, and the high transmittance of the pixel as a whole can be achieved.

圖11、圖12、圖13係顯示共通電極之彎曲部的前端形狀之範例。圖11係將彎曲部之前端形狀成為銳角者,圖12係將彎曲部之前端形狀成為更加銳角者,圖13係將彎曲部之前端形狀成為圓形狀者。即便為任何形狀,均得到區域抑制效果。因此,便能讓區域抑制及變暗區域抑制之兩者成立,縱使畫素端部亦能實現高穿透率。 11, FIG. 12, and FIG. 13 show an example of the shape of the tip end of the curved portion of the common electrode. Fig. 11 shows that the shape of the front end of the curved portion is an acute angle, and Fig. 12 is such that the shape of the front end of the curved portion becomes a sharper angle, and Fig. 13 is a shape in which the shape of the front end of the curved portion is rounded. Even in any shape, a zone suppression effect is obtained. Therefore, both the suppression of the region and the suppression of the darkening region can be established, and the high transmittance can be achieved even at the end of the pixel.

由上述可知,藉由本發明便可實現容易地液晶封 入、抑制汲極線及閘極線之寄生電容、抑制層數增加、以及抑制鄰接畫素之電位影響,讓畫素端部之區域抑制及變暗區域抑制之兩者成立,而實現畫素整體之高穿透率。 It can be seen from the above that the liquid crystal seal can be easily realized by the present invention. Into, suppress the parasitic capacitance of the drain line and the gate line, increase the number of suppression layers, and suppress the influence of the potential of the adjacent pixels, so that both the region suppression of the pixel end and the suppression of the darkening region are established, and the pixel is realized. Overall high penetration rate.

(實施例2) (Example 2)

圖15係顯示本發明實施例2之畫素的剖面結構。實施例1雖係為了形成擬似壁電極而配置有CF側電極26,但實施例2卻未設置有CF側電極26。本實施例中,亦可實現容易地液晶封入、抑制汲極線及閘極線之寄生電容、抑制層數增加、以及抑制鄰接畫素之電位影響,讓畫素端部之區域抑制及變暗區域抑制之兩者成立,而實現畫素整體之高穿透率。 Figure 15 is a cross-sectional view showing a pixel of Embodiment 2 of the present invention. In the first embodiment, the CF side electrode 26 is disposed to form the pseudo wall electrode, but the second side electrode 26 is not provided in the second embodiment. In this embodiment, it is also possible to easily block the liquid crystal, suppress the parasitic capacitance of the drain line and the gate line, suppress the increase in the number of layers, and suppress the influence of the potential of the adjacent pixels, thereby suppressing and darkening the area of the pixel end. Both of the regional suppression are established, and the high penetration rate of the pixel is achieved as a whole.

10‧‧‧畫素 10‧‧‧ pixels

11‧‧‧閘極線 11‧‧‧ gate line

12‧‧‧層間絕緣膜 12‧‧‧Interlayer insulating film

13‧‧‧汲極線 13‧‧‧汲polar line

14‧‧‧大壁 14‧‧‧Great wall

15‧‧‧大壁間的小壁 15‧‧‧Small wall between large walls

16‧‧‧TFT側電極 16‧‧‧TFT side electrode

17‧‧‧儲存電容電極 17‧‧‧ Storage Capacitor

18‧‧‧畫素間的小壁 18‧‧‧ small wall between the elements

19‧‧‧小壁構造上的共通電極 19‧‧‧Common electrodes on small wall structures

20‧‧‧層間絕緣膜 20‧‧‧Interlayer insulating film

21‧‧‧壁電極 21‧‧‧ wall electrode

211‧‧‧壁狀電極 211‧‧‧ wall electrode

212‧‧‧平面電極 212‧‧‧ planar electrode

22‧‧‧絕緣膜 22‧‧‧Insulation film

23‧‧‧配向膜 23‧‧‧Alignment film

24‧‧‧液晶層 24‧‧‧Liquid layer

25‧‧‧保護膜 25‧‧‧Protective film

26‧‧‧CF側電極 26‧‧‧CF side electrode

27‧‧‧CF(彩色濾光片) 27‧‧‧CF (Color Filter)

28‧‧‧BM(黑陣列) 28‧‧‧BM (black array)

30‧‧‧彎曲部 30‧‧‧Bend

101‧‧‧基板 101‧‧‧Substrate

102‧‧‧基板 102‧‧‧Substrate

103‧‧‧訊號線 103‧‧‧Signal line

104‧‧‧掃描線 104‧‧‧ scan line

105‧‧‧共通線 105‧‧‧Common line

106‧‧‧畫素 106‧‧‧ pixels

107‧‧‧訊號驅動電路 107‧‧‧Signal drive circuit

108‧‧‧掃描驅動電路 108‧‧‧Scan drive circuit

109‧‧‧共通電壓產生電路 109‧‧‧Common voltage generating circuit

110‧‧‧TFT元件 110‧‧‧TFT components

圖1係顯示本發明實施例1之畫素平面構造圖。 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a planar configuration of a pixel of a first embodiment of the present invention.

圖2係顯示本發明實施例1之6畫素平面構造圖。 Fig. 2 is a plan view showing the configuration of a 6-pixel plane in the first embodiment of the present invention.

圖3係顯示圖1之A-A’面之剖面構造圖。 Fig. 3 is a sectional structural view showing the A-A' plane of Fig. 1.

圖4係顯示圖1之B-B’面之剖面構造圖。 Fig. 4 is a sectional structural view showing the B-B' plane of Fig. 1.

圖5係顯示圖1之B-B’面之其他剖面構造圖。 Fig. 5 is a cross-sectional structural view showing the B-B' plane of Fig. 1.

圖6係顯示圖1之C-C’面之剖面構造圖。 Fig. 6 is a sectional structural view showing a C-C' plane of Fig. 1.

圖7係顯示圖1之C-C’面之其他剖面構造圖。 Fig. 7 is a view showing another sectional configuration of the C-C' plane of Fig. 1.

圖8係顯示圖1之D-D’面之剖面構造圖。 Fig. 8 is a sectional structural view showing the D-D' plane of Fig. 1.

圖9係顯示本發明實施例1之畫素端部中,電場方向及液晶之初期配向方向圖。 Fig. 9 is a view showing the direction of electric field and the initial alignment direction of liquid crystal in the pixel end portion of the first embodiment of the present invention.

圖10係顯示畫素端部中穿透率之彎曲部長度依存性之圖。 Fig. 10 is a graph showing the dependence of the length of the bending portion of the transmittance in the end portion of the pixel.

圖11係顯示共通電極彎曲部之前端形狀一例之圖。 Fig. 11 is a view showing an example of the shape of the front end of the common electrode bending portion.

圖12係顯示共通電極彎曲部之前端形狀其他一例之圖。 Fig. 12 is a view showing another example of the shape of the front end of the common electrode bending portion.

圖13係顯示共通電極彎曲部之前端形狀其他一例之圖。 Fig. 13 is a view showing another example of the shape of the front end of the common electrode bending portion.

圖14係顯示本發明所適用之液晶顯示裝置之等效電路一例之圖。 Fig. 14 is a view showing an example of an equivalent circuit of a liquid crystal display device to which the present invention is applied.

圖15係顯示本發明實施例2之畫素的剖面結構圖。 Figure 15 is a cross-sectional structural view showing a pixel of Embodiment 2 of the present invention.

10‧‧‧畫素 10‧‧‧ pixels

14‧‧‧大壁 14‧‧‧Great wall

15‧‧‧大壁間的小壁 15‧‧‧Small wall between large walls

16‧‧‧TFT側電極 16‧‧‧TFT side electrode

18‧‧‧畫素間的小壁 18‧‧‧ small wall between the elements

19‧‧‧小壁構造上的共通電極 19‧‧‧Common electrodes on small wall structures

21‧‧‧壁電極 21‧‧‧ wall electrode

Claims (12)

一種液晶顯示裝置,其係配置有陣列狀複數畫素,各像素具備有於畫素兩端延伸於畫素之長邊方向的大壁、以及於該大壁之間平行於該大壁延伸且較該大壁之高度要低之小壁,該小壁上形成有TFT側電極,於該大壁側面及該大壁與該小壁之間形成有壁電極;其中該大壁係以長邊方向之像素間而被分斷,分斷後之該大壁之間係配置有較該大壁之高度要低的小壁。 A liquid crystal display device is provided with an array of plural pixels, each pixel having a large wall extending at both ends of the pixel in a longitudinal direction of the pixel, and extending parallel to the large wall between the large walls and a small wall having a lower height than the large wall, wherein the small wall is formed with a TFT side electrode, and a wall electrode is formed between the large wall side and the large wall and the small wall; wherein the large wall has a long side The pixels of the direction are divided, and the small walls after the division are disposed with a small wall lower than the height of the large wall. 如申請專利範圍第1項之液晶顯示裝置,其中該各畫素係於畫素兩端連續配置有延伸於畫素短邊方向之該小壁。 The liquid crystal display device of claim 1, wherein the pixels are continuously disposed at both ends of the pixel with the small wall extending in the short side direction of the pixel. 如申請專利範圍第2項之液晶顯示裝置,其係具有畫素長邊方向的汲極線及短邊方向的閘極線,於該汲極線及閘極線的上層係透過該小壁而形成有共通(common)電極。 The liquid crystal display device of claim 2, wherein the gate line having a long side direction of the pixel and the gate line of the short side direction pass through the small wall of the upper layer of the drain line and the gate line. A common electrode is formed. 如申請專利範圍第3項之液晶顯示裝置,其中該共通電極係與畫素短邊方向及長邊方向的鄰接畫素的共通電極連接。 The liquid crystal display device of claim 3, wherein the common electrode is connected to a common electrode of a neighboring pixel in a short side direction and a long side direction of the pixel. 如申請專利範圍第1項之液晶顯示裝置,其中該畫素短邊方向的閘極線上係透過層間絕緣膜而形成共通電極。 The liquid crystal display device of claim 1, wherein the gate electrode in the short-side direction of the pixel transmits a interlayer insulating film to form a common electrode. 如申請專利範圍第1項之液晶顯示裝置,其中與 該TFT側電極連接而形成於基板平面方向之儲存電容電極,與由該壁電極延伸於基板平面方向之平面電極係透過層間絕緣膜而對向,來形成電容元件。 For example, the liquid crystal display device of claim 1 of the patent scope, wherein The storage capacitor electrode formed by connecting the TFT side electrodes in the planar direction of the substrate and the planar electrode extending from the planar electrode in the planar direction of the substrate are opposed to each other to form a capacitor element. 一種液晶顯示裝置,其係配置有陣列狀複數畫素,各像素具備有於畫素兩端延伸於畫素之長邊方向的大壁、以及於該大壁之間平行於該大壁延伸且較該大壁之高度要低之小壁,該小壁上形成有TFT側電極來作為共通電極,於該大壁側面及該大壁與該小壁之間形成有壁電極來作為源極電極;其中該小壁的端部係形成有朝向該大壁之彎曲部,該彎曲部上係形成有該共通電極。 A liquid crystal display device is provided with an array of plural pixels, each pixel having a large wall extending at both ends of the pixel in a longitudinal direction of the pixel, and extending parallel to the large wall between the large walls and a small wall having a lower height than the large wall, wherein the small wall is formed with a TFT side electrode as a common electrode, and a wall electrode is formed as a source electrode between the large wall side surface and the large wall and the small wall Wherein the end of the small wall is formed with a curved portion facing the large wall, and the common electrode is formed on the curved portion. 如申請專利範圍第7項之液晶顯示裝置,其中該彎曲部前端係形成為銳角或圓形狀。 The liquid crystal display device of claim 7, wherein the front end of the curved portion is formed in an acute angle or a circular shape. 如申請專利範圍第7項之液晶顯示裝置,其中該大壁與該小壁之間隔為k,該彎曲部之長度L則為k/4<L<3k/4。 The liquid crystal display device of claim 7, wherein the distance between the large wall and the small wall is k, and the length L of the curved portion is k/4 < L < 3 k/4. 如申請專利範圍第7項之液晶顯示裝置,其中與該TFT側電極連接而形成於基板平面方向之儲存電容電極,與由該壁電極延伸於基板平面方向之平面電極係透過層間絕緣膜而對向,來形成電容元件。 The liquid crystal display device of claim 7, wherein the storage capacitor electrode formed in the substrate plane direction connected to the TFT side electrode and the planar electrode layer extending from the wall electrode in the planar direction of the substrate are permeable to the interlayer insulating film. To form a capacitive element. 如申請專利範圍第7項之液晶顯示裝置,其中該 畫素短邊方向的閘極線上係透過層間絕緣膜而形成共通電極。 The liquid crystal display device of claim 7, wherein the The gate line in the short-side direction of the pixel penetrates the interlayer insulating film to form a common electrode. 如申請專利範圍第7項之液晶顯示裝置,其係具有畫素長邊方向的汲極線及短邊方向的閘極線,於該汲極線及閘極線的上層係透過該小壁而形成有共通(common)電極。 The liquid crystal display device of claim 7 is characterized in that: a drain line having a long side in a pixel direction and a gate line in a short side direction, wherein the upper layer of the drain line and the gate line pass through the small wall A common electrode is formed.
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