TW201319773A - Voltage regulator and operating method thereof - Google Patents

Voltage regulator and operating method thereof Download PDF

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TW201319773A
TW201319773A TW100139842A TW100139842A TW201319773A TW 201319773 A TW201319773 A TW 201319773A TW 100139842 A TW100139842 A TW 100139842A TW 100139842 A TW100139842 A TW 100139842A TW 201319773 A TW201319773 A TW 201319773A
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voltage
unit
output
coupled
current
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TWI457742B (en
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Chi-Yang Chen
Wen-Chi Huang
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Faraday Tech Corp
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Abstract

A voltage regulator and an operating method of the voltage regulator are provided. The voltage regulator includes a voltage generating unit and a voltage comparing unit. The voltage generating unit outputs an output voltage to a load according to a relationship between a first reference voltage received by a reference input of the voltage generating unit and a voltage level at a feedback input of the voltage generating unit. The voltage comparing unit compares the output voltage of the voltage generating unit and a second reference voltage. When the output voltage of the voltage generating unit is lower the second reference voltage, the voltage comparing unit provides a feedback path between the output and the feedback input of the voltage generating unit. When output voltage of the voltage comparing unit is higher than the second reference voltage, the voltage comparing unit cuts off the feedback path and provides a third reference voltage to the feedback input of the voltage generating unit.

Description

電壓調整器及其操作方法Voltage regulator and its operation method

本發明是有關於一種電壓調整器及其操作方法。The invention relates to a voltage regulator and a method of operating the same.

圖1繪示為根據一習知技術所繪示之電壓調整器之電路示意圖,包括一誤差放大器OP1、輸出電晶體Pout以及由電阻R11及R12所組成的分壓電路。請參照圖1,在電壓調整器10正常運作時,誤差放大器OP1之正輸入端所接收的電壓VFB會接近於負輸入端所接收的參考電壓VREF。當電壓VFB小於參考電壓VREF時,誤差放大器OP1的輸出電壓OPout將降低,使得輸出電晶體Pout的閘極-源極電壓增大以及接通電阻(on resistance)減小,進而造成輸出電壓Vout增大。反之,當電壓VFB大於參考電壓VREF時,輸出電晶體Pout的接通電阻增大,輸出電壓Vout則因此降低。由於電壓VFB為輸出電壓Vout所分壓之回授信號,電壓調整器10便可利用這樣的回授關係產生固定的輸出電壓Vout。1 is a circuit diagram of a voltage regulator according to a conventional technique, including an error amplifier OP1, an output transistor Pout, and a voltage dividing circuit composed of resistors R11 and R12. Referring to FIG. 1, when the voltage regulator 10 is in normal operation, the voltage VFB received by the positive input terminal of the error amplifier OP1 is close to the reference voltage VREF received by the negative input terminal. When the voltage VFB is less than the reference voltage VREF, the output voltage OPout of the error amplifier OP1 will decrease, so that the gate-source voltage of the output transistor Pout increases and the on resistance decreases, thereby causing the output voltage Vout to increase. Big. On the contrary, when the voltage VFB is greater than the reference voltage VREF, the on-resistance of the output transistor Pout increases, and the output voltage Vout is thus lowered. Since the voltage VFB is a feedback signal divided by the output voltage Vout, the voltage regulator 10 can generate a fixed output voltage Vout using such a feedback relationship.

由於電壓調整器10在剛啟動通電時,誤差放大器OP1的輸出端為浮接(floating)的狀態。加上電路製成及連接方式等因素,電壓調整器10可能會在一啟動時產生許多不可預期之情況,例如在一通電時誤差放大器OP1往往會輸出一震幅極大的突波(Pulse),這樣的情況可能造成電路短路或電晶體或其他電路元件損毀的問題。因此,如何在利用電壓調整器提供穩定的電壓輸出的同時,確保此電壓調整器不因為預期外的狀態造成損壞或是輸出預期外的結果,確實為當前所屬領域的重要課題。Since the voltage regulator 10 is just energized, the output of the error amplifier OP1 is in a floating state. In addition to factors such as circuit fabrication and connection, the voltage regulator 10 may generate many unpredictable conditions at startup. For example, the error amplifier OP1 tends to output a pulse with a large amplitude when energized. Such a situation may cause problems with short circuits or damage to transistors or other circuit components. Therefore, how to use the voltage regulator to provide a stable voltage output while ensuring that the voltage regulator does not cause damage due to an unexpected state or output an unexpected result is indeed an important subject in the current field.

本發明提供一種電壓調整器及其操作方法,用於保護電路避免造成預期外的損壞。The present invention provides a voltage regulator and method of operating the same for protecting circuitry from unwanted damage.

本發明提供一種電壓調整器,包括電壓產生單元及電壓比較單元。電壓產生單元具有參考端、回授端及輸出端,電壓產生單元的參考端接收第一參考電壓,其中依據電壓產生單元的參考端與回授端二者電壓的關係,電壓產生單元經由輸出端對應產生輸出電壓至負載。電壓比較單元的輸入端則耦接至電壓產生單元的輸出端,電壓比較單元的輸出端耦接至電壓產生單元的回授端,電壓比較單元比較電壓產生單元的輸出端的電壓與第二參考電壓,其中當電壓產生單元的輸出端的電壓小於第二參考電壓時,電壓比較單元提供回授路徑於電壓產生單元的輸出端與回授端之間,以及當電壓產生單元的輸出端的電壓大於第二參考電壓時,電壓比較單元切斷回授路徑以及提供第三參考電壓至電壓產生單元的回授端。The invention provides a voltage regulator comprising a voltage generating unit and a voltage comparing unit. The voltage generating unit has a reference end, a feedback end and an output end, and the reference end of the voltage generating unit receives the first reference voltage, wherein the voltage generating unit passes the output according to the voltage relationship between the reference end and the feedback end of the voltage generating unit Corresponding to the output voltage to the load. The input end of the voltage comparison unit is coupled to the output end of the voltage generating unit, the output end of the voltage comparison unit is coupled to the feedback end of the voltage generating unit, and the voltage comparing unit compares the voltage of the output end of the voltage generating unit with the second reference voltage Wherein when the voltage at the output of the voltage generating unit is less than the second reference voltage, the voltage comparing unit provides a feedback path between the output end of the voltage generating unit and the feedback terminal, and when the voltage at the output of the voltage generating unit is greater than the second When the voltage is referenced, the voltage comparison unit cuts off the feedback path and provides a third reference voltage to the feedback terminal of the voltage generating unit.

本發明提供一種電壓調整器的操作方法,包括以下步驟。首先,配置電壓產生單元,其中電壓產生單元具有參考端、回授端及輸出端,而電壓產生單元依據參考端與回授端二者電壓的關係經由輸出端對應產生輸出電壓至負載。接著,提供第一參考電壓至電壓產生單元的參考端。然後,比較電壓產生單元的輸出端的電壓與第二參考電壓。當電壓產生單元的輸出端的電壓小於第二參考電壓時,提供回授路徑於電壓產生單元的輸出端與回授端之間。另外,當電壓產生單元的輸出端的電壓大於第二參考電壓時,切斷回授路徑以及提供第三參考電壓至電壓產生單元的回授端。The present invention provides a method of operating a voltage regulator comprising the following steps. First, the voltage generating unit is configured, wherein the voltage generating unit has a reference end, a feedback end and an output end, and the voltage generating unit generates an output voltage corresponding to the load via the output end according to the relationship between the voltage of the reference end and the feedback end. Next, a first reference voltage is provided to the reference terminal of the voltage generating unit. Then, the voltage at the output of the voltage generating unit is compared with the second reference voltage. When the voltage at the output of the voltage generating unit is less than the second reference voltage, a feedback path is provided between the output of the voltage generating unit and the feedback terminal. In addition, when the voltage at the output of the voltage generating unit is greater than the second reference voltage, the feedback path is cut off and a third reference voltage is supplied to the feedback terminal of the voltage generating unit.

本發明亦提供一種電壓調整器,包括誤差放大器、輸出電晶體及電壓比較單元。誤差放大器具有第一輸入端、第二輸入端與輸出端,其中誤差放大器的第二輸入端耦接第一參考電壓。輸出電晶體具有第一端、第二端與控制端,其中輸出電晶體的控制端耦接至誤差放大器之輸出端,輸出電晶體的第一端耦接至電源電壓,以及輸出電晶體的第二端對應產生輸出電壓至負載。電壓比較單元的輸入端耦接至輸出電晶體的第二端,電壓比較單元的輸出端耦接至誤差放大器的第一輸入端,電壓比較單元提供回授路徑於輸出電晶體的第二端與誤差放大器的第一輸入端之間,以及電壓比較單元比較輸出電晶體的第二端的電壓與第二參考電壓,其中當輸出電晶體的第二端的電壓大於第二參考電壓時,電壓比較單元提供第三參考電壓至輸出電晶體的控制端。The invention also provides a voltage regulator comprising an error amplifier, an output transistor and a voltage comparison unit. The error amplifier has a first input end, a second input end and an output end, wherein the second input end of the error amplifier is coupled to the first reference voltage. The output transistor has a first end, a second end and a control end, wherein the control end of the output transistor is coupled to the output end of the error amplifier, the first end of the output transistor is coupled to the power supply voltage, and the output transistor is The two ends correspond to the output voltage to the load. The input end of the voltage comparison unit is coupled to the second end of the output transistor, the output end of the voltage comparison unit is coupled to the first input end of the error amplifier, and the voltage comparison unit provides a feedback path to the second end of the output transistor Between the first input terminals of the error amplifier, and the voltage comparison unit compares the voltage of the second end of the output transistor with the second reference voltage, wherein when the voltage of the second end of the output transistor is greater than the second reference voltage, the voltage comparison unit provides The third reference voltage is to the control terminal of the output transistor.

基於上述,本發明提出電壓調整器及其操作方法,當輸出電壓大於第二參考電壓時,限制電壓產生單位的輸出,使得電壓調整器不因預期外之突波或是大電壓產生預期外之輸入甚至造成電晶體的損壞。Based on the above, the present invention provides a voltage regulator and an operation method thereof. When the output voltage is greater than the second reference voltage, the output of the voltage generation unit is limited, so that the voltage regulator does not generate an unexpected wave or a large voltage. The input even caused damage to the transistor.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.

圖2為根據本發明第一實施例所繪示之電壓調整器的功能方塊圖。請參照圖2,電壓調整器20包括電壓產生單元110及電壓比較單元120。電壓產生單元110具有參考端RIN、回授端FIN及輸出端OUT。參考端RIN接收第一參考電壓REF1。電壓產生單元110於是根據第一參考電壓REF1及回授端FIN的電壓之關係,經由輸出端OUT對應產生輸出電壓Vout至負載150。2 is a functional block diagram of a voltage regulator according to a first embodiment of the present invention. Referring to FIG. 2 , the voltage regulator 20 includes a voltage generating unit 110 and a voltage comparing unit 120 . The voltage generating unit 110 has a reference terminal RIN, a feedback terminal FIN, and an output terminal OUT. The reference terminal RIN receives the first reference voltage REF1. The voltage generating unit 110 then generates an output voltage Vout to the load 150 via the output terminal OUT according to the relationship between the voltages of the first reference voltage REF1 and the feedback terminal FIN.

電壓比較單元120的輸入端CIN耦接至電壓產生單元110之輸出端OUT,並接收電壓產生單元110之輸出電壓Vout。電壓比較單元120輸出端COUT則耦接至電壓產生單元110的回授端FIN並提供回授電壓FB。電壓比較單元120比較電壓產生單元110的輸出電壓Vout及第二參考電壓REF2。當輸出電壓Vout小於第二參考電壓REF2時,電壓比較單元120提供回授路徑於電壓產生單元110的輸出端OUT與回授端FIN之間。反之,當電壓產生單元110的輸出電壓Vout大於第二參考電壓REF2時,電壓比較單元120切斷回授路徑以及提供第三參考電壓REF3至電壓產生單元110的回授端FIN。The input terminal CIN of the voltage comparison unit 120 is coupled to the output terminal OUT of the voltage generating unit 110 and receives the output voltage Vout of the voltage generating unit 110. The output terminal COUT of the voltage comparison unit 120 is coupled to the feedback terminal FIN of the voltage generating unit 110 and provides a feedback voltage FB. The voltage comparison unit 120 compares the output voltage Vout of the voltage generating unit 110 with the second reference voltage REF2. When the output voltage Vout is less than the second reference voltage REF2, the voltage comparison unit 120 provides a feedback path between the output terminal OUT of the voltage generating unit 110 and the feedback terminal FIN. On the other hand, when the output voltage Vout of the voltage generating unit 110 is greater than the second reference voltage REF2, the voltage comparing unit 120 cuts off the feedback path and supplies the third reference voltage REF3 to the feedback terminal FIN of the voltage generating unit 110.

在不同的實施例中,第一參考電壓REF1、第二參考電壓REF2與第三參考電壓REF3的電壓準位可以彼此相同,也可能彼此不同。上述第一參考電壓REF1、第二參考電壓REF2與第三參考電壓REF3的電壓準位可以視實際產品的設計規格需求而決定之。例如,在此實施例中,第三參考電壓REF3可為一接地電壓或是其他低準位電壓(固定電壓),可依照實際應用時之情況進行調整,本發明不限定於上述。In different embodiments, the voltage levels of the first reference voltage REF1, the second reference voltage REF2, and the third reference voltage REF3 may be the same as each other, or may be different from each other. The voltage levels of the first reference voltage REF1, the second reference voltage REF2, and the third reference voltage REF3 may be determined according to the design specifications of the actual product. For example, in this embodiment, the third reference voltage REF3 may be a ground voltage or other low level voltage (fixed voltage), which may be adjusted according to the actual application, and the present invention is not limited to the above.

圖3為根據本發明第二實施例所繪示之電壓調整器的功能方塊圖。圖3所示實施例可以參照圖2的相關說明。其中相較於圖2,圖3所繪示之第二實施例提供電壓比較單元120一種較為詳細的作法。請參照圖3,電壓比較單元120包括分壓電路121、第一比較器122、第一開關單元123及第二開關單元124。分壓電路121耦接於電壓產生單元110的輸出端OUT與第三參考電壓REF3之間。分壓電路121將電壓產生單元110的輸出電壓Vout分壓,以產生第一回授電壓FB1及第二回授電壓FB2。視實際產品的設計規格需求,第一回授電壓FB1與第二回授電壓FB2的電壓準位可以彼此相同,也可能彼此不同。3 is a functional block diagram of a voltage regulator according to a second embodiment of the present invention. The embodiment shown in FIG. 3 can refer to the related description of FIG. 2. Compared with FIG. 2, the second embodiment illustrated in FIG. 3 provides a more detailed operation of the voltage comparison unit 120. Referring to FIG. 3 , the voltage comparison unit 120 includes a voltage dividing circuit 121 , a first comparator 122 , a first switching unit 123 , and a second switching unit 124 . The voltage dividing circuit 121 is coupled between the output terminal OUT of the voltage generating unit 110 and the third reference voltage REF3. The voltage dividing circuit 121 divides the output voltage Vout of the voltage generating unit 110 to generate a first feedback voltage FB1 and a second feedback voltage FB2. The voltage levels of the first feedback voltage FB1 and the second feedback voltage FB2 may be the same as each other or may be different from each other depending on the design specifications of the actual product.

第一比較器122具有第一輸入端CIN11、第二輸入端CIN12以及輸出端,其中第一輸入端CIN11接收第二參考電壓REF2,而第二輸入端CIN12則從分壓電路121接收第一回授電壓FB1。第一開關單元123具有第一端S11、第二端S12及控制端S13,而第二開關單元124具有第一端S21、第二端S22及控制端S23。第一開關單元123的第一端S11及第二開關單元124的第一端S21耦接至電壓產生單元110的回授端FIN,而第一開關單元123及第二開關單元124的控制端S13及S23則耦接至第一比較器122的輸出端。第一開關單元123的第二端S12耦接第三參考電壓REF3,第二開關單元124的第二端S22則接收第二回授電壓FB2。The first comparator 122 has a first input terminal CIN11, a second input terminal CIN12 and an output terminal, wherein the first input terminal CIN11 receives the second reference voltage REF2, and the second input terminal CIN12 receives the first voltage from the voltage dividing circuit 121. The voltage FB1 is feedback. The first switch unit 123 has a first end S11, a second end S12 and a control end S13, and the second switch unit 124 has a first end S21, a second end S22 and a control end S23. The first end S11 of the first switch unit 123 and the first end S21 of the second switch unit 124 are coupled to the feedback end FIN of the voltage generating unit 110, and the control end S13 of the first switch unit 123 and the second switch unit 124 And S23 is coupled to the output of the first comparator 122. The second end S12 of the first switching unit 123 is coupled to the third reference voltage REF3, and the second end S22 of the second switching unit 124 receives the second feedback voltage FB2.

第一比較器122比較第一回授電壓FB1與第二參考電壓REF2。當第一回授電壓FB1小於第二參考電壓REF2時,第一比較器122使第一開關單元123不導通(turn off),而使第二開關單元124導通(turn on),以便將作為回授電壓FB的第二回授電壓FB2傳送至電壓產生單元110之回授端FIN。當第二開關單元124導通時,可視同為電壓比較單元120中存在一回授路徑介於電壓產生單元110的輸出端OUT及回授端FIN之間。相反的,當第一回授電壓FB1大於該第二參考電壓REF2時,第一比較器122使第二開關單元124不導通,而第一開關單元123導通。當第一開關單元123導通時,電壓比較單元120提供第三參考電壓REF3作為回授電壓FB傳送至電壓產生單元110之回授端FIN。第二開關單元124不導通時,則可視為存在於電壓比較單元120中之回授路徑被切斷。The first comparator 122 compares the first feedback voltage FB1 with the second reference voltage REF2. When the first feedback voltage FB1 is smaller than the second reference voltage REF2, the first comparator 122 turns the first switching unit 123 off, and turns the second switching unit 124 on, so as to be turned back. The second feedback voltage FB2 of the voltage FB is transmitted to the feedback terminal FIN of the voltage generating unit 110. When the second switching unit 124 is turned on, it can be seen that there is a feedback path in the voltage comparison unit 120 between the output terminal OUT of the voltage generating unit 110 and the feedback terminal FIN. Conversely, when the first feedback voltage FB1 is greater than the second reference voltage REF2, the first comparator 122 disables the second switching unit 124, and the first switching unit 123 is turned on. When the first switching unit 123 is turned on, the voltage comparison unit 120 supplies the third reference voltage REF3 as the feedback voltage FB to the feedback terminal FIN of the voltage generating unit 110. When the second switching unit 124 is not turned on, it can be considered that the feedback path existing in the voltage comparison unit 120 is cut off.

圖4為說明圖3所示第二實施例中電壓調整器的一種實施方式,而圖5為根據本發明一實施例所繪示電壓調整器11的操作方法之方法流程圖。請同時參照圖4及圖5,步驟S501配置電壓產生單元110於電壓調整器11。於本實施例中,電壓產生單元110包括誤差放大器OP1以及輸出電晶體Pout。誤差放大器OP1具有第一輸入端OPIN1、第二輸入端OPIN2及輸出端OPO。於本實施例中,如圖4所示,第一輸入端OPIN1為正輸入端(非反相輸入端),而第二輸入端OPIN2為負輸入端(反相輸入端)。於其他實施例中,第一輸入端OPIN1可以是負輸入端,而第二輸入端OPIN2可以是正輸入端。誤差放大器OP1的第二輸入端OPIN2及第一輸入端OPIN1分別與電壓產生單元110之參考端RIN及回授端FIN連接。也就是說,誤差放大器OP1的第一輸入端OPIN1耦接電壓比較單元120的輸出端。於步驟S502時,第一參考電壓REF1被提供至電壓產生單元110的參考端RIN。因此,誤差放大器OP1的第二輸入端OPIN2得以接收第一參考電壓REF1。4 is a flow chart showing a method of operating the voltage regulator 11 in accordance with an embodiment of the present invention, and FIG. 5 is a flow chart showing a method of operating the voltage regulator 11 according to an embodiment of the invention. Referring to FIG. 4 and FIG. 5 simultaneously, the voltage generating unit 110 is disposed in the voltage regulator 11 in step S501. In the present embodiment, the voltage generating unit 110 includes an error amplifier OP1 and an output transistor Pout. The error amplifier OP1 has a first input OPIN1, a second input OPIN2 and an output OPO. In this embodiment, as shown in FIG. 4, the first input terminal OPIN1 is a positive input terminal (non-inverting input terminal), and the second input terminal OPIN2 is a negative input terminal (inverting input terminal). In other embodiments, the first input OPIN1 can be a negative input and the second input OPIN2 can be a positive input. The second input terminal OPIN2 and the first input terminal OPIN1 of the error amplifier OP1 are respectively connected to the reference terminal RIN and the feedback terminal FIN of the voltage generating unit 110. That is, the first input terminal OPIN1 of the error amplifier OP1 is coupled to the output terminal of the voltage comparison unit 120. At step S502, the first reference voltage REF1 is supplied to the reference terminal RIN of the voltage generating unit 110. Therefore, the second input terminal OPIN2 of the error amplifier OP1 is capable of receiving the first reference voltage REF1.

輸出電晶體Pout具有第一端、第二端及控制端。在本實施例中,輸出電晶體Pout為P通道金屬氧化物半導體(positive-channel metal oxide semiconductor,PMOS)電晶體。在其他實施例中,輸出電晶體Pout可以是其他類型的電晶體。電晶體Pout的控制端(例如閘極)耦接至誤差放大器OP1的輸出端OPO。電晶體Pout的第一端(例如源極)耦接至電源電壓VCC,而電晶體Pout的第二端(例如汲極)則耦接至電壓產生單元110的輸出端OUT以便對應產生輸出電壓Vout至負載150。The output transistor Pout has a first end, a second end, and a control end. In this embodiment, the output transistor Pout is a P-channel metal oxide semiconductor (PMOS) transistor. In other embodiments, the output transistor Pout can be other types of transistors. A control terminal (eg, a gate) of the transistor Pout is coupled to an output terminal OPO of the error amplifier OP1. The first end (eg, the source) of the transistor Pout is coupled to the power supply voltage VCC, and the second end (eg, the drain) of the transistor Pout is coupled to the output terminal OUT of the voltage generating unit 110 to generate an output voltage Vout correspondingly. To load 150.

請繼續參照圖4及圖5。在本實施例中,分壓電路121由電阻R1、R2及R3串連而成,但在本發明不限定於此,可根據實際應用時的情況進行更動。第一開關單元123包括一N通道金屬氧化物半導體(negative-channel metal oxide semiconductor,NMOS)電晶體SW1,而第二開關單元124則包括一PMOS電晶體SW2。Please continue to refer to Figures 4 and 5. In the present embodiment, the voltage dividing circuit 121 is formed by connecting the resistors R1, R2, and R3 in series. However, the present invention is not limited thereto, and can be changed according to the actual application. The first switching unit 123 includes a N-channel metal oxide semiconductor (NMOS) transistor SW1, and the second switching unit 124 includes a PMOS transistor SW2.

於本實施例中,第一比較器122的第一輸入端(例如正輸入端)接收第二參考電壓REF2,而第一比較器122的第二輸入端(例如負輸入端)則從電阻R1與電阻R2之間的共同接點處接收第一回授電壓FB1。步驟S503時,於概念上,第一比較器122比較第二參考電壓REF2及電壓產生單元110的輸出電壓Vout。實際上,第一比較器122可以比較第二參考電壓REF2與代表輸出電壓Vout的第一回授電壓FB1。In this embodiment, the first input terminal (eg, the positive input terminal) of the first comparator 122 receives the second reference voltage REF2, and the second input terminal (eg, the negative input terminal) of the first comparator 122 is received from the resistor R1. The first feedback voltage FB1 is received at a common junction with the resistor R2. At step S503, conceptually, the first comparator 122 compares the second reference voltage REF2 with the output voltage Vout of the voltage generating unit 110. In fact, the first comparator 122 can compare the second reference voltage REF2 with the first feedback voltage FB1 representing the output voltage Vout.

若步驟S503判斷第一回授電壓FB1小於第二參考電壓REF2,則進行步驟S504。在步驟S504時,第一比較器122輸出一低準位電壓,使得電晶體SW1為截斷的狀態,而電晶體SW2則是導通的狀態。當電晶體SW2導通而電晶體SW1截斷時,電壓比較單元120提供第二回授電壓FB2作為回授電壓FB傳送至電壓產生單元110之回授端FIN。If it is determined in step S503 that the first feedback voltage FB1 is smaller than the second reference voltage REF2, step S504 is performed. At step S504, the first comparator 122 outputs a low level voltage such that the transistor SW1 is in a cut-off state and the transistor SW2 is in an on state. When the transistor SW2 is turned on and the transistor SW1 is turned off, the voltage comparison unit 120 supplies the second feedback voltage FB2 as the feedback voltage FB to the feedback terminal FIN of the voltage generating unit 110.

若步驟S503判斷第一回授電壓FB1大於第二參考電壓REF2,則進行步驟S505。在步驟S505時,第一比較器122輸出一高準位電壓,使得電晶體SW1為導通的狀態,而電晶體SW2則是截斷的狀態。當電晶體SW2截斷而電晶體SW1導通時,電壓比較單元120提供第三參考電壓REF3作為回授電壓FB傳送至電壓產生單元110之回授端FIN。值得一提的是,開關單元123及124的實施方式並不限定於此,可依實際應用時之情況配合適當的實施方式,達到相同的目的。If it is determined in step S503 that the first feedback voltage FB1 is greater than the second reference voltage REF2, then step S505 is performed. At step S505, the first comparator 122 outputs a high level voltage such that the transistor SW1 is in an on state, and the transistor SW2 is in a truncated state. When the transistor SW2 is turned off and the transistor SW1 is turned on, the voltage comparison unit 120 supplies the third reference voltage REF3 as the feedback voltage FB to the feedback terminal FIN of the voltage generating unit 110. It should be noted that the embodiments of the switch units 123 and 124 are not limited thereto, and may be combined with an appropriate embodiment according to the actual application to achieve the same purpose.

請參照圖2,電壓比較單元120的實現方式不限於圖3與圖4所示方式。在本發明其他實施例中,圖2所示電壓比較單元120所提供於電壓產生單元110的輸出端OUT及回授端FIN間的回授路徑不會因電壓上述電壓比較結果而被切斷。取而代之的是,當電壓產生單元110的輸出端的電壓Vout大於第二參考電壓REF2時,電壓比較單元120提供第三參考電壓REF3至輸出電晶體Pout的控制端。因此,當輸出電壓Vout過大時,電壓調整器11能夠快速且即時的截止輸出電晶體Pout,避免輸出電晶體Pout及/或負載150有損壞的可能。Referring to FIG. 2, the implementation of the voltage comparison unit 120 is not limited to the modes shown in FIG. 3 and FIG. In other embodiments of the present invention, the feedback path provided between the output terminal OUT and the feedback terminal FIN of the voltage generating unit 110 shown by the voltage comparing unit 120 shown in FIG. 2 is not cut off due to the voltage comparison result. Instead, when the voltage Vout at the output of the voltage generating unit 110 is greater than the second reference voltage REF2, the voltage comparing unit 120 supplies the third reference voltage REF3 to the control terminal of the output transistor Pout. Therefore, when the output voltage Vout is excessively large, the voltage regulator 11 can quickly and immediately turn off the output transistor Pout, avoiding the possibility that the output transistor Pout and/or the load 150 is damaged.

圖6為根據本發明第三實施例所繪示之電壓調整器的一種實施方式。圖6所示實施例可以參照圖2、圖3與圖4的相關說明。請參照圖6,誤差放大器OP1、輸出電晶體Pout及負載150間之耦接關係與上述實施例相同,在此不贅述。不同於圖4所示實施例之處,在於電壓比較單元120的實現方式。圖6中電壓比較單元120包括分壓電路121、第一比較器122以及開關單元125。分壓電路121由電阻R1、R2及R3組成。電阻R1、R2及R3串聯於輸出電晶體Pout的第二端及第三參考電壓REF3之間,提供一回授電壓FB至誤差放大器OP1之回授端FIN。第一比較器122之第一輸入端(例如負輸入端)接收第二參考電壓REF2,而第二輸入端(例如正輸入端)自分壓電路121接收回授電壓FB1。於本實施例中,開關單元125包括一NMOS電晶體SW3。電晶體SW3的第一端(例如汲極)連接至輸出電晶體Pout的控制端,電晶體SW3的第二端(例如源極)連接第三參考電壓REF3,以及電晶體SW3的控制端(例如閘極)耦接至第一比較器122之輸出端。FIG. 6 is an embodiment of a voltage regulator according to a third embodiment of the present invention. The embodiment shown in FIG. 6 can be referred to the related description of FIG. 2, FIG. 3 and FIG. Referring to FIG. 6, the coupling relationship between the error amplifier OP1, the output transistor Pout, and the load 150 is the same as that of the above embodiment, and details are not described herein. The difference from the embodiment shown in FIG. 4 lies in the implementation of the voltage comparison unit 120. The voltage comparison unit 120 in FIG. 6 includes a voltage dividing circuit 121, a first comparator 122, and a switching unit 125. The voltage dividing circuit 121 is composed of resistors R1, R2, and R3. The resistors R1, R2 and R3 are connected in series between the second end of the output transistor Pout and the third reference voltage REF3 to provide a feedback voltage FB to the feedback terminal FIN of the error amplifier OP1. The first input (eg, the negative input) of the first comparator 122 receives the second reference voltage REF2, and the second input (eg, the positive input) receives the feedback voltage FB1 from the voltage divider circuit 121. In the embodiment, the switch unit 125 includes an NMOS transistor SW3. A first end (eg, a drain) of the transistor SW3 is coupled to a control terminal of the output transistor Pout, and a second terminal (eg, a source) of the transistor SW3 is coupled to the third reference voltage REF3, and a control terminal of the transistor SW3 (eg, The gate is coupled to the output of the first comparator 122.

當輸出電壓Vout的分壓(回授電壓FB1)大於第二參考電壓REF2時,第一比較器122輸出一高準位電壓使得電晶體SW3導通,電壓比較單元120則因此提供第三參考電壓REF3(例如接地電壓)至輸出電晶體Pout的控制端,而造成輸出電晶體Pout截止。反之,當輸出電壓Vout的分壓(回授電壓FB1)小於第二參考電壓時,第一比較器122輸出一低準位電壓使得電晶體SW3截止,因此輸出電晶體Pout的作動則不受到影響。開關單元125的實施方式並不限定於此,可依實際應用時之情況配合適當的實施方式,達到相同的目的。When the divided voltage of the output voltage Vout (the feedback voltage FB1) is greater than the second reference voltage REF2, the first comparator 122 outputs a high level voltage such that the transistor SW3 is turned on, and the voltage comparison unit 120 thus provides the third reference voltage REF3. (for example, the ground voltage) to the control terminal of the output transistor Pout, causing the output transistor Pout to be turned off. On the contrary, when the divided voltage of the output voltage Vout (the feedback voltage FB1) is smaller than the second reference voltage, the first comparator 122 outputs a low-level voltage so that the transistor SW3 is turned off, so the operation of the output transistor Pout is not affected. . The embodiment of the switch unit 125 is not limited thereto, and may be combined with an appropriate embodiment according to the actual application to achieve the same object.

圖7為根據本發明第四實施例所繪示之電壓調整器11的一種之功能示意圖。圖7所示實施例可以參照圖2、圖3、圖4與圖6的相關說明。此實施例中除了在前述諸實施例所述之架構外,增加了電流感測單元130及限流單元140。電流感測單元130感測於電壓產生單元110輸出端的輸出電流,並將感測得到之電流感測結果傳送至限流單元140。限流單元140比較第一參考電流與該電流感測結果,並依據比較結果限制電壓產生單元110的輸出端的輸出電流。當電壓產生單元110的輸出電流大於預設值時,限流單元140會控制電壓產生單元110,以限制電壓產生單元110的輸出電流。因此,在原先限制輸出電壓的功能外,電壓調整器11更增加了限制最大電流的保護功效。FIG. 7 is a schematic diagram of a function of a voltage regulator 11 according to a fourth embodiment of the present invention. The embodiment shown in FIG. 7 can refer to the related description of FIG. 2, FIG. 3, FIG. 4 and FIG. In this embodiment, in addition to the architecture described in the foregoing embodiments, the current sensing unit 130 and the current limiting unit 140 are added. The current sensing unit 130 senses the output current at the output of the voltage generating unit 110 and transmits the sensed current sensing result to the current limiting unit 140. The current limiting unit 140 compares the first reference current with the current sensing result, and limits the output current of the output end of the voltage generating unit 110 according to the comparison result. When the output current of the voltage generating unit 110 is greater than a preset value, the current limiting unit 140 controls the voltage generating unit 110 to limit the output current of the voltage generating unit 110. Therefore, in addition to the function of limiting the output voltage, the voltage regulator 11 further increases the protection effect of limiting the maximum current.

圖8為根據本發明第五實施例所繪示之電壓調整器11的一種實施方式。圖8所示實施例可以參照圖7的相關說明。請參照圖8,電壓調整器11包括電壓產生單元110、電壓比較單元120、電流感測單元130、限流單元140及溫度感測單元160。其中,電壓產生單元110及電壓比較單元120可以參照前述諸實施例之相關說明而實現之,故在此不再贅述。電流感測單元130包括第一P型電晶體P1,其閘極耦接誤差放大器OP1之輸出端OPO,電晶體P1的第一端(例如源極)耦接電源電壓VCC,以及電晶體P1的第二端(例如汲極)輸出電流感測結果至限流單元140。電流感測單元130根據輸出電流Iout產生感測電流Is(sensing current)。感測電流Is與輸出電流Iout的比例關係,相依於電晶體P1的尺寸(size)與輸出電晶體Pout的尺寸(size)二者之比例關係,例如Iout: Is=K1: 1,其中K1為第一比例值,與電晶體P1與輸出電晶體Pout之間的尺寸比例關係正相關。FIG. 8 is an embodiment of a voltage regulator 11 according to a fifth embodiment of the present invention. The embodiment shown in FIG. 8 can refer to the related description of FIG. 7. Referring to FIG. 8 , the voltage regulator 11 includes a voltage generating unit 110 , a voltage comparing unit 120 , a current sensing unit 130 , a current limiting unit 140 , and a temperature sensing unit 160 . The voltage generating unit 110 and the voltage comparing unit 120 can be implemented by referring to the related descriptions of the foregoing embodiments, and thus are not described herein again. The current sensing unit 130 includes a first P-type transistor P1, the gate of which is coupled to the output terminal OPO of the error amplifier OP1, the first end of the transistor P1 (eg, the source) is coupled to the power supply voltage VCC, and the transistor P1 The second end (eg, the drain) outputs a current sensed result to the current limiting unit 140. The current sensing unit 130 generates a sensing current Is according to the output current Iout. The proportional relationship between the sense current Is and the output current Iout depends on the ratio of the size of the transistor P1 to the size of the output transistor Pout, for example, Iout: Is=K1: 1, where K1 is The first ratio value is positively correlated with the size ratio relationship between the transistor P1 and the output transistor Pout.

限流單元160包括第一電流源IS1、第一電流鏡射單元141、第二電流鏡射單元142及上拉單元143。第一電流源IS1產生第一參考電流ir1。第一電流鏡射單元141耦接電流感測單元130以接收電流感測結果並鏡射產生第一鏡射電流im1。第二電流鏡射單元142耦接第一電流鏡射單元141與第一電流源IS1。第二電流鏡射單元142接收第一參考電流ir1並鏡射產生第二鏡射電流im2。上拉單元143耦接第一電流鏡射單元141及第一電流鏡射單元142。根據第一鏡射電流im1及第二鏡射電流im2而決定是否上拉輸出電晶體Pout的閘極電壓。The current limiting unit 160 includes a first current source IS1, a first current mirroring unit 141, a second current mirroring unit 142, and a pull-up unit 143. The first current source IS1 generates a first reference current ir1. The first current mirroring unit 141 is coupled to the current sensing unit 130 to receive the current sensing result and mirrored to generate the first mirror current im1. The second current mirroring unit 142 is coupled to the first current mirror unit 141 and the first current source IS1. The second current mirroring unit 142 receives the first reference current ir1 and mirrors the second mirror current im2. The pull-up unit 143 is coupled to the first current mirror unit 141 and the first current mirror unit 142. Whether to pull up the gate voltage of the output transistor Pout is determined according to the first mirror current im1 and the second mirror current im2.

第一電流鏡射單元141包括第一N型電晶體N1及第二N型電晶體N2。電晶體N1之第一端(例如汲極)接收電流感測結果,也就是感測電流Is,電晶體N1之第二端(例如源極)耦接第三參考電壓REF3,以及電晶體N1之閘極耦接至電晶體N1自身的汲極。電晶體N2的第一端(例如汲極)則輸出第一鏡射電流im1,電晶體N2的第二端(例如源極)耦接第三參考電壓REF3,以及電晶體N2的閘極耦接至電晶體N1的閘極。根據電晶體N1與N2之間的尺寸比例,第一鏡射電流im1與感測電流Is存在一固定比例關係,例如Is: im1=K2: 1,其中K2為第二比例值,與電晶體N1與N2之間的尺寸比例正相關。因此,第一鏡射電流im1與輸出電流Iout的關係則為im1=Iout/(K1*K2)。The first current mirror unit 141 includes a first N-type transistor N1 and a second N-type transistor N2. The first end of the transistor N1 (eg, the drain) receives the current sensing result, that is, the sensing current Is, the second end of the transistor N1 (eg, the source) is coupled to the third reference voltage REF3, and the transistor N1 The gate is coupled to the drain of the transistor N1 itself. The first end of the transistor N2 (eg, the drain) outputs a first mirror current im1, the second end of the transistor N2 (eg, the source) is coupled to the third reference voltage REF3, and the gate of the transistor N2 is coupled. To the gate of transistor N1. According to the size ratio between the transistors N1 and N2, the first mirror current im1 has a fixed proportional relationship with the sensing current Is, for example, Is: im1=K2: 1, where K2 is the second ratio value, and the transistor N1 Positively related to the size ratio between N2. Therefore, the relationship between the first mirror current im1 and the output current Iout is im1=Iout/(K1*K2).

第二電流鏡射單元142包括第二P型電晶體P2及第三P型電晶體P3。電晶體P2之第一端(例如汲極)耦接第一電流源IS1以接收第一參考電流ir1,電晶體P2之第二端(例如源極)耦接電源電壓VCC,以及電晶體P2之閘極耦接至電晶體P2自身的汲極。電晶體P3的第一端(例如汲極)輸出第二鏡射電流im2,電晶體P3的第二端(例如源極)耦接電源電壓VCC,以及電晶體P3的閘極耦接至電晶體P2的閘極。根據電晶體P2與P3之間的尺寸比例,第二鏡射電流im2與第一參考電流ir1存在一固定比例關係,例如im2: ir1=K3: 1,其中K3為第三比例值,與電晶體P2與P3之間的尺寸比例正相關。因此,第二鏡射電流im2與第一參考電流ir1的關係則為im2=K3*Iout。上述第一電流源IS1所產生的固定電流ir1是為防止輸出電流Iout變化過大時所設定之電流限制。例如,在電壓調整器啟動時,可能有輸出電流Iout過大之情況;或電壓調整器11內部發生短路時可能亦有輸出電流Iout過大或過小的可能。The second current mirror unit 142 includes a second P-type transistor P2 and a third P-type transistor P3. The first end of the transistor P2 (eg, the drain) is coupled to the first current source IS1 to receive the first reference current ir1, the second end of the transistor P2 (eg, the source) is coupled to the power supply voltage VCC, and the transistor P2 The gate is coupled to the drain of the transistor P2 itself. The first end of the transistor P3 (eg, the drain) outputs a second mirror current im2, the second end of the transistor P3 (eg, the source) is coupled to the power supply voltage VCC, and the gate of the transistor P3 is coupled to the transistor The gate of P2. According to the size ratio between the transistors P2 and P3, the second mirror current im2 has a fixed proportional relationship with the first reference current ir1, for example, im2: ir1=K3: 1, where K3 is the third ratio value, and the transistor The size ratio between P2 and P3 is positively correlated. Therefore, the relationship between the second mirror current im2 and the first reference current ir1 is im2=K3*Iout. The fixed current ir1 generated by the first current source IS1 is a current limit set to prevent the output current Iout from being excessively changed. For example, when the voltage regulator is activated, there may be a case where the output current Iout is excessive; or when the short circuit occurs inside the voltage regulator 11, there may be an excessive or too small output current Iout.

上拉單元143包括第四P型電晶體P4。電晶體P4的閘極耦接第一鏡射電流im1及第二鏡射電流im2,電晶體P4的第一端(例如源極)耦接電源電壓VCC,以及電晶體P4的第二端(例如汲極)耦接輸出電晶體Pout的閘極。上拉單元143根據第一鏡射電流im1及第二鏡射電流im2的大小來決定是否被啟動。例如,當第一鏡射電流im1小於第二鏡射電流im2時,電晶體P4的閘極電壓上升,使得上拉單元143不被啟動。反之,當第一鏡射電流im1大於第二鏡射電流im2時,電晶體P4的閘極電壓下降,使得上拉單元143被啟動。被啟動的上拉單元143會將輸出電晶體Pout的閘極電壓上拉至接近電源電壓VCC,以截止輸出電晶體Pout。The pull-up unit 143 includes a fourth P-type transistor P4. The gate of the transistor P4 is coupled to the first mirror current im1 and the second mirror current im2, the first end (eg, the source) of the transistor P4 is coupled to the power supply voltage VCC, and the second end of the transistor P4 (eg The bungee is coupled to the gate of the output transistor Pout. The pull-up unit 143 determines whether or not to be activated based on the magnitudes of the first mirror current im1 and the second mirror current im2. For example, when the first mirror current im1 is smaller than the second mirror current im2, the gate voltage of the transistor P4 rises, so that the pull-up unit 143 is not activated. On the contrary, when the first mirror current im1 is larger than the second mirror current im2, the gate voltage of the transistor P4 is lowered, so that the pull-up unit 143 is activated. The activated pull-up unit 143 pulls up the gate voltage of the output transistor Pout to be close to the power supply voltage VCC to turn off the output transistor Pout.

另外,第一鏡射電流im1比例於輸出電流Iout,且第二鏡射電流im2比例於第一參考電流ir1。因此,經過適當的設計,當輸出電流Iout未達上限時,也就是第一鏡射電流im1小於第二鏡射電流im2,而上拉單元143不被啟動。反之,當輸出電流Iout高過上限時,使得第一鏡射電流im1大於第二鏡射電流im2。因此,上拉單元143啟動,也就是電晶體P4上拉輸出電晶體Pout的閘極電壓至接近電源電壓VCC,使得輸出電晶體Pout關閉。限流單元160便能以此機制達到限制電流進而保護電路的功效。In addition, the first mirror current im1 is proportional to the output current Iout, and the second mirror current im2 is proportional to the first reference current ir1. Therefore, with proper design, when the output current Iout does not reach the upper limit, that is, the first mirror current im1 is smaller than the second mirror current im2, and the pull-up unit 143 is not activated. On the contrary, when the output current Iout is higher than the upper limit, the first mirror current im1 is made larger than the second mirror current im2. Therefore, the pull-up unit 143 is activated, that is, the transistor P4 pulls up the gate voltage of the output transistor Pout to be close to the power supply voltage VCC, so that the output transistor Pout is turned off. The current limiting unit 160 can use this mechanism to limit the current and thereby protect the circuit.

溫度感測單元160包括比較器COM2及開關單元161。比較器COM2的正輸入端耦接溫度參考電壓TREF,比較器COM2的負輸入端耦接負載的溫度電壓TV。例如,所述負載包括電池,而溫度電壓TV為電池溫度的對應電壓。開關單元161包括一PMOS電晶體SW4,其第一端(例如源極)耦接電源電壓VCC,其第二端(例如汲極)耦接誤差放大器OP1的輸出端OPO,以及其控制端耦接該比較器COM2之輸出端。溫度參考電壓TREF作為電池溫度電壓TV之一上限,當溫度電壓TV大於溫度參考電壓TREF時,比較器COM2將輸出一低準位電壓使得第四開關單元161導通。第四開關單元161導通時,則將誤差放大器OP1的輸出端OPO之電壓上拉至接近電源電壓VCC,使得輸出電晶體Pout被截斷。換句話說,當負載150中之電池溫度過高時,溫度感測單元160會截斷電壓產生單元110輸出電壓Vout及電流Iout的輸出,使得負載中的電池的溫度不再持續上升。在本實施例中,溫度感測單元160為一選擇性實施的單元。在溫度感測單元160不實施(移除)的情況下,電壓調整器11中的其他單元及其功能皆不會影響。The temperature sensing unit 160 includes a comparator COM2 and a switching unit 161. The positive input terminal of the comparator COM2 is coupled to the temperature reference voltage TREF, and the negative input terminal of the comparator COM2 is coupled to the temperature voltage TV of the load. For example, the load includes a battery and the temperature voltage TV is a corresponding voltage of the battery temperature. The switch unit 161 includes a PMOS transistor SW4. The first end (eg, the source) is coupled to the power supply voltage VCC, and the second end (eg, the drain) is coupled to the output terminal OPO of the error amplifier OP1, and the control end thereof is coupled. The output of the comparator COM2. The temperature reference voltage TREF is an upper limit of the battery temperature voltage TV. When the temperature voltage TV is greater than the temperature reference voltage TREF, the comparator COM2 will output a low level voltage so that the fourth switching unit 161 is turned on. When the fourth switching unit 161 is turned on, the voltage of the output terminal OPO of the error amplifier OP1 is pulled up to be close to the power supply voltage VCC, so that the output transistor Pout is cut off. In other words, when the battery temperature in the load 150 is too high, the temperature sensing unit 160 cuts off the output of the voltage generating unit 110 output voltage Vout and current Iout so that the temperature of the battery in the load does not continuously rise. In the present embodiment, the temperature sensing unit 160 is a selectively implemented unit. In the case where the temperature sensing unit 160 is not implemented (removed), other units in the voltage regulator 11 and their functions are not affected.

圖9為根據本發明第六實施例所繪示之電壓調整器的一種實施方式。圖9所示實施例可以參照圖7與圖8的相關說明。其中各單元之耦接關係與實施方式皆與前述圖7與圖8實施例相同,不同的是,在第一電流源IS1旁增加擴增電流源模組145。FIG. 9 is an embodiment of a voltage regulator according to a sixth embodiment of the present invention. The embodiment shown in FIG. 9 can refer to the related description of FIG. 7 and FIG. 8. The coupling relationship and implementation manner of each unit are the same as the foregoing embodiment of FIG. 7 and FIG. 8 except that the amplification current source module 145 is added next to the first current source IS1.

請參照圖9,擴增電流源模組145包括比較器COM3、第二電流源IS2以及開關單元1451。比較器COM3。比較器COM3的正輸入端耦接第四參考電壓REF4,而負輸入端耦接至電壓產生單元110的輸出端。例如,於本實施例中,比較器COM3的負輸入端經由電阻R41耦接至電壓產生單元110的輸出端。電阻R41、R42、R43與R44形成一個分壓電路。此分壓電路接收電壓產生單元110的輸出電壓Vout。比較器COM3的負輸入端接收此分壓電路所輸出的分壓電壓VOS。第二電流源IS2用以產生參考電流ir2。開關單元1451包括一NMOS電晶體SW5,其第一端與第一電流源IS1共同並聯於第二電流鏡射單元142,而其第二端耦接第二電流源IS2。開關單元1451的控制端則耦接比較器COM3之輸出端。Referring to FIG. 9 , the amplification current source module 145 includes a comparator COM3 , a second current source IS2 , and a switching unit 1451 . Comparator COM3. The positive input terminal of the comparator COM3 is coupled to the fourth reference voltage REF4, and the negative input terminal is coupled to the output terminal of the voltage generating unit 110. For example, in this embodiment, the negative input terminal of the comparator COM3 is coupled to the output terminal of the voltage generating unit 110 via the resistor R41. Resistors R41, R42, R43 and R44 form a voltage divider circuit. This voltage dividing circuit receives the output voltage Vout of the voltage generating unit 110. The negative input terminal of the comparator COM3 receives the divided voltage VOS output by the voltage dividing circuit. The second current source IS2 is used to generate the reference current ir2. The switch unit 1451 includes an NMOS transistor SW5, the first end of which is coupled in parallel with the first current source IS1 to the second current mirror unit 142, and the second end of which is coupled to the second current source IS2. The control terminal of the switch unit 1451 is coupled to the output of the comparator COM3.

當輸出分壓電壓VOS小於第四參考電壓REF4時,比較器COM3會於輸出端輸出一高準位電壓,使得開關單元1451被導通。開關單元1451被導通後,第二鏡射單元142中之第二P型電晶體P2的汲極所接收到的電流會變大(第一參考電流ir1及第二參考電流ir2之和)。換句話說,經過適當的設計,當輸出電壓Vout提高,使得輸出電流Iout超過電壓調整器11限制,卻又還不至於使得電路損壞的情況下,擴增電流源模組145可在原有的第一電流源IS1外,增加第二電流源IS2,提高了電壓調整器11對輸出電流Iout的上限。When the output divided voltage VOS is smaller than the fourth reference voltage REF4, the comparator COM3 outputs a high level voltage at the output terminal, so that the switching unit 1451 is turned on. After the switching unit 1451 is turned on, the current received by the drain of the second P-type transistor P2 in the second mirror unit 142 becomes larger (the sum of the first reference current ir1 and the second reference current ir2). In other words, after proper design, when the output voltage Vout is increased so that the output current Iout exceeds the limit of the voltage regulator 11, but the circuit is not damaged, the amplification current source module 145 can be in the original In addition to a current source IS1, the second current source IS2 is added to increase the upper limit of the output current Iout by the voltage regulator 11.

值得一提的是,於本發明各個實施例所提及之參考電壓REF1~REF4或溫度參考電壓TREF皆在實際應用時經由需要所各自設定,經過適當的設計,例如分壓電路的電阻搭配等手段,亦可使參考電壓REF1~REF4或溫度參考電壓TREF之電壓準位相等,但本發明並不限定於上述。It should be noted that the reference voltages REF1 REF REF4 or the temperature reference voltage TREF mentioned in the various embodiments of the present invention are appropriately set in the actual application, and are appropriately designed, for example, the resistors of the voltage dividing circuit. Alternatively, the voltage levels of the reference voltages REF1 to REF4 or the temperature reference voltage TREF may be equal, but the present invention is not limited to the above.

圖10為根據本發明第七實施例所繪示之限流單元的一種實施方式,本實施例可視為一種較簡化之限流單元140的實施方式。請參照圖10,限流單元160包括第一電阻R71,第二電阻R72、第五P型電晶體P5及第三N型電晶體N3。第一電阻R71的第一端耦接於電流感測單元130,以及第一電阻R71的第二端耦接於第三參考電壓REF3。第二電阻R72的第一端耦接於電源電壓VCC。第五P型電晶體P5的閘極耦接第二電阻R72的第二端,而第五P型電晶體P5的源極耦接電源電壓VCC,以及第五P型電晶體P5的汲極耦接誤差放大器的輸出端OPO。第三N型電晶體N3的汲極耦接第二電阻R72的第二端,而第三N型電晶體N3的源極耦接第三參考電壓REF3,以及第三N型電晶體N3的閘極耦接第一電阻R71的第一端。FIG. 10 is an embodiment of a current limiting unit according to a seventh embodiment of the present invention. The present embodiment can be regarded as a simplified embodiment of the current limiting unit 140. Referring to FIG. 10, the current limiting unit 160 includes a first resistor R71, a second resistor R72, a fifth P-type transistor P5, and a third N-type transistor N3. The first end of the first resistor R71 is coupled to the current sensing unit 130, and the second end of the first resistor R71 is coupled to the third reference voltage REF3. The first end of the second resistor R72 is coupled to the power supply voltage VCC. The gate of the fifth P-type transistor P5 is coupled to the second end of the second resistor R72, and the source of the fifth P-type transistor P5 is coupled to the power supply voltage VCC, and the drain of the fifth P-type transistor P5 is coupled. Connect to the output of the error amplifier OPO. The drain of the third N-type transistor N3 is coupled to the second end of the second resistor R72, and the source of the third N-type transistor N3 is coupled to the third reference voltage REF3, and the gate of the third N-type transistor N3 The pole is coupled to the first end of the first resistor R71.

第一電阻R71及第二電阻R72可視為第一電流鏡射單元及第二電流鏡射單元的簡化實施方式,電阻R71接收感測電流Is,因此當感測電流Is高於一下限時,電晶體N3則可運作如一穩定電流源,而當感測電流is低於下限時,電晶體N3則截止。電晶體P5之運作方法如同前述之上拉單元,當電晶體P5之閘極從電阻R72的第二端之電壓低於一下限時,電晶體P5則被導通,並上拉誤差放大器OP1之輸出端的電壓接近電源電壓VCC,而截止電壓產生單元110的輸出。The first resistor R71 and the second resistor R72 can be regarded as a simplified implementation of the first current mirror unit and the second current mirror unit. The resistor R71 receives the sensing current Is, so when the sensing current Is is higher than a lower limit, the transistor N3 can operate as a stable current source, and when the sense current is below the lower limit, the transistor N3 is turned off. The transistor P5 operates in the same manner as the above-mentioned pull-up unit. When the voltage of the gate of the transistor P5 from the second end of the resistor R72 is lower than a lower limit, the transistor P5 is turned on, and the output terminal of the error amplifier OP1 is pulled up. The voltage is close to the power supply voltage VCC, and the output of the voltage generating unit 110 is turned off.

綜上所述,本發明提出一種電壓調整器,能夠限制輸出電壓能在一預定的範圍以內,以避免在例如電壓調整器啟動時發生的不預期的狀況,而造成輸出電壓過大或電路及其元件損壞的情形。另外,本發明亦提供了限制電流在預定範圍的能力以及負載中之電池溫度過高的保護機制,以期能更全面的保護電路不因外在突發狀況而造成損壞,甚至影響其他連接之構件。In summary, the present invention provides a voltage regulator capable of limiting the output voltage within a predetermined range to avoid unintended conditions such as occurs when the voltage regulator is activated, resulting in an excessive output voltage or circuit and its The condition of component damage. In addition, the present invention also provides a protection mechanism for limiting the current in a predetermined range and an excessively high battery temperature in the load, so as to provide a more comprehensive protection circuit from damage caused by external emergencies, and even affect other connected components. .

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

11...電壓調整器11. . . Voltage regulator

110...電壓產生單元110. . . Voltage generating unit

120...電壓比較單元120. . . Voltage comparison unit

121...分壓電路121. . . Voltage dividing circuit

122、COM2~COM3...比較器122, COM2 ~ COM3. . . Comparators

123、124...開關單元123, 124. . . Switch unit

130...電流感測單元130. . . Current sensing unit

140...限流單元140. . . Current limiting unit

141、142...電流鏡射單元141, 142. . . Current mirror unit

143...上拉單元143. . . Pull-up unit

150...負載150. . . load

160...溫度感測單元160. . . Temperature sensing unit

OP1...誤差放大器OP1. . . Error amplifier

SW1、SW3、SW5、P1~P5...NMOS電晶體SW1, SW3, SW5, P1 ~ P5. . . NMOS transistor

SW2、SW4、N1~N3...PMOS電晶體SW2, SW4, N1 ~ N3. . . PMOS transistor

R1~R3、R71、R72...電阻R1 to R3, R71, R72. . . resistance

IS1、IS2...電流源IS1, IS2. . . Battery

RIN...電壓產生單元參考端RIN. . . Voltage generating unit reference

FIN...電壓產生單元回授端FIN. . . Voltage generating unit

CIN...電壓比較單元輸入端CIN. . . Voltage comparison unit input

OUT...電壓產生單元輸出端OUT. . . Voltage generating unit output

COUT...電壓比較單元輸出端COUT. . . Voltage comparison unit output

OPIN1、OPIN2...誤差放大器輸入端OPIN1, OPIN2. . . Error amplifier input

OPO...誤差放大器輸出端OPO. . . Error amplifier output

CIN11、CIN12...第一比較器輸入端CIN11, CIN12. . . First comparator input

REF1、REF2、REF3、REF4、TREF...參考電壓REF1, REF2, REF3, REF4, TREF. . . Reference voltage

TV...溫度電壓TV. . . Temperature and voltage

Vout...輸出電壓Vout. . . The output voltage

OPout...誤差放大器輸出電壓OPout. . . Error amplifier output voltage

FB、FB1~FB2...回授電壓FB, FB1 ~ FB2. . . Feedback voltage

VOS...輸出分壓電壓VOS. . . Output voltage divider

Iout...輸出電流Iout. . . Output current

Is...感測電流Is. . . Sense current

im1...第一鏡射電流Im1. . . First mirror current

im2...第二鏡射電流Im2. . . Second mirror current

ir1...第一參考電流Ir1. . . First reference current

ir2...第二參考電流Ir2. . . Second reference current

S501~S505...步驟S501~S505. . . step

圖1繪示為根據一習知技術所繪示之電壓調整器之電路示意圖。FIG. 1 is a circuit diagram of a voltage regulator according to a conventional technique.

圖2為根據本發明第一實施例所繪示之電壓調整器的功能方塊圖。2 is a functional block diagram of a voltage regulator according to a first embodiment of the present invention.

圖3為根據本發明第二實施例所繪示之電壓調整器的功能方塊圖。3 is a functional block diagram of a voltage regulator according to a second embodiment of the present invention.

圖4為說明圖3所示第二實施例中電壓調整器的一種實施方式。Fig. 4 is a view showing an embodiment of a voltage regulator in the second embodiment shown in Fig. 3.

圖5為根據本發明一實施例所繪示電壓調整器的操作方法之方法流程圖。FIG. 5 is a flow chart of a method for operating a voltage regulator according to an embodiment of the invention.

圖6為根據本發明第三實施例所繪示之電壓調整器的一種實施方式。FIG. 6 is an embodiment of a voltage regulator according to a third embodiment of the present invention.

圖7為根據本發明第四實施例所繪示之電壓調整器的一種之功能示意圖。FIG. 7 is a schematic diagram of a function of a voltage regulator according to a fourth embodiment of the present invention.

圖8為根據本發明第五實施例所繪示之電壓調整器的一種實施方式。FIG. 8 is an embodiment of a voltage regulator according to a fifth embodiment of the present invention.

圖9為根據本發明第六實施例所繪示之電壓調整器的一種實施方式。FIG. 9 is an embodiment of a voltage regulator according to a sixth embodiment of the present invention.

圖10為根據本發明第七實施例所繪示之電流感測單元及限流單元的一種實施方式。FIG. 10 illustrates an embodiment of a current sensing unit and a current limiting unit according to a seventh embodiment of the present invention.

11...電壓調整器11. . . Voltage regulator

110...電壓產生單元110. . . Voltage generating unit

120...電壓比較單元120. . . Voltage comparison unit

150...負載150. . . load

RIN...參考端RIN. . . Reference end

FIN...回授端FIN. . . Feedback end

CIN...輸入端CIN. . . Input

OUT、COUT...輸出端OUT, COUT. . . Output

REF1、REF2、REF3...參考電壓REF1, REF2, REF3. . . Reference voltage

Vout...輸出電壓Vout. . . The output voltage

Claims (17)

一種電壓調整器,包括:一電壓產生單元,具有一參考端、一回授端及一輸出端,該電壓產生單元的該參考端接收一第一參考電壓,其中依據該電壓產生單元的該參考端與該回授端二者電壓的關係,該電壓產生單元經由該輸出端對應產生一輸出電壓至一負載;以及一電壓比較單元,該電壓比較單元的一輸入端耦接至該電壓產生單元的該輸出端,該電壓比較單元的一輸出端耦接至該電壓產生單元的該回授端,該電壓比較單元比較該電壓產生單元的該輸出端的電壓與一第二參考電壓,其中當該電壓產生單元的該輸出端的電壓小於該第二參考電壓時,該電壓比較單元提供一回授路徑於該電壓產生單元的該輸出端與該回授端之間,以及當該電壓產生單元的該輸出端的電壓大於該第二參考電壓時,該電壓比較單元切斷該回授路徑以及提供一第三參考電壓至該電壓產生單元的該回授端。A voltage regulator includes: a voltage generating unit having a reference terminal, a feedback terminal, and an output terminal, the reference terminal of the voltage generating unit receiving a first reference voltage, wherein the reference is generated according to the voltage generating unit The voltage generating unit correspondingly generates an output voltage to a load via the output terminal; and a voltage comparing unit, wherein an input end of the voltage comparing unit is coupled to the voltage generating unit The output terminal of the voltage comparison unit is coupled to the feedback terminal of the voltage generating unit, and the voltage comparison unit compares the voltage of the output terminal of the voltage generating unit with a second reference voltage, where When the voltage of the output terminal of the voltage generating unit is less than the second reference voltage, the voltage comparing unit provides a feedback path between the output end of the voltage generating unit and the feedback terminal, and when the voltage generating unit When the voltage of the output terminal is greater than the second reference voltage, the voltage comparison unit cuts off the feedback path and provides a third reference voltage to the Pressure generating means side of the feedback. 如申請專利範圍第1項所述之電壓調整器,其中所述電壓比較單元包括:一分壓電路,耦接於該電壓產生單元的該輸出端與該第三參考電壓之間,分壓產生至少一第一回授電壓及一第二回授電壓;一第一比較器,具有一第一輸入端、一第二輸入端及一輸出端,其中該第一比較器的該第一輸入端耦接該第二參考電壓,該第一比較器的該第二輸入端耦接該第一回授電壓;一第一開關單元,具有一第一端、一第二端及一控制端,其中該第一開關單元的第一端耦接至該電壓產生單元的該回授端,該第一開關單元的第二端耦接至該第三參考電壓,以及該第一開關單元的控制端耦接至該第一比較器的該輸出端;以及一第二開關單元,具有一第一端、一第二端及一控制端,其中該第二開關單元的第一端耦接至該電壓產生單元的該回授端,該第二開關單元的第二端耦接至該第二回授電壓,以及該第二開關單元的控制端耦接至該第一比較器的該輸出端。The voltage regulator of claim 1, wherein the voltage comparison unit comprises: a voltage dividing circuit coupled between the output terminal of the voltage generating unit and the third reference voltage, and the voltage divider Generating at least a first feedback voltage and a second feedback voltage; a first comparator having a first input terminal, a second input terminal, and an output terminal, wherein the first input of the first comparator The second input end of the first comparator is coupled to the first feedback voltage, and the first switch unit has a first end, a second end, and a control end. The first end of the first switch unit is coupled to the feedback end of the voltage generating unit, the second end of the first switch unit is coupled to the third reference voltage, and the control end of the first switch unit The first switching terminal is coupled to the output terminal, and the second switching unit has a first end, a second end, and a control end, wherein the first end of the second switching unit is coupled to the voltage Generating the feedback end of the unit, and coupling the second end of the second switch unit Connected to the second feedback voltage, and the control end of the second switching unit is coupled to the output of the first comparator. 如申請專利範圍第1項所述之電壓調整器,其中該電壓產生單元包括:一誤差放大器,具有一第一輸入端及一第二輸入端分別耦接該電壓比較單元的輸出端及該第一參考電壓;以及一輸出電晶體,具有一控制端、一第一端與一第二端,該輸出電晶體的控制端耦接至該誤差放大器之一輸出端,該輸出電晶體的第一端耦接至一電源電壓,以及該輸出電晶體的第二端耦接至該電壓產生單元的該輸出端。The voltage regulator of claim 1, wherein the voltage generating unit comprises: an error amplifier having a first input end and a second input end coupled to the output end of the voltage comparison unit and the first a reference voltage; and an output transistor having a control terminal, a first terminal and a second terminal, the control terminal of the output transistor being coupled to an output of the error amplifier, the first of the output transistors The terminal is coupled to a power supply voltage, and the second end of the output transistor is coupled to the output end of the voltage generating unit. 如申請專利範圍第3項所述之電壓調整器,更包括:一電流感測單元,耦接至該電壓產生單元的輸出端,該電流感測單元感測該電壓產生單元的輸出端的輸出電流而產生一電流感測結果;以及一限流單元,耦接至該電壓產生單元與該電流感測單元,該限流單元比較一第一參考電流與該電流感測結果,並依據比較結果限制該電壓產生單元的輸出端的輸出電流。The voltage regulator according to claim 3, further comprising: a current sensing unit coupled to the output end of the voltage generating unit, the current sensing unit sensing an output current of the output end of the voltage generating unit And generating a current sensing result; and a current limiting unit coupled to the voltage generating unit and the current sensing unit, the current limiting unit comparing a first reference current and the current sensing result, and limiting according to the comparison result The output current of the output of the voltage generating unit. 如申請專利範圍第4項所述之電壓調整器,其中該電流感測單元包括:一第一P型電晶體,具有一閘極耦接該誤差放大器的該輸出端,一源極耦接該電源電壓,以及一汲極輸出該電流感測結果至該限流單元。The voltage regulator of claim 4, wherein the current sensing unit comprises: a first P-type transistor having a gate coupled to the output of the error amplifier, a source coupled to the source The power supply voltage, and a drain output the current sensing result to the current limiting unit. 如申請專利範圍第4項所述之電壓調整器,其中該限流單元包括:一第一電流源,產生該第一參考電流;一第一電流鏡射單元,耦接該電流感測單元,接收該電流感測結果並鏡射產生一第一鏡射電流;一第二電流鏡射單元,耦接該第一電流鏡射單元與該第一電流源,接收該第一參考電流並鏡射產生一第二鏡射電流;以及一上拉單元,耦接該第一電流鏡射單元及該第一電流鏡射單元,根據該第一鏡射電流及該第二鏡射電流而決定是否上拉該輸出電晶體的控制端的電壓。The voltage regulator of claim 4, wherein the current limiting unit comprises: a first current source to generate the first reference current; a first current mirroring unit coupled to the current sensing unit, Receiving the current sensing result and mirroring to generate a first mirror current; a second current mirroring unit coupled to the first current mirror unit and the first current source, receiving the first reference current and mirroring Generating a second mirror current; and a pull-up unit coupled to the first current mirror unit and the first current mirror unit, determining whether to be based on the first mirror current and the second mirror current Pull the voltage at the control terminal of the output transistor. 如申請專利範圍第6項所述之電壓調整器,其中該上拉單元包括:一第四P型電晶體,該第四P型電晶體的一閘極耦接該第一鏡射電流及該第二鏡射電流,該第四P型電晶體的一源極耦接該電源電壓,以及該第四P型電晶體的一汲極耦接該誤差放大器的該輸出端。The voltage regulator of claim 6, wherein the pull-up unit comprises: a fourth P-type transistor, a gate of the fourth P-type transistor coupled to the first mirror current and the a second mirror current, a source of the fourth P-type transistor is coupled to the power supply voltage, and a drain of the fourth P-type transistor is coupled to the output of the error amplifier. 如申請專利範圍第6項所述之電壓調整器,其中該限流單元更包括:一第二比較器,具有一正輸入端耦接一第四參考電壓、一負輸入端耦接該電壓產生單元的輸出端;一第二電流源,產生一第二參考電流;以及一第三開關單元,該第三開關單元的一第一端與該第一電流源共同並聯於該第二電流鏡射單元,該第三開關單元的一第二端耦接該第二電流源,以及該第三開關單元的一控制端耦接該第二比較器之輸出端。The voltage regulator of claim 6, wherein the current limiting unit further comprises: a second comparator having a positive input coupled to a fourth reference voltage and a negative input coupled to the voltage generated An output of the unit; a second current source to generate a second reference current; and a third switching unit, a first end of the third switching unit being coupled in parallel with the first current source to the second current mirror The second terminal of the third switching unit is coupled to the second current source, and a control end of the third switching unit is coupled to the output of the second comparator. 如申請專利範圍第3項所述之電壓調整器,其中該負載包括一電池,而所述電壓調整器更包括:一第三比較器,具有一正輸入端耦接一溫度參考電壓、一負輸入端耦接該電池的一溫度電壓;以及一第四開關單元,該第四開關單元的一第一端耦接該電源電壓,該第四開關單元的一第二端耦接該誤差放大器的該輸出端,以及該第四開關單元的一控制端耦接該第三比較器之輸出端。The voltage regulator of claim 3, wherein the load comprises a battery, and the voltage regulator further comprises: a third comparator having a positive input coupled to a temperature reference voltage and a negative The input end is coupled to a temperature voltage of the battery; and a fourth switch unit, a first end of the fourth switch unit is coupled to the power supply voltage, and a second end of the fourth switch unit is coupled to the error amplifier The output end and a control end of the fourth switch unit are coupled to the output end of the third comparator. 一種電壓調整器的操作方法,包括:配置一電壓產生單元,其中該電壓產生單元具有一參考端、一回授端及一輸出端,而該電壓產生單元依據該參考端與該回授端二者電壓的關係經由該輸出端對應產生一輸出電壓至一負載;提供一第一參考電壓至該電壓產生單元的該參考端;比較該電壓產生單元的該輸出端的電壓與一第二參考電壓;當該電壓產生單元的該輸出端的電壓小於該第二參考電壓時,提供一回授路徑於該電壓產生單元的該輸出端與該回授端之間;以及當該電壓產生單元的該輸出端的電壓大於該第二參考電壓時,切斷該回授路徑以及提供一第三參考電壓至該電壓產生單元的該回授端。A method for operating a voltage regulator includes: configuring a voltage generating unit, wherein the voltage generating unit has a reference end, a feedback end, and an output end, and the voltage generating unit is configured according to the reference end and the feedback end The voltage relationship correspondingly generates an output voltage to a load via the output end; providing a first reference voltage to the reference end of the voltage generating unit; comparing the voltage of the output end of the voltage generating unit with a second reference voltage; When a voltage of the output terminal of the voltage generating unit is less than the second reference voltage, providing a feedback path between the output end of the voltage generating unit and the feedback terminal; and when the output end of the voltage generating unit When the voltage is greater than the second reference voltage, the feedback path is cut off and a third reference voltage is supplied to the feedback terminal of the voltage generating unit. 一種電壓調整器,包括:一誤差放大器,具有一第一輸入端、一第二輸入端與一輸出端,其中該誤差放大器的第二輸入端耦接一第一參考電壓;一輸出電晶體,具有一第一端、一第二端與一控制端,其中該輸出電晶體的控制端耦接至該誤差放大器之輸出端,該輸出電晶體的第一端耦接至一電源電壓,以及該輸出電晶體的第二端對應產生一輸出電壓至一負載;以及一電壓比較單元,該電壓比較單元的一輸入端耦接至該輸出電晶體的第二端,該電壓比較單元的一輸出端耦接至該誤差放大器的第一輸入端,該電壓比較單元提供一回授路徑於該輸出電晶體的第二端與該誤差放大器的第一輸入端之間,以及該電壓比較單元比較該輸出電晶體的第二端的電壓與一第二參考電壓,其中當該輸出電晶體的第二端的電壓大於該第二參考電壓時,該電壓比較單元提供一第三參考電壓至該輸出電晶體的控制端。A voltage regulator includes: an error amplifier having a first input terminal, a second input terminal, and an output terminal, wherein the second input terminal of the error amplifier is coupled to a first reference voltage; an output transistor, a first end, a second end, and a control end, wherein the control end of the output transistor is coupled to the output end of the error amplifier, the first end of the output transistor is coupled to a power supply voltage, and the The second end of the output transistor corresponds to an output voltage to a load; and a voltage comparison unit, an input end of the voltage comparison unit is coupled to the second end of the output transistor, and an output of the voltage comparison unit And coupled to the first input end of the error amplifier, the voltage comparison unit provides a feedback path between the second end of the output transistor and the first input end of the error amplifier, and the voltage comparison unit compares the output a voltage of the second end of the transistor and a second reference voltage, wherein when the voltage of the second end of the output transistor is greater than the second reference voltage, the voltage comparison unit provides a Three reference voltage to the control terminal of the output transistor. 如申請專利範圍第11項所述之電壓調整器,其中所述電壓比較單元包括:一分壓電路,耦接於該輸出電晶體的第二端與該第三參考電壓之間,分壓產生至少一第一回授電壓及一第二回授電壓;一第一比較器,具有一第一輸入端、一第二輸入端及一輸出端,其中該第一比較器的該第一輸入端耦接該第二參考電壓,該第一比較器的該第二輸入端耦接該第一回授電壓;以及一第一開關單元,具有一第一端、一第二端及一控制端,其中該第一開關單元的第一端耦接至該輸出電晶體的控制端,該第一開關單元的第二端耦接至該第三參考電壓,以及該第一開關單元的控制端耦接至該第一比較器的輸出端。The voltage regulator according to claim 11, wherein the voltage comparison unit comprises: a voltage dividing circuit coupled between the second end of the output transistor and the third reference voltage, and the voltage divider Generating at least a first feedback voltage and a second feedback voltage; a first comparator having a first input terminal, a second input terminal, and an output terminal, wherein the first input of the first comparator The second input end of the first comparator is coupled to the first feedback voltage; and the first switch unit has a first end, a second end, and a control end The first end of the first switch unit is coupled to the control end of the output transistor, the second end of the first switch unit is coupled to the third reference voltage, and the control end of the first switch unit is coupled Connected to the output of the first comparator. 如申請專利範圍第11項所述之電壓調整器,更包括:一第一P型電晶體,該第一P型電晶體的閘極耦接該誤差放大器之輸出端,該第一P型電晶體的源極耦接一電源電壓;以及一限流單元,耦接至該輸出電晶體的控制端與該第一P型電晶體的汲極,該限流單元比較一第一參考電流與該第一P型電晶體的汲極電流,並依據比較結果限制該輸出電晶體的輸出電流。The voltage regulator of claim 11, further comprising: a first P-type transistor, the gate of the first P-type transistor being coupled to the output end of the error amplifier, the first P-type The source of the crystal is coupled to a power supply voltage; and a current limiting unit coupled to the control end of the output transistor and the drain of the first P-type transistor, the current limiting unit comparing a first reference current with the The drain current of the first P-type transistor limits the output current of the output transistor according to the comparison result. 如申請專利範圍第13項所述之電壓調整器,其中該限流單元包括:一第一電流源,產生該第一參考電流;一第一電流鏡射單元,接收該第一P型電晶體的汲極電流並鏡射產生一第一鏡射電流;一第二電流鏡射單元,耦接該第一電流鏡射單元與該第一電流源,接收該第一參考電流並鏡射產生一第二鏡射電流;以及一上拉單元,耦接該第一電流鏡射單元及該第一電流鏡射單元,根據該第一鏡射電流及該第二鏡射電流而決定是否上拉該輸出電晶體的閘極電壓。The voltage regulator according to claim 13, wherein the current limiting unit comprises: a first current source to generate the first reference current; and a first current mirroring unit to receive the first P-type transistor Deuterium current and mirroring to generate a first mirror current; a second current mirroring unit coupled to the first current mirror unit and the first current source, receiving the first reference current and mirroring to generate a a second mirror current; and a pull-up unit coupled to the first current mirror unit and the first current mirror unit, determining whether to pull up according to the first mirror current and the second mirror current The gate voltage of the output transistor. 如申請專利範圍第14項所述之電壓調整器,其中該上拉單元包括:一第四P型電晶體,該第四P型電晶體的一閘極耦接該第一鏡射電流及該第二鏡射電流,該第四P型電晶體的一源極耦接該電源電壓,以及該第四P型電晶體的一汲極耦接該輸出電晶體的控制端。The voltage regulator of claim 14, wherein the pull-up unit comprises: a fourth P-type transistor, a gate of the fourth P-type transistor coupled to the first mirror current and the a second mirror current, a source of the fourth P-type transistor is coupled to the power supply voltage, and a drain of the fourth P-type transistor is coupled to the control terminal of the output transistor. 如申請專利範圍第14項所述之電壓調整器,其中該限流單元更包括:一第二比較器,具有一正輸入端耦接一第四參考電壓、一負輸入端耦接該輸出電晶體的第二端;一第二電流源,產生一第二參考電流;以及一第三開關單元,該第三開關單元的一第一端與該第一電流源共同並聯於該第二電流鏡射單元,該第三開關單元的一第二端耦接該第二電流源,以及該第三開關單元的一控制端耦接該第二比較器之輸出端。The voltage regulator of claim 14, wherein the current limiting unit further comprises: a second comparator having a positive input coupled to a fourth reference voltage and a negative input coupled to the output a second end of the crystal; a second current source to generate a second reference current; and a third switching unit, a first end of the third switching unit being coupled in parallel with the first current source to the second current mirror The second terminal of the third switching unit is coupled to the second current source, and a control terminal of the third switching unit is coupled to the output of the second comparator. 如申請專利範圍第11項所述之電壓調整器,其中該負載包括一電池,而所述電壓調整器更包括:一第三比較器,具有一正輸入端耦接一溫度參考電壓、一負輸入端耦接該電池的一溫度電壓;以及一第四開關單元,該第四開關單元的一第一端耦接該電源電壓,該第四開關單元的一第二端耦接該輸出電晶體的控制端,以及該第四開關單元的一控制端耦接該第三比較器之輸出端。The voltage regulator of claim 11, wherein the load comprises a battery, and the voltage regulator further comprises: a third comparator having a positive input coupled to a temperature reference voltage and a negative The input end is coupled to a temperature voltage of the battery; and a fourth switch unit, a first end of the fourth switch unit is coupled to the power supply voltage, and a second end of the fourth switch unit is coupled to the output transistor The control terminal and a control terminal of the fourth switch unit are coupled to the output end of the third comparator.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI621006B (en) * 2017-01-20 2018-04-11 璟德電子工業股份有限公司 Regulator circuit having switching function
TWI684091B (en) * 2019-01-31 2020-02-01 晶豪科技股份有限公司 Current limiter
TWI698732B (en) * 2018-12-26 2020-07-11 致茂電子股份有限公司 Surge protection module and power factor correction circuit with surge protection
CN112015220A (en) * 2019-05-29 2020-12-01 晶豪科技股份有限公司 Current limiter
TWI774491B (en) * 2021-07-28 2022-08-11 瑞昱半導體股份有限公司 Voltage regulator device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5580608B2 (en) * 2009-02-23 2014-08-27 セイコーインスツル株式会社 Voltage regulator

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI621006B (en) * 2017-01-20 2018-04-11 璟德電子工業股份有限公司 Regulator circuit having switching function
TWI698732B (en) * 2018-12-26 2020-07-11 致茂電子股份有限公司 Surge protection module and power factor correction circuit with surge protection
TWI684091B (en) * 2019-01-31 2020-02-01 晶豪科技股份有限公司 Current limiter
CN112015220A (en) * 2019-05-29 2020-12-01 晶豪科技股份有限公司 Current limiter
CN112015220B (en) * 2019-05-29 2022-02-11 晶豪科技股份有限公司 Current limiter
TWI774491B (en) * 2021-07-28 2022-08-11 瑞昱半導體股份有限公司 Voltage regulator device

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