TW201308702A - Organic field effect transistor and organic semiconductor material - Google Patents

Organic field effect transistor and organic semiconductor material Download PDF

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TW201308702A
TW201308702A TW101106973A TW101106973A TW201308702A TW 201308702 A TW201308702 A TW 201308702A TW 101106973 A TW101106973 A TW 101106973A TW 101106973 A TW101106973 A TW 101106973A TW 201308702 A TW201308702 A TW 201308702A
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semiconductor material
organic semiconductor
effect transistor
field effect
layer
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TW101106973A
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TWI549327B (en
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Kazuo Takimiya
Chihaya Adachi
Masaaki Ikeda
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Univ Kyushu Nat Univ Corp
Nippon Kayaku Kk
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    • CCHEMISTRY; METALLURGY
    • C07ORGANIC CHEMISTRY
    • C07DHETEROCYCLIC COMPOUNDS
    • C07D495/00Heterocyclic compounds containing in the condensed system at least one hetero ring having sulfur atoms as the only ring hetero atoms
    • C07D495/02Heterocyclic compounds containing in the condensed system at least one hetero ring having sulfur atoms as the only ring hetero atoms in which the condensed system contains two hetero rings
    • C07D495/04Ortho-condensed systems
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
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    • C09B57/00Other synthetic dyes of known constitution
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/60Organic compounds having low molecular weight
    • H10K85/649Aromatic compounds comprising a hetero atom
    • H10K85/657Polycyclic condensed heteroaromatic hydrocarbons
    • H10K85/6576Polycyclic condensed heteroaromatic hydrocarbons comprising only sulfur in the heteroaromatic polycondensed ring system, e.g. benzothiophene
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • H10K10/484Insulated gate field-effect transistors [IGFETs] characterised by the channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • H10K10/484Insulated gate field-effect transistors [IGFETs] characterised by the channel regions
    • H10K10/486Insulated gate field-effect transistors [IGFETs] characterised by the channel regions the channel region comprising two or more active layers, e.g. forming pn heterojunctions

Abstract

A field-effect transistor contains organic semiconductor material (A) represented by general formula (1), and organic semiconductor material (B) that is not the organic semiconductor material represented by general formula (1) (X1 represents an optionally substituted aliphatic hydrocarbon residue or an optionally substituted aromatic residue).

Description

有機場效電晶體及有機半導體材料 Airport efficient transistor and organic semiconductor materials

本發明有關有機場效電晶體(organic field effect transistor)。詳言之,有關半導體活性層(Semiconductor active layer)為由特定的構成的有機半導體材料及具有與前述有機半導體材料不相同的構造之有機半導體材料所成之有機場效電晶體。再詳言之,有關半導體活性層為由含有特定的構造之有機半導體材料之層及含有與前述有機半導體材料不相同的有機半導體材料之層的層合構造所成之有機場效電晶體。 The invention relates to an organic field effect transistor. In detail, the semiconductor active layer is an organic field-effect transistor formed of a specific organic semiconductor material and an organic semiconductor material having a structure different from the above-described organic semiconductor material. More specifically, the semiconductor active layer is an airport effect transistor formed of a laminated structure of a layer containing an organic semiconductor material having a specific structure and a layer containing an organic semiconductor material different from the above-described organic semiconductor material.

一般,場效電晶體,具有於基板上之半導體材料設置源電極(source electrode)、汲電極(drain electrode)以及介由此等電極及絕緣體層之閘電極(gate electrode)。目前,場效電晶體係使用以矽(silicon)作為中心之無機系的半導體材料,特別是非晶系矽(amorphous silicon)。除將於玻璃等的基板上使用此等半導體材料所製作之薄膜電晶體(thin film transistor)使用為顯示器等、或作為邏輯電路元件(logical electric circuit element)使用於集成電路(integrated electric circuit)之外,尚廣泛採用為開關元件(switching element)。再者,最近為半導體材料採用無機系氧化物的半導體之研究很盛行。但,如採用此種無機系的半導體材料之情形,在場效電晶體的製 造時需要在高溫或真空下處理,為其基板不能利用耐熱性較劣之薄膜或塑膠等,又由於需要高額的設備投資、或製造上需要多量能量之故,成本將成為非常高昂者,以致其應用範圍非常受限。 Generally, a field effect transistor has a source electrode on a substrate, a drain electrode, and a gate electrode via the electrode and the insulator layer. At present, the field effect electro-crystal system uses an inorganic semiconductor material centered on silicon, in particular, amorphous silicon. A thin film transistor fabricated using such a semiconductor material on a substrate such as glass is used as a display or the like, or as a logical electric circuit element for use in an integrated electric circuit. In addition, it is widely used as a switching element. Furthermore, recent research on semiconductors using inorganic oxides for semiconductor materials is very popular. However, in the case of using such an inorganic semiconductor material, in the field effect transistor manufacturing It needs to be processed at high temperature or under vacuum, and it is not possible to use a film or plastic with poor heat resistance for its substrate, and because of the high investment in equipment or the need for a large amount of energy in manufacturing, the cost will become very high. Its range of applications is very limited.

相對於此,在場效電晶體之製造時不需要高溫處理之經採用有機半導體材料之場效電晶體之開發亦在進行。如可採用有機半導體材料時,則能進行低溫製程下之製造,而可擴大能堪使用的基板材料的範圍。其結果,可製作更撓性,且輕量不易損壞之場效電晶體。又,於場效電晶體的製作過程中,亦有能藉由含有機半導體材料之溶液之塗佈、噴墨(inkjet)等的印刷方法而以低成本製造大面積的場效電晶體之可能性。 In contrast, the development of field effect transistors using organic semiconductor materials that do not require high temperature processing during the fabrication of field effect transistors is also underway. When an organic semiconductor material can be used, it can be manufactured under a low temperature process, and the range of substrate materials that can be used can be expanded. As a result, a field effect transistor which is more flexible and lighter and less susceptible to damage can be produced. Moreover, in the fabrication of the field effect transistor, there is also the possibility of manufacturing a large-area field effect transistor at a low cost by a coating method including a solution of an organic semiconductor material, an inkjet or the like. Sex.

但,使用遷移率(mobility)高、耐久性優異的有機半導體之場效電晶體並尚未實用化,為獲得經提升各種適合性(aptitude)起見,現在仍然有很多研究在進行。特別是穩定性之提升,係重要的課題之一。有機場效電晶體用的代表性的有機半導體而言,可例舉:戊省(pentacene)。由於戊省具有實用性的遷移率、且容易取得之故常常被應用,惟仍有在大氣中易被氧化以致電氣特性會降低之問題點。又,為彌補其缺點起見,已開發有一種經提升大氣穩定性之半導體(非專利文獻1、專利文獻1、專利文獻2)。但,由於大氣穩定性之提升,卻會招致遷移率之低落、或來自電極之電荷注入特性(electric charge injection specialty)的低落等的問題點之故,檢討對電極 之金屬氧化物處理或自組織化單分子膜形成(self-organization monomolecular film formation)等(專利文獻3、專利文獻4、非專利文獻2、非專利文獻3)。有人在研究藉由有機半導體層之層合而實現電晶體特性之提升之作法。例如,在非專利文獻4中,將戊省作為紅螢烯(rubrene)的結晶性控制材料活用,又在非專利文獻5中,將戊省作為苯并二噻吩二聚物(dimer)的結晶性控制材料活用,藉以提升結晶性,以期實現紅螢烯及苯并二噻吩二聚物的遷移率之提升。 However, field-effect transistors using organic semiconductors having high mobility and excellent durability have not yet been put into practical use, and many studies are still underway to obtain various aptitudes. In particular, the improvement of stability is one of the important issues. A representative organic semiconductor for use in an airport effect transistor is exemplified by pentacene. Because of its practical mobility and easy availability, the province is often used, but there are still problems in the atmosphere that are easily oxidized and the electrical characteristics are reduced. Further, in order to compensate for the shortcomings, a semiconductor having improved atmospheric stability has been developed (Non-Patent Document 1, Patent Document 1, and Patent Document 2). However, due to the improvement of atmospheric stability, it may cause problems such as low mobility or low voltage charge injection specialty. Metal oxide treatment or self-organization monomolecular film formation (Patent Document 3, Patent Document 4, Non-Patent Document 2, Non-Patent Document 3). Some people are studying the improvement of the transistor characteristics by laminating organic semiconductor layers. For example, in Non-Patent Document 4, pentacene is used as a crystallizing control material of rubrene, and in Non-Patent Document 5, pentacene is used as a crystal of benzodithiophene dimer. The control material is used in order to enhance the crystallinity in order to achieve an increase in the mobility of erythroprene and benzodithiophene dimer.

〔先前技術文獻〕 [Previous Technical Literature] 〔專利文獻〕 [Patent Document]

〔專利文獻1〕世界專利WO2006-077888公報〔專利文獻2〕日本專利第4157463號〔專利文獻3〕日本專利特開2005-327793號公報〔專利文獻4〕日本專利特開2009-302328號公報〔專利文獻5〕世界專利WO2010/058692號公報〔專利文獻6〕日本專利第4581062號 [Patent Document 1] Japanese Patent Laid-Open Publication No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. Patent Document 5] World Patent No. WO2010/058692 [Patent Document 6] Japanese Patent No. 4510662

〔非專利文獻〕 [Non-patent literature]

〔非專利文獻1〕J.Am.Chem.Soc.,(美國化學學會會誌),2006年出版,128(39)卷,第12604至12605頁〔非專利文獻2〕Applied Physics Letters(應用物理通訊)92期,013301頁(2008年)〔非專利文獻3〕Applied Physics Letters,89期, 033504頁(2006年)〔非專利文獻4〕Applied Physics Letters,89期,163505頁(2006年)〔非專利文獻5〕Applied Physics Letters,95期,263307頁(2009年) [Non-Patent Document 1] J. Am. Chem. Soc., (Journal of the American Chemical Society), published in 2006, Vol. 128 (39), pp. 12604 to 12605 [Non-Patent Document 2] Applied Physics Letters (Applied Physics Letters) Communications) 92, 013301 pages (2008) [Non-Patent Document 3] Applied Physics Letters, Issue 89, 033504 (2006) [Non-Patent Document 4] Applied Physics Letters, 89, 163505 (2006) [Non-Patent Document 5] Applied Physics Letters, Issue 95, 263,307 (2009)

本發明之目的在於提供一種具有實用性的穩定性,且於載子遷移率(carrier mobility)、磁滯(hysteresis)或閥值穩定性(threshold stability)等的半導體特性優異的實用性的場效電晶體。 An object of the present invention is to provide a practical field effect that is practical and stable, and has excellent semiconductor characteristics such as carrier mobility, hysteresis, or threshold stability. Transistor.

本發明人等,為解決上述課題起見而專心研究之結果,發現具有為半導體活性層有用的特定的構造之新穎的化合物,又發現如為半導體活性層而組合具有特定的構造之有機半導體材料與具有其他構造之有機半導體材料,則可製得電荷傳遞速度(electric charge transfer rate)快速,穩定性優異的有機場效電晶體之事實,終於完成本發明。 The present inventors have found that a novel compound having a specific structure useful for a semiconductor active layer has been found as a result of solving the above problems, and it has been found that an organic semiconductor material having a specific structure is combined as a semiconductor active layer. With the organic semiconductor material having other structures, the fact that the electric charge transfer rate is fast and the stability is excellent, and the airport effect transistor is finally completed, the present invention has finally been completed.

亦即,本發明,係如下所述者。 That is, the present invention is as follows.

〔1〕一種場效電晶體,其特徵為:含有可以一般式(1)表示之有機半導體材料(A),及可以前述一般式(1)表示之有機半導體材料以外的有機半導體材料(B)。 [1] A field effect transistor comprising: an organic semiconductor material (A) which can be represented by the general formula (1), and an organic semiconductor material other than the organic semiconductor material represented by the above general formula (1) (B) .

(式中,X1表示可具有取代基之脂肪族烴殘基或可具有取代基之芳香族殘基)。 (wherein X 1 represents an aliphatic hydrocarbon residue which may have a substituent or an aromatic residue which may have a substituent).

〔2〕如〔1〕所記載之場效電晶體,其中有機半導體材料(A)係可以一般式(2)表示之有機半導體材料。 [2] The field effect transistor according to [1], wherein the organic semiconductor material (A) is an organic semiconductor material represented by the general formula (2).

(式中,R1表示氫原子或可具有取代基之脂肪族烴殘基)。 (wherein R 1 represents a hydrogen atom or an aliphatic hydrocarbon residue which may have a substituent).

〔3〕如〔1〕或〔2〕所記載之場效電晶體,其中有機半導體材料(B)係可以一般式(3)表示之有機半導體材料。 [3] The field effect transistor according to [1] or [2], wherein the organic semiconductor material (B) is an organic semiconductor material represented by the general formula (3).

(式中,X2表示可具有取代基之脂肪族烴殘基或可具有取代基之芳香族殘基)。 (wherein X 2 represents an aliphatic hydrocarbon residue which may have a substituent or an aromatic residue which may have a substituent).

〔4〕如〔3〕所記載之場效電晶體,其中可以一般式 (3)表示之有機半導體材料係一般式(4)者。 [4] The field effect transistor described in [3], wherein the general formula can be (3) The organic semiconductor material represented by the general formula (4).

(式中,R2表示氫原子或可具有取代基之脂肪族烴殘基)。 (wherein R 2 represents a hydrogen atom or an aliphatic hydrocarbon residue which may have a substituent).

〔5〕如〔1〕至〔4〕之任一項所記載之場效電晶體,其中具有經層合:含有有機半導體材料(A)之層、及含有有機半導體材料(B)之層,之構造。 [5] The field effect transistor according to any one of [1] to [4] wherein the layer-effect transistor includes a layer containing the organic semiconductor material (A) and a layer containing the organic semiconductor material (B). Construction.

〔6〕如〔5〕所記載之場效電晶體,其中係參差型(stagger type)的電晶體構造者。 [6] The field effect transistor according to [5], wherein the stagger type is a crystal structure builder.

〔7〕如〔6〕所記載之場效電晶體,其中係於閘電極上所設置之絕緣體層上,依序層合有:含有有機半導體材料(B)之層及含有有機半導體材料(A)之層,再按與有機半導體材料(A)之層的最上部相接觸之方式分別設置有源電極及汲電極之最上層接觸底層閘極型構造(top contact bottom gate type structure)者。 [7] The field effect transistor according to [6], wherein the layer of the organic semiconductor material (B) and the organic semiconductor material (A) are laminated on the insulator layer provided on the gate electrode. The layer is placed in contact with the uppermost layer of the layer of the organic semiconductor material (A), and the uppermost layer of the active electrode and the germanium electrode is in contact with the top contact bottom gate type structure.

〔8〕如〔6〕所記載之場效電晶體,其中係於基板上分別設置有源電極及汲電極,並其上依序層合有:含有有機半導體材料(A)之層及含有有機半導體材料(B)之層,再於按接觸含有有機半導體材料(B)之層的最上部之方式所設置之絕緣體層上設置有閘電極之底層接觸最上層閘極型構造(bottom contact top gate type structure)者 。 [8] The field effect transistor according to [6], wherein the active electrode and the ruthenium electrode are respectively provided on the substrate, and the layer containing the organic semiconductor material (A) and the organic layer are sequentially laminated thereon. The layer of the semiconductor material (B) is further provided with a gate electrode having a gate electrode in contact with the uppermost gate type of the insulator layer provided in contact with the uppermost layer of the layer containing the organic semiconductor material (B) (bottom contact top gate) Type structure) .

〔9〕一種萘并二噻吩系化合物,其特徵為:可以一般式(5)表示。 [9] A naphthobithiophene-based compound which can be represented by the general formula (5).

(式中,R3表示C1-3烷基)。 (wherein R 3 represents a C1-3 alkyl group).

〔10〕如〔9〕所記載之萘并二噻吩系化合物,其中R3為甲基。 [10] The naphthobithiophene compound according to [9], wherein R 3 is a methyl group.

〔11〕一種化合物,其特徵為:可以式(6)表示。 [11] A compound which can be represented by the formula (6).

〔12〕一種萘并二噻吩系有機半導體材料,其特徵為:由〔9〕至〔11〕之任一項所記載之化合物所成。 [12] A naphtho-dithiophene-based organic semiconductor material obtained by the compound according to any one of [9] to [11].

〔13〕一種萘并二噻吩系有機電晶體材料,其特徵為:由〔9〕至〔11〕之任一項所記載之化合物所成。 [13] A naphtho-dithiophene-based organic transistor material, which is obtained by the compound according to any one of [9] to [11].

〔14〕一種場效電晶體,其特徵為:含有〔12〕所記載之有機半導體材料。 [14] A field effect transistor comprising the organic semiconductor material described in [12].

如為半導體活性層而組合特定的構造之有機半導體材 料與其他構造之有機半導體材料,則可得電荷傳遞速度快速、穩定性優異的有機場效電晶體。 Combining a specific structure of an organic semiconductor material such as a semiconductor active layer With organic semiconductor materials of other materials, it is possible to obtain an airport effect transistor with fast charge transfer speed and excellent stability.

〔發明之最佳實施形態〕 [Best Embodiment of the Invention]

下述中,將本發明加以詳細說明。 Hereinafter, the present invention will be described in detail.

本發明,係由於為半導體活性層而組合可以一般式(1)表示之雜(heteroacene)系P型有機半導體材料及與可以前述一般式(1)表示之雜系P型有機半導體材料不相同之P型的有機半導體材料之結果,可製得電荷傳遞速度快速、穩定性優異的有機場效電晶體。 The present invention is a combination of a semiconductor active layer and can be represented by the general formula (1). (heteroacene) is a P-type organic semiconductor material and is different from the general formula (1) As a result of the P-type organic semiconductor material having different P-type organic semiconductor materials, an airport-effect transistor having a fast charge transfer rate and excellent stability can be obtained.

其次,就可以一般式(1)表示之有機半導體材料(A)加以說明。具有一般式(1)之骨架之有機半導體材料,可具有取代基(式(1)中,取代基則以X1表示)。其具體的取代基而言,可舉:可被取代之脂肪族烴殘基或可被取代之芳香族殘基。 Next, the organic semiconductor material (A) represented by the general formula (1) will be described. The organic semiconductor material having the skeleton of the general formula (1) may have a substituent (in the formula (1), the substituent is represented by X 1 ). Specific examples of the substituent include an aliphatic hydrocarbon residue which may be substituted or an aromatic residue which may be substituted.

在此,脂肪族烴基而言,可例舉:飽和或不飽和的直鏈、分枝鏈或環狀的脂肪族烴基,較佳為直鏈或分枝鏈的脂肪族烴基,更佳為直鏈的脂肪族烴基。碳數通常為C1至C36,較佳為C1至C24、更佳為C1至C20、最佳為C1至C12。該脂肪族烴基,可被鹵素原子所取代。 Here, the aliphatic hydrocarbon group may, for example, be a saturated or unsaturated linear, branched or cyclic aliphatic hydrocarbon group, preferably a linear or branched aliphatic hydrocarbon group, more preferably straight. A chain of aliphatic hydrocarbon groups. The carbon number is usually from C1 to C36, preferably from C1 to C24, more preferably from C1 to C20, most preferably from C1 to C12. The aliphatic hydrocarbon group may be substituted by a halogen atom.

直鏈或分枝鏈的飽和脂肪族烴基的具體例而言,可舉:甲基、乙基、丙基、異丙基、正丁基、異丁基、第三丁基、正戊基、異戊基、第三戊基、第二戊基、正己基、異己基、正庚基、第二庚基、正辛基、正壬基、第二壬基、 正癸基、正十一基、正十二基、正十三基、正十四基、正十五基、正十六基、正十七基、正十八基、正十九基、正二十基、二十二基、正二十五基、正二十八基、n-三十烷基(n-triacontyl)、5-(正戊基)癸基、二十一基、二十三基、二十四基、二十六基、二十七基、二十九基、正三十基、角鯊基(squalanyl)、三十二基、三十六基等。 Specific examples of the saturated aliphatic hydrocarbon group of a straight chain or a branched chain include methyl, ethyl, propyl, isopropyl, n-butyl, isobutyl, tert-butyl, n-pentyl, Isoamyl, third amyl, second amyl, n-hexyl, isohexyl, n-heptyl, second heptyl, n-octyl, n-decyl, second fluorenyl, 正癸基,正十一基,正十二基,正十三基,正十四基,正十五基,正十六基,正七基,正十八基,正十九基,正正Twenty base, twenty-two base, positive twenty-fifth base, n-t-octadecyl, n-triacontyl, 5-(n-pentyl)fluorenyl, twenty-one base, twenty Tris, twenty-four, twenty-six, twenty-seven, twenty-nine, n-thyl, squalanyl, thirty-two, thirty-six, and the like.

環狀的飽和脂肪族烴基之具體例而言,可例舉:環己基、環戊基、金剛烷基(adamantyl)、降冰片烷基(norbornyl)等。 Specific examples of the cyclic saturated aliphatic hydrocarbon group include a cyclohexyl group, a cyclopentyl group, an adamantyl group, and a norbornyl group.

直鏈或分枝鏈的不飽和脂肪族烴基之具體例而言,可例舉:乙烯基、烯丙基、二十碳二烯基(eicosadienyl)、11,14-二十碳二烯基、香葉醇基(geranyl)(反(trans)-3,7-二甲基-2,6-辛二烯-1-基)、法呢基(farnesyl)(反,反-3,7-11-三甲基-2,6,10-十二碳三烯烴-1-基)、4-戊烯基、1-丙烯基、1-己烯基、1-辛烯基、1-癸炔基、1-十一碳炔基、1-十二碳炔基、1-十四碳炔基、1-十六碳炔基、1-十九碳炔基等。 Specific examples of the linear or branched chain unsaturated aliphatic hydrocarbon group include a vinyl group, an allyl group, an eicosadienyl group, and an 11,14-eicosadienyl group. Geranyl (trans-3,7-dimethyl-2,6-octadien-1-yl), farnesyl (anti, trans-3, 7-11) -trimethyl-2,6,10-dodecatrien-1-yl), 4-pentenyl, 1-propenyl, 1-hexenyl, 1-octenyl, 1-decynyl , 1-undecynyl, 1-dodecynyl, 1-tetradecynyl, 1-hexadecenyl, 1-nonadecanyl and the like.

直鏈、分枝鏈以及環狀的脂肪族烴基之中,較佳者為直鏈或分枝鏈的脂肪族烴基,更佳者為直鏈的脂肪族烴基。飽和或不飽和的脂肪族烴基,係指飽和的烷基,含有碳-碳雙鍵之烯基及含有碳-碳三鍵之炔基之意,較佳為烷基或炔基、更佳為烷基。脂肪族烴基殘基中,經組合此等飽和或不飽和的脂肪族烴基者,亦即,在脂肪族烴基中的部位同時含有碳-碳雙鍵及碳-碳三鍵之情形亦全部包含在 內。脂肪族烴殘基,亦可被鹵素原子所取代,鹵素原子而言,可舉:氟原子、氯原子、溴原子、碘原子,較佳為氟原子、氯原子、溴原子、更佳為氟原子及溴原子。 Among the linear, branched chain and cyclic aliphatic hydrocarbon groups, a linear or branched chain aliphatic hydrocarbon group is preferred, and a linear aliphatic hydrocarbon group is more preferred. The saturated or unsaturated aliphatic hydrocarbon group means a saturated alkyl group, an alkenyl group having a carbon-carbon double bond, and an alkynyl group having a carbon-carbon triple bond, preferably an alkyl group or an alkynyl group, more preferably alkyl. Among the aliphatic hydrocarbon group residues, those in which the saturated or unsaturated aliphatic hydrocarbon group is combined, that is, the portion containing the carbon-carbon double bond and the carbon-carbon triple bond in the aliphatic hydrocarbon group are also included in the case. Inside. The aliphatic hydrocarbon residue may be substituted by a halogen atom, and examples of the halogen atom include a fluorine atom, a chlorine atom, a bromine atom, and an iodine atom, preferably a fluorine atom, a chlorine atom, a bromine atom, or more preferably a fluorine atom. Atom and bromine atoms.

可被取代之芳香族殘基而言,可例舉:苯基、萘基、蒽基、菲基、基(pyrenyl)、苯并基等的芳香族烴基、或吡啶基、吡嗪基、嘧啶基(pyrimidinyl)、喹啉基、異喹啉基、吡咯基、吲哚啉基、咪唑基、咔唑基、噻吩基、呋喃基、吡喃基、吡啶酮基(pyridonyl)等的雜環基,如苯并喹啉基、蒽醌基、苯并噻吩基、苯并呋喃基般的縮合系雜環基。此等之中,較佳者為苯基、萘基、吡啶基以及噻吩基。 The aromatic residue which may be substituted may, for example, be a phenyl group, a naphthyl group, an anthracenyl group or a phenanthryl group. Pyrenyl, benzo An aromatic hydrocarbon group such as a pyridyl group, a pyrazinyl group, a pyrimidinyl group, a quinolyl group, an isoquinolyl group, a pyrrolyl group, a porphyrin group, an imidazolyl group, a carbazolyl group, a thienyl group, a furyl group a heterocyclic group such as a pyranyl group or a pyridonyl group, such as a benzoquinolyl group, a fluorenyl group, a benzothienyl group or a benzofuranyl group. Among these, a phenyl group, a naphthyl group, a pyridyl group, and a thienyl group are preferable.

此種芳香族殘基可具有之取代基的例而言,並不特別加以限制,惟可舉:前述的脂肪族烴基或前述的鹵素原子。其中,較佳為脂肪族烴基,更佳為甲基、乙基、異丙基等的C1至C3的低級烷基,最佳為甲基。 The example in which such an aromatic residue may have a substituent is not particularly limited, and the above-mentioned aliphatic hydrocarbon group or the aforementioned halogen atom may be mentioned. Among them, an aliphatic hydrocarbon group is preferred, and a C1 to C3 lower alkyl group such as a methyl group, an ethyl group or an isopropyl group is more preferred, and a methyl group is preferred.

作為可以一般式(1)表示之有機半導體材料(A),更佳為可舉:可以一般式(2)表示之二苯基衍生物。一般式(2)中,R1表示氫原子或可具有取代基之脂肪族烴殘基。脂肪族烴殘基而言,可先前所說明之脂肪族烴殘基相同,較佳為甲基、乙基、異丙基等的C1至C3的低級烷基,最佳為甲基。 The organic semiconductor material (A) which can be represented by the general formula (1) is more preferably a diphenyl derivative which can be represented by the general formula (2). In the general formula (2), R 1 represents a hydrogen atom or an aliphatic hydrocarbon residue which may have a substituent. The aliphatic hydrocarbon residue may be the same as the aliphatic hydrocarbon residue described above, and is preferably a C1 to C3 lower alkyl group such as a methyl group, an ethyl group or an isopropyl group, and most preferably a methyl group.

可以前述一般式(1)表示之有機半導體材料以外的有機半導體材料(B)而言,可例舉:蒽、四、戊省、菲、(chrysene)、苝、蔻(coronene)、低聚亞 苯基(n=4至12)、莒(rubrene)等的烴系芳香族衍生物、低聚噻吩(n=4至12)、酞花青(phthalocyanine)、卟啉(porphyrin)、苯并二噻吩、苯并噻吩并苯并噻吩、二萘并噻吩并噻吩、萘并二噻吩等的雜環系芳香族衍生物等,亦可採用此等的混合物。 The organic semiconductor material (B) other than the organic semiconductor material represented by the above general formula (1) may, for example, be 蒽, 四 , province, Philippine, , Hydrocarbon aromatic derivatives such as (chrysene), hydrazine, coronene, oligophenylene (n=4 to 12), rubrene, etc., oligothiophenes (n=4 to 12), silk flowers A heterocyclic aromatic derivative such as phthalocyanine, porphyrin, benzodithiophene, benzothienobenzophene, dinaphthylthiophenethiophene or naphtho-dithiophene, etc. a mixture of such.

可以一般式(1)表示之有機半導體材料以外的有機半導體材料(B)而言,可例舉:戊省、酞花青、低聚噻吩或苯并噻吩系、蒽噻吩系、苯并噻吩并苯并噻吩系等的雜系有機半導體材料。其中,較佳為可以一般式(3)所示之苯并噻吩并苯并噻吩的衍生物。一般式(3)中,X2表示可具有取代基之脂肪族烴殘基或可具有取代基之芳香族殘基。在此所示之X2,可為先前所說明之X1同樣意義。 The organic semiconductor material (B) other than the organic semiconductor material represented by the general formula (1) may, for example, be pentacene, phthalocyanine, oligothiophene or benzothiophene, thiophene or benzothiophene. Miscellaneous benzothiophene It is an organic semiconductor material. Among them, a derivative of the benzothienobenzothiophene represented by the general formula (3) is preferred. In the general formula (3), X 2 represents an aliphatic hydrocarbon residue which may have a substituent or an aromatic residue which may have a substituent. X 2 shown here may be of the same meaning as X 1 described previously.

可以一般式(1)表示之有機半導體材料以外的有機半導體(B)而言,再佳為一般式(4)中所示之二苯基衍生物。一般式(4)中,R2表示氫原子或可具有取代基之脂肪族烴殘基。脂肪族烴殘基而言,可為與先前所說明之脂肪族烴系殘基同樣者。 Further, the organic semiconductor (B) other than the organic semiconductor material represented by the general formula (1) is preferably a diphenyl derivative represented by the general formula (4). In the general formula (4), R 2 represents a hydrogen atom or an aliphatic hydrocarbon residue which may have a substituent. The aliphatic hydrocarbon residue may be the same as the aliphatic hydrocarbon residue described above.

可以式(1)表示之有機半導體材料(A)之製造方法,可依例如專利文獻5中記載之方法,亦即,可以下述反應式表示。首先,以2,6-二羥基萘作為起始原料,重複進行溴化而製得四溴物後,使用錫以進行脫鹵素,接著使三氟甲烷磺酸酐進行作用。更對此化合物,使相對應之乙炔衍生物於非質子性極溶劑(aprotic polar solvent)中,在 鈀(Pd)觸媒等的存在下進行反應,則可製得先質(precursor)之二溴代二炔基萘衍生物。如將此先質使用硫化鈉水合物等的硫化鹽以進行加熱反應,即可製得目的物之一般式(1)的化合物。 The method for producing the organic semiconductor material (A) represented by the formula (1) can be expressed, for example, according to the method described in Patent Document 5, that is, the following reaction formula. First, bromination is repeated using 2,6-dihydroxynaphthalene as a starting material to obtain a tetrabromide, and then tin is used for dehalogenation, followed by action of trifluoromethanesulfonic anhydride. Further, for this compound, the corresponding acetylene derivative is allowed to be in an aprotic polar solvent. When a reaction is carried out in the presence of a palladium (Pd) catalyst or the like, a precursor dibromodiynylnaphthalene derivative can be obtained. When a sulfide salt such as sodium sulfide hydrate or the like is used as the precursor to carry out a heating reaction, a compound of the general formula (1) of the object can be obtained.

化合物之精製方法,並不特別加以限定,可採用:再結晶、管柱色譜法(column chromatography)、以及真空升華精製等的周知的方法。又,需要時亦可組合此等方法使用。 The method for purifying the compound is not particularly limited, and a known method such as recrystallization, column chromatography, and vacuum sublimation purification can be employed. Also, these methods can be used in combination when needed.

將可以一般式(1)表示之化合物之具體例表示如下。 Specific examples of the compound which can be represented by the general formula (1) are shown below.

可以一般式(3)表示之化合物,可依例如專利文獻1及專利文獻6所記載之方法製得。 The compound represented by the general formula (3) can be obtained by, for example, the methods described in Patent Document 1 and Patent Document 6.

可以一般式(3)表示之化合物之具體例表示於如下。 Specific examples of the compound represented by the general formula (3) are shown below.

其次,在參考圖面之下就本發明之場效電晶體之構造加以說明,惟本發明並不因此等構造而有所限定。 Next, the construction of the field effect transistor of the present invention will be described below with reference to the drawings, but the present invention is not limited by the configuration.

於第1圖中,表示本發明之場效電晶體(元件)的幾種狀態例。各例中,分別表示1:源電極、2:半導體層、3:汲電極、4:絕緣體層、5:閘電極、6:基板。在此,各層及電極之配置,可依元件之用途而適當選擇。A至D 及F,係電流將與基板並行方向流動之故,稱為橫式FET(transverse field effect transistor)。A稱為底層閘極底層接觸型構造,B稱為最上層接觸底層閘極型構造。B’係將B的半導體層分為兩個,亦即經層合兩層之狀態者。又,C係於半導體上設置源電極及汲電極、絕緣體層,更在其上形成有閘電極之最上層閘極最上層接觸型構造。D係稱為底層閘極底層及最上層接觸型電晶體之構造。E係具有縱型之構造之FET之靜電感應電晶體(electro static induction transistor)(SIT)的模式圖。如採用此種SIT構造,則由於電流的流動會擴張為平面狀之故,一下子可遷移大量的載子(carrier)。又,由於源電極與汲電極係按經縱向配置而可縮短電極間距離之故回應(response)係高速者。因此,很適合使用於流動大電流、或進行高速的切換(switching)等的用途。又,F係最上層閘極底層接觸型,而F’係將F的半導體層分為兩個,亦即經層合兩層之狀態者。 In the first drawing, several examples of the state effect transistor (element) of the present invention are shown. In each example, the source electrode, the 2: semiconductor layer, the 3: germanium electrode, the 4: insulator layer, the 5: gate electrode, and the 6: substrate are respectively shown. Here, the arrangement of each layer and the electrodes can be appropriately selected depending on the use of the element. A to D And F, the current flowing in parallel with the substrate is called a transverse field effect transistor. A is called the bottom gate contact type structure, and B is called the upper layer contact bottom gate type structure. B' divides the semiconductor layer of B into two, that is, the state in which two layers are laminated. Further, in the case of C, the source electrode, the germanium electrode, and the insulator layer are provided on the semiconductor, and the uppermost gate uppermost contact type structure of the gate electrode is formed thereon. D is called the structure of the underlying gate underlayer and the uppermost contact type transistor. E is a pattern diagram of an electrostatic discharge induction transistor (SIT) of a vertical type FET. If such an SIT structure is employed, a large number of carriers can be transferred at a time because the current flow is expanded to a planar shape. Further, since the source electrode and the ruthenium electrode are arranged in the longitudinal direction, the distance between the electrodes can be shortened, and the response is high. Therefore, it is suitable for use in applications such as high current flow or high-speed switching. Further, F is the uppermost gate underlayer contact type, and F' is a semiconductor layer of F which is divided into two, that is, a state in which two layers are laminated.

就各狀態例中之構成要件加以說明。 The constituent elements in each state example will be described.

基板6,需要其上所形成之各層不致於剝離之下能保持者。例如,可利用於樹脂薄膜、紙、玻璃、石英、陶磁(ceramic)等的絕緣性材料、金屬或合金等的導電性基板上經依塗層(coating)等而形成絕緣層之物件、樹脂與無機材料等由各種組合所成之材料等。可使用之樹脂薄膜的例而言,可例舉:聚對苯二甲酸乙二醇酯、聚萘二甲酸乙二醇酯、聚醚碸、聚醯胺、聚醯亞胺、聚碳酸酯、三醋酸 纖維素、聚醚型醯亞胺等。如採用樹脂薄膜或紙時,則可使元件具有可撓性,而成為易彎性(flexible)且輕量,而可提升實用性。基板的厚度而言,通常1μm至10mm,較佳為5μm至5mm。 The substrate 6 is required to be retained by the layers formed thereon without being peeled off. For example, it can be used for an insulating material such as a resin film, paper, glass, quartz, or ceramic, or a conductive substrate such as a metal or an alloy, and an insulating layer is formed by coating or the like. A material or the like made of various combinations such as an inorganic material. Examples of the resin film which can be used include polyethylene terephthalate, polyethylene naphthalate, polyether oxime, polyamine, polyimine, polycarbonate, and the like. Triacetate Cellulose, polyether quinone, etc. When a resin film or paper is used, the element can be made flexible, and it becomes flexible and lightweight, and the practicality can be improved. The thickness of the substrate is usually from 1 μm to 10 mm, preferably from 5 μm to 5 mm.

為源電極1、汲電極3、閘電極5,採用具有導電性之材料。例如可使用:鉑、金、銀、鋁、鉻、鎢、鉭(Ta)、鎳、鈷、銅、鐵、鉛、錫、鈦、銦、鈀、鉬、鎂、鈣、鋇、鋰、鉀、鈉等的金屬及含有其等之合金;InO2(氧化銦)、ZnO2(氧化鋅)、SnO2(氧化錫)、ITO(銦錫氧化物)等的導電性氧化物;聚苯胺、聚吡咯、聚噻吩、聚乙炔、聚對伸苯亞乙烯、聚二乙炔等的導電性高分子化合物;矽、鍺(Ge)、鎵(Ga)砷等的半導體;炭黑、茀(fluorene)、碳奈管(carbon nanotube)、石墨等的碳材料等。又,對導電性高分子化合物或半導體,亦可實施摻質(doping)。此時之摻質(dopant)而言,例如可採用:鹽酸、硫酸、磺酸等的酸、PF5(氟化磷)、AsF5(氟化砷)、FeCl3(氯化鐵)等的路易斯酸(Lewis acid)、碘等的鹵素原子、鋰、鈉、鉀等的金屬原子等。又,經於上述材料上分散炭黑或金屬粒子等之導電性的複合材料亦可用。此等材料,可使電極的功函數(work function),而可製得具有良好的電荷注入特性(electric charge specialty)之場效電晶體。 For the source electrode 1, the ytterbium electrode 3, and the gate electrode 5, a material having conductivity is used. For example, platinum, gold, silver, aluminum, chromium, tungsten, tantalum (Ta), nickel, cobalt, copper, iron, lead, tin, titanium, indium, palladium, molybdenum, magnesium, calcium, barium, lithium, potassium can be used. a metal such as sodium or an alloy containing the same; a conductive oxide such as InO 2 (indium oxide), ZnO 2 (zinc oxide), SnO 2 (tin oxide), or ITO (indium tin oxide); polyaniline, Conductive polymer compounds such as polypyrrole, polythiophene, polyacetylene, polyparaphenylene vinylene, polydiacetylene, etc.; semiconductors such as germanium, germanium (Ge), gallium (Ga) arsenic, carbon black, fluorene Carbon materials such as carbon nanotubes and graphite. Further, doping may be performed on the conductive polymer compound or the semiconductor. In this case, for example, an acid such as hydrochloric acid, sulfuric acid or sulfonic acid, PF 5 (phosphorus fluoride), AsF 5 (arsenic fluoride) or FeCl 3 (iron chloride) may be used. A halogen atom such as Lewis acid or iodine, or a metal atom such as lithium, sodium or potassium. Further, a conductive composite material in which carbon black or metal particles or the like is dispersed on the above material can also be used. These materials can make the work function of the electrode, and can produce a field effect transistor with good electric charge specialty.

於各電極1、3、5上連結有配線,惟配線亦可由與電極略同樣的材料製作。 Wiring is connected to each of the electrodes 1, 3, and 5, but the wiring may be made of a material similar to that of the electrode.

絕緣體層4而言,可採用具有絕緣性之材料。例如,可使用:聚對伸茬基(poly para xylylene)、聚丙烯酸酯、聚甲基丙烯酸甲酯、聚苯乙烯、聚乙烯基苯酚、聚醯胺、聚醯亞胺、聚碳酸酯、聚酯、聚乙烯醇、聚醋酸乙烯、聚胺基甲酸乙酯、聚碸、環氧樹脂、酚醛樹脂、含氟樹脂等的聚合物及組合此等之共聚物;氧化矽、氧化鋁、氧化鈦、氧化鉭等的氧化物;SrTiO3(鍶鈦氧化物)、BaTiO3(鋇鈦氧化物)等的強介電性氧化物;氮化矽、氮化鋁等的氮化物;硫化物;氟化物等的介電體、或者,經使此等介電體的粒子分散之聚合物等。絕緣體層4的膜厚,係因材料而有所異,惟通常為0.1nm至100μm、較佳為0.5nm至50μm、更佳為5nm至10μm。 As the insulator layer 4, an insulating material can be used. For example, poly paraxylylene, polyacrylate, polymethyl methacrylate, polystyrene, polyvinyl phenol, polyamine, polyimide, polycarbonate, poly a polymer of ester, polyvinyl alcohol, polyvinyl acetate, polyurethane, polyfluorene, epoxy resin, phenolic resin, fluorine-containing resin, etc., and a copolymer thereof; cerium oxide, aluminum oxide, titanium oxide An oxide such as cerium oxide; a ferroelectric oxide such as SrTiO 3 (yttrium titanium oxide) or BaTiO 3 (yttrium titanium oxide); a nitride such as tantalum nitride or aluminum nitride; a sulfide; A dielectric such as a compound or a polymer obtained by dispersing particles of such dielectrics. The film thickness of the insulator layer 4 varies depending on the material, but is usually 0.1 nm to 100 μm, preferably 0.5 nm to 50 μm, more preferably 5 nm to 10 μm.

作為半導體層2的材料,亦可單獨使用可以一般式(1)表示之有機半導體材料(A),亦可組合使用可以一般式(1)表示之有機半導體材料(A),與可以前述一般式(1)表示之有機半導體材料以外的有機半導體材料(B)。於本發明中,亦可混合使用有機半導體材料(A)與有機半導體材料(B),亦可層合使用有機半導體材料(A)的層與有機半導體材料(B)的層。半導體層的材料可再含有此等構成成分以外的成分,惟對該材料的總重量,需要以合計,含有有機半導體材料(A)和有機半導體材料(B)50質量%以上、較佳為80質量%以上、更佳為95質量%以上。 As the material of the semiconductor layer 2, an organic semiconductor material (A) which can be represented by the general formula (1) may be used alone, or an organic semiconductor material (A) which can be represented by the general formula (1) may be used in combination, and the above general formula may be used. (1) An organic semiconductor material (B) other than the organic semiconductor material. In the present invention, the organic semiconductor material (A) and the organic semiconductor material (B) may be used in combination, or a layer of the organic semiconductor material (A) and a layer of the organic semiconductor material (B) may be laminated. The material of the semiconductor layer may further contain components other than the constituent components, but the total weight of the material is required to be 50% by mass or more, preferably 80%, of the organic semiconductor material (A) and the organic semiconductor material (B). The mass% or more is more preferably 95% by mass or more.

半導體層2的膜厚,在不會喪失所需要的功能之範圍 ,愈薄愈佳。於B及F所示般之參差型的場效電晶體中,需膜厚方向的電荷的遷移,如膜厚再增厚時,則可能會增加漏洩電流之故。為能顯示所需功能起見,通常,為1nm至1μm、較佳為5nm至500nm、更佳為10nm至300nm。在此,如含有有機半導體材料(A)之層與含有有機半導體材料(B)之層在採取層合構造之情形,則整個膜厚作成與前述者相同即可。各膜厚在不喪失所需要的功能之範圍內,可任意加以調整。又,如調整此等材料的混合比例或膜厚,即可製得具有良好的半導體特性之場效電晶體。 The film thickness of the semiconductor layer 2 does not lose the required function The thinner the better. In the field-effect transistor of the type shown in B and F, the migration of the charge in the film thickness direction is required, and if the film thickness is thickened, the leakage current may increase. In order to exhibit the desired function, it is usually from 1 nm to 1 μm, preferably from 5 nm to 500 nm, more preferably from 10 nm to 300 nm. Here, when the layer containing the organic semiconductor material (A) and the layer containing the organic semiconductor material (B) are in a laminated structure, the entire film thickness may be the same as the above. The film thickness can be arbitrarily adjusted without losing the required function. Further, by adjusting the mixing ratio or film thickness of these materials, a field effect transistor having good semiconductor characteristics can be obtained.

於本發明之場效電晶體中,需要時在各層之間或元件外面設置其他層。例如,於半導體層上直接或介由其他層而形成保護層,則可降低濕度或氧氣等外氣的影響,又,亦有提高元件的ON/OFF(開/關)比等,使電氣特性穩定化之優點。 In the field effect transistor of the present invention, other layers are disposed between or between the layers as needed. For example, by forming a protective layer directly on or through another layer on the semiconductor layer, the influence of external air such as humidity or oxygen can be reduced, and the ON/OFF ratio of the element can be improved to make electrical characteristics. The advantages of stabilization.

保護層的材料而言,並不特別加以限定,例如,由環氧樹脂、聚甲基丙烯酸甲酯等的丙烯酸樹脂、聚胺基甲酸乙酯、聚醯亞胺、聚乙烯醇、含氟樹脂、聚鏈烯烴等的各種樹脂所成之膜、或由氧化矽、氧化鋁、氮化矽等的無機氧化膜或氮化膜等的介電體所成膜很好使用。特別是,氧氣或水分的穿透率或吸水率低的樹脂(聚合物)為宜。近年,為有機EL顯示器用所開發之保護材料亦能使用。保護層之膜厚,雖可按其目的而採用任意的膜厚,惟通常為100nm至1mm。 The material of the protective layer is not particularly limited, and for example, an acrylic resin such as an epoxy resin or a polymethyl methacrylate, a polyurethane, a polyimide, a polyvinyl alcohol, or a fluorine-containing resin. A film formed of various resins such as polyalkenes or a dielectric film such as an inorganic oxide film such as cerium oxide, aluminum oxide or tantalum nitride or a nitride film is preferably used. In particular, a resin (polymer) having a low oxygen or moisture permeability or a low water absorption rate is preferred. In recent years, protective materials developed for organic EL displays can also be used. The film thickness of the protective layer may be any film thickness for the purpose, but is usually 100 nm to 1 mm.

又,如對將層合半導體之基板或絕緣體層上等實施表 面處理,亦能提升元件的特性。例如調整基板表面的親水性/疏水性的程度,則可改良將在其上所成膜之膜的膜質。特別是,有機半導體材料有時因分子的取向(orientation)等膜的狀態而特性會大為改變。因此,可能藉由基板表面處理而控制基板與其後所成膜之半導體膜之間的界面部分的分子取向(molecular orientation),結果載子移動率等的特性獲得改良。此種基板處理而言,可例舉:利用六甲基二矽氨烷、環己烯、十八基三氯矽烷等之疏水化處理(hydrophobic treatment),利用鹽酸或硫酸、醋酸等之酸處理,利用氫氧化鈉、氫氧化鉀、氫氧化鈣、氨等之鹼處理、臭氧處理、氟化處理,利用氧氣或氬等的電漿處理(plasma treatment),利用蘭米爾‧投射膜(Langmuir project film)的形成處理,利用其他的絕緣體或半導體的薄膜的形成處理、機械式處理、電暈放電(corona discharge)等的電氣式處理,利用纖維等之摩擦處理(rubbing treatment)等。 Moreover, the table is applied to the substrate or the insulator layer on which the semiconductor is to be laminated. Surface processing can also improve the characteristics of components. For example, the degree of hydrophilicity/hydrophobicity of the surface of the substrate can be adjusted to improve the film quality of the film formed thereon. In particular, the organic semiconductor material may be greatly changed in characteristics due to the state of the film such as the orientation of the molecule. Therefore, it is possible to control the molecular orientation of the interface portion between the substrate and the semiconductor film formed later by the surface treatment of the substrate, and as a result, the characteristics of the carrier mobility and the like are improved. Such a substrate treatment may be carried out by using a hydrochloric treatment such as hexamethyldioxane, cyclohexene or octadecyltrichloromethane, or an acid treatment such as hydrochloric acid or sulfuric acid or acetic acid. Using alkali treatment such as sodium hydroxide, potassium hydroxide, calcium hydroxide, ammonia, etc., ozone treatment, fluorination treatment, plasma treatment using oxygen or argon, etc., using the Langmuir project film (Langmuir project) The formation process of the film is performed by an electric treatment such as a film formation process of another insulator or a semiconductor, a mechanical treatment, a corona discharge, or the like, and a rubbing treatment such as fiber.

於此等狀態下設置各層之方法而言,例如,可適當採用:真空蒸鍍法(vacuum evaporation deposition)、濺鍍法(sputtering)、塗佈法(coating)、印刷法(printing)、溶膠凝膠法(sol-gel)等。 In the method of providing each layer in such a state, for example, vacuum evaporation deposition, sputtering, coating, printing, and sol-gel can be suitably employed. Sol-gel and the like.

其次,就有關本發明之場效電晶體之製造方法,以第1圖的狀態例B中所示最上層接觸底層閘極型場效電晶體(FET)作為例,根據第2圖加以說明如下。 Next, with respect to the manufacturing method of the field effect transistor of the present invention, the uppermost layer contact bottom gate type field effect transistor (FET) shown in the state example B of Fig. 1 is taken as an example, and is explained below based on Fig. 2 .

此種製造方法,係對前述之其他狀態的場效電晶體等 同樣可適用者。 Such a manufacturing method is a field effect transistor or the like in the other states described above. The same is applicable.

(基板及基板處理) (substrate and substrate processing)

基板6上設置所需要的層或電極以製造(參考第2圖(1))。基板而言,可採用上述所說明者。亦能對此基板上實施前述的表面處理等。基板6的厚度,在不影響所需功能之範圍內較薄者為宜。雖因材料而有所異,通常為1μm至10mm、較佳為5μm至5mm。又,需要時,亦可使基板具有電極之功能。 A desired layer or electrode is provided on the substrate 6 to manufacture (refer to Fig. 2 (1)). For the substrate, the above description can be employed. The aforementioned surface treatment or the like can also be performed on the substrate. The thickness of the substrate 6 is preferably thinner within a range that does not affect the desired function. Although it varies depending on the material, it is usually from 1 μm to 10 mm, preferably from 5 μm to 5 mm. Further, the substrate may have a function as an electrode when necessary.

(閘電極之形成) (formation of gate electrode)

於基板6上形成閘電極5(參考第2圖(2))。電極材料而言,可採用上述中所說明者。進行電極膜之成膜之方法而言,可採用各種方法,例如,可採用:真空蒸鍍法、濺鍍法、塗佈法、熱轉錄法(thermal transeription)、印刷法、溶膠凝膠法等。成膜時或成膜後,按能成為所期望之形狀之方式需要時實施圖型形成(patterning)為宜。圖型形成之方法亦可採用種種方法,可例舉:經組合抗光蝕(photoresist)的圖型形成與蝕刻(etching)之光微影(photolithography)法等。又,利用噴墨印刷(inkjet printing)、絲網印刷(screen printing)、膠版印刷(offset printing)、凸版印刷(letter press printing)等的印刷法、微接觸印刷(micro contact printing)法等的軟微影(soft lithography)的手法,以及經將此等手法組合 複數種之手法,以進行圖型形成亦可能。閘電極5的膜厚,雖因材料而有所異,惟通常為0.1nm至10μm、較佳為0.5nm至5μm、更佳為1nm至3μm。如閘電極兼作基板之情形,則可較上述的膜厚為厚。 The gate electrode 5 is formed on the substrate 6 (refer to Fig. 2 (2)). For the electrode material, those described above can be used. Various methods can be employed for the method of forming the electrode film. For example, vacuum deposition, sputtering, coating, thermal transipipulation, printing, sol-gel, etc. can be employed. . At the time of film formation or after film formation, patterning is preferably carried out as needed to achieve a desired shape. Various methods can be employed for the method of pattern formation, and a photolithography method in which pattern formation and etching are combined by photoresisting can be exemplified. Further, it is soft by a printing method such as inkjet printing, screen printing, offset printing, letterpress printing, or a micro contact printing method. The method of lithography and the combination of these techniques It is also possible to use a variety of techniques to form patterns. The film thickness of the gate electrode 5 varies depending on the material, but is usually 0.1 nm to 10 μm, preferably 0.5 nm to 5 μm, more preferably 1 nm to 3 μm. If the gate electrode also serves as a substrate, it may be thicker than the film thickness described above.

(絕緣體層之形成) (formation of insulator layer)

於閘電極5上形成絕緣層4(參考第2圖(3))。絕緣體材料而言,可採用上述中所說明者等。當形成絕緣體層4時,可採用各種方法。可例舉:旋塗法(spin coating)、噴塗法(spray coating)、浸漬塗佈法(dip coating)、流延塗佈法(cast coating)、鑲條塗佈法(bar coating)、刮板塗佈法(blade coating)等的塗佈法,絲網印刷、膠板印刷、噴墨等的印刷法、真空蒸鍍法、分子射線外延成長法(molecular beam expitaxial grown)、離子叢集法(ion cluster)、離子電鍍法(ion plating)、濺鍍法、大氣壓電漿法(atmosphere pressure plasma)、CVD法(Chemical vapor deposition(化學蒸汽沈積))等的乾式製程。其他,可採用:溶膠凝膠法或鋁上的陽極鋁(alumite)、矽的熱氧化膜(thermal oxidation film)般在金屬上形成氧化膜之方法等。 An insulating layer 4 is formed on the gate electrode 5 (refer to Fig. 2 (3)). As the insulator material, those described above can be used. When the insulator layer 4 is formed, various methods can be employed. For example, spin coating, spray coating, dip coating, cast coating, bar coating, and scraper Coating method such as coating method, printing method such as screen printing, offset printing, inkjet, vacuum deposition method, molecular beam expitaxial growth method, ion clustering method (ion) Dry process such as cluster), ion plating, sputtering, atmospheric pressure plasma, and chemical vapor deposition. Others may be a method of forming an oxide film on a metal such as a sol-gel method or an alumite on aluminum or a thermal oxidation film of ruthenium.

再者,於絕緣體層與半導體層相接之部分,為使半導體分子在兩層的界面良好取向起見,可對絕緣體層實施既定之表面處理。表面處理的手法,可採用與基板的表面處理同樣的處理。絕緣體層4的膜厚,在不影響其功能之範 圍內較薄為宜。通常為0.1nm至100μm、較佳為0.5nm至50μm、更佳為5nm至10μm。 Further, in the portion where the insulator layer and the semiconductor layer are in contact with each other, in order to make the semiconductor molecules have a good orientation at the interface between the two layers, the insulating layer can be subjected to a predetermined surface treatment. The surface treatment method can be the same as the surface treatment of the substrate. The film thickness of the insulator layer 4 does not affect its function It is better to be thinner inside. It is usually from 0.1 nm to 100 μm, preferably from 0.5 nm to 50 μm, more preferably from 5 nm to 10 μm.

(半導體層之形成) (formation of a semiconductor layer)

作為半導體材料,可使用如上述所說明之材料。當進行半導體層之成膜時,可採用各種方法。可大致區分為:濺鍍法、CVD法、分子射外延成長法、真空蒸鍍法等的利用真空製程之形成方法,及浸漬塗佈法、壓模塗佈機法(die coater)、輥式塗佈機法(roll coater)、鑲條塗佈機法(bar coater)、旋塗法等的塗佈法、噴墨法、絲網印刷法、膠版印刷法、微接觸印刷法等的利用溶液製程之形成方法。以下,就半導體層之形成方法,加以詳細說明。 As the semiconductor material, a material as described above can be used. When the film formation of the semiconductor layer is performed, various methods can be employed. The method of forming a vacuum process such as a sputtering method, a CVD method, a molecular beam epitaxial growth method, or a vacuum deposition method, and a dip coating method, a die coater method, and a roll type can be roughly classified. Application method such as a coating method such as a roll coater, a bar coater, or a spin coating method, an inkjet method, a screen printing method, an offset printing method, or a microcontact printing method The method of forming the process. Hereinafter, a method of forming a semiconductor layer will be described in detail.

首先,就將材料利用真空製程成膜以製得半導體層之方法加以說明。 First, a method of forming a semiconductor layer by using a vacuum process to form a semiconductor layer will be described.

將前述半導體材料在坩堝或金屬的晶舟(boat)中於真空下加熱,並使經蒸發之半導體材料附著(蒸鍍)於基板(絕緣體層、源電極以及汲電極的外露部)之方法(真空蒸鍍法)很適合採用。此時,真空度,通常為1.0×10-1 Pa(帕)以下、較佳為1.0×10-4Pa以下。由於蒸鍍時的基板溫度之不同而半導體膜乃至場效電晶體的特性會變化之故,較佳慎重選擇基板溫度。蒸鍍時的基板溫度,通常為0至200℃、較佳為10至150℃。又,蒸鍍速度,通常為0.001nm/秒至10nm/秒、較佳為0.01nm/秒至1nm/秒。 a method of heating the semiconductor material in a crucible or a metal boat under vacuum and attaching (evaporating) the evaporated semiconductor material to the substrate (the insulator layer, the source electrode, and the exposed portion of the germanium electrode) ( Vacuum evaporation method is very suitable for use. In this case, the degree of vacuum is usually 1.0 × 10 -1 Pa (Pa) or less, preferably 1.0 × 10 -4 Pa or less. Since the characteristics of the semiconductor film or the field effect transistor change due to the difference in substrate temperature during vapor deposition, it is preferable to carefully select the substrate temperature. The substrate temperature at the time of vapor deposition is usually from 0 to 200 ° C, preferably from 10 to 150 ° C. Further, the vapor deposition rate is usually 0.001 nm/sec to 10 nm/sec, preferably 0.01 nm/sec to 1 nm/sec.

又,為將半導體材料作成層合構造時,依序使各材料 加熱並蒸發,再使其層合即可製得。進行混合時,通常,藉由使各材料同時加熱、蒸發之共蒸鍍則可製得經混合材料之構造的半導體層。 Moreover, in order to form a semiconductor material into a laminated structure, each material is sequentially ordered. It can be prepared by heating and evaporating and then laminating. When mixing is carried out, usually, a semiconductor layer having a structure of a mixed material can be obtained by co-evaporation of each material simultaneously by heating and evaporation.

由於本發明之有機的半導體材料,係比較低分子化合物之故,此種真空製程很適合採用。此種真空製程,雖然需要稍高價的設備,惟具有成膜性良好,容易製得均勻的膜之優點。 Since the organic semiconductor material of the present invention is relatively low molecular compound, such a vacuum process is suitable for use. Such a vacuum process, although requiring a slightly expensive equipment, has the advantages of good film formation and easy production of a uniform film.

其次,就將半導體材料利用溶液製程成膜以製得半導體層之方法加以說明。此種方法,一般多在能溶解於溶劑之有機的半導體材料之情形使用。於此方法中,將前述材料溶解或分散於溶劑中,並塗佈於基板(絕緣體層、源電極以及汲電極的外露部)。塗佈之方法而言,流涎塗佈、旋轉塗佈、浸漬塗佈、刮板塗佈、鋼絲鑲條塗佈、噴霧塗佈等的塗佈法,或噴墨印刷、絲網印刷、膠板印刷、凸版印刷等的印刷法、微接觸印刷法等的軟微影的手法等,再者,可採用經複數種組合此等手法之方法。由此等方法所形成之半導體層的膜厚,在不影響功能之範圍較薄者為宜。如膜厚增厚時,則漏洩電流增大,以致可能為膜厚方向的電荷的遷移而需要能量。半導體層之膜厚,通常為1nm至1μm、較佳為5nm至500nm、更佳為10nm至300nm。 Next, a description will be given of a method in which a semiconductor material is formed into a film by a solution process to obtain a semiconductor layer. Such a method is generally used in the case of an organic semiconductor material which can be dissolved in a solvent. In this method, the above material is dissolved or dispersed in a solvent and applied to a substrate (an insulator layer, a source electrode, and an exposed portion of a tantalum electrode). Coating method, coating method such as flow coating, spin coating, dip coating, blade coating, wire strip coating, spray coating, or the like, or inkjet printing, screen printing, rubber sheeting A printing method such as printing or letterpress printing, a method of soft lithography such as a microcontact printing method, and the like, and a plurality of methods of combining these methods may be employed. The film thickness of the semiconductor layer formed by such a method is preferably thinner in a range that does not affect the function. If the film thickness is thickened, the leakage current increases, so that energy may be required for the migration of charges in the film thickness direction. The film thickness of the semiconductor layer is usually from 1 nm to 1 μm, preferably from 5 nm to 500 nm, more preferably from 10 nm to 300 nm.

又,半導體材料之混合膜,如使各材料一起溶解,利用上述的製程成膜即可容易製得。但為作成層合構造時,可能會有各材料對溶劑中之溶解度的問題、或會有在層合時先作成之膜被後來所成膜之材料的溶液浸蝕之情形,因 而需要成膜條件的最適化。當進行半導體層之形成時,如採用此種溶液製造時,則有以比較廉價的設備而可製造大面積的場效電晶體之優點。又,在溶液製程之後採用真空製程等,按組合方式成膜之作法亦可行。 Further, a mixed film of a semiconductor material can be easily obtained by dissolving each material together and forming a film by the above-described process. However, in order to form a laminated structure, there may be a problem that the solubility of each material in the solvent, or a solution in which the film which is first formed at the time of lamination is etched by a material which is formed later, The optimum conditions for film formation are required. When the formation of the semiconductor layer is carried out, when it is produced by using such a solution, there is an advantage that a large-area field effect transistor can be manufactured with relatively inexpensive equipment. Further, it is also possible to use a vacuum process or the like after the solution process, and to form a film by a combination.

如此所形成之半導體層(參考第2圖(4)),能藉由後處理而再改良特性。例如,藉由加熱處理,而可緩和成膜時所發生之膜中的應變(strain),以達成特性的提升或穩定化。再者,亦可曝露在氧氣或氫氣的氧化性或還原性的氣體或液體中,藉以引發因氧化或還原所導致之特性變化。此種作法,可以例如膜中之載子密度的增加或減少之目的而利用。 The semiconductor layer thus formed (refer to Fig. 2 (4)) can be further improved in characteristics by post-processing. For example, by heat treatment, strain in the film which occurs during film formation can be alleviated to achieve improvement or stabilization of characteristics. Further, it may be exposed to an oxidizing or reducing gas or liquid of oxygen or hydrogen to cause a change in characteristics due to oxidation or reduction. Such an action can be utilized, for example, for the purpose of increasing or decreasing the density of the carrier in the film.

(源電極及汲電極之形成) (formation of source electrode and germanium electrode)

源電極1及汲電極3之形成方法,可準照閘電極5之形成方法而形成(參照第2圖(5))。在電極將位置於半導體層之上之最上層接觸構造之情形,一般使用經採用陰影遮罩(shadow mask)之真空蒸鍍法,相反地,在電極將位置於半導體層之下之底層接觸構造之情形,則多採用光微影術(photolithography)或各種印刷法以進行電極之圖型形成。 The method of forming the source electrode 1 and the ytterbium electrode 3 can be formed by the method of forming the gate electrode 5 (see Fig. 2 (5)). In the case where the electrode is placed in the uppermost contact structure above the semiconductor layer, a vacuum evaporation method using a shadow mask is generally used, and conversely, an underlying contact structure in which the electrode is positioned below the semiconductor layer In the case, photolithography or various printing methods are often used to form the pattern of the electrodes.

(保護層) (The protective layer)

如欲於半導體層上形成保護層7時,則可採用各種方法。如保護層係由樹脂所成之情形,可例舉:經塗佈樹脂 溶液後使其乾燥以作成樹脂膜之方法、經塗佈樹脂單體(monomer)或蒸鍍後進行聚合之方法等。亦可於成膜後實施交聯處理(bridging treatment)。如保護層係由無機物所成之情形,則可採用例如,利用濺鍍法、蒸鍍法等的真空製程之形成方法、或利用溶膠凝膠方法等的溶液製程之形成方法。 When the protective layer 7 is to be formed on the semiconductor layer, various methods can be employed. If the protective layer is made of a resin, it may be exemplified by a coated resin. The solution is dried and dried to form a resin film, coated with a resin monomer or a method of performing polymerization after vapor deposition. It is also possible to carry out a bridging treatment after film formation. When the protective layer is formed of an inorganic material, for example, a method of forming a vacuum process using a sputtering method, a vapor deposition method, or the like, or a method of forming a solution process using a sol-gel method or the like can be employed.

於本發明之場效電晶體中,除半導體層上之外,各層之間需要時亦可設置保護層。此等層,有時對場效電晶體的電氣特性之穩定化有所助益。 In the field effect transistor of the present invention, in addition to the semiconductor layer, a protective layer may be provided between the layers as needed. These layers sometimes contribute to the stabilization of the electrical characteristics of the field effect transistor.

場效電晶體的動態特性(dynamic characteristics),係取決於半導體層的載子遷移率、絕緣層的靜電容量、元件之構成(源‧汲電極間距離及寬幅等)等。為場效電晶體所用之半導體材料而言,經形成半導體層時的載子遷移率較高者為宜。本發明之場效電晶體的半導體層中,可含有以前述一般式(5)表示之萘二噻吩系化合物,又,亦可將含有以前述式(1)表示之有機半導體材料(A)之層、與含有以前述一般式(1)表示之有機半導體材料以外的有機半導體材料(B)之層作為半導體層加以層合。如採用前述層合型的場效電晶體時則具有大氣中穩定,且耐用壽命長之優點。又,由於經降低磁滯,且具有更低的閾值電壓(threshold voltage)之故,於實際的使用中,驅動電壓將降低,結果消費電力將較在來者為降低,以致能達成省能源化。再者,因閾值電壓之降低而從電極往半導體膜的電荷之注入障壁(injection barrier)之結果,對半 導體元件及具有該元件之半導體裝置本身的耐久性之提升亦有效果,而可製得增高有均勻性及可靠性之場效電晶體。 The dynamic characteristics of the field effect transistor depend on the carrier mobility of the semiconductor layer, the electrostatic capacitance of the insulating layer, the composition of the device (the distance between the source and the 汲 electrode, and the width). For the semiconductor material used for the field effect transistor, it is preferred that the carrier mobility is higher when the semiconductor layer is formed. The semiconductor layer of the field effect transistor of the present invention may contain a naphthalene dithiophene compound represented by the above formula (5), or may contain an organic semiconductor material (A) represented by the above formula (1). The layer is laminated as a semiconductor layer with a layer containing an organic semiconductor material (B) other than the organic semiconductor material represented by the above general formula (1). When the above-mentioned laminated field effect transistor is used, it has the advantages of being stable in the atmosphere and having a long service life. Moreover, since the hysteresis is lowered and the threshold voltage is lower, the driving voltage will be lowered in actual use, and as a result, the power consumption will be lower than that of the current one, so that energy saving can be achieved. . Furthermore, as a result of the injection barrier of the charge from the electrode to the semiconductor film due to the decrease in the threshold voltage, the half is half The durability of the conductor element and the semiconductor device itself having the element is also improved, and a field effect transistor having improved uniformity and reliability can be obtained.

〔實施例〕 [Examples]

以下,將舉出實施例以更詳細說明本發明內容,惟本發明並不因此等實施例而有所限定。實施例中,除非特別指定,份表示質量份,%表示質量%之意。 In the following, the present invention will be described in more detail by way of examples, but the invention is not limited thereto. In the examples, unless otherwise specified, parts represent parts by mass, and % means mass%.

〔實施例1〕 [Example 1]

(3,7-二溴代-2,6-雙(4-甲苯基乙炔基)萘之合成) Synthesis of (3,7-dibromo-2,6-bis(4-tolylethynyl)naphthalene)

於氮氣氣氛下,使3,7-二溴代-2,6-雙(三氟甲烷磺醯氧)萘(1.2g,2.0mmol(毫莫耳))溶解於DMF(二甲基甲醯胺)(15ml)與DIPA(二二丙醇胺)(15ml)之混合溶液,並採用氬氣以進行脫氣30分鐘。對此添加Pd(PPh3)2Cl2(氯化二(三苯基膦)鈀)(0.14g,0.1mmol,10mol%)及CuI(碘化銅)(0.076g,0.2mmol ,20mol%)及4-乙炔基甲苯,在室溫下攪拌2小時,並進行薗頭偶合反應(Sonogashina coupling)。然後,濾取所析出之生成物,使用水、乙醇、己烷加以洗滌。使用氯仿實施再結晶藉以精製,作為白色固體製得3,7-二溴代-2,6-雙(4-甲苯基乙炔基)萘(0.57g,56%)。 3,7-dibromo-2,6-bis(trifluoromethanesulfonyloxy)naphthalene (1.2 g, 2.0 mmol (mole)) was dissolved in DMF (dimethylformamide) under a nitrogen atmosphere. (15 ml) and DIPA (didipropanolamine) (15 ml) were mixed and argon gas was used for degassing for 30 minutes. Pd(PPh 3 ) 2 Cl 2 (bis(triphenylphosphine)palladium chloride) (0.14 g, 0.1 mmol, 10 mol%) and CuI (copper iodide) (0.076 g, 0.2 mmol, 20 mol%) were added thereto. And 4-ethynyltoluene was stirred at room temperature for 2 hours, and a Sonogashina coupling was carried out. Then, the precipitated product was collected by filtration and washed with water, ethanol and hexane. Recrystallization was carried out using chloroform to purify, and 3,7-dibromo-2,6-bis(4-methylphenylethynyl)naphthalene (0.57 g, 56%) was obtained as a white solid.

1H-NNR(氫原子核磁共振)(400MHz,CDCl3)δ 8.04(s,2H,ArH),7.93(s,2H,ArH),7.52(d,4H,J=8.0Hz,PhH),7.21(d,4H,J=8.0Hz,PhH),2.35(s,6H,CH3)。 1 H-NNR (hydrogen nuclear magnetic resonance) (400 MHz, CDCl 3 ) δ 8.04 (s, 2H, ArH), 7.93 (s, 2H, ArH), 7.52 (d, 4H, J = 8.0 Hz, PhH), 7.21. (d, 4H, J = 8.0Hz , PhH), 2.35 (s, 6H, CH 3).

〔實施例2〕 [Example 2]

(3,7-二溴代-2,6-雙(3-甲苯基乙炔基)萘之合成) Synthesis of (3,7-dibromo-2,6-bis(3-tolylethynyl)naphthalene)

除不用4-乙炔基甲苯而使用3-乙炔基甲苯以外,其餘則實施與實施例1同樣的操作,作為黃色固體製得3,7-二溴代-2,6-雙(3-甲苯基乙炔基)萘(54%)。 The same procedure as in Example 1 was carried out except that 3-ethynyltoluene was not used instead of 3-ethynyltoluene, and 3,7-dibromo-2,6-bis(3-methylphenyl) was obtained as a yellow solid. Ethynyl) naphthalene (54%).

1H-NNR(400MHz,CDCl3)δ8.05(s,2H,ArH),7.94(s,2H,ArH),7.45(d,2H,J=12.0Hz,PhH),7.30(t,2H,J=8.0Hz,PhH),7.20(d,2H,J=4.0Hz ,PhH),2.35(s,6H,CH3)。 1 H-NNR (400MHz, CDCl 3 ) δ 8.05 (s, 2H, ArH), 7.94 (s, 2H, ArH), 7.45 (d, 2H, J = 12.0 Hz, PhH), 7.30 (t, 2H, J = 8.0Hz, PhH), 7.20 (d, 2H, J = 4.0Hz, PhH), 2.35 (s, 6H, CH 3).

〔實施例3〕 [Example 3]

(2,7-雙(4-甲苯基)-萘并〔2,3-b:7,6-b’〕二噻吩(化合物(6))之合成 Synthesis of (2,7-bis(4-methylphenyl)-naphtho[2,3-b:7,6-b']dithiophene (Compound (6))

使Na2S‧9H2O(0.96g,4.0mmol)溶解於NMP(N-甲基吩)(30ml),在190℃,大氣下攪拌1小時後,滴下3,7-二溴代-2,6-雙(4-甲苯基乙炔基)萘(0.57g,1.0mmol)的NMP溶液,攪拌16小時。然後,將反應溶液注入飽和氯化銨水溶液(300ml)中,以使固體析出。將此濾取,並依水、乙醇、己烷、二氯甲烷、氯仿的順序加以洗滌。將所得之粗生成物,在真空下,於360℃下實施升華精製,作為黃色固體製得2,7-雙(4-甲苯基)-萘并〔2,3-b:7,6-b’〕二噻吩(0.26g,63%)。 Dissolving Na 2 S‧9H 2 O (0.96 g, 4.0 mmol) in NMP (N-methyl phene (30 ml), after stirring at 190 ° C for 1 hour in the atmosphere, a solution of 3,7-dibromo-2,6-bis(4-methylphenylethynyl)naphthalene (0.57 g, 1.0 mmol) in NMP was added dropwise. Stir for 16 hours. Then, the reaction solution was poured into a saturated aqueous solution of ammonium chloride (300 ml) to precipitate a solid. This was filtered off and washed with water, ethanol, hexane, dichloromethane and chloroform. The obtained crude product was subjected to sublimation purification under vacuum at 360 ° C to obtain 2,7-bis(4-methylphenyl)-naphtho[2,3-b:7,6-b as a yellow solid. '] Dithiophene (0.26 g, 63%).

質量分析MS(質譜術)(EI=70eV)m/z=420(M+)(島津GCMS-QP2010SE) Mass analysis MS (mass spectrometry) (EI=70eV) m/z=420(M + ) (Shimadzu GCMS-QP2010SE)

吸收光譜:λmax 446,478nm(薄膜)(島津自動記錄式分光光度計UV-3600型(P/N206-13500)) Absorption spectrum: λmax 446, 478 nm (film) (Shimadzu automatic recording spectrophotometer UV-3600 (P/N206-13500))

元素分析:Anal.(分析)Calcd(計算值)(%)for C28H20S2:C79.96,H4.79;found(實際測定)C80.04,H4.79。 Elemental analysis: Anal (Analysis) Calcd (calculated value) (%) for C 28 H 20 S 2:. C79.96, H4.79; found ( actually measured) C80.04, H4.79.

〔實施例4〕 [Example 4]

(2,7-雙(3-甲苯基)-萘并〔2,3-b:7,6-b’〕二噻吩(化合物(7))之合成) Synthesis of (2,7-bis(3-tolyl)-naphtho[2,3-b:7,6-b']dithiophene (compound (7))

除不用3,7-二溴代-2,6-雙(4-甲苯基乙炔基)萘而使用3,7-二溴代-2,6-雙(3-甲苯基乙炔基)萘以外,其餘則實施與實施例3同樣的操作,製得2,7-雙(3-甲苯基)-萘并〔2,3-b:7,6-b’〕二噻吩(46%)。 Except that 3,7-dibromo-2,6-bis(4-tolylethynyl)naphthalene is used instead of 3,7-dibromo-2,6-bis(3-tolylethynyl)naphthalene, The same operation as in Example 3 was carried out to obtain 2,7-bis(3-methylphenyl)-naphtho[2,3-b:7,6-b']dithiophene (46%).

質量分析MS(EI=70eV)m/z=420(M+)(島津GCMS-QP 2010SE) Mass Analysis MS (EI=70eV) m/z=420(M + ) (Shimadzu GCMS-QP 2010SE)

吸收光譜:λmax 446,478nm(薄膜)(島津自動記錄式分光光度計UV-3600型(P/N206-13500)) Absorption spectrum: λmax 446, 478 nm (film) (Shimadzu automatic recording spectrophotometer UV-3600 (P/N206-13500))

元素分析:Anal.Calcd(%)for C28H20S2:C79.96,H4.79;found C80.22,H4.59。 Elemental analysis: Anal. Calcd (%) for C 28 H 20 S 2 : C79.96, H4.79; found C 80.22, H 4.59.

〔實施例5〕 [Example 5]

(化合物(6)(p-tolylNDT(對甲苯基正癸三烯))的場效電晶體之製作) (Production of field effect transistor of compound (6) (p-tolylNDT (p-tolyl-n-triene))

將經實施十八基三氯矽烷處理之附有200nm的SiO2熱氧化膜之正摻雜矽晶圓(面電阻0.02Ω‧cm以下)設置於真空蒸鍍裝置內,並裝置內的真空度能成為5.0×10-3 Pa以下為止進行排氣。藉由電阻加熱蒸鍍法(resistance heating deposition)而對此電極,在基板溫度約100℃的條件下,將化合物(6)依1至2Å(埃)/sec(秒)的蒸鍍速度蒸鍍至50nm的厚度,以形成半導體層(2)。接著,對此基板裝附電極製作用陰影遮罩,並設置於真空蒸鍍裝置內,且進行排氣至裝置內的真空度能成為1.0×10-4 Pa以下為止,藉由電阻加熱蒸鍍法而將金的電極,亦即源電極(1)及汲電極(3)蒸鍍至40nm的厚度,製得屬於TC(最上層接觸)型之本發明之場效電晶體(通道(channel)長度50μm、通道寬幅1.5mm)。 A positively doped yttrium wafer (face resistance of 0.02 Ω ‧ cm or less) with a 200 nm SiO 2 thermal oxide film treated with octadecyltrichloromethane was placed in a vacuum evaporation apparatus, and the degree of vacuum in the apparatus was Exhaust can be performed up to 5.0 × 10 -3 Pa or less. The electrode (6) is vapor-deposited at a vapor deposition rate of 1 to 2 Å (Å)/sec (second) at a substrate temperature of about 100 ° C by resistance heating deposition. To a thickness of 50 nm to form a semiconductor layer (2). Next, a shadow mask for the substrate is attached to the substrate, and is placed in the vacuum vapor deposition apparatus, and the degree of vacuum in the apparatus is 1.0 × 10 -4 Pa or less, and the surface is heated by resistance heating. The gold electrode, that is, the source electrode (1) and the germanium electrode (3) are vapor-deposited to a thickness of 40 nm to obtain a field effect transistor (channel) of the present invention belonging to the TC (upper layer contact) type. The length is 50μm and the channel width is 1.5mm).

在此,於本實施例中之場效電晶體,係附有熱氧化膜之n摻雜矽晶圓中之熱氧化膜具有絕緣層(4)之功能,而n摻雜矽晶圓則具備基板(6)及閘電極(5)之功能(參考第3圖)。將所得之場效電晶體設置於探測器(prober)內,並採用半導體參數分析器(parameter analyzer)4200SCS(凱斯列社製)以測定半導體特性。半導體特性,係將汲電壓作為-60V,將閘電壓從60V掃描至-60V,以測定汲電流-閘電壓(transfer(遷移))特性。從所得電壓電流曲線得知,該元件的載子遷移率為 1.31cm2/Vs、閾值電壓為48V、Ion/Ioff為106Here, in the field effect transistor of the present embodiment, the thermal oxide film in the n-doped germanium wafer with the thermal oxide film has the function of the insulating layer (4), and the n-doped germanium wafer has the function. The function of the substrate (6) and the gate electrode (5) (refer to Figure 3). The obtained field effect transistor was placed in a probe, and a semiconductor parameter analyzer 4200SCS (manufactured by Caselle Co., Ltd.) was used to measure the semiconductor characteristics. The semiconductor characteristic is that the 汲 voltage is taken as -60V, and the gate voltage is scanned from 60V to -60V to determine the 汲 current-gate voltage (transfer) characteristic. From the obtained voltage-current curve, the carrier mobility of the device was 1.31 cm 2 /Vs, the threshold voltage was 48 V, and Ion/Ioff was 10 6 .

〔實施例6〕 [Example 6]

(化合物(7)(m-tolylNDT(間甲苯基正癸三烯)的場效電晶體之製作) (Production of compound (7) (m-tolyl NDT (m-tolyl n-triene) field effect transistor)

將經實施辛基三氯矽烷處理之附有200nm的SiO2熱氧化膜之正摻雜矽晶圓(面電阻0.02Ω‧cm以下)設置於真空蒸鍍裝置內,並裝置內的真空度能成為5.0×10-3Pa以下為止進行排氣。藉由電阻加熱蒸鍍法而對此電極,在基板溫度約100℃的條件下,將化合物(7)依1至2Å/sec的蒸鍍速度蒸鍍至50nm的厚度,以形成半導體層(2)。接著,對此基板裝附電極製作用陰影遮罩,並設置於真空蒸鍍裝置內,且進行排氣至裝置內的真空度能成為1.0×10-4Pa以下為止,藉由電阻加熱蒸鍍法而將金的電極,亦即源電極(1)及汲電極(3)蒸鍍至40nm的厚度,製得屬於TC(最上層接觸)型之本發明之場效電晶體(通道長度50μm、通道寬幅1.5mm)。 A positively doped germanium wafer (face resistance of 0.02 Ω ‧ cm or less) with a 200 nm SiO 2 thermal oxide film treated with octyltrichloromethane was placed in a vacuum evaporation apparatus, and the vacuum energy in the apparatus was Exhaust until 5.0 × 10 -3 Pa or less. The electrode (7) was vapor-deposited to a thickness of 50 nm at a deposition rate of 1 to 2 Å/sec at a substrate temperature of about 100 ° C by a resistance heating vapor deposition method to form a semiconductor layer (2). ). Next, a shadow mask for the substrate is attached to the substrate, and is placed in the vacuum vapor deposition apparatus, and the degree of vacuum in the apparatus is 1.0 × 10 -4 Pa or less, and the surface is heated by resistance heating. The electrode of gold, that is, the source electrode (1) and the ruthenium electrode (3) are vapor-deposited to a thickness of 40 nm to obtain a field effect transistor of the present invention belonging to the TC (topmost contact) type (channel length 50 μm, The channel width is 1.5mm).

將所得之場效電晶體設置於探測器內,並採用半導體參數分析器4200SCS(凱斯列社製)以測定半導體特性。半導體特性,係將汲電壓作為-60V,將閘電壓從20V掃描至-60V,以測定汲電流-閘電壓(遷移)特性。從所得電壓電流曲線得知,該元件的載子遷移率為0.34cm2/Vs,閾值電壓為-2V、Ion/Ioff為105The obtained field effect transistor was placed in a detector, and a semiconductor parameter analyzer 4200SCS (manufactured by Caselle) was used to measure the semiconductor characteristics. The semiconductor characteristic is that the 汲 voltage is taken as -60V, and the gate voltage is scanned from 20V to -60V to determine the 汲 current-gate voltage (migration) characteristics. From the obtained voltage-current curve, the carrier mobility of this element was 0.34 cm 2 /Vs, the threshold voltage was -2 V, and Ion/Ioff was 10 5 .

〔實施例7〕 [Example 7]

(化合物(6)(p-tolylNDT)與化合物(23)(DPh(二苯基)-BTBT)之層合型場效電晶體之製作) (Production of a laminated field effect transistor of compound (6) (p-tolylNDT) and compound (23) (DPh (diphenyl)-BTBT)

將經實施辛基三氯矽烷處理之附有200nm的SiO2熱氧化膜之正摻雜矽晶圓(面電阻0.02Ω‧cm以下)設置於真空蒸鍍裝置內,並裝置內的真空度能成為5.0×10-3Pa以下為止進行排氣。藉由電阻加熱蒸鍍法而對此電極,在基板溫度約25℃的條件下,將化合物(23)依1至2Å/sec的蒸鍍速度蒸鍍至50nm的厚度,接著將化合物(6)依1至2Å/sec的蒸鍍速度蒸鍍至5nm的厚度,以形成半導體層(2)。接著,對此基板裝附電極製作用陰影遮罩,並設置於真空蒸鍍裝置內,且進行排氣至裝置內的真空度能成為1.0×10-4Pa以下為止,藉由電阻加熱蒸鍍法而將金的電極,亦即源電極(1)及汲電極(3)蒸鍍至40nm的厚度,製得屬於TC(最上層接觸)型之本發明之場效電晶體(通道長度50μm、通道寬幅1.5mm)。 A positively doped germanium wafer (face resistance of 0.02 Ω ‧ cm or less) with a 200 nm SiO 2 thermal oxide film treated with octyltrichloromethane was placed in a vacuum evaporation apparatus, and the vacuum energy in the apparatus was Exhaust until 5.0 × 10 -3 Pa or less. The electrode (23) was vapor-deposited to a thickness of 50 nm at a deposition rate of 1 to 2 Å/sec at a substrate temperature of about 25 ° C by a resistance heating vapor deposition method, followed by a compound (6). The thickness was evaporated to a thickness of 5 nm at an evaporation rate of 1 to 2 Å/sec to form a semiconductor layer (2). Next, a shadow mask for the substrate is attached to the substrate, and is placed in the vacuum vapor deposition apparatus, and the degree of vacuum in the apparatus is 1.0 × 10 -4 Pa or less, and the surface is heated by resistance heating. The electrode of gold, that is, the source electrode (1) and the ruthenium electrode (3) are vapor-deposited to a thickness of 40 nm to obtain a field effect transistor of the present invention belonging to the TC (topmost contact) type (channel length 50 μm, The channel width is 1.5mm).

將所得之場效電晶體設置於探測器內,並採用半導體參數分析器4200SCS(凱斯列社製)以測定半導體特性。半導體特性,係將汲電壓作為-60V,將閘電壓從20V掃描至-60V,以測定汲電流-閘電壓(遷移)特性。從所得電壓電流曲線得知,該元件的載子遷移率為3.1cm2/Vs,閾值電壓為-7V、Ion/Ioff為107The obtained field effect transistor was placed in a detector, and a semiconductor parameter analyzer 4200SCS (manufactured by Caselle) was used to measure the semiconductor characteristics. The semiconductor characteristic is that the 汲 voltage is taken as -60V, and the gate voltage is scanned from 20V to -60V to determine the 汲 current-gate voltage (migration) characteristics. From the obtained voltage-current curve, the carrier mobility of the element was 3.1 cm 2 /Vs, the threshold voltage was -7 V, and Ion/Ioff was 10 7 .

〔實施例8〕 [Example 8]

(化合物(5)(DPh-NDT)與化合物(23)(DPh-BTBT)之層合型場效電晶體之製作) (Production of laminated field effect transistor of compound (5) (DPh-NDT) and compound (23) (DPh-BTBT))

除不用化合物(6)而採用化合物(5)以外,其餘則實施與實施例7同樣的方法,製得場效電晶體。 A field effect transistor was obtained in the same manner as in Example 7 except that the compound (5) was used instead of the compound (6).

將所得場效電晶體按與實施例7同樣方式測定半導體特性。從所得電壓電流曲線得知,該元件的載子遷移率為1.5cm2/Vs,閾值電壓為-21V、Ion/Ioff為108The obtained field effect transistor was measured for semiconductor characteristics in the same manner as in Example 7. From the obtained voltage-current curve, the carrier mobility of the device was 1.5 cm 2 /Vs, the threshold voltage was -21 V, and Ion/Ioff was 10 8 .

〔比較例1〕 [Comparative Example 1]

(化合物(23)(DPh-BTBT)的單層型場效電晶體之製作) (Production of single layer type field effect transistor of compound (23) (DPh-BTBT))

將經實施辛基三氯矽烷處理之附有200nm的SiO2熱氧化膜之正摻雜矽晶圓(面電阻0.02Ω‧cm以下)設置於真空蒸鍍裝置內,並裝置內的真空度能成為5.0×10-3Pa以下為止進行排氣。藉由電阻加熱蒸鍍法而對此電極,在基板溫度約25℃的條件下,將化合物(23)依1至2Å/sec的蒸鍍速度蒸鍍至50nm的厚度,以形成半導體層(2)。接著對此基板裝附電極製作用陰影遮罩,並設置於真空蒸鍍裝置內,且進行排氣至裝置內的真空度能成為1.0×10-4 Pa以下為止,藉由電阻加熱蒸鍍法而將金的電極,亦即源電極(1)及汲電極(3)蒸鍍至40nm的厚度,製得屬於TC(最上層接觸)型之本發明之場效電晶體(通道長度50μm、通道寬幅1.5mm)。 A positively doped germanium wafer (face resistance of 0.02 Ω ‧ cm or less) with a 200 nm SiO 2 thermal oxide film treated with octyltrichloromethane was placed in a vacuum evaporation apparatus, and the vacuum energy in the apparatus was Exhaust until 5.0 × 10 -3 Pa or less. The electrode (23) was deposited by a resistance heating vapor deposition method at a substrate temperature of about 25 ° C at a deposition rate of 1 to 2 Å / sec to a thickness of 50 nm to form a semiconductor layer (2). ). Next, a shadow mask for electrode formation is attached to the substrate, and is placed in a vacuum vapor deposition apparatus, and the degree of vacuum in the apparatus is 1.0×10 −4 Pa or less, and the resistance heating deposition method is performed. The gold electrode, that is, the source electrode (1) and the germanium electrode (3) are vapor-deposited to a thickness of 40 nm to obtain a field effect transistor of the present invention belonging to the TC (topmost contact) type (channel length 50 μm, channel) 1.5mm wide).

將所得之場效電晶體設置於探測器內,並採用半導體 參數分析器4200SCS(凱斯列社製)以測定半導體特性。半導體特性,係將汲電壓作為-60V,將閘電壓從20V掃描至-60V,以測定汲電流-閘電壓(遷移)特性。從所得電壓電流曲線得知,該元件的載子遷移率為0.8cm2/Vs、閾值電壓為-24V、Ion/Ioff為108The obtained field effect transistor was placed in a detector, and a semiconductor parameter analyzer 4200SCS (manufactured by Caselle) was used to measure the semiconductor characteristics. The semiconductor characteristic is that the 汲 voltage is taken as -60V, and the gate voltage is scanned from 20V to -60V to determine the 汲 current-gate voltage (migration) characteristics. From the obtained voltage-current curve, the carrier mobility of the device was 0.8 cm 2 /Vs, the threshold voltage was -24 V, and Ion/Ioff was 10 8 .

從實施例7、實施例8以及比較例1的電壓電流曲線(第4圖)得知,本發明之場效型電晶體顯示遷移率高、閾值電壓低、且殆無磁滯之電晶體特性。 From the voltage-current curves (Fig. 4) of Example 7, Example 8, and Comparative Example 1, it is known that the field effect type transistor of the present invention exhibits a transistor having a high mobility, a low threshold voltage, and no hysteresis. .

〔實施例9〕 [Example 9]

除改變場效電晶體之通道長度L(20、40μm)以外,其餘則實施與實施例7、實施例8以及比較例1同樣操作,以測定遷移率。將其結果,表示於表1中。 The mobility was measured in the same manner as in Example 7, Example 8, and Comparative Example 1, except that the channel length L (20, 40 μm) of the field effect transistor was changed. The results are shown in Table 1.

〔實施例10〕 [Example 10]

(化合物(6)(p-tolylNDT)與化合物(20)(C8-BTBT)之層合型場效電晶體之製作) (Production of a laminated field effect transistor of compound (6) (p-tolylNDT) and compound (20) (C8-BTBT))

將經實施HMDS(六甲基二矽氮烷)處理之附有 300nm的SiO2熱氧化膜之正摻雜矽晶圓(面電阻0.02Ω‧cm以下)設置於真空蒸鍍裝置內,並裝置內的真空度能成為1.0×10-3Pa以下為止進行排氣。藉由電阻加熱蒸鍍法而對此電極,在基板溫度約25℃的條件下,將化合物(20)依1Å/sec的蒸鍍速度蒸鍍至50nm的厚度,接著將化合物(6)依1至2Å/sec的蒸鍍速度蒸鍍至5nm的厚度,以形成半導體層(2)。接著對此基板裝附電極製作用陰影遮罩,並設置於真空蒸鍍裝置內,且進行排氣至裝置內的真空度能成為5.0×10-4Pa以下為止,藉由電阻加熱蒸鍍法而將金的電極,亦即源電極(1)及汲電極(3)蒸鍍至50nm的厚度,製得屬於TC(最上層接觸)型之本發明之場效電晶體(通道長度200μm、通道寬幅2.5mm)。 A positively doped germanium wafer (face resistance of 0.02 Ω ‧ cm or less) with a 300 nm SiO 2 thermal oxide film treated with HMDS (hexamethyldioxane) was placed in a vacuum evaporation apparatus, and the apparatus was installed. The inside vacuum degree can be exhausted at 1.0 × 10 -3 Pa or less. The electrode (20) was vapor-deposited to a thickness of 50 nm at a deposition rate of 1 Å/sec at a substrate temperature of about 25 ° C by a resistance heating vapor deposition method, followed by a compound (6). The vapor deposition rate to 2 Å/sec was evaporated to a thickness of 5 nm to form a semiconductor layer (2). Next, a shadow mask for electrode formation is attached to the substrate, and is placed in a vacuum vapor deposition apparatus, and the degree of vacuum in the apparatus is 5.0×10 −4 Pa or less, and the resistance heating deposition method is performed. The gold electrode, that is, the source electrode (1) and the germanium electrode (3) are vapor-deposited to a thickness of 50 nm to obtain a field effect transistor of the present invention belonging to the TC (topmost contact) type (channel length 200 μm, channel) Wide width 2.5mm).

將所得之場效電晶體設置於探測器內,並採用半導體參數分析器4200SCS(凱斯列社製)以測定半導體特性。半導體特性,係將汲電壓作為-100V,將閘電壓從20V掃描至-100V,以測定汲電流-閘電壓(遷移)特性。從所得電壓電流曲線得知,該元件的載子遷移率為10.5cm2/Vs、閾值電壓為-43V、Ion/Ioff為4×108The obtained field effect transistor was placed in a detector, and a semiconductor parameter analyzer 4200SCS (manufactured by Caselle) was used to measure the semiconductor characteristics. The semiconductor characteristic is to measure the 汲 current-gate voltage (migration) characteristic by taking the 汲 voltage as -100V and scanning the gate voltage from 20V to -100V. From the obtained voltage-current curve, the carrier mobility of the device was 10.5 cm 2 /Vs, the threshold voltage was -43 V, and Ion/Ioff was 4 × 10 8 .

〔比較例2〕 [Comparative Example 2]

(化合物(20)(C8-BTBT)的單層型場效電晶體之製作) (Production of single layer type field effect transistor of compound (20) (C8-BTBT))

除未形成化合物(6)的薄膜以外,其餘則依與實施例10同樣方法以製得場效電晶體。 A field effect transistor was obtained in the same manner as in Example 10 except that the film of the compound (6) was not formed.

將所得之場效電晶體設置於探測器內,並採用半導體參數分析器4200SCS(凱斯列社製)以測定半導體特性。半導體特性,係將汲電流作為-100V,將閘電壓從20V掃描至-100V,以測定汲電流-閘電壓(遷移)特性。從所得電壓電流曲線得知,該元件的載子遷移率為6.0cm2/Vs、閾值電壓為-36V、Ion/Ioff為2×108The obtained field effect transistor was placed in a detector, and a semiconductor parameter analyzer 4200SCS (manufactured by Caselle) was used to measure the semiconductor characteristics. The semiconductor characteristic is that the 汲 current is taken as -100V, and the gate voltage is scanned from 20V to -100V to determine the 汲 current-gate voltage (migration) characteristics. From the obtained voltage-current curve, the carrier mobility of the device was 6.0 cm 2 /Vs, the threshold voltage was -36 V, and Ion/Ioff was 2 × 10 8 .

從以上之結果得知,在比較例1中,如通道長度變短之情形則遷移率變低,惟在本發明之電晶體則並無此種傾向,即使通道變短之情形仍然遷移率並不降低。又得知,由於本發明之電晶體係能在短的通道長度下之高遷移率動作之故,能使大電流流通,且適合於高密度積體(high density integration)之事實。又從短通道長度的電壓電流曲線得知,本發明之場效電晶體係磁滯較少,而具有良好的特性者之事實。從上述之結果得知,經層合本發明之化合物之場效電晶體明顯顯示遷移率高且良好的半導體特性之事實。 From the above results, in Comparative Example 1, if the channel length becomes short, the mobility becomes low, but in the transistor of the present invention, there is no such tendency, and even if the channel becomes short, the mobility is still Not lowering. It is also known that the electromorphic system of the present invention can operate at a high mobility in a short channel length, allowing a large current to flow and being suitable for high density integration. Further, from the voltage-current curves of the short channel length, it is known that the field effect electro-crystal system of the present invention has less hysteresis and has good characteristics. From the above results, it is known that the field effect transistor in which the compound of the present invention is laminated clearly shows the fact that the mobility is high and the semiconductor characteristics are good.

1‧‧‧源電極 1‧‧‧ source electrode

2‧‧‧半導體層 2‧‧‧Semiconductor layer

2’‧‧‧層合第二層之半導體層 2'‧‧‧Layered second layer of semiconductor layer

3‧‧‧汲電極 3‧‧‧汲 electrode

4‧‧‧絕緣層 4‧‧‧Insulation

5‧‧‧閘電極 5‧‧‧ gate electrode

6‧‧‧基板 6‧‧‧Substrate

7‧‧‧保護層 7‧‧‧Protective layer

第1圖:表示本發明之場效電晶體的構造狀態例之概略圖。 Fig. 1 is a schematic view showing an example of a structural state of a field effect transistor of the present invention.

第2圖:為製造本發明之最上層接觸底層閘極型構造之場效電晶體之用的過程的概略圖。 Fig. 2 is a schematic view showing a process for producing a field effect transistor in which the uppermost layer of the present invention is in contact with the underlying gate type structure.

第3圖:表示本發明之最上層接觸底層閘極型構造之場效電晶體的構造例之概略圖。 Fig. 3 is a schematic view showing a structural example of a field effect transistor in which the uppermost layer of the present invention is in contact with the underlying gate type structure.

第4圖:實施例7(層合型)、實施例8(層合型)、以及比較例1中所得之場效型電晶體的電壓電流曲線。 Fig. 4 is a graph showing voltage and current curves of the field effect type transistor obtained in Example 7 (laminate type), Example 8 (laminate type), and Comparative Example 1.

Claims (14)

一種場效電晶體,其特徵為:含有可以一般式(1)表示之有機半導體材料(A),及可以前述一般式(1)表示之有機半導體材料以外的有機半導體材料(B), (式中,X1表示可具有取代基之脂肪族烴殘基或可具有取代基之芳香族殘基)。 A field effect transistor characterized by comprising an organic semiconductor material (A) which can be represented by the general formula (1), and an organic semiconductor material (B) other than the organic semiconductor material represented by the above general formula (1), (wherein X 1 represents an aliphatic hydrocarbon residue which may have a substituent or an aromatic residue which may have a substituent). 如申請專利範圍第1項之場效電晶體,其中有機半導體材料(A)係可以一般式(2)表示之有機半導體材料, (式中,R1表示氫原子或可具有取代基之脂肪族烴殘基)。 For example, in the field effect transistor of claim 1, wherein the organic semiconductor material (A) is an organic semiconductor material represented by the general formula (2), (wherein R 1 represents a hydrogen atom or an aliphatic hydrocarbon residue which may have a substituent). 如申請專利範圍第1項或第2項之場效電晶體,其中有機半導體材料(B)係可以一般式(3)表示之有機半導體材料, (式中,X2表示可具有取代基之脂肪族烴殘基或可具有取代基之芳香族殘基)。 For example, in the field effect transistor of claim 1 or 2, wherein the organic semiconductor material (B) is an organic semiconductor material represented by the general formula (3), (wherein X 2 represents an aliphatic hydrocarbon residue which may have a substituent or an aromatic residue which may have a substituent). 如申請專利範圍第3項之場效電晶體,其中可以一般式(3)表示之有機半導體材料係一般式(4)者, (式中,R2表示氫原子或可具有取代基之脂肪族烴殘基)。 For example, in the field effect transistor of claim 3, wherein the organic semiconductor material represented by the general formula (3) is the general formula (4), (wherein R 2 represents a hydrogen atom or an aliphatic hydrocarbon residue which may have a substituent). 如申請專利範圍第1項至第4項之任一項之場效電晶體,其中具有經層合含有有機半導體材料(A)之層、及含有有機半導體材料(B)之層之構造。 A field effect transistor according to any one of claims 1 to 4, which has a structure in which a layer containing the organic semiconductor material (A) and a layer containing the organic semiconductor material (B) are laminated. 如申請專利範圍第5項之場效電晶體,其中係參差型的電晶體構造者。 For example, the field effect transistor of claim 5, which is a parallax type crystal structure builder. 如申請專利範圍第6項之場效電晶體,其中係於閘電極上所設置之絕緣體層上,依序層合有含有有機半導體材料(B)之層及含有有機半導體材料(A)之層,再按與含有有機半導體材料(A)之層的最上部相接之方式分別設置有源電極及汲電極之頂部接觸底部閘極型構造者。 For example, in the field effect transistor of claim 6, wherein the layer of the organic semiconductor material (B) and the layer containing the organic semiconductor material (A) are laminated on the insulator layer provided on the gate electrode. Then, the top of the active electrode and the tantalum electrode are respectively placed in contact with the bottom gate type structure in such a manner as to be in contact with the uppermost portion of the layer containing the organic semiconductor material (A). 如申請專利範圍第6項之場效電晶體,其中係於基板上分別設置有源電極及汲電極,並其上依序層合有含有有機半導體材料(A)之層及含有有機半導體材料(B)之層,再於按與含有有機半導體材料(B)之層的最上部相接之方式所設置之絕緣體層上設置有閘電極之底部接觸頂部閘極型構造者。 For example, in the field effect transistor of claim 6, wherein the active electrode and the ruthenium electrode are respectively disposed on the substrate, and the layer containing the organic semiconductor material (A) and the organic semiconductor material are sequentially laminated thereon ( The layer of B) is placed on the insulator layer provided in contact with the uppermost layer of the layer containing the organic semiconductor material (B), and the bottom of the gate electrode is placed in contact with the top gate type structure. 一種萘并二噻吩系化合物,其特徵為:可以一般式 (5)表示, (式中,R3表示C1-3烷基)。 A naphtho-dithiophene-based compound characterized by being represented by the general formula (5), (wherein R 3 represents a C1-3 alkyl group). 如申請專利範圍第9項之萘并二噻吩系化合物,其中R3為甲基。 A naphtho-dithiophene-based compound according to claim 9 wherein R 3 is a methyl group. 一種化合物,其特徵為:可以式(6)表示, a compound characterized by being represented by formula (6), 一種萘并二噻吩系有機半導體材料,其特徵為:由申請專利範圍第9項至第11項之任一項所記載之化合物所成。 A naphtho-dithiophene-based organic semiconductor material obtained by the compound according to any one of claims 9 to 11. 一種萘并二噻吩系有機電晶體材料,其特徵為:由申請專利範圍第9項至第11項之任一項所記載之化合物所成。 A naphtho-dithiophene-based organic electro-optic material obtained by the compound according to any one of the items 9 to 11 of the patent application. 一種場效電晶體,其特徵為:含有申請專利範圍第12項所記載之有機半導體材料。 A field effect transistor characterized by comprising the organic semiconductor material described in claim 12 of the patent application.
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