TW201305720A - Optical proximity correction method - Google Patents
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本發明係涉及一種光學接近修正方法,特別是一種應用於多重曝光技術,並提供一補償圖案的光學接近修正方法。The present invention relates to an optical proximity correction method, and more particularly to an optical proximity correction method applied to a multiple exposure technique and providing a compensation pattern.
在半導體製程上,為了將積體電路(integrated circuits)的圖案順利地轉移到半導體晶片上,必須先將電路圖案設計於一光罩佈局圖上,之後依據光罩佈局圖所輸出的光罩圖案(photomask pattern)來製作一光罩,並且將光罩上的圖案以一定的比例轉移到該半導體晶片上,也就是俗稱的微影技術(lithography)。In the semiconductor process, in order to smoothly transfer the pattern of integrated circuits to the semiconductor wafer, the circuit pattern must first be designed on a mask layout, and then the mask pattern output according to the mask layout. (photomask pattern) to make a reticle, and transfer the pattern on the reticle to the semiconductor wafer in a certain proportion, which is commonly known as lithography.
而隨著半導體電路的積體層次的快速增加,微影技術所要求的線寬也越來越小,各半導體元件間的距離也日益縮短。上述元件的距離在曝光製程中會因為光學特性的影響而有其物理上的限制。舉例來說,為了得到微小尺寸的元件,光罩之透光區的間隔(pitch)將配合元件尺寸而縮小,但若透光區之間的間隔縮小至特定範圍時(曝光波長為1/2或以下時),通過光罩的光線會發生繞射的現象,進而影響轉移後圖案的解析度。再者,當光罩之透光區之間具有不同的間隔時,其中通過間隔較小的透光區的光線會受到具有較大間隔之透光區的影響而使得轉移後的圖案發生扭曲的現象。With the rapid increase of the integrated level of the semiconductor circuit, the line width required by the lithography technology is getting smaller and smaller, and the distance between the semiconductor elements is also shortened. The distance of the above components may be physically limited due to the influence of optical characteristics in the exposure process. For example, in order to obtain a small-sized component, the pitch of the light-transmitting region of the photomask will be reduced in accordance with the size of the device, but if the interval between the light-transmitting regions is reduced to a specific range (the exposure wavelength is 1/2) Or when the light passing through the reticle is diffracted, which affects the resolution of the transferred pattern. Furthermore, when there are different intervals between the light-transmissive regions of the reticle, the light passing through the light-transmissive regions having a smaller interval may be affected by the light-transmitting regions having a larger interval, so that the transferred pattern is distorted. phenomenon.
目前發展出一種雙重曝光技術,係將目標圖案分解為兩個圖案,並經由兩次的曝光製程以分別將此兩個圖案先後形成於光阻層上。由於分解後的圖案之間距較大,故可利用現有的曝光機台來完成。但藉由兩次微影製程來形成目標圖案的方式,仍有許多問題需要克服。At present, a double exposure technique has been developed in which the target pattern is decomposed into two patterns, and the two patterns are successively formed on the photoresist layer through two exposure processes. Since the distance between the decomposed patterns is large, it can be completed by using an existing exposure machine. However, there are still many problems to be overcome in the way of forming a target pattern by two lithography processes.
本發明於是提供一種光學接近修正方法,可應用於多重曝光技術。The present invention thus provides an optical proximity correction method that can be applied to multiple exposure techniques.
根據一實施例,本發明提出的一種光學接近修正方法。首先提供一目標圖案,接著將目標圖案分解為一第一圖案以及一第二圖案,其中第一圖案與第二圖案於一緻密區中交替排列。然後提供一補償圖案,並判斷補償圖案要設置於第一圖案使之成為一第一修正圖案,或要設置於第二圖案中使之成為一第二修正圖案。最後將第一修正圖案輸出至一第一光罩,並將第二修正圖案輸出至一第二光罩。According to an embodiment, the present invention provides an optical proximity correction method. First, a target pattern is provided, and then the target pattern is decomposed into a first pattern and a second pattern, wherein the first pattern and the second pattern are alternately arranged in a uniform dense area. Then, a compensation pattern is provided, and the compensation pattern is determined to be disposed in the first pattern to be a first correction pattern, or to be disposed in the second pattern to be a second correction pattern. Finally, the first correction pattern is output to a first mask, and the second correction pattern is output to a second mask.
根據另一實施例,本發明係提供一種電路佈局,包含複數個彼此平行之條狀圖案設置於一緻密區中,條狀圖案包含一第一邊緣條狀圖案毗鄰於緻密區之邊緣以及一第二邊緣條狀圖案毗鄰於第一邊緣條狀圖案。第一邊緣條狀圖案包含一補償圖案,補償圖案突出於第一邊緣條狀圖案相較於該第二邊緣條狀圖案之另一側。According to another embodiment, the present invention provides a circuit layout including a plurality of strip patterns parallel to each other disposed in a uniform dense area, the strip pattern including a first edge strip pattern adjacent to an edge of the dense area and a first The two edge strip patterns are adjacent to the first edge strip pattern. The first edge strip pattern includes a compensation pattern that protrudes from the other side of the first edge strip pattern compared to the second edge strip pattern.
本發明提供了一種光學接近修正方法以及利用此方法所形成的電路佈局,利用補償圖案以避免緻密區中的圖案產生黏合的現象,可提高產品的品質。The invention provides an optical proximity correction method and a circuit layout formed by the method, and the compensation pattern is used to avoid the phenomenon that the pattern in the dense region is bonded, and the quality of the product can be improved.
為使熟習本發明所屬技術領域之一般技藝者能更進一步了解本發明,下文特列舉本發明之數個較佳實施例,並配合所附圖式,詳細說明本發明的構成內容及所欲達成之功效。The present invention will be further understood by those skilled in the art to which the present invention pertains. The effect.
請參考第1圖至第4圖,所繪示為本發明光學接近修正方法(optical proximity correction,OPC)的示意圖。如第1圖所示,首先提供一目標圖案302,例如將目標圖案302輸入至一電腦系統(圖未示)中。目標圖案302係指後續欲形成於半導體光阻層上(圖未示)之理想圖案,其反映了後續例如電路的佈局圖案(layout)。而依照其緻密程度,目標圖案302可分為單位面積中圖案密度較大的緻密區(dense region)304以及單位面積中圖案密度較小的孤立區(isolated region)306。緻密區304中的圖案彼此間距較小,通常由矩形或條狀圖案所組成,而孤立區中的圖案則間距較大。而為了達成較高的積集度,緻密區304中圖案的間距P0也不停減小,現有的曝光機台並無法形成緻密區304中的圖案。Please refer to FIG. 1 to FIG. 4 , which are schematic diagrams of an optical proximity correction (OPC) according to the present invention. As shown in Fig. 1, a target pattern 302 is first provided, for example, the target pattern 302 is input to a computer system (not shown). The target pattern 302 refers to an ideal pattern to be subsequently formed on the semiconductor photoresist layer (not shown), which reflects subsequent layouts such as circuits. According to the degree of density, the target pattern 302 can be divided into a dense region 304 having a larger pattern density per unit area and an isolated region 306 having a smaller pattern density per unit area. The patterns in the dense region 304 are spaced apart from one another, typically consisting of a rectangular or strip pattern, while the patterns in the isolated regions are spaced apart. In order to achieve a higher degree of integration, the pitch P0 of the pattern in the dense region 304 is also continuously reduced, and the existing exposure machine cannot form a pattern in the dense region 304.
於是,一種雙重曝光技術被提出以解決上述問題,其係將目標圖案302分解為一第一圖案以及一第二圖案。請參考第2圖以及第3圖,所繪示為本發明第一圖案以及第二圖案的示意圖。如第2圖與第3圖所示,可藉由電腦系統來將目標圖案302被分解成為第2圖的第一圖案308以及第3圖的第二圖案310。在緻密區304中的第一圖案308和第二圖案310會大體上平行於一第一方向314且彼此交替排列(alternatively)。第一圖案308之間的間距P1和第二圖案310之間的間距P2會大於曝光機台可在半導體基板上所形成的臨界尺寸(critical dimension,CD)。因此,在後續步驟中,再分別把第一圖案308以及第二圖案310輸出至一第一光罩(圖未示)與一第二光罩(圖未示),曝光機台即可以第一光罩和第二光罩來對光阻層進行雙重曝光製程,兩者組合後即可形成目標圖案302。Thus, a double exposure technique has been proposed to solve the above problem by decomposing the target pattern 302 into a first pattern and a second pattern. Please refer to FIG. 2 and FIG. 3 , which are schematic diagrams showing the first pattern and the second pattern of the present invention. As shown in FIGS. 2 and 3, the target pattern 302 can be decomposed into the first pattern 308 of FIG. 2 and the second pattern 310 of FIG. 3 by a computer system. The first pattern 308 and the second pattern 310 in the dense region 304 will be substantially parallel to a first direction 314 and alternately arranged with each other. The pitch P1 between the first patterns 308 and the pitch P2 between the second patterns 310 may be greater than a critical dimension (CD) that the exposure stage can form on the semiconductor substrate. Therefore, in the subsequent step, the first pattern 308 and the second pattern 310 are respectively output to a first mask (not shown) and a second mask (not shown), and the exposure machine can be first. The photomask and the second mask are used to perform a double exposure process on the photoresist layer, and the combination of the two forms a target pattern 302.
然而,由於光學接近效應(optical proximity effect,OPE)的影響,通過間隔較小的透光區(即緻密區304)的光線會受到具有較大間隔之透光區(即孤立區306)的影響而使得轉移後的圖案發生偏移的現象。因此,於本發明之一實施例中,會將第一圖案308最靠近孤立區306者的線寬稍微加大(如第2圖第一邊緣圖案309’),也會將第二圖案310最靠近孤立區306者的線寬稍微加大(如第3圖的第二邊緣圖案311’),使得後續曝光時第一邊緣圖案309’能修正至原始圖案302中的第一邊緣圖案309,第二邊緣圖案311’能修正至原始圖案302中的第二邊緣圖案311。However, due to the influence of the optical proximity effect (OPE), the light passing through the light-transmissive region (ie, the dense region 304) having a small interval may be affected by the light-transmitting region having a larger interval (ie, the isolated region 306). The phenomenon that the transferred pattern is shifted. Therefore, in one embodiment of the present invention, the line width of the first pattern 308 closest to the isolated area 306 is slightly increased (as in the first edge pattern 309' of FIG. 2), and the second pattern 310 is also the most The line width near the isolated area 306 is slightly increased (as in the second edge pattern 311' of FIG. 3), so that the first edge pattern 309' can be corrected to the first edge pattern 309 in the original pattern 302 during subsequent exposure, The two edge patterns 311' can be corrected to the second edge patterns 311 in the original pattern 302.
然而,前述實施例中,加寬的第一邊緣圖案309’和第二邊緣圖案311’於曝光後的光阻層會容易有黏合(bridge)的現象。於本發明另一實施例中,還包含提供一補償圖案於第一圖案308中,使之成為第一修正圖案308’。請參考第4圖,所繪示本發明第一修正圖案的示意圖。如第4圖所示,為了避免前述在緻密區304與孤立區306邊界處的光學接近效應的影響,本實施例另外在第一圖案308之第一邊緣圖案309靠近孤立區306之一側設置有一補償圖案312。如此一來,第一邊緣圖案309’即可不受到光學接近效應的影響。相較於前述實施例,本實施例無須加大第一邊緣圖案309的線寬,也無須加大第二邊緣圖案311的線寬,故可避免前述第一邊緣圖案309’與第二邊緣圖案311’在進行雙重曝光製程時,所產生黏合的問題。接著,將第3圖的第二圖案310輸出至一第二光罩中,將第4圖的第一修正圖案308’輸出至一第一光罩中,曝光機台即可以第一光罩和第二光罩來對光阻層進行雙重曝光製程,而得到完美的目標圖案302。於本發明較佳實施例中,補償圖案312的位置會和第二邊緣圖案311部份重疊(第4圖中以虛線表示第二邊緣圖案311的位置),較佳者,補償圖案312和第一邊緣圖案309大體上平行且於一第二方向316上之投影完全重疊,即補償圖案312和第一邊緣圖案309的長度L相同,其中第一方向314與第二方向316大體上垂直。However, in the foregoing embodiment, the widened first edge pattern 309' and the second edge pattern 311' are likely to have a bridge phenomenon after the exposed photoresist layer. In another embodiment of the present invention, the method further includes providing a compensation pattern in the first pattern 308 to become the first correction pattern 308'. Referring to FIG. 4, a schematic diagram of a first correction pattern of the present invention is illustrated. As shown in FIG. 4, in order to avoid the aforementioned influence of the optical proximity effect at the boundary between the dense region 304 and the isolated region 306, the present embodiment is additionally disposed on the side of the first edge pattern 309 of the first pattern 308 near the isolated region 306. There is a compensation pattern 312. As such, the first edge pattern 309' is thus unaffected by the optical proximity effect. Compared with the foregoing embodiment, the embodiment does not need to increase the line width of the first edge pattern 309, and does not need to increase the line width of the second edge pattern 311, so that the first edge pattern 309' and the second edge pattern can be avoided. 311' The problem of bonding that occurs during the double exposure process. Next, the second pattern 310 of FIG. 3 is outputted to a second mask, and the first correction pattern 308' of FIG. 4 is outputted to a first mask, and the exposure machine can be the first mask and The second mask performs a double exposure process on the photoresist layer to obtain a perfect target pattern 302. In the preferred embodiment of the present invention, the position of the compensation pattern 312 partially overlaps with the second edge pattern 311 (the position of the second edge pattern 311 is indicated by a broken line in FIG. 4), preferably, the compensation pattern 312 and the An edge pattern 309 is substantially parallel and the projections in a second direction 316 are completely overlapping, i.e., the compensation pattern 312 and the length L of the first edge pattern 309 are the same, wherein the first direction 314 is substantially perpendicular to the second direction 316.
請參考第5圖,所繪示為本發明光學接近修正方法應用於實際邏輯電路的示意圖。其中,目標圖案302以條狀圖形表示,第一圖案308以粗線表示,第二圖案310以細線表示,補償圖案312視加入在第一圖案308或第二圖案310而分別以破碎粗線或以破碎細線表示,可以理解的是,第一圖案308加上補償圖案312後即成為第一補償圖案308’,第二圖案310加上補償圖案312後即成為第二補償圖案312’。如第5圖例示的邏輯電路中,目標圖案302可以劃分多個緻密區304以及孤立區306,利用本發明所提供的方法,可以分別在這些緻密區304以及孤立區306交界處定義出第一邊緣圖案309或第二邊緣圖案311,繼而分別對應設置補償圖案312。例如在緻密區304a中,可在其右側與孤立區306之交界處尋找到第一邊緣圖案309a,故本發明即在第二圖案310中設置一補償圖案312a,其中第二圖案310之補償圖案312a與第一圖案308之第一邊緣圖案309a部份重疊。在緻密區304b中,可以在第二圖案310中找到一第二邊緣圖案311b,進而可在第一圖案308中設置一補償圖案312b。Please refer to FIG. 5, which is a schematic diagram of the optical proximity correction method applied to the actual logic circuit of the present invention. The target pattern 302 is represented by a bar graph, the first pattern 308 is represented by a thick line, the second pattern 310 is represented by a thin line, and the compensation pattern 312 is added to the first pattern 308 or the second pattern 310 to respectively break the thick line or It is understood that the first pattern 308 is added to the compensation pattern 312 to become the first compensation pattern 308 ′, and the second pattern 310 is added to the compensation pattern 312 to become the second compensation pattern 312 ′. In the logic circuit illustrated in FIG. 5, the target pattern 302 may divide the plurality of dense regions 304 and the isolated regions 306, and the first method may be used to define the first at the boundary between the dense regions 304 and the isolated regions 306 by using the method provided by the present invention. The edge pattern 309 or the second edge pattern 311, and then the compensation patterns 312 are respectively disposed correspondingly. For example, in the dense area 304a, the first edge pattern 309a can be found at the boundary between the right side and the isolated area 306. Therefore, the present invention provides a compensation pattern 312a in the second pattern 310, wherein the compensation pattern of the second pattern 310 is provided. 312a partially overlaps the first edge pattern 309a of the first pattern 308. In the dense region 304b, a second edge pattern 311b may be found in the second pattern 310, and a compensation pattern 312b may be disposed in the first pattern 308.
由以上描述可知,本發明補償圖案312之特徵在於:As can be seen from the above description, the compensation pattern 312 of the present invention is characterized by:
一、設置在緻密區304以及孤立區306之交界。所謂緻密區304與孤立區306係以圖案間距大小來區分。當目標圖案中的一圖案與相鄰圖案之間距大於兩倍的最小線寬P0時(如第5圖中的距離D),此圖案則被定義為毗鄰於緻密區304與孤立區306之交界。1. Set at the junction of the dense area 304 and the isolated area 306. The dense area 304 and the isolated area 306 are distinguished by the pattern pitch size. When a pattern in the target pattern is more than twice the minimum line width P0 from the adjacent pattern (as in the distance D in FIG. 5), the pattern is defined as being adjacent to the boundary between the dense area 304 and the isolated area 306. .
二、可設置於第一圖案308或第二圖案310中,視緻密區304與孤立區306之交界為第一邊緣圖案309或是第二邊緣圖案311而定。若為第一圖案308之第一邊緣圖案309,則補償圖案312係加入在第二圖案310中而成為第二補償圖案310’;若為第二圖案310之第二邊緣圖案311,則補償圖案312係加入在第一圖案308中使之成為第一補償圖案308’。Second, it can be disposed in the first pattern 308 or the second pattern 310, and the boundary between the dense region 304 and the isolated region 306 is determined by the first edge pattern 309 or the second edge pattern 311. If it is the first edge pattern 309 of the first pattern 308, the compensation pattern 312 is added to the second pattern 310 to become the second compensation pattern 310'; if it is the second edge pattern 311 of the second pattern 310, the compensation pattern The 312 series is added to the first pattern 308 to make it the first compensation pattern 308'.
三、本發明提供的補償圖案312在經過微影製程,由於其和第一邊緣圖案309或第二邊緣圖案311部份重疊,故經過微影暨蝕刻製程後,會一同形成在為電路佈局的一部份。3. The compensation pattern 312 provided by the present invention is partially immersed in the lithography process, and is partially overlapped with the first edge pattern 309 or the second edge pattern 311. Therefore, after the lithography and etching process, the compensation pattern 312 is formed together for the circuit layout. a part.
請參考第6圖,所繪示為本發明利用前述光學接近修正方法所形成之電路佈局。本發明之光學接近修正方法可應用於各種多重曝光技術,例如兩次微影一次蝕刻製程(2P1E)或是兩次微影兩次蝕刻製程(2P2E)。舉例來說,利用第5圖中具有第一修正圖案308’之第一光罩先對光阻層進行一微影暨蝕刻製程,再利用具有第二修正圖案310’之第二光罩對光阻層進行另一次的微影暨蝕刻製程,即可得到第6圖之電路佈局。如第6圖所示,本實施例的電路佈局上定義有一第一方向314以及一第二方向316彼此垂直。在緻密區304a中包含有複數個彼此平行於第一方向314之條狀圖案318。這些條狀圖案318包含一第一邊緣條狀圖案318a毗鄰於緻密區304a之邊緣,以及一第二邊緣條狀圖案318b毗鄰於第一邊緣條狀圖案318a,其中第一邊緣條狀圖案318a包含一補償區域320(即是由第二修正圖案上的補償圖案312形成),補償區域320突出於第一邊緣條狀圖案318a相較於第二邊緣條狀圖案318b之另一側,且第二邊緣條狀圖案318b於第二方向316上之投影完全重疊於補償區域320。Please refer to FIG. 6 , which illustrates the circuit layout formed by the optical proximity correction method of the present invention. The optical proximity correction method of the present invention can be applied to various multiple exposure techniques, such as two photolithography single etching processes (2P1E) or two photolithography two etching processes (2P2E). For example, the first photomask having the first correction pattern 308' in FIG. 5 is first subjected to a lithography and etching process, and the second photomask having the second correction pattern 310' is used to align the light. The circuit layer is subjected to another lithography and etching process to obtain the circuit layout of FIG. As shown in FIG. 6, the circuit layout of this embodiment defines a first direction 314 and a second direction 316 perpendicular to each other. A plurality of strip patterns 318 that are parallel to the first direction 314 are included in the dense region 304a. The strip patterns 318 include a first edge strip pattern 318a adjacent to the edge of the dense region 304a, and a second edge strip pattern 318b adjacent to the first edge strip pattern 318a, wherein the first edge strip pattern 318a includes a compensation region 320 (ie, formed by the compensation pattern 312 on the second correction pattern), the compensation region 320 protrudes from the other side of the first edge strip pattern 318a compared to the second edge strip pattern 318b, and the second The projection of the edge strip pattern 318b in the second direction 316 completely overlaps the compensation region 320.
請參考第7圖,所繪示為本發明光學接近修正方法之流程示意圖。如第7圖所示,首先,提供一目標圖案(步驟402),接著將目標圖案分解為一第一圖案以及一第二圖案(步驟404),其中第一圖案與第二圖案於一緻密區中交替排列。繼而,提供一補償圖案,並判斷補償圖案的位置(步驟406),若第一圖案包含一第一邊緣圖案毗鄰於緻密區之邊緣,則對應於該第一邊緣圖案之補償圖案會增加在該第二圖案,共構第二修正圖案(步驟408);若第二圖案包含一第二邊緣圖案毗鄰於緻密區之邊緣,則對應於第二邊緣圖案之補償圖案會增加在第一圖案,共構第一修正圖案(步驟410)。最後,將第二修正圖案輸出至一第二光罩(步驟412),並將第一修正圖案輸出至一第一光罩(步驟414)。Please refer to FIG. 7 , which is a schematic flow chart of the optical proximity correction method of the present invention. As shown in FIG. 7, first, a target pattern is provided (step 402), and then the target pattern is decomposed into a first pattern and a second pattern (step 404), wherein the first pattern and the second pattern are in a uniform area. Alternately arranged. Then, a compensation pattern is provided, and the position of the compensation pattern is determined (step 406). If the first pattern includes a first edge pattern adjacent to the edge of the dense region, the compensation pattern corresponding to the first edge pattern is increased. a second pattern, co-constructing the second correction pattern (step 408); if the second pattern includes a second edge pattern adjacent to the edge of the dense region, the compensation pattern corresponding to the second edge pattern is increased in the first pattern, A first correction pattern is constructed (step 410). Finally, the second correction pattern is output to a second mask (step 412), and the first correction pattern is output to a first mask (step 414).
綜上所述,本發明提供了一種光學接近修正方法以及利用此方法所形成的電路佈局,並利用補償圖案以避免緻密區中的圖案產生黏合的現象,可提高產品的品質。In summary, the present invention provides an optical proximity correction method and a circuit layout formed by the method, and utilizes a compensation pattern to avoid a phenomenon in which a pattern in a dense region is bonded, thereby improving the quality of the product.
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
302...目標圖案302. . . Target pattern
304,304a,304b...緻密區304, 304a, 304b. . . Dense area
306...孤立區306. . . Isolated area
308...第一圖案308. . . First pattern
308’...第一修正圖案308’. . . First correction pattern
309,309’...第一邊緣圖案309,309’. . . First edge pattern
310...第二圖案310. . . Second pattern
310’...第二修正圖案310’. . . Second correction pattern
311,311’...第二邊緣圖案311,311’. . . Second edge pattern
312,312a,312b...補償圖案312, 312a, 312b. . . Compensation pattern
318...條狀圖案318. . . Strip pattern
314...第一方向314. . . First direction
316...第二方向316. . . Second direction
318a...第一邊緣條狀圖案318a. . . First edge strip pattern
318b...第二邊緣條狀圖案318b. . . Second edge strip pattern
320...補償區域320. . . Compensation area
402...步驟402. . . step
404...步驟404. . . step
406...步驟406. . . step
408...步驟408. . . step
410...步驟410. . . step
412...步驟412. . . step
414...步驟414. . . step
第1圖至第4圖所繪示為本發明光學接近修正方法的示意圖。1 to 4 are schematic views showing the optical proximity correction method of the present invention.
第5圖與第6圖繪示為本發明光學接近修正方法應用於實際邏輯電路的示意圖。FIG. 5 and FIG. 6 are schematic diagrams showing the application of the optical proximity correction method of the present invention to an actual logic circuit.
第7圖所繪示為本發明光學接近修正方法之流程示意圖。FIG. 7 is a schematic flow chart of the optical proximity correction method of the present invention.
402...步驟402. . . step
404...步驟404. . . step
406...步驟406. . . step
408...步驟408. . . step
410...步驟410. . . step
412...步驟412. . . step
414...步驟414. . . step
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TWI575308B (en) * | 2013-05-03 | 2017-03-21 | 聯華電子股份有限公司 | Method of correcting assist features |
CN112951712A (en) * | 2021-01-29 | 2021-06-11 | 长鑫存储技术有限公司 | Method for forming integrated circuit structure |
CN114019767A (en) * | 2021-11-03 | 2022-02-08 | 福建省晋华集成电路有限公司 | Method for fabricating a semiconductor layout and method for fabricating a semiconductor structure |
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CN107065430B (en) * | 2017-03-10 | 2021-01-29 | 上海集成电路研发中心有限公司 | Rule-based sub-resolution auxiliary graph adding method |
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TWI575308B (en) * | 2013-05-03 | 2017-03-21 | 聯華電子股份有限公司 | Method of correcting assist features |
CN112951712A (en) * | 2021-01-29 | 2021-06-11 | 长鑫存储技术有限公司 | Method for forming integrated circuit structure |
CN114019767A (en) * | 2021-11-03 | 2022-02-08 | 福建省晋华集成电路有限公司 | Method for fabricating a semiconductor layout and method for fabricating a semiconductor structure |
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