TW201250477A - A device, a system and a method for detecting SGPIO and I2C - Google Patents

A device, a system and a method for detecting SGPIO and I2C Download PDF

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TW201250477A
TW201250477A TW100120905A TW100120905A TW201250477A TW 201250477 A TW201250477 A TW 201250477A TW 100120905 A TW100120905 A TW 100120905A TW 100120905 A TW100120905 A TW 100120905A TW 201250477 A TW201250477 A TW 201250477A
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Taiwan
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pin
input
interface
control unit
automatic
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TW100120905A
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Chinese (zh)
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TWI488045B (en
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Po-Chung Chang
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Inventec Corp
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Priority to US13/343,295 priority patent/US8832347B2/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • User Interface Of Digital Computer (AREA)
  • Communication Control (AREA)

Abstract

A device, a system and a method for detecting SGPIO and I2C. When the device connects the initiator device, the device switches the corresponded protocol of the target device. The detect device comprises of a input jack and a control unit. The initiator device connects to the input jack. The input jack includes a loading pin. The loading pin of the detect device couples to the loading ping or the reset pin of the initiator device. The control unit connects to the input jack. The control unit judges the protocol of the target device according to a trigger signal via loading pin of the detect device. The control accesses the data signal form the initiator device according to the protocol of the target device and the control unit drives the LED at the same time.

Description

201250477 六、發明說明： 【發明所屬之技術領域】 種偵測裝置、系統及其方法，特別有關於一種内部整合電 路與通用Μ輸人輸出的自動侧裝置、系統及其方法。 【先前技術】 隨著積體電路微小化與網際網路的興起，使得傳輸數據的速 度與儲存設備的容量也隨之成長。為能將大量㈣料快速的在儲 存。又備間傳輸’因此提出了新型態的序列技術將取代傳統的小型 電腦系統介面（Small (：卿咖Small Interface，SCSI)或高技術 配置（Advanced Technology Attachment，ΑΤΑ)硬碟的平行互連技 術而串列式 SCSI ( Serial Attached SCSI，SAS )與串歹ij 式 ΑΤΑ (Serial ΑΤΑ ’ SATA )正式將分別取代SCSI與ATA的新一代序列 連結技術。為能顯示SAS與SATA的操作祕，-般廠商多會採 用通用串行輸人輸出（Serial General purp〇se Inpu④吨说，簡稱 SGPIO)匯流排或内部整合電路（簡稱pc)在啟動設備ιΐ〇 (Initiator)與目標設備120 (Target)之間進行資料的傳輸控制。 i2c是使用兩條雙向開放集極（0penDrain)串列資料（SDA) 及串列時脈（SCL)作為傳送控制訊號，並利用電阻將電位上拉來 達到訊號的觸發。I2C允許相當大的工作電壓範圍，但典型的電壓 準位為+3.3V或+5V。I2C的參考設計使用一個7位元長度的位址 空間但保留了 16個位址’所以在一組匯流排最多可和ι12個節點 通訊。常見的PC匯流排依傳輸速率的不同而有不同的模式：標準 201250477 模式（100Kbit/s)、低速模式（1〇Kbit/s)。 ”月參考S 1圖」所示，其係為習知技術之sGpi〇腳位示意 圖！知技術的SGPIO具有scl〇ck、SL〇ad、犯血⑽、伽偷 四個仏雜。其巾刚二個是從啟動設備nG發送到目標設備12〇 的，而最後-個是從目標設備12〇發送到啟動設備HO。％· 係用以疋A SGIPO傳輸日恤。SLQad是同步到時鐘和使用表述欲 傳輸數據為-個新的框架的開始一個新的框紋SLGad在時脈 波形的上升邊緣細發為至少5個喃週期。SData〇ut是串行的 數據輸出位流，* SDataln是串行的數據輸人位流一般而言， SDataln不是所有的SGPI〇設備都支持的，因此伽―的賊線 是可選（optional)的。 如果獨立磁碟冗餘陣列（Redundant Array 〇f Independent Disks ’ RAID)卡支持SGPIO的話，這種接口協議正好包含了除 了傳輸資料之外的SGPIO信號接口，通過一個包含數據、SGpi〇 信號線就可以實現資料傳輸以及信號燈的控制。而SES Over PC 是通過RAID卡上面的PC接口採用特殊排線來管理，所以可以稱 作▼外管理（〇ut_of-band management);而對於 SGPIO 來說，可 以稱作帶内管理（in_band management)。除了 RAID卡支持SGPIO 外’磁盤背板（backplane)也需要支持SGPI0。 為能同時在同一硬體中偵測SGPIO與I2c的傳輪方式，習知 技術係提出以跳線（jumper)方式或以硬體偵測的方式來實現。習 知的跳線方式，是讓使用者將目標設備120連接至啟動設備11〇 201250477 前設定赠’肋切換不_傳輸方式。這樣的方式賴成本低 廉，但是每次更換硬體時均要進行一次切換。若使用者忘記切換， 則啟動設備110與目標設備120將無法正常使用。 而硬體制的作法是透過啟動設備11G所傳送賴號進行判201250477 VI. Description of the Invention: [Technical Field] The detection device, system and method thereof are particularly related to an automatic integrated device, system and method for internal integrated circuit and universal input. [Prior Art] With the miniaturization of integrated circuits and the rise of the Internet, the speed of data transmission and the capacity of storage devices have also grown. In order to be able to store a large amount of (four) materials quickly. It also proposes a new type of serial technology that will replace the traditional small computer system interface (Small (Small Interface, SCSI) or high-tech configuration (Advanced Technology Attachment, ΑΤΑ) hard disk parallel interconnection Technology and Serial Attached SCSI (SAS) and Serial 歹 SATA (Serial ΑΤΑ 'SATA) will officially replace SCSI and ATA's next-generation serial link technology. To show the operational secrets of SAS and SATA, Manufacturers will use the universal serial input output (Serial General Purp〇se Inpu4 ton, SGPIO for short) bus or internal integrated circuit (referred to as pc) in the startup device ΐ〇 (Initiator) and target device 120 (Target) Data transmission control. i2c uses two bidirectional open collector (0penDrain) serial data (SDA) and serial clock (SCL) as the transmission control signal, and uses the resistor to pull up the potential to trigger the signal. I2C allows a fairly large operating voltage range, but the typical voltage level is +3.3V or +5V. The I2C reference design uses a 7-bit length address space but guarantees 16 addresses 'so only one group of bus can communicate with ι12 nodes. Common PC buss have different modes depending on the transmission rate: standard 201250477 mode (100Kbit/s), low speed mode (1〇 Kbit/s). "Monthly reference S 1 figure" is a schematic diagram of the sGpi foot position of the prior art! The SGPIO of the known technology has scl〇ck, SL〇ad, guilty blood (10), and smuggling four 仏The second is sent from the boot device nG to the target device 12〇, and the last one is sent from the target device 12〇 to the boot device HO. %· is used to transmit A SGIPO shirts. SLQad is Synchronize to the clock and use the expression to transfer data to the beginning of a new frame. A new frame pattern SLGad is fined at least 5 cycles in the rising edge of the clock waveform. SData〇ut is the serial data output bit stream , * SDataln is a serial data input bit stream In general, SDataln is not supported by all SGPI devices, so the gambling thief line is optional. If the independent disk redundant array (Redundant Array 〇f Independent Disks 'RAID) card support For SGPIO, this interface protocol just includes the SGPIO signal interface in addition to the transmission data. Data transmission and signal control can be realized through a data line and SGpi〇 signal line. The SES Over PC is managed by a special cable on the PC interface on the RAID card, so it can be called 〇ut_of-band management. For SGPIO, it can be called in_band management. . In addition to the RAID card support SGPIO, the disk backplane also needs to support SGPI0. In order to detect the SGPIO and I2c transmission modes in the same hardware at the same time, the conventional technology is proposed to be implemented by a jumper or a hardware detection method. The conventional jumper mode is to allow the user to connect the target device 120 to the boot device 11 〇 201250477 before setting the gift rib switch not _ transfer mode. This approach relies on low cost, but a switch is required each time the hardware is replaced. If the user forgets to switch, the boot device 110 and the target device 120 will not function properly. The hard system is to judge by transmitting the device's 11G.

斷’並且在與目標設備120連接的接線需要分別拉出SGHO與PC 總和數量的信號線。請參考下表i所示，其係為習知技術之咖〇 與I2C之接腳對應表。 接腳順序 0 SGPI0之接腳功能 V pc之接腳功能 一 ------- ύν/L^iv 日f脈（2W_SCLK) ~ 1 SLoad 貢料輸出（2W_SDA)~ 2 3 — 4 一 5 ~ 接地 接地 接地 iSDataOut 董置（Reset) SDataln Μ. -- 表1.習知技術之SGPIO與I2C之接腳對應表 因此需要六根信號線方可驅動SGPI〇與pc。此一習知作法 雖然可以_快速的侧並切換。但是對於硬體*言，除了需要 設置額外的偵測晶片外，另外還需配合SGpK)與pc的信號線佈 局Oayout)。這樣的硬體成本將遠高於跳線的方式。 【發明内容】 鑒於以上的問題，本發明在於提供一種内部整合電路與通用 串行輸入輸出的自動彻彳裝置，應用在連接不同啟動設備時，可 201250477 自動切換啟動設備對目標設備120的接口協議。 本發明所揭露之内部整合電路與通用串行輸入輸出的自動偵 測裝置包括：輸人接π與控制料。輸人接口連接於啟動設備；、 輸入接Π更包括載人引腳’載人引腳電性連接於啟動設備的載入 接腳（SLoad)或重設接腳（Reset);控制單元連接於輸入接口， 控制單it根據載人引騎接收刺觸魏號（SLQad)，用以判斷 啟動設備的接π協議，控制單祕據相應的接口協議用以收發啟 動設備之資料訊號。 此外’輸入接口更包括時脈引腳（CLK )、資料輸出引腳 (DataOutput)與貧料輸入引腳（DataIn)、時脈引腳用以連接至 啟動設備的時脈接腳；f料輸出引腳用以連接啟動設備的資料輪 出接腳；資料輸人引腳用以連接啟動設備的#料輸入接腳。 树明另提出-種自動_内部整合電路與翻串行輸入輪 出的貝料傳輸方法，其係包括：將自動_裝置電性連接至 設備與目標設備之間_測裝置的載人引腳電性連接於啟 動稍的載人接腳（SLGad)或重設接腳（Id);自動偵測裝置 根據載入f丨腳所接收到的觸發訊號（―⑷判斷啟動設備的接口 協義自動動j裝置觸結果用以收發啟紐備之資料訊號。 除了上述實施態樣外，本發明更提出-種應用於内部整入· 路:_串行輸入輸出的自動偵測系統，其係包括:啟動設備-目Wf與自動勤m置。啟動設備發送具有接口協議之資料气 號。目標設備存取資料訊號。自動伽彳裝置電性連接於啟動設備 201250477 與目標設備之間。啟動設備更包括輸入接口、载入％腳與控制單 疋。輸入接π紐連接於雌設備。載人⑽紐連接於啟動設 躺載入接腳或重設接腳。控制單元電性連接於輸人接口。控: 單元根據載人⑽職㈣_發城（SLQad)㈣觸啟驗 備的接Π協議。控制單錄據相應的接口協議用以收發啟動設備 之資料訊號。 本發明提A -種可偵_部整合電路與通料行輸人輸出的 裝置，使得產線在測試不_主機板時可以自_切換為對應的 傳輸協議，藉以加快目標設備傳鮮料的相關測試。 有關本發與實作’舰合圖式作最㈣施例詳細說 明如下。 【實施方式】 明參考「第2圖」所示，其係為本發明之架構示意圖。本發 明的自動制裝置220電性連接於啟動設備21()(脑伽）與目 標設備23G (Target)之間，動設備係為計算機裝置之主機 板或HBA (host bus adapter，主機匯流排配接器），目標設備23〇 可以為但不蚊是背板（baek細e)，也可叹其他有支援接口協 議的周邊裝置，此外，自動偵測裝置22〇亦可整合於目標設備23〇 中。其中，接口協議包括SGPI0與pc之傳輸協議。 自動偵測裝置220包括輸入接口 22卜輪出接口 222、控制單 元223與發光二極體224。輸入接〇 221連接於啟動設備21〇，輸 入接口 221另包括載入引腳、時脈引腳、資料輸出引腳與資料輸 201250477 入引腳。時脈引腳用以連接至啟動設備21G的時脈接腳⑼lk)、 資料輸出引腳用以連接啟動設備21〇的資料輸出接腳 (SDataQut)、貝料輸入引腳用以連接啟動設備別的資料輸入接 腳（SDataln)且載入引聊電性連接於啟動設備別的載入接腳 (心⑷或重設接腳（Reset)。本發明係將輸入接口 22ι對咖〇 接腳/、I C之配置做了上述的調整，使得啟動設備训的載入接 腳（對應於咖0)或重設接腳（對應於pc)被連接於控制單元 223的载人⑽，參考表2所示，其係為本發明之咖〇 之接腳對應砉。 〃Breaking 'and wiring connected to the target device 120 requires pulling out the signal lines of the sum of the SGHO and the PC, respectively. Please refer to the following table i, which is a pin correspondence table of the conventional technology and the I2C pin. Pin sequence 0 SGPI0 pin function V pc pin function one ------- ύν/L^iv day f pulse (2W_SCLK) ~ 1 SLoad tribute output (2W_SDA)~ 2 3 — 4 a 5 ~ Grounding Grounding Grounding iSDataOut Reset SDataln Μ. -- Table 1. SGPIO and I2C pin correspondence table of the prior art. Therefore, six signal lines are required to drive SGPI〇 and pc. This customary practice can be _ fast side and switch. However, for hardware, in addition to the need to set up additional detection chips, it is also necessary to cooperate with SGpK) and PC signal line layout Oayout). Such hardware costs will be much higher than the way jumpers are. SUMMARY OF THE INVENTION In view of the above problems, the present invention provides an automatic integration device for internal integrated circuit and universal serial input and output, which can be used to automatically switch the interface protocol of the startup device to the target device 120 when connecting different startup devices. . The internal integrated circuit and the universal serial input and output automatic detecting device disclosed by the invention include: inputting π and controlling materials. The input interface is connected to the boot device; the input interface further includes a load pin 'the load pin is electrically connected to the load pin (SLoad) or the reset pin (Reset) of the boot device; the control unit is connected to The input interface, the control unit is based on the manned riding and receiving the thorny Wei (SLQad), is used to determine the π protocol of the starting device, and the control interface of the single secret is used to send and receive the data signal of the starting device. In addition, the input interface further includes a clock pin (CLK), a data output pin (DataOutput) and a lean input pin (DataIn), and a clock pin is connected to the clock pin of the boot device; The pin is used to connect the data wheel of the starting device; the data input pin is used to connect the # material input pin of the starting device. Shuming also proposes a kind of automatic_internal integrated circuit and a double-input input-round bead transfer method, which includes: electrically connecting an automatic device to a manned pin of the device and the target device Electrically connected to a slightly activated manned pin (SLGad) or reset pin (Id); the automatic detecting device receives the trigger signal received according to the load pin ("(4) determines the interface protocol of the boot device automatically In addition to the above embodiments, the present invention further proposes an automatic detection system for internal integration and path: _ serial input and output, which includes : Start device - Mf and automatic M. The startup device sends the data number with the interface protocol. The target device accesses the data signal. The automatic gamma device is electrically connected between the startup device 201250477 and the target device. Including input interface, loading % foot and control unit. Input π button is connected to female device. Manned (10) button is connected to start lie loading pin or reset pin. Control unit is electrically connected to input interface Control: unit root Manned (10) (4) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The output device with the input line allows the production line to switch from the _ motherboard to the corresponding transmission protocol, so as to speed up the relevant test of the target equipment. The embodiment is described in detail below. [Embodiment] Referring to the "Fig. 2", it is a schematic diagram of the architecture of the present invention. The automatic device 220 of the present invention is electrically connected to the starting device 21 () Between the brain and the target device 23G (Target), the mobile device is a motherboard of a computer device or an HBA (host bus adapter), and the target device 23 can be a but not a mosquito. (baek fine e), also sighs other peripheral devices that support the interface protocol, in addition, the automatic detection device 22 can also be integrated in the target device 23, wherein the interface protocol includes the transmission protocol of SGPI0 and pc. Measuring device 220 includes loss The input interface 22 includes a round-out interface 222, a control unit 223 and a light-emitting diode 224. The input interface 221 is connected to the boot device 21, and the input interface 221 further includes a load pin, a clock pin, and a data output pin. Data input 201250477 into the pin. The clock pin is used to connect to the clock pin (9) lk of the boot device 21G, and the data output pin is used to connect the data output pin (SDataQut) of the boot device 21〇, and the data input pin The foot is used to connect to another data input pin (SDataln) of the boot device and load the chat pin to be connected to another loading pin (heart (4) or reset pin (Reset) of the boot device. The present invention is an input interface 22ι made the above adjustment to the configuration of the curry pin/IC, so that the loading pin (corresponding to the coffee 0) or the reset pin (corresponding to pc) of the boot device training is connected to the control unit 223. Person (10), as shown in Table 2, is the pin corresponding to the curry of the present invention. 〃

201250477 入接腳與載人接腳（均以黑色實線表计且為區別SGpiO與％ 之區別’在載人接腳外如黑色虛線表示所連接的妓接腳。但 就實體而言’這兩支接腳係共關—支信號線。 控制單元223分別電性連接於發光二極體224、輸入接口 221 與輪出接口 222。控制單元功根據啟動設備2 ::判斷啟動設㈣所傳輸的接口“ ^ 又的接口協議並透過輸出接口 Μ2將啟動設備训所發出的資 =專社目標設備23G。控制單元223根據接σ協議與資料訊號控 制發光二極體224之發光頻率。 —在此更進-步㈣本發明之運作流程，並請參考「第4圖」 所不，其縣本發明之運作流辟意_，本發明之自_測方法 包括以下步驟： 步驟S41G .將控解元雜連接至啟動職與目標設備之 間’且控解元的載人⑽mit接於啟動設備 的載入接腳或重設接聊； 步驟S420 :控制單元根據載入引腳所接收到的觸發訊號判斷 啟動設備的接口協議； 步驟S430 :若接口協議係為SGpi〇，則控制單元以观1〇 的接口協議接收來自於啟動設備的資料訊號； 步驟S440 :若接口協議係為PC，則控制單元以pc的接口協 3義接收來自於啟動設備的資料訊號；以及 步驟S·:控鮮元根據接，議與㈣域控制發光二極 201250477 體之發光頻率。 首先’將控制單元223電性連接至啟動設備210與目標設備 230之間。控制單元223根據載入引腳所接收到的觸發訊號判斷啟 動設備210的接口協議。對於SGPIO而言，SGPIO的接口協議在 傳送資料框架前會發出SLoad的訊號，用以通知目標設備230準 備接收相關的資料訊號。而I2C所連接的是重設接腳，且pc並無 此一訊號，因此本發明係透過此一訊號的差異進行SGPI〇與pc 的差異判斷。 若接口協議係為SGPIO，則控制單元223以SGPIO的接口協 議接收來自於啟動設備210的資料訊號。若接口協議係為pc，則 控制單元223以PC的接口協議接收來自於啟動設備21〇的資料訊 遽。接下來’控制單元223會根據接口協議與資料訊號控制發光 二極體224之發光頻率。一般而言，目標設備23〇連接於啟動設 備210後，自動偵測裝置22〇的發光二極體224會先發出已連接 的燈號。當自動細裝置220進行資料的傳輸時，控制單元223 會控制發光二極體224進行相應的閃襟頻率。除了發光二極體似 外，本發明亦可將發光二極體224以七段顯示器或其他顯示裝置 取代。 i控制單S 223在完成通用串行輸人輸出的接口協議的 ^傳輸後，控制單元223維持該輸人接口 221所奴的接口協 礅。 本發明提出-種可偵咖轉合電路與通财行輸人輪出的 201250477 裝置’使得麵在靡^同社機㈣可以自 傳輸協議’藉以加快目標設備23〇傳輸資料的相_試、為對應的 =本發明以前述之較佳實施例揭露如上’然其:非用以限 疋:月，任何熟習相像技藝者，在不脫離本發明之精神和範圍 内’當可作些許之更動與麟’因此本發明之專梅護範圍須視 本說明書所附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1圖係為習知技術之SGPIO腳位示意圖。 第2圖係為本發明之架構示意圖。 第3圖係為本發明之輸入接口的信號線示意圖。 第4圖係為本發明之運作流程示意圖。 【主要元件符號說明】 啟動設備110 目標設備120 啟動設備210 自動偵測裝置220 輸入接口 221 輸出接口 222 控制單元223 發光二極體224 目標設備230201250477 Incoming pin and manned pin (both in black solid line and the difference between SGpiO and %). The black dotted line indicates the connected pin on the manned pin. But in terms of the entity, this is The two pins are connected to the signal line. The control unit 223 is electrically connected to the LED 224, the input interface 221 and the wheel-out interface 222. The control unit is transmitted according to the startup device 2: judgment start device (4). The interface "^ is the interface protocol and will send the device target device 23G issued by the device training device through the output interface Μ2. The control unit 223 controls the illuminating frequency of the illuminating diode 224 according to the sigma protocol and the data signal. The process of the present invention is further improved. The solution is connected to the starter and the target device and the bearer (10) mit of the control device is connected to the load pin of the boot device or resets the chat; step S420: the control unit receives the load according to the load pin Trigger signal judgment start device The interface protocol is as follows: Step S430: If the interface protocol is SGpi, the control unit receives the data signal from the boot device by using the interface protocol of FIG. 1; Step S440: If the interface protocol is a PC, the control unit uses the PC The interface protocol 3 receives the data signal from the boot device; and the step S·: the control unit and the (4) domain control the light-emitting frequency of the light-emitting diode 201250477. First, the control unit 223 is electrically connected to the boot device. 210 is between the target device 230. The control unit 223 determines the interface protocol of the boot device 210 according to the trigger signal received by the load pin. For SGPIO, the SGPIO interface protocol sends a SLoad signal before transmitting the data frame. It is used to notify the target device 230 that it is ready to receive the relevant data signal. The I2C is connected to the reset pin, and the pc does not have the signal. Therefore, the present invention performs the difference judgment between the SGPI and the PC through the difference of the signal. If the interface protocol is SGPIO, the control unit 223 receives the data signal from the boot device 210 by using the SGPIO interface protocol. If the interface protocol is pc Then, the control unit 223 receives the data message from the boot device 21〇 according to the interface protocol of the PC. Next, the control unit 223 controls the light-emitting frequency of the light-emitting diode 224 according to the interface protocol and the data signal. Generally, the target device After being connected to the activation device 210, the LEDs 224 of the automatic detection device 22 first emit the connected lights. When the automatic device 220 transmits the data, the control unit 223 controls the LEDs. The corresponding flashing frequency is performed by 224. In addition to the light emitting diode, the present invention can also replace the light emitting diode 224 with a seven-segment display or other display device. The i control unit S 223 maintains the interface protocol of the input interface 221 after the transmission of the interface protocol of the universal serial input output is completed. The invention proposes that the 201250477 device of the detectable coffee transfer circuit and the pass-through bank can make the face-to-face test of the target device 23 Correspondingly, the present invention is disclosed in the foregoing preferred embodiments as described above: it is not limited to the following: any skilled person skilled in the art can make a few changes without departing from the spirit and scope of the present invention. The scope of the invention is therefore defined by the scope of the patent application attached to this specification. [Simple description of the drawing] Fig. 1 is a schematic diagram of the SGPIO pin position of the prior art. Figure 2 is a schematic diagram of the architecture of the present invention. Figure 3 is a schematic diagram of signal lines of the input interface of the present invention. Figure 4 is a schematic diagram of the operational flow of the present invention. [Description of main component symbols] Starting device 110 Target device 120 Starting device 210 Automatic detecting device 220 Input interface 221 Output interface 222 Control unit 223 Light-emitting diode 224 Target device 230

Claims (1)

201250477 七 1. 、申請專利範圍： -種内部整合電路與通用串行輪人輪出的自動_裝置，該自 動偵測裝置包括： -輸入接口’用以·連接於—啟動設備，該輸入接口更 包括一載人引腳，該載人引腳電性連接於該啟動設備的一载入 接腳（SLoad)或一重設接腳（Reset);以及 控制早το ’其性連接於該輸人接口，該控制單元根 據該載入引腳所接收到的—觸發訊號（SL〇ad)，用以判斷該啟 動設備的-接口協議，該控制單元根據相應的該接口協議用以 收發該啟動設備之一資料訊號。 2. 如請求項1所述之⑽整合電路與通料行輸人輸 :裝=中該輸入接口更包括-時脈引腳、-資料輸出引腳 •引腳，該時脈引腳用以連接至該啟 叫該資料輸出_以連接該啟動設備的—資 :輸：一)’該資料輪入引腳用以連接該啟動設： 的一貧料輸入接腳（SDataln )。 胥 3. 2求項1所述之内部整合電路與通用串行輪入輪出的自動侦 以置’其中更包括—組發光二極體，該控制單 、 協議與該資料訊號控制該發光二極體之發光頻率。接口 《如請求項i 之内轉合電路與通料行輪 ^置’其中該控制單元在完成通用串行輪入輪二 ‘的貝科傳輸後，該控制單元重新_該輪人接口所接收的該 13 201250477 接口協議。 5· 路與通用串行輪續出的自動偵 口’該輸出細紐連接於該控 如凊求項1所述之内部整合電 測裝置，射更包括一輪出接 制單元與該目標設備。 串行輸入輸出的資料傳輸 6. —種自動偵測内部整合電路與通用 方法，其係包括以下步驟： 之門，且： 一啟動設傷與-_ 顧自動侧裝置的-载人引腳電性連接於該啟動劍 的一載入接腳(SL〇ad)或-重設接腳(Reset); 該自動偵測裝置根據該載人引腳所接收到的—觸_ (SL〇ad)判斷該啟動設備的該接口協議；以及 該自動制裝置判斷結果用以收發該啟動設備之 訊號。 1 7. 如請求項6所述之自動偵測内部整合電路與通用串行輸入輸出 的t料傳輸方法’該自動偵測裝置根據該接口協議與該資料訊 號控制一發光二極體之發光頻率。 8. 一種剌㈣部整合魏與通料行輸人輸出的自動傾測率 統，其係包括： 、 一啟動設備，用以發送具有—接口協議之-資料訊號； -目標设備’用以存取該資料訊號；以及 間 自動偵測裝置’電性連接於該啟動設備與該目標設備之 該啟動設備更包括-輸入接口、一載入引腳與—控制單 14 201250477 元，該輸人接σ電性連接於該啟動祕，該電性連接 於獻動叹備的—载入接腳（SL〇ad)或—重設接卿（以奶）， 性連接於該輸入接口，該控制單元根據該載入引 接口協Γ的—觸發訊號（SLQad)，用以判斷該啟動設備的該 ίο’/控制單錄據相應的該接口協翻以收發該啟動 5 又備之该資料訊號。 =;=8?述之應用於内部整合電路與通用串行輸入輸出的 w” =，其中該自動偵測裝置根據該接σ協議與該資料 訊虎控制一發光二極體之發光。201250477 VII 1. Patent application scope: - An automatic integration device and an automatic serial device for the universal serial wheel, the automatic detection device comprises: - an input interface for connecting to the startup device, the input interface The utility model further includes a loading pin electrically connected to a loading pin (SLoad) or a reset pin (Reset) of the starting device; and controlling the early connection to the input An interface, the control unit receives a trigger signal (SL〇ad) according to the load pin, and is used to determine an interface protocol of the boot device, and the control unit is configured to send and receive the boot device according to the corresponding interface protocol. One of the information signals. 2. The (10) integrated circuit and the input line input and output as described in claim 1: the input interface further includes a - clock pin, a data output pin, a pin, and the clock pin is used for Connected to the data source to be connected to the starter device to connect to the boot device: input: a) 'The data wheel pin is connected to a lean input pin (SDataln) of the start device:胥3.2. The internal integrated circuit described in Item 1 and the automatic detection of the universal serial wheel-in and turn-out include a group of light-emitting diodes, and the control unit, the protocol and the data signal control the light-emitting diode The luminous frequency of the polar body. The interface "If the transfer circuit and the feed line of the request item i are set", wherein the control unit completes the Beike transmission of the universal serial wheel 2, the control unit re-receives the wheel interface The 13 201250477 interface protocol. 5. The automatic detection of the continuous serial rotation of the road and the universal serial wheel is connected to the internal integrated electrical measuring device as described in claim 1, and the injection further comprises a round-off receiving unit and the target device. Serial input and output data transmission 6. - Automatic detection of internal integrated circuit and general method, which includes the following steps: The door, and: a start-up injury and -_ automatic side device - manned pin a load pin (SL〇ad) or a reset pin (Reset) connected to the starter sword; the auto-detection device receives the touch-talk (SL〇ad) according to the manned pin Determining the interface protocol of the boot device; and determining, by the automatic device, a signal for transmitting and receiving the boot device. 1 7. The automatic detection internal integration circuit and the universal serial input and output t-material transmission method as described in claim 6, the automatic detection device controls the illumination frequency of a light-emitting diode according to the interface protocol and the data signal. . 8. An automatic tilt rate system for integrating the output of Wei and the general output of the 剌 (4), comprising: a start device for transmitting a data signal having an interface protocol; - a target device for Accessing the data signal; and the automatic detecting device is electrically connected to the starting device and the starting device of the target device, further comprising: an input interface, a loading pin and a control unit 14 201250477 yuan, the input The connection σ is electrically connected to the startup secret, and the electrical connection is connected to the loading pin (SL〇ad) or the resetting device (by the milk), and is connected to the input interface, and the control is connected. The unit is configured to determine, according to the trigger signal (SLQad) of the load port interface, the interface corresponding to the ίο'/ control ticket of the boot device to send and receive the data signal of the boot 5. =;=8? is applied to the internal integrated circuit and the universal serial input and output w" =, wherein the automatic detecting device controls the illumination of a light-emitting diode according to the connection σ protocol and the data.
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