201250473 六、發明說明： 【發明所屬之技術領域】 本發明係關於-種執行電腦所作成的登錦 份的備份裝置及備份裝置之動作方法。 【先前技術】 以往，為了使電腦安全地動作，有在電腦 電電源裝置（UPS)之情形（日本特開2〇〇9_3789 第2圖（專利文獻1)}。電腦從商用電源接受電 UPS從商用電源接受充電用之電源供給。在商 生停電（以下稱為斷電）時，UPS内建的電池會 電腦等之電源的電Θ，藉此可安全且確實地保 成的登錄數據β 先前技術文獻 專利文獻 專利文獻1日本特開2(){)9_3789號公報 【發明内容】 發明欲解決之課題 但是，在設有上述UPS之情況，雖可安全 保存登錄數據，伯玄 琢但另一方面，UPS 一般均為大 因而有不易確保設置空間且UPS之成本高之問 在此，若電腦所作成需備份的登錄數據為 話（例如4MB以下），例如藉使用進行電池備份 取*以小型且低成本來保存登錄數據。 H ’母—個SRAM之記憶容量較小。因此 SRAM的方式的話，當需備份的登錄數據為大 數據之備 附設不斷 號公報’ 源供給’ 用電源產 供給作為 存電腦作 且確實地 型之故， 題。 小容量的 的 SRAM 然而，一 ，只使用 (量（數十 -4 - MB)時，SRAM之數目（零件數 、令什歎目）會增加而 成本會提高。 因而，本發明之課題在提供—種可安 存大容量之登錄數據’同時可實現小型且 裝置。 執行下列控制 201250473 解決課題之手段 為了解決上述課題，本發明之備份裳 列作為其特徵： 工作記憶體，自可藉由電池對已儲存 份的SRAM形成； 一保存用記憶體，φ記錄密度比上述工 尚的非揮發性記憶體形成； “介面部，介於主電腦及上述工作用記 °己隐體之間且准許利用主電腦對上述工作 存用記憶體之存取； 介面部轉送到上述工作用記憶體並儲毛 送到上述保存用記憶體並儲存。 本發明之備份裝置，係以下列方式 錄數據。上述主電腦經由上述介面部將大 據的#份轉送到上述工作用記憶體。上 制上述工作用記憶體，將登錄數據的上述 上述保存用記憶體並儲存。其次， =據的另外-料轉送到上述保存用; "方式，上述控制部將上述登錄數據的 變大型，而且 全且確實地保 低成本之備份 置係以具備下 的數據進行備 作用記憶體更 憶體及保存用 用記憶體及保 電腦經由上述 登錄數據，轉 存大容量之登 容量之登錄數 述控制部，控 一部份轉送於 制部將上述登 憶體並儲存。 一部份依序地 -5- 201250473 轉送到上述保存用記憶體並儲存。由於上述工作用記憶 體係由SRAM形成，故可將上述登錄數據以較高速度儲 存到上述工作用記憶體十方面，由於上述保存用記 憶體之記錄密度比上述工作用記憶體更高，因此可將更 大容量之登錄數據儲存到上述保存用記憶體。 又，上述工作用記憶體係由可進行電池備份的 SRAM形成，而且上述保存用記憶體係由非揮發性記憶 體形成。從而，即使發生電源斷路時，亦能將上述登錄 數據持續地保持在上述工作用記憶體或上述保存用記憔 體。因此，可安全且域實地保存大容量之上述登錄數據二 又，本發明之備份裝置，使用市售的零件時而能達 成比較小型且低成本，相較於設置ups之情況，可節省 空間及UPS的成本。 此外，當省略保存用記憶體而僅由SRAM形成的工 作用記憶體來對登錄數據進行備份時，會使SRam之數 目（零件數目）増加而變成大型及高成本。另一方面，當201250473 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a method of operating a backup device and a backup device for performing a computer. [Prior Art] In the past, in order to make the computer operate safely, there is a case of a computer power supply unit (UPS) (Japanese Patent Laid-Open No. 2〇〇9_3789, No. 2 (Patent Document 1)}. The computer receives an electric UPS from a commercial power source. The commercial power supply accepts the power supply for charging. When the commercial power is cut off (hereinafter referred to as power failure), the built-in battery of the UPS will be powered by the power of the computer, etc., thereby safely and surely ensuring the registration data β CITATION LIST PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT LIST OF THE INVENTION PROBLEM TO BE SOLVED BY THE INVENTION However, in the case where the above UPS is provided, although the registration data can be safely stored, Bo Xuanxuan but another On the other hand, the UPS is generally large, so it is difficult to ensure the installation space and the cost of the UPS is high. Here, if the computer needs to back up the login data (for example, 4MB or less), for example, use the battery backup to take a small size. And save the login data at low cost. H 'Mother-SRAM has a small memory capacity. Therefore, in the case of the SRAM, when the registration data to be backed up is a large data, the issue of the "supply" power supply is provided as a storage computer and is a reliable type. Small-capacity SRAM However, once (only tens of -4 - MB) is used, the number of SRAMs (number of parts, sighs) will increase and the cost will increase. Therefore, the subject of the present invention is provided. - A large-capacity login data can be stored at the same time. Small and devices can be realized at the same time. The following control is implemented 201250473 means to solve the problem In order to solve the above problems, the backup skirt of the present invention is characterized as: Working memory, self-use battery Forming a stored portion of SRAM; a memory for storage, φ recording density is formed than the non-volatile memory of the above-mentioned work; "the face is between the host computer and the above-mentioned work record and is allowed to be hidden The access to the working storage memory by the host computer is transferred to the working memory and stored in the storage memory and stored. The backup device of the present invention records data in the following manner. The main computer transfers the # copies of the large data to the working memory via the above-mentioned interface, and the above-mentioned working memory is created, and the above-mentioned storage data of the registered data is used. Recalling the body and storing it. Secondly, the data is transferred to the above-mentioned storage; "the above-mentioned control unit enlarges the above-mentioned login data, and fully and reliably keeps the low-cost backup to have the next The data is stored in the memory and the memory and the computer are saved via the registration data, and the registration unit of the large capacity is transferred to the control unit, and a part of the control is transferred to the system to transfer the above-mentioned memory. And storing a part of the above-mentioned storage memory in the order -5 - 201250473. Since the above-mentioned working memory system is formed by the SRAM, the above-mentioned login data can be stored at the higher speed to the working memory. In the tenth aspect, since the recording density of the storage memory is higher than that of the working memory, a larger capacity registration data can be stored in the storage memory. Further, the working memory system can be backed up by the battery. The SRAM is formed, and the above-mentioned storage memory system is formed of a non-volatile memory, thereby enabling the upper portion to be turned on even when a power interruption occurs. The registration data is continuously held in the working memory or the storage recording medium. Therefore, the large-capacity registration data can be stored safely and securely. The backup device of the present invention can be used when using commercially available components. It is relatively small and low-cost, and saves space and cost of UPS compared to the case of setting ups. In addition, when the storage memory formed by SRAM is omitted and the login data is backed up by omitting the memory for storage, Increase the number of SRams (number of parts) and become large and costly. On the other hand, when
省略工作用記憶體而僅由保存用記憶體來對登錄數據I 行備份時，因為由非揮發性記憶體形成的保存用記憶體 動作速度比較慢，故將登錄數據儲存在保存用記憶體的 速度會變慢。 ' 在一實施形態之備份裝置中，其特徵為具備： 電源斷路檢測部，用於檢測發生電源斷路之情形； 遮斷控制部，當上述電源斷路檢測部檢測到1述電 源斷路時，進行遮斷對上述工作用記憶體及上 記憶體之存取的控制； ' 201250473 轉送狀態檢測部，告p ^ 時，檢測是否為在上述電述電㈣路恢復原狀態 用目己憶體的上述登錄數據 卞 _ _ 之。卩份被轉送到上述保存用 δ己k體且上述登錄數據中 狀熊； τ之其他部份則殘留的轉送中之 在上述轉送狀態檢測部 日幸Β 檢測出在上述電源斷路發生 時疋上述轉送中狀態時， ^ #浩胁+ * 上述控制部進行將上述工作用 。己匕體中未轉送而殘留的 .V .. ζ| 上述登錄數據中之上述其他部 伤轉运到上述保存用記憶體並儲存的控制。 他4 依照本發明之備份裝置， 停電）時，上述電沔斷技& 發生電源斷路（商用電源 <電源斷路檢測部檢測到上述電 後，上迷遮斷控制部進行 之 的控制。在發生…〜斷上述保存用記憶體之存取 作用笵詩x述電源斷路時是處在將儲存於上述工 作用s己憶體之上述登錄數 ^ 過程中之情況，成為上述Λ”“ 述保存用記憶體之 上述保存用記憶體而上=且、、、據之上述一部份轉送到 殘留在上述工作：2恃體登錄數據之其他部份未轉送而 離、Α 隐體之狀態（將此稱為「轉送中之狀 〜、」）。S從上述電源斷路恢 檢測部檢測是否為轉送R狀能;Ί上述轉送狀態 部檢測係為在上述發“在上述:送狀態檢測 時，上述控制部進行將卜、十、/時上边之轉送中狀態 留的上述登錚數墟中 述工作用記憶體中未轉送而殘 記憶體並儲存的㈣二、他^轉运到上述保存用 于们夺工制。因此，即佶尤 上述轉送中之邾1 生電源斷路時是 •心 仍可在從上述電源i/f % μ· π 時，將上述工竹用〜 H原斷路恢復原狀態 己憶體中未轉送而殘留的上述登錄數 201250473 據中之上述其他部份予以安全且確實地轉送到上述保存 用§己憶體。從而，可安全且確實地保存大容量之登錄數 據。 在一實施形態之備份裝置中，其 特徵為具備：衝突 控制’用於調停對上述工作用記 U體之存取與對上述 保存用記憶體之存取的衝突。 依照本實施形態之備份裝置，由 利用上述主電腦 及上述控制部對上述工作用記憶 肢 < 存取與對上述保存 用記憶體之存取的衝突的調停， „^ v τ故上述主電腦及上述控 制部可分別順利地對上述工作用 用。己隐體、及對上述保存 用記憶體進行存取。 』 H中什 在一實施形態之備份裝置中， ..^ ^ 具特徵為上述介面部 3有區域橋接器，此區域橋接 有的數據匯流排、及設置於上接上4主電腦所具 又置於上迷控制部、上 憶體及上述保存用記憶體之間的數據匯流排。 ° 依照本實施形態之備份骏 據匯流排、及設置於上述控制部、主電腦的數 上述保存用記憶體之間是利用上、fr迷工作用記憶體及 上述主電腦可直接對上述工作接益連接故 憶體進行存取。 上述保存用記 在一實施形態之備份裝置 主電腦之主機板可裝卸之基板中上：特徵為具備對上述 述保存用記憶體、上述介面 a工作用c憶體、上 上述基板上。 卩係搭栽於 -8- 201250473 依 照 本 實 上 述 保 存 用 記 於 上 述 基板 上 備 份 裴 置 0 此 設 計 變 更 > 故 在 一 實 施 記 ni4k 體 、 上 述 部 係 搭 栽 於 上 依 照 本 實 體 、 上 述 保 存 搭 戟 於 上 述 主 作 為 整 體 而 小 在 實 施 用 記 憶 體 係 能 送 速 度 進行 寫 依 照 本 實 以 白 上 述 主 電 工 作 用 記 憶 體 體 川員 利 地轉 送 在 — 實 施 記 憶 ja^ 體 係 由 實 依 照 本 實 體 係 由 實 體 上 體 的 限 制 > 可 施形態之備份 憶體、上述介 。因而，主機 種單基板式之 可容易地裝設 形態之備份裝 保存用記憶體 述主電腦之主 施形態之備份 用記憶體、上 機板上，故可 型化。 形態之備份裝 以從上述主電 入0 施形態之備份 腦轉送的速度 ，故可將上述 到上述保存用 形態之備份裝 體上獨立的2 施形態之備份 獨立的2個上 提南設計之自 裝置，上述工 面部、及上述 板係構成另體 備份裝置，不 並適用於現有 置中，其特徵 、上述介面部 機板上。 裝置，由於上 述介面部、及 使主機板及備 置中，其特徵 腦轉送的上述 裝置’由於上 ’將上述登錄 登錄數據從上 記憶體並儲存 置中’其特徵 個上述 裝置，由於上 述SRAM形成 由度。 作用記憶體、 控制部係搭載 之單基板式之 需要主機板之 的主電腦。 為上述工作用 、及上述控制 述工作用記憶 上述控制部係 份裝置之構成 為：上述工作 登錄數據之轉 述登錄數據能 數據寫入JL $ 述工作用記憶 〇 為上述工作用 形成。 述工作用Μ ，故可減少硬 201250473 在一實施形態之備份裝置中，其特徵為：上述保存 用記憶體係NOR型快閃記憶體。 依照本實施形態之備份裝置’由於上述保存用記憶 體係由NOR型快閃記憶體形成，與NAND系相異，故在 斷電時沒有檔案管理區等之構成被破壞之情況：、因而， 可更安全且確實地保存大容量上述登錄數據。 在本發明之備份裝置的動作方法中，其特徵為：上 述控制部至少依序地執行：第丨處理，將儲存在上述工 作用記憶體的上述登錄數據之—部份，以上述工作用記 憶體之記憶容量之單位轉送到上述保存用記憶體並儲 存；及第2處理’將在上述工作用記憶體未轉送且殘留 之上述登錄數據之另外-部份，以上述工作用記憶體之 記憶容量之單位轉送到上述保存用記憶體並儲存。 依照本發日月之備份裝置的動作方法，由於能重複地 進行將儲存在上述王作用記憶體的上述登錄數據之一部 份，以上述工作用記憶體之記憶容量之單位轉送到上述 保存用記憶體並儲存之處③，故可將上述登錄數據從上 J工作用記憶體有效地轉送到上述保存用記憶體並儲 本發明之備份裝置 工作用記憶體，由 保存用記憶體，由 高的非揮發記憶體構成 ’其特徵為具備：When the working memory is omitted and only the storage memory I is backed up by the storage memory, since the storage memory formed by the non-volatile memory has a relatively slow operation speed, the registration data is stored in the storage memory. The speed will be slower. In the backup device of the embodiment, the power supply disconnection detecting unit is configured to detect that a power interruption occurs, and the interruption control unit performs the shielding when the power interruption detecting unit detects that the power supply is disconnected. The control for accessing the above-mentioned working memory and the upper memory is broken; '201250473 Transfer status detecting unit, when p ^ is detected, it is detected whether or not the above-mentioned login is restored in the original state (4) The data 卞_ _. The 卩 被 转 转 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存 保存When transferring the status, ^ #浩胁+ * The above control unit performs the above work. .V .. ζ that has not been transferred in the corpus callosum | The above-mentioned other data in the registration data is transferred to the storage memory and stored. When the backup device according to the present invention is powered off, the above-described power-off technology & power-off is generated (commercial power supply < power-supply disconnection detecting unit detects the electric power, and the control by the blocking control unit is performed. Occurs...~The access function of the above-mentioned storage memory is interrupted. When the power supply is disconnected, it is in the process of storing the number of registrations stored in the above-mentioned working memory, and the above-mentioned Λ"" Using the above-mentioned storage memory of the memory, the above part is transferred to the remaining work in the above work: 2, the other part of the body registration data is not transferred, and the state of the hidden body is This is referred to as "transfer in the case of the transfer". S is detected from the power-off-recovery detecting unit as a transfer R-type energy; and the transfer state portion is detected in the above-mentioned The control unit performs the storage of the memory in the above-mentioned working memory in the above-mentioned boarding state in the state of the transfer of the top, the tenth, the hour, and the time of the transfer. (4) They are working. Therefore, when the power supply is disconnected in the above-mentioned transfer, the heart can still recover from the above-mentioned power supply i/f % μ· π, and the above-mentioned work bamboo is restored to the original state by the ~H original circuit. The number of the above-mentioned registrations that have been transferred and transferred to 201250473 is safely and surely transferred to the above-mentioned storage suffix. Therefore, it is possible to safely and surely store the large-capacity registration data. In the device, the collision control is configured to mediate a collision between the access to the working memory U and the access to the storage memory. The backup device according to the embodiment uses the host computer. And the control unit can mediate the conflict between the working memory limb< access and the access to the storage memory, and the main computer and the control unit can smoothly perform the above-mentioned work. The hidden body and the memory for the storage are accessed. In the backup device of the embodiment, the .. ^ ^ has the feature that the interface 3 has an area bridge, and the area is The data busbar bridged in the domain and the data busbar disposed between the upper host computer and the upper memory unit and the storage memory are provided. The data storage bus and the storage memory provided in the control unit and the host computer are stored between the storage device and the host computer, and the work connection can be stored directly. The above-described storage is recorded on a substrate detachable from a motherboard of a backup device main computer of the embodiment: it is characterized in that the storage memory, the interface a working memory, and the upper substrate are provided.卩 搭 -8 -8 - 201250473 According to the above, the above-mentioned preservation is recorded on the above-mentioned substrate, and the design is changed as follows. Therefore, in one implementation, the ni4k body and the above-mentioned parts are planted on the basis of the present entity and the above-mentioned preservation. Between the above-mentioned main as a whole and small in the implementation of the memory system can send speed to write This solid to said main electrical work on white role memorized somatic River membered advantageously turn send the - implementation memorized ja ^ body system by a solid by as this entity system by the restriction on the entity body > backup, memory and can be applied to form of the dielectric. Therefore, the main unit type single-substrate type can be easily installed in the form of a backup device. The memory for the main computer is backed up by the memory and the upper board, so that it can be customized. The backup of the form is loaded with the speed of the backup brain from the above-mentioned main mode, so that the backup of the above-mentioned storage form can be independently set up in two separate forms. In the self-installation device, the above-mentioned working face and the above-mentioned plate system constitute a separate backup device, and are not suitable for use in a conventional home, and are characterized by the above-described facial panel. In the device, the device is configured to transfer the registered registration data from the upper memory by the above-mentioned device, and the above-mentioned SRAM is formed by the above-mentioned device. By degree. A single-board type main computer that requires a motherboard for the memory and control unit. For the above-mentioned work and the above-mentioned control, the operation memory unit is configured as follows: The above-mentioned operation registration data can be converted into the registration data. The data can be written in JL $. The work memory is used for the above work. In the backup device of one embodiment, the above-mentioned storage memory system NOR type flash memory is used. According to the backup device of the present embodiment, since the storage memory system is formed of a NOR-type flash memory and is different from the NAND system, there is no case where the configuration of the file management area or the like is broken at the time of power failure: It is safer and more secure to save the large amount of the above login data. In the method of operating the backup device of the present invention, the control unit is configured to execute at least a portion of the registration data stored in the working memory for the working memory. The unit of the memory capacity of the body is transferred to the storage memory and stored; and the second processing 'the other part of the registration data that is not transferred and remaining in the working memory is stored in the memory of the working memory The unit of capacity is transferred to the above-mentioned storage memory and stored. According to the operation method of the backup device of the present day and the month, a part of the registration data stored in the king memory can be repeatedly transferred to the storage unit in units of the memory capacity of the working memory. Since the memory is stored in the third place, the registration data can be efficiently transferred from the upper J working memory to the storage memory and stored in the backup device working memory of the present invention, and the storage memory is high. The non-volatile memory constitutes 'characterized by:
FeRAM構成； 記錄密度比上述工作用記憶體更 工作用記憶體及保存用 上述工作用記憶體及保 介面部，介於主電腦和上述 s己憶體之間且容許利用主電腦對 存用記憶體之存取； -10- 201250473 控制部，執行下列控制：將從上述主電腦經由 介面部轉送到上述工作用記憶體麵存的登錄數據，: 送到上述保存用記憶體並儲存。 轉 2發明之備份裝置中，大容量之登錄數據 „。上述主電腦係經由上述介面將 錄：據之-部份轉送到上述工作用記憶體。上述控：二 控制上述工作用記憶體’將上述登錄數據之上： ==保存用記憶體並儲存。其次，上述控制:: 上述且錄數據之另外-部份轉送到上述保存 儲存。依此方式’上述控制部將上述登錄數據之：並 依序地轉送到上述保存用記憶體 。份 用記憶體係由FeRAM(強介電隨機取^陰由於上述工作 上述控制部能以較高的速度將上機述體）構成，故 存到上述工作用記憶體。另一方面且=之-部份儲 憶體係記錄密度比上述工作用記 二34保存用記 制部可將更大容量的登錄數據儲存體;上二因此上述控 體。 过·保存用έ己憶 又，上述工作用記憶體係由屬非揮 構成’而且上述保存用記憶體係由u =的 體構成。0而’即使發生電源斷路 七性5己憶 數據持續地保持在上述卫作用⑽ 2將上述登錄 體。因此，可安全且確實地保存大容旦I述保存用記憶 又，本發明之備份裝置，使用市里隹之上述登錄數據。 比較小型且低成本，相較於設置UPS 2零件而能達成 間及UPS的成本。 之情況，可節省空 201250473 ilfc 外，d^· u 作用吃恃俨田文#存用記憶體而僅由FeRAM形成的工 乍用^㈣對登錄數據進行備份時，會使以則 m)増加而變成大型及高成本。另一方面，當 行備a# $ & %體而僅由保存用記憶體來對登錄數據進 動作速产比：：由非揮發性記憶體形成的保存用記憶體 故將登錄數據儲存在保存用記憶體的 發明之效果 依照本發明之傭伦_罢 θ 備伤裝置，可安全且確實地保存 ΐ之登錄數據，同時會 备 分Μ丄 守了實現小型且低成本之備份装置。 依照本發明之備份 進行·蔣針+菴裴置的動作方法，由於能重複地 進行.將储存在工作田4_ 作用5己憶體的登錄數據之一部份，以 工作用&己憶體之紀橋六旦 〇 用。隐谷I之单位轉送且儲存到上述保存 用σ己隱體之處理，姑可 .,.., 文了將登錄數據從工作用記憶體有效 地轉送且儲存到保存用記憶體。 有放 【實施方式】 以下’將藉圖示之麻 之κ施形態更詳細地說明本發明。 第1圖顯示本發明 — 51 ^ "月之—貫施形態的備份裝置1連接 到主電腦2之形態。 逆我· 上述備份裝置1呈備 y甘α "備一片基板1Α。在此基板1Α上 格載.工作用記憶體1〇〇 . &七 工 0 ’保存用記憶體110 ;作為介面 部之FPGA(現場可軺十„ Α ；, 167 式閘陣列）1 20 ;作為控制部之微電 腦（以下略稱為微電 % 电如）13〇 ;第1至第4緩衝器 141，142，143，144 ;電池 1ςΛ 友衡斋 5 0，用於對工作用記憶體1 〇 〇 進行電池備份；電源斷政 辦路檢測部1 90 ;指定位址之位址 201250473 匯流排1 6 1 ;轉送數據之數據匯流排1 6 2 ;及控制存取的 控制信號匯流排1 63。上述FPG A 1 2 0具有衝突控制部1 2 1 及本地橋接器1 2 2。又，上述備份裝置1連接到主電腦2。 具體而言’備份裝置1之基板1A係經由未圖示之pci(周 邊元件互連器）插槽而可裝卸地安裝於主電腦2的主機板 2A。因而，此種單基板式之備份裝置1不需要主電腦之 主機板的設計變更，而可容易地適用於現有的主電腦。 上述工作用記憶體1 〇〇 ’如第2圖中所示，係由具 有4MB記憶容量的1個SRAM所形成的第1工作用記憶 體101、及同樣具有4MB記憶容量的1個SRAM所形成 的第2工作用記憶體102共計2個零件所構成。由於工 作用§己憶體1 0 0係由S R A Μ形成，因此可將上述登錄數 據以較尚的速度儲存到工作用記憶體1 〇 〇。又，由於係 將工作用記憶體1 〇〇區分為2個SRAM來構成，故可降 低硬體的限制，提高設計之自由度。 上述第1工作用記憶體1 〇 1、第2工作用記憶體1 〇 2 之各記憶單元，係被指定位址而進行存取。在第2圖中， 權宜地將第1工作用記憶體101及第2工作用記憶體1〇2 之記憶區域區分別區分為1MB的4個記憶區域1〇1&〜 101d，102a~102d 作顯示。 此等第卜第2工作用記憶體i 〇丨，丨〇2係分別利用第 1圖中之電池150進行電池備份。如第i圖中所示，上 述工作用記憶體1〇〇經由位址匯流排161及第2緩衝器 142連接到FPGA 120之衝突控制部121，另一方面經 由區域位址匯流排162及第4緩衝器144而連接到衝突 -13- 201250473The FeRAM is configured to have a higher recording density than the working memory and the working memory and the mesuring surface for storage, and is interposed between the host computer and the s memory, and allows storage by the host computer. Access to the body; -10- 201250473 The control unit performs the following control: the registration data transferred from the host computer to the working memory via the interface is sent to the storage memory and stored. In the backup device of the second invention, the large-capacity login data „. The main computer is recorded via the interface: the part is transferred to the working memory. The control: the second control of the working memory is Above the above login data: == save memory and store. Secondly, the above control:: the other part of the recorded data is transferred to the above save and store. In this way, the control unit inputs the above login data: The memory for the storage is sequentially transferred to the memory for storage. The memory system is composed of FeRAM (the strong dielectric is randomly selected and the control unit can operate the upper body at a higher speed because of the above operation), and thus the above work is performed. The memory is used. On the other hand, the recording density of the partial memory system is larger than that of the above-mentioned work record. The storage unit can store a larger capacity of the registered data storage; The memory used in the above-mentioned work memory system is composed of non-swings and the above-mentioned memory system for preservation is composed of u = body. 0 and 'even if a power interruption occurs, the seven-seven data has been continuously The above-mentioned registration body is held by the above-mentioned security function (10). Therefore, it is possible to safely and surely store the memory for the storage of the large capacity. The backup device of the present invention uses the above-mentioned registration data of the city. Compared with the setting of UPS 2 parts, the cost of the UPS and the UPS can be achieved. In the case of saving 201250473 ilfc, d^· u acts to eat 恃俨田文# The memory is stored and only the FeRAM is formed. When you use ^(4) to back up the login data, it will become large and expensive with m). On the other hand, when you prepare a# $ & %, the storage data is only used by the storage memory. Fast-production ratio: the effect of the invention that stores the registration data in the storage memory by the storage memory formed of the non-volatile memory, and can be safely and surely saved according to the present invention.登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 登录 。 4_ Use one part of the registration data of the 5 memorandum to use the work and the memory of the bridge. The unit of Hidden Valley I is transferred and stored in the above-mentioned storage σ 隐 隐 隐。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Fig. 1 shows the form in which the backup device 1 of the present invention is connected to the host computer 2. The reverse backup device 1 is provided with a substrate 1 Α. The substrate 1 is on the top of the substrate. The working memory 1 &. & 七七 0's the storage memory 110; as the interface of the FPGA (the field can be „ „ ,;, 167 type gate array) 1 20; Microcomputer of the control unit (hereinafter abbreviated as micro electric power) 13〇; first to fourth buffers 141, 142, 143, 144; battery 1 友 友衡斋 5 0, for working memory 1 〇 〇 Carry out battery backup; power supply shutdown office detection unit 1 90; designated address address 201250473 bus 1 6 1 ; Data bus 1 6 2 for forwarding data; and control signal bus 1 63 for controlling access. The FPG A 1 2 0 has a collision control unit 1 2 1 and a local bridge 1 22. Further, the backup device 1 is connected to the host computer 2. Specifically, the substrate 1A of the backup device 1 is detachably attached to the main board 2A of the host computer 2 via a pci (circumferential element interconnector) slot (not shown). Therefore, the single-substrate type backup device 1 can be easily applied to an existing host computer without requiring a design change of the motherboard of the host computer. The above-mentioned working memory 1 〇〇' is formed by a first working memory 101 formed of one SRAM having a memory capacity of 4 MB and one SRAM having a memory capacity of 4 MB as shown in FIG. 2 . The second working memory 102 is composed of a total of two parts. Since the work function § 己 体 1 1 0 is formed by S R A ,, the above registered data can be stored at a higher speed to the working memory 1 〇 〇. Further, since the working memory 1 is divided into two SRAMs, the limitation of the hardware can be reduced, and the degree of freedom in design can be improved. Each of the first working memory 1 〇 1 and the second working memory 1 〇 2 is accessed by a designated address. In Fig. 2, the memory area of the first working memory 101 and the second working memory 1〇2 are expediently divided into four memory areas 1〇1&~101d, 102a~102d of 1 MB, respectively. display. The second working memory i 〇丨, 丨〇 2 is used to perform battery backup using the battery 150 in Fig. 1 . As shown in FIG. 1, the working memory 1 is connected to the collision control unit 121 of the FPGA 120 via the address bus 161 and the second buffer 142, and via the area address bus 162 and the 4 buffer 144 and connected to the conflict-13 - 201250473
控制部121及微電腦13〇。又，卜，十[丁从m A 人上述工作用記憶體100 經由數據匯流排163及第2鴒插f哭】工Α , 木ζ歧衡盗142而連接到橋接部 122,另一方面’，經由區域位址匯流排164及第*緩衝器 144而連接到微電腦13〇。再者，上述工作用記憶體1〇〇 係經由記憶體控制信號匯流排171連接到衝突控制部 121 〇 另一方面，上述保存用記憶體i丨〇係由記錄密度高 於工作用記憶體1 00之屬非揮發性記憶體的N〇R型快閃 記憶體構成。由於保存用記憶體110的記錄密度比工作 用記憶體100更高，故可將更大容量之登錄數據儲存在 保存用記憶體1 1 〇。又，保存用記憶體i丨〇與NAND型 快閃δ己憶體相異之處，係沒有在斷電時檔案管理區域等 之構成遭破壞的情形。因而，可更安全且確實地保存登 錄數據。又，工作用記憶體丨00係由可進行電池備份的 SRAM所構成，而且保存用記憶體丨丨〇是由非揮發性記 憶體所構成。因而，即使發生電源斷路，亦可將登錄數 據持續地保持在工作用記憶體丨〇〇或保存用記憶體 110。因此，可安全且確實地保存大容量之上述登錄數據。 上述保存用記憶體11 0之各記憶體單元係與第丨工 作用記憶體101及第2工作用記憶體i 〇2同樣地，被指 定位址而進行存取。在第2圖中，權宜地將上述保存用 記憶體110之記憶區域區分為1 MB的N個記憶區域 110a〜1 l〇n作顯示。在此例中’ N = 64，即保存用記憶體 110具有64MB的記憶容量。 201250473 ^如第1圖中所示，上述保存用記憶體110與工作用 記憶體100同樣地，經由位址匯流排161及第i緩衝器 1 一41連接到FPGA120之衝突控制部121及橋接部122, 一方面，經由區域位址匯流排162及第3緩衝器⑷而 連接到衝突控制部m及微電腦13G。又，上述保存用 記憶體no係經由數據匯流排163及第i緩衝器i4i而 連：到橋接部122,另一方面’經由區域位址匯流排164 及第3緩衝器143而連接到微電腦13〇。再者，上述保 存用記憶體U0係經由記憶體控制信號匯流排m 到衝突控制部i 2 1。 制=接部122經由位址匯流# 161及主記憶體控 制W匯流排172連接到衝突控” 121，另 =PG匯流排或PCIexpress(註冊商標，以下 =::21。連接到後述之主電腦2的晶片組205’、) Γ:二將來自於主電腦2的數據分別轉換為登錄數 存登錄數據之位址資訊、及對工作：數 將應儲存登錄數據之位址資=由，後，上述橋接部⑵ 到衝突控制部121，同時二 =位址匯流排…轉送 用記憶體m之存取需求經 用二憶冑10。或保存 π轉送到衝突控制部121。因：憶體控制信號匯流排 作用記憶體⑽或保存用’主電腦2可直接對工 上述衝突控制部進行存取。 收應儲存登錄數據之位址資訊、又，仗橋接部122接 或保存用記憶冑11 〇之存 及對工作用記憶體100 而求信號。又，上述衝突控 • 1 5 - 201250473 制部1 2 1經由區域位 严哚降士 μ μ 匯抓排162、及區域記憶體控制 匯“ "73而連接到微電· 13〇 控制部121從微電腦μλ 4立& 士 上I w大 收應儲存登錄數據之位址資 二及對工作用記憶體1〇。或保存用記憶體 ： 需求信號。 + # 1二Ϊ衝突控制'"2i經由主緩衝器控制信號匯 接到第I第2緩衝器⑷，142, _方面，瘦由 區域緩衝器控制信號匯流排175連接到第3,第4緩衝器 143,144。上述衝突控制部121根據從橋接部⑵及微電 腦130接收的數據（應儲存登錄數據之位址資訊、工 憶HHH)或保存用記憶體11〇之存取需求信號）來 控制第1至第4緩衝器141142，143，144。具體而言，上 述衝犬控制部12 1用來調停來自於主電腦2對工作用記 憶體100或保存用記憶體11〇之存取需求、及來自於微 電腦130對工作用記憶冑1〇〇或保存用記憶冑"〇之存 取需求之衝突。上述衝突控制部121僅准許來自於主電 腦2或微電腦13〇之任何一方對工作用記憶體⑽或保 存用記憶體110之存取需求，至於另一方則不准許存 取因而主电細2及微電腦1 3 〇分別可順利地對L作 用記憶體1 00及保存用記憶體丨丨〇進行存取。 上述微電腦130係控制工作用記憶體丨〇〇，將儲存 到工作用δ己憶體1 〇 〇之登錄數據的一部份轉送且儲存到 保存用記憶體1 1 〇。其次，上述微電腦丨3〇將儲存到工 作用S己憶體100之登錄數據的另外一部份轉送且儲存到 保存用記憶體11〇。另外，微電腦丨30係控制備份裝置i 全體之動作。 ~ -16- 201250473 電源斷路檢測部1 9 0係經由主電腦2連接到電源箱 3 ’另一方面’連接到FPGA 120及微電腦130。上述電 源斷路檢測部1 90藉電壓來檢測電源箱3發生電源斷路 的情形’以將電源斷路信號發送到主電腦2的C P U 2 0 1、 FPGA 120之衝突控制部121、微電腦1 3〇。 此外’電源斷路檢測部1 90可以不是在備份裝置1 之基板1A之上’而是搭載於主電腦2之主機板上。 上述主電腦2’如第1圖中所示，具有CPU201、主 記憶體202、未圖示之硬碟、作為可卸除磁碟之CF卡 203 ' BIOS(基本輸入/輸出系統）快閃R〇M2〇4、晶片組 205、及内部電源轉換部2〇6。 CPU20 1經由主機板2A上之匯流排連接到主記憶體 202及晶片組205。上述晶片組2〇5經由上述匯流排連接 到CF卡203、及BIOS快閃唯讀記憶體204 ,同時如上 述般，經由pci匯流排或PCIe匯流排21〇連接到備份裝 置1之本地橋接器122。 上述内部電源轉換部2〇6連接到電源箱3，一方面， 如第1圖中所示，連接到備份裝i 1之工作用記憶體 1〇〇、保存用記憶體110、FPGA 120、微電腦13〇、第i 至第4緩衝器141，142，143，144、主電腦2之咖2〇1、 主記憶體2G2、上述硬碟及CF卡2们、BIOS快閃唯讀記 fe體204、及晶片組205。上述内部雷、、语蚰4 十 上返門°丨冤源轉換部206將電 源箱3之交流電源轉換為直&電源而供給到帛 及主電腦2所連接的各元件。 、 -17- 201250473 上述備份裝置1會與主電腦2 一起概略進行以下動 作 藉由上述CPU201之控制’登錄數據係從cpU2〇1 經由晶片組205轉送到本地橋接器122。於是，登錄數 據利用本地橋接器122轉換，使應儲存登錄數據之位址 資訊及對工作用記憶體100之存取需求的信號被轉送到 衝突控制部121。當衝突控制部121接收到來自於 CPU201之應儲存登錄數據之位址資訊及對工作用記憶 體100之存取需求的信號時1定是否有來自於微電腦 130對工作用記憶體100或保存用記憶體110之存取需 求。當判斷並無來自於微電月每13〇對工作用記憶體ι〇〇 之存取需求時’衝突控制部121控制第2緩衝器M2， 以准§午由CPU201對工作用記憶體1〇〇存取。另一方面， 若亦有來自於微電腦130對工作用記憶體1〇〇之存取需 求時，衝突控制部121進行衝突控制，直接地或在經過 預定時間後控制第2緩衝器142，以准許由cpu2〇i對工 作用記憶ϋ刚存取。之後，從本地橋接器122將登錄 數據及應儲存登錄數據之位址資訊轉送到工作用記憶體 100,以將登錄數據儲存到工作用記憶體1〇〇内之預定的 位址此時’將登錄數據儲存到工作用記憶ft 1 00的速 度即寫入速度係比較高的速度，與登錄數據從工 對工作用記憶冑100之轉送速度大致相同。因而，可順 利地將登錄數據從工作用記憶冑100 #送且儲存到保存 用記憶體11 0。 -18- 201250473 其次’ A 了備份而將保存於工作用記憶體1〇〇的登 錄數據轉送到保存用記憶體110之時，利用上述微電腦 m之㈣，將m儲存登錄數據之位址資訊及對工作用 圯憶體100之存取需求的信號從微電腦13〇發送到衝突 控制部m。當衝突控制部121接受到來自於微電腦 =應儲存登錄數據之位址資訊及對卫㈣記憶冑iQk 存取需求的信號時，判定是否有來自於cpu2〇i對 用記憶體100或保存用記憶體11〇 a 並無來自於CPU201對工作用4己陪 而' 田、’丨J斷 耵工作用5己憶體1 00之存取需长 二=制二21控制第4緩衝器144,以准許由微 電細130對工作用記憶體1〇〇存 亦有來自…201對工作用二另二方 '當判斷 丨F用。己憶體1 〇 〇之存取需长 ! #衝突控制部121進行衝突控制，直接地或在經過預 -時間後控制帛4緩衝器144，以准許由微電腦 ::乍用記憶體㈣存取。之後，微電腦130將應儲存登 錄數據之位址資訊轉送到m憶體⑽，以從工作 用記憶體1 00讀取登錄數據。 關於上述預定之登錄數據，利用上述微電腦130之 控制，將應儲存登錄數據之位址資訊及對保存用記情體 "〇之存取需求的信號從微電腦13〇發送到衝突控制部 2 1田衝大控制部1 2 1接受到來自於微電腦} 3 G之應儲 存上述預定登錄數據之位址資訊及對保存用記憶體咖 之存取需求的信號時，判定是否有來自於cp删對工 作用記憶冑100或保存用記憶冑11〇之存取需求。當判 斷並無來自於CPU201對保存用記憶體110之存取需求 201250473 時，衝突控制部121控制第3緩衝器i 43，以准許由微 電腦1 3 0對保存用記憶體i丨〇保存用記憶體i〖〇存取。 另一方面，當判斷亦有來自於cpu2〇 i對工作用記憶體 100之存取需求時’’衝突控制部i2丨進行衝突控制，直 接地或在經過預定時間後控制第3緩衝器143，以准許 由微電腦130對工作用記憶體1〇〇存取。之後，微電腦 1 3 0將上述預定之登錄數據、及應儲存登錄數據之位址 資訊轉送到保存用記憶體110,以將上述預定之登錄數 據儲存到保存用記憶體丨丨〇内之預定位址。 備份裝置1在檢測到電源斷路的發生時，以下列方 式動作。 上述電源斷路檢測部1 9 〇 ,當利用電壓檢測到電源 箱3之電源斷路時’將電源異常信號發送到FpQA 及微電腦130。當上述FPGA120接收到上述電源異常信 號時，衝突控制部121作為遮斷控制部而動作，經由記 憶體控制信號匯流排171將記憶體存取中止信號發送到 工作用記憶體100及保存用記憶體110。當工作用記憶 體100及保存用記憶體110接收到記憶體存取中止信號 時，無法對工作用記憶體丨00及保存用記憶體丨丨〇存取。 又，上述FPGA 120向CPU201發出電源異常岔斷。 虽上述c P u 2 0 1接收此電源異常岔斷時，中止對工作用 記憶體100及保存用記憶體丨1〇之存取，等待電源降低。 其次’使用第2圖至第8圖之記憶體配置圖，詳_細 地說明在登錄數據例如為64MB之大小的情況時對保= 用記憶體1 1 0之儲存，即針對登錄數據之保存處理。 -20- 201250473 在此例中，應儲存之登錄數據（64MB)作成由 「000 1」、「0002」、「N」所形成者。 如第2圖所示，在儲存登錄數據前之起始狀態中， 第1工作用記憶體1 〇丨、第2工作用記憶體J 02、及保存 用記憶體110處於尚未儲存有登錄數據的狀態。又，在 第1工作用記憶體1 〇 1之前頭的記憶區域丨〇丨a的前頭位 址及第2工作用記憶體1 〇2之前頭的記憶區域丨〇2a的前 頭位址分別寫入通知開放的開放旗標（F 〇 〇)。此外，第1、 第2工作用記憶體1〇1，丨〇2的前頭位址（數位元組）被確保 為作旗標用，而不寫入登錄數據。 首先’將從主電腦2之CPU201轉送來的登錄數據 「0001」、「0002」、「〇〇〇3」、「〇〇〇4」從前頭之記憶區域 I 0 1 a依照位址順序逐步地儲存於第1工作用記憶體i 〇 i 的4個記憶區域101a〜10 Id。 如第3圖所示’當第1工作用記憶體1 〇丨的4個記 憶區域101a〜101d被登錄數據「〇〇〇i」、r 〇〇〇2」、「〇〇〇3」、 「0004」所彳占滿時，接著將登錄數據「〇〇〇5」、「〇〇〇6」、 「0007」、「0008」從前頭之記憶區域102a依照位址順序 逐步地儲存在第2工作用記憶體1 〇 2之4個記憶區域 102a〜102d。另一方面’微電腦130係將儲存於第1工作 用記憶體101之登錄數據「0001」、「0002」、「〇〇〇3」、 「0004」轉送到保存用記憶體11 0，從前頭之記憶區域 II 0 a依照位址順序逐步地儲存在保存用記憶體11 〇之記 憶區域110a〜110d 。 201250473 其次’如第4圖所示’微電腦13〇係在完成 據從第1 X作用記憶體1G1對保存用記憶體11()之 及儲存時’在正儲存著由第i工作用記憶冑101所儲存 的存入數據之中最舊的登錄數據「000 1」之記憶區= 10U’寫入完成旗標FF00e另一方面，將登錄數據「〇〇〇8 儲存到第2工作用記憶體1〇2之最末尾的記憶區域 其次，如第5圖所示，當第2工作用記憶體1〇2之 4個記憶區域i02a〜102d被登錄數據「〇〇〇5」、「〇〇〇6」、 「0007」、「〇〇〇8」佔滿時，微電腦13〇會確認是否完成 旗標FF00被寫入於第i工作用記憶體1〇1之前頭的記憶 區域l〇la。若判斷完成旗標fF00已寫入於第1工作用 己隐體1 0 1之刖頭的§己憶區域1 〇 1 a時，將登錄數據 0009」覆寫於此記憶區域1〇la並儲存。另一方面，微 電腦130將儲存在第2工作用記憶體1〇2之登錄數據 0005」、「0006」、「0007」'「〇〇〇8」轉送到保存用記憶 體110 ’從前頭之記憶區域11 〇e依照位址順序逐步地儲 存在保存用記憶體11 〇之記憶區域11 〇e〜11 Oh。 之後，同樣地，將從主電腦2轉送來的登錄數據， 利用環狀緩衝方式，從已經儲存在第1工作用記憶體 1 0 1、& 〇 乐2工作用記憶體1 02的登錄數據之中最舊者依序 地覆寫而逐步地儲存。 另—方面，上述微電腦130為（i)當第1工作用記憶 a 之記憶區域1 ο 1 a〜1 0 1 d全部被覆寫時，如上述般， 將儲存在第1工作用記憶體1 〇丨的登錄數據全部轉送到 保存用記憶體110而依位址之順序逐步儲存。其次，微 -22- 201250473 電腦130為⑼第2工作用記憶“2之記憶區域 102a〜102d全部被覆寫時，如上述般將儲存在第2工^ 用記憶體1〇2的登錄數據全部轉送到保存用記憶體 而依位址之順序逐步儲存。之後’上述微電腦厂30將上 + 行Q因此’可將上述登錄 效地從工作用記憶體1〇〇轉送且、 有 i i 〇。 褅仔到保存用記憶體 如第6圖所示，當保存用記憶ϋ 110《 11〇a〜"〇n被登錄數據「〇〇〇1」、「_2」、·.··..「nY」'「N」 圖所示’上述微電腦13〇將儲存在保 存用δ己隐η 110之登錄數據之中最舊 : =」η:_2」、「咖」、「_… 汜隐體110之記憶區域11〇a〜u〇d清空。 如第8圖所示，當將登錄數據r N+1」、「 :N + 3」、「N + 4」覆寫於第i工作用記㈣⑻之記憶區 二la〜l()ld並儲存時’接著將登錄數 ” ^ :2::記憶"1〇2之前頭的記憶區域心 101之第微電細130將儲存於第1工作用記憶體 「N+3 乍用5己憶體1〇1之登錄數據「n+i」、「n+2」、 _」域Γ:」轉送到保存用記憶體110，而從前頭的 憶體u心空序逐步地储存到保存用記 13〇將儲存於保存用〜體Z〇a〜U〇d。之後，微電腦 之中隱 之記憶區域的登錄數據 刪 ^ ω 且、數據「0005 J、「0006」、「0007」、「0008」 空:、而將保存用記憶體110之記憶區域"0e〜"汕放 -23- 201250473 依此方式，利用環狀緩衝方式，從已經儲存在保存 用記憶體110的登錄數據之中最舊者依序地進行刪除及 改寫，而逐步地將登錄數據儲存。 其次’將針對電源斷路時之登錄數據的保障進行說 明。 ° 你玍上通龟 _ ，—·〜州π π lyu檢测 到電源斷路，將電源斷路信號發送到主電腦2之 CPU201、FPGA 120之衝突控制部121、及微電腦。 之後，當上述CPU201及微電们3〇接收到電源斷路之 發生信號時，在發生上述電源斷路前，中止對1作用記 憶體⑽或保存用記憶體11〇之存取。另一方面，當;乍 為遮斷控制部之衝突控制部121從電源斷路檢測部"Ο 接收上述f源斷路之發生信料，㈣第 器141，142，143，144’以進行遮 弟4緩衝 ^ r m ^ ^ 斷對工作用記憶體1 00或 保存用§己憶體110之存取的控制。 又’在上述電源斷路發生 在八锊勃姥「 霄玍之時，例如第3圖所示， 在釭錄數據「0001」、「〇〇()2 1工作用々00〇3」、「0004」是從第 1工作用圮憶體1 〇 i往保在 之情況，上述微電腦130、將用轉送中之狀態 轉送中旗標，寫入工作用記知屬轉送中之狀態的 例如，將轉送途中旗標 101 ^ 丨弟1工作用記憶體 月的圮憶區域1 〇 1 a之箭 復原狀態後，μ .+、μ + 1頁位址。從電源斷路恢 欠 上述微電腦13〇竹 作，當檢測到食λ & 卜為轉送狀態檢測部而動 標FFF0時，蔣 μ體1 〇〇之上述轉送中旗 才將儲存於保存用記悴 u體11 0的轉送中之登錄 -24- 201250473 數據「ΟΟΟΙγΓΟΟί^γΓοοΜ」、^^ 上述微電腦130再次將第！工 04」刪除。之後， 1 用記怕· , λ , 據「0001」、「0002」、「0003」、「〇〇〇4 Μ 01 之登錄數 此，即使在電源斷路時處於轉送中之」、轉送且儲存。因 源斷路恢復原狀態時，亦可將去#、狀態，在從上述電 了力」將未轉送而殘留於丁 & m 憶體100的上述登錄數據之上述另 、作用圮 保存用記憶體110 ^因而，可安八份確實地轉送到 之登錄數據。 王且確實地保存大容量 又，在上述電源斷路發生時，例如 上述微電腦130是正在刪除保存用 圖斤示在 . Γ 。己憶體11 0中之吞絲· 數據「0001」、「0002」、「0003 且錄 J U U 〇 4 | 中 66 g、，ff u 述微電腦I 3 0將用以通知正刪除登 ^ φ ^ ,a电 u 』陈且錄數據中的情形之刪 除中旗払，寫入工作用記憶體1〇〇 Τ的規疋場所，例如， 將正刪除中的旗標FFFF寫 ss ^ ^ 罘1工作用記憶體101之前 頭的C憶區域l〇la之前頭位址 u关在疋*成旗標之後的位 址）。從電源斷路恢復原狀態之後 5)Ι ^ λ ^ <便’虽上述微電腦130檢 刺到寫入工作用記憶體丨〇〇的 工逐刪除中旗標FFFF時， 再度刪除保存用記憶體丨丨〇中 甲之正刪除中的登錄數據The control unit 121 and the microcomputer 13A. Further, Bu, ten [Ding from the m A person, the above-mentioned working memory 100 is crying via the data bus 163 and the second plug-in f], the raft is connected to the bridge 122, and on the other hand' It is connected to the microcomputer 13 via the area address bus 164 and the * buffer 144. Further, the working memory 1 is connected to the collision control unit 121 via the memory control signal bus 171. On the other hand, the storage memory is higher in recording density than the working memory 1 00 is a non-volatile memory N〇R type flash memory. Since the storage density of the storage memory 110 is higher than that of the working memory 100, the larger-capacity registration data can be stored in the storage memory 1 1 . Further, in the case where the storage memory i is different from the NAND type flash δ memory, the configuration of the file management area or the like is not broken when the power is turned off. Thus, the login data can be saved more securely and surely. Further, the working memory 丨00 is composed of an SRAM capable of battery backup, and the storage memory 丨丨〇 is composed of a non-volatile memory. Therefore, even if the power supply is disconnected, the registration data can be continuously held in the working memory or the storage memory 110. Therefore, it is possible to safely and surely save the above-mentioned login data of a large capacity. Similarly to the first working memory 101 and the second working memory i 〇2, each of the memory units of the storage memory 110 is referred to as an address and accessed. In Fig. 2, the memory areas of the storage memory 110 are expediently divided into N memory areas 110a to 1 l〇n of 1 MB for display. In this example, 'N = 64, that is, the storage memory 110 has a memory capacity of 64 MB. 201250473 ^ As shown in FIG. 1, the storage memory 110 is connected to the collision control unit 121 and the bridge portion of the FPGA 120 via the address bus 161 and the i-th buffer 1 - 41 in the same manner as the working memory 100. 122. On the other hand, it is connected to the collision control unit m and the microcomputer 13G via the area address bus 162 and the third buffer (4). Further, the storage memory no is connected to the bridge unit 122 via the data bus 163 and the i-th buffer i4i, and is connected to the microcomputer 13 via the area address bus 164 and the third buffer 143. Hey. Further, the storage memory U0 is connected to the collision control unit i 2 1 via the memory control signal bus m. The system=connecting unit 122 is connected to the conflict control unit 121 via the address address #161 and the main memory control W bus 172, and the other = PG bus or PCIexpress (registered trademark, the following =:: 21. connected to the host computer described later) 2 chipset 205',) Γ: 2 converts the data from the host computer 2 into the address information of the login data and the registration data, and the work: the number of the login data should be stored. The bridge portion (2) is connected to the conflict control unit 121, and at the same time, the address of the transfer memory m is transferred to the conflict control unit 121 by the second memory. The signal bus operation memory (10) or the storage main computer 2 can directly access the conflict control unit. The address information of the login data is stored and the memory bridge 11 is connected or saved. The signal is saved for the working memory 100. In addition, the above conflict control • 1 5 - 201250473 Department 1 2 1 via the regional level 哚 哚 μ μ 162 162 162 及 、 、 、 、 、 、 、 、 、 、 、 ; 73 and connected to the micro power · 13 〇 control unit 121 Microcomputer μλ 4 Li & Shi I w on adductor owned address registration data should be stored and bis 1〇 the work with memory. Or save memory: demand signal. + # 1 二Ϊ conflict control '"2i is connected to the first second buffer (4) via the main buffer control signal, 142, _, thin by the area buffer control signal bus 175 is connected to the third, fourth Buffers 143, 144. The conflict control unit 121 controls the first to fourth based on the data received from the bridge unit (2) and the microcomputer 130 (the address information of the registration data should be stored, the work memory HHH) or the access request signal of the storage memory 11). Buffers 141142, 143, 144. Specifically, the above-described dog control unit 12 1 is used to mediate the access request from the host computer 2 to the working memory 100 or the storage memory 11 and to the working memory from the microcomputer 130. Or save the conflict with access memory requirements. The conflict control unit 121 permits only the access request from the host computer 2 or the microcomputer 13 to the working memory (10) or the storage memory 110, and the other party does not permit access, and thus the main power is 2 and The microcomputer 1 3 〇 can smoothly access the L-acting memory 100 and the storage memory 〇, respectively. The microcomputer 130 controls the working memory 丨〇〇, and transfers a part of the registration data stored in the working δ memory 1 且 且 to the storage memory 1 1 〇. Next, the microcomputer 转3〇 transfers and stores the other part of the registration data stored in the work memory S to the storage memory 11〇. In addition, the microcomputer 30 controls the operation of the entire backup device i. ~ -16- 201250473 The power disconnection detecting unit 190 is connected to the power supply box 3 ’ via the host computer 2 and is connected to the FPGA 120 and the microcomputer 130. The power supply disconnection detecting unit 1 90 detects a situation in which the power supply box 3 is disconnected by a voltage ‘ to transmit a power-off signal to the CPU P0 0 0 1 of the host computer 2, the collision control unit 121 of the FPGA 120, and the microcomputer 1 3〇. Further, the "power disconnection detecting unit 1 90" may be mounted on the main board of the host computer 2 instead of the substrate 1A of the backup device 1. As shown in FIG. 1, the main computer 2' has a CPU 201, a main memory 202, a hard disk (not shown), and a CF card 203 as a removable disk (BIOS (Basic Input/Output System) flash R) 〇M2〇4, the chip set 205, and the internal power conversion unit 2〇6. The CPU 20 1 is connected to the main memory 202 and the chip set 205 via bus bars on the motherboard 2A. The above-mentioned chip set 2〇5 is connected to the CF card 203 and the BIOS flash read-only memory 204 via the bus bar, and is connected to the local bridge of the backup device 1 via the pci bus bar or the PCIe bus bar 21〇 as described above. 122. The internal power conversion unit 2〇6 is connected to the power supply box 3, and is connected to the working memory 1〇〇 of the backup device i, the storage memory 110, the FPGA 120, and the microcomputer as shown in FIG. 1 . 13〇, the i-th to fourth buffers 141, 142, 143, 144, the main computer 2's coffee 2, the main memory 2G2, the above-mentioned hard disk and CF card 2, the BIOS flash only read the body 204 And chipset 205. The internal lightning source and the switching unit 206 convert the AC power of the power supply box 3 into a direct & power supply to the respective components connected to the host computer 2. -17-201250473 The backup device 1 performs the following operations together with the host computer 2. The registration data is transferred from the cpU2〇1 to the local bridge 122 via the chipset 205 by the control of the CPU 201. Then, the registration data is converted by the local bridge 122, and the address information for storing the registration data and the signal for accessing the working memory 100 are transferred to the conflict control unit 121. When the conflict control unit 121 receives the address information from the CPU 201 in which the registration data should be stored and the access request to the working memory 100, it is determined whether or not the microcomputer 130 is used for the working memory 100 or the storage. The access requirements of the memory 110. When it is judged that there is no access request for the working memory ι〇〇 every 13 微 of the micro-power month, the 'conflict control unit 121 controls the second buffer M2, and the CPU 201 aligns the working memory with the CPU 201. 〇 access. On the other hand, if there is also an access request from the microcomputer 130 for the working memory 1, the conflict control unit 121 performs collision control, and controls the second buffer 142 directly or after a predetermined time elapses to permit. It is just accessed by cpu2〇i for working memory. Thereafter, the login data and the address information of the login data to be stored are transferred from the local bridge 122 to the working memory 100 to store the login data in a predetermined address in the working memory 1 此时The speed at which the registration data is stored in the working memory ft 1 00, that is, the writing speed is relatively high, is substantially the same as the transfer speed of the registration data from the working memory 胄100. Therefore, the registration data can be smoothly sent from the work memory 100# to the storage memory 110. -18- 201250473 Next, when A is backed up and the registration data stored in the working memory 1 is transferred to the storage memory 110, the address information of the login data is stored by using the above-mentioned microcomputer m (4). A signal for the access request of the working memory 100 is transmitted from the microcomputer 13 to the collision control unit m. When the conflict control unit 121 receives a signal from the microcomputer=address information for storing the registered data and the access request for the memory (4) memory 胄iQk, it is determined whether there is a memory from the memory 100 or the memory for the cpu2〇i. The body 11〇a does not come from the CPU 201 to work with the 4 owns. 'Field, '丨J breaks the work, the 5 accesses 1 00 access needs to be long 2 = 2 2 control 4th buffer 144, It is permitted that the memory of the working memory 1 by the micro-electricity 130 is also from ... 201 for the work and the other two are used for judging 丨F. The access control unit 121 needs to be long! # Conflict control unit 121 performs collision control, and controls the 帛4 buffer 144 directly or after a pre-time to permit access by the microcomputer:: memory (4) . Thereafter, the microcomputer 130 transfers the address information to be stored in the registration data to the m memory (10) to read the login data from the working memory 100. With respect to the predetermined registration data, the address information of the registration data and the signal for the access request of the storage grammar are transmitted from the microcomputer 13 to the conflict control unit 2 by the control of the microcomputer 130. The field control unit 1 2 1 receives the address information from the microcomputer} 3 G which should store the above-mentioned predetermined registration data and the signal for the storage memory storage request, and determines whether there is a cp deletion pair. The working memory 胄100 or the storage memory 胄11〇 access requirement. When it is determined that there is no access request 201250473 from the CPU 201 for the storage memory 110, the conflict control unit 121 controls the third buffer i43 to permit the storage memory for the storage memory to be stored by the microcomputer 130. Body i 〇 access. On the other hand, when it is judged that there is also a request for access to the working memory 100 from cpu2〇i, the conflict control unit i2 performs collision control, and controls the third buffer 143 directly or after a predetermined time elapses. In order to permit access to the working memory by the microcomputer 130. Thereafter, the microcomputer 130 transfers the predetermined registration data and the address information to be stored in the registration data to the storage memory 110 to store the predetermined registration data in a predetermined position in the storage memory unit. site. When the backup device 1 detects the occurrence of a power interruption, it operates in the following manner. The power interruption detecting unit 1 9 〇 transmits a power abnormality signal to the FpQA and the microcomputer 130 when the power supply of the power supply box 3 is detected to be disconnected by the voltage. When the FPGA 120 receives the power supply abnormality signal, the collision control unit 121 operates as an interruption control unit, and transmits a memory access suspension signal to the working memory 100 and the storage memory via the memory control signal bus 171. 110. When the working memory 100 and the storage memory 110 receive the memory access suspension signal, the working memory 丨00 and the storage memory 无法 cannot be accessed. Further, the FPGA 120 issues a power supply abnormality to the CPU 201. When the above-mentioned c P u 2 0 1 receives the power supply abnormality, the access to the working memory 100 and the storage memory 中1〇 is suspended, and the power supply is lowered. Next, 'the memory configuration maps of Figs. 2 to 8 are used to explain in detail how to store the memory 1 1 0 when the login data is, for example, 64 MB in size, that is, to save the login data. deal with. -20- 201250473 In this example, the login data (64MB) to be stored is created by "000 1", "0002", and "N". As shown in FIG. 2, in the initial state before the registration data is stored, the first working memory 1A, the second working memory J02, and the storage memory 110 are not yet stored with the registered data. status. Further, the leading address of the memory area 丨〇丨a before the first working memory 1 〇1 and the leading address of the memory area 丨〇2a before the second working memory 1 〇2 are respectively written. Notify the open open flag (F 〇〇). Further, the first address and the first address (numeric group) of the first and second working memories 1〇1 and 丨〇2 are secured as flags, and the login data is not written. First, 'the registration data "0001", "0002", "〇〇〇3", and "〇〇〇4" transferred from the CPU 201 of the host computer 2 are sequentially stepped from the memory area I 0 1 a in the address order. The four memory areas 101a to 10d are stored in the first working memory i 〇i. As shown in Fig. 3, the data "〇〇〇i", r 〇〇〇2", "〇〇〇3", and "" are registered in the four memory areas 101a to 101d of the first working memory 1". When the 0004" is full, the registration data "〇〇〇5", "〇〇〇6", "0007", and "0008" are sequentially stored in the second job from the previous memory area 102a in accordance with the address order. The memory areas 102a to 102d of the memory 1 〇 2 are used. On the other hand, the microcomputer 130 transfers the registration data "0001", "0002", "〇〇〇3", and "0004" stored in the first working memory 101 to the storage memory 110, from the front. The memory area II 0 a is gradually stored in the memory areas 110a to 110d of the storage memory 11 in accordance with the address order. 201250473 Next, as shown in Fig. 4, the 'microcomputer 13' is stored in the first working memory 1G1 and the storage memory 11 () and is stored in the first working memory 101. The memory area of the oldest registration data "000 1" stored in the stored data = 10U' write completion flag FF00e, on the other hand, the registration data "〇〇〇8 is stored in the second working memory 1 In the memory area at the end of 〇2, as shown in Fig. 5, the data "〇〇〇5" and "〇〇〇6" are registered in the four memory areas i02a to 102d of the second working memory 1〇2. When "0007" and "〇〇〇8" are full, the microcomputer 13 checks whether or not the flag FF00 is written in the memory area l〇1a before the first working memory 1〇1. If it is judged that the completion flag fF00 has been written in the first working area of the hidden object 1 0 1 of the first working area, the registration data 0009" is overwritten in the memory area 1〇la and stored. . On the other hand, the microcomputer 130 transfers the registration data 0005", "0006", "0007", and "〇〇〇8" stored in the second working memory 1 to 2 to the storage memory 110' from the front memory. The area 11 〇e is gradually stored in the memory area 11 〇e 11 11 Oh of the storage memory 11 in accordance with the address order. Then, in the same manner, the registration data transferred from the host computer 2 is stored in the registration data of the first working memory 1 0 1 and the & 〇 2 working memory 102 by the ring buffer method. The oldest ones are sequentially written and stored step by step. On the other hand, when the memory area 1 ο 1 a to 1 0 1 d of the first working memory a is overwritten, the microcomputer 130 is stored in the first working memory 1 as described above. All of the 登录's login data are transferred to the storage memory 110 and stored in the order of the address. Next, when the computer 130 is (9) the second working memory "2" memory areas 102a to 102d are all overwritten, the registration data stored in the second working memory 1 〇 2 is all transferred as described above. The memory is stored in the order of the address and stored in the order of the address. After that, the above-mentioned microcomputer factory 30 will upload + line Q so that the above-mentioned login effect can be transferred from the working memory 1 and there is ii 〇. As shown in Fig. 6, when the memory for saving is used, the memory ϋ 110 "11〇a~"〇n is registered data "〇〇〇1", "_2", ····.."nY" ''N'' shows that the above-mentioned microcomputer 13〇 will be stored in the storage data of the saved δ 隐 η 110. The oldest: ="η:_2", "Caf", "_... 汜 汜 110 110 memory The area 11〇a~u〇d is cleared. As shown in Fig. 8, when the login data r N+1", ":N + 3", and "N + 4" are overwritten in the memory of the i-th work note (4) (8) When the area two la~l()ld is stored and 'the number of logins will be followed> ^ :2::memory"1〇2 the memory area of the first 101 of the memory area will be stored in the first work record The memory "N+3" uses the registration data "n+i", "n+2", _" field:" to be transferred to the storage memory 110, and the memory from the front u heart empty order is gradually stored to the storage record 13 and will be stored in the storage body ~Z〇a~U〇d. After that, the registration data of the hidden memory area in the microcomputer is deleted, and the data "0005 J, "0006", "0007", and "0008" are empty: and the memory area of the memory 110 is stored "0e~ "汕放-23- 201250473 In this way, by using the ring buffer method, the oldest one of the login data already stored in the storage memory 110 is sequentially deleted and rewritten, and the login data is stored step by step. . Secondly, the protection of the login data when the power is disconnected will be explained. ° You are on the turtle _ , —· ~ State π π lyu detects the power disconnection, sends the power disconnection signal to the CPU 201 of the host computer 2, the conflict control unit 121 of the FPGA 120, and the microcomputer. Thereafter, when the CPU 201 and the micro-power 3 〇 receive a signal indicating that the power is off, the access to the active memory (10) or the storage memory 11 is stopped before the power supply is disconnected. On the other hand, the collision control unit 121 that is the interruption control unit receives the information of the occurrence of the f-source disconnection from the power-off detection unit "Ο, and (4) the first unit 141, 142, 143, 144' 4 Buffer ^ rm ^ ^ Break control of the working memory 1 00 or save access with § replied body 110. In addition, when the power supply disconnection occurs in the 锊 锊 姥 , , , , , , , , , 「 「 「 「 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 0004 In the case where the first work is in the state of being transferred, the microcomputer 130 will transfer the flag in the transfer state to the state in which the work is known to be transferred, for example, and will be transferred. On the way flag 101 ^ 丨弟1 working memory memory month memory area 1 〇 1 a arrow recovery state, μ.+, μ + 1 page address. When the power supply is disconnected from the above-mentioned microcomputer, the above-mentioned transfer flag is stored in the storage record when the detection of the food λ & The login of the u body 11 0 is registered -24 - 201250473 The data "ΟΟΟΙγΓΟΟί^γΓοοΜ", ^^ The above microcomputer 130 will be the first! Worker 04" is deleted. After that, 1 is used to remember, λ, according to "0001", "0002", "0003", "〇〇〇4 Μ 01, the number of registrations, even if the power is off when the power is turned off", transferred and stored. When the source disconnection is restored to the original state, the above-mentioned registration data that has not been transferred and remains in the D& m memory 100 may be removed from the above-mentioned storage data. 110 ^ Thus, it is possible to transfer the registration data to the eight copies. The king does save the large capacity, and when the above-mentioned power supply disconnection occurs, for example, the above-mentioned microcomputer 130 is deleting the save figure shown in Fig. Γ. Swollen in the memory of the 11th, the data "0001", "0002", "0003 and recorded in the JUU 〇4 | 66 g, ff u said the microcomputer I 3 0 will be used to notify the deletion of ^ φ ^, In the case of the deletion of the situation in the data of the data, the flag is written in the memory of the working memory, for example, the flag FFFF in the deletion is written to ss ^ ^ 罘1 Before the memory 101, the head address of the C memory area l〇la is closed to the address after the flag is 疋*. After the power supply is disconnected, the original state is restored. 5) Ι ^ λ ^ < 130 When the snippet is written to the memory of the work memory, the flag FFFF is deleted, and the login data in the memory is deleted.
00〇lj、「0002」、「0003」、「0004 m lL U04」。因此，即使發生電 =路時有正刪除中的登錄數據時，從電源斷路恢復原 ::之後，亦能確實地將保存用記憶豸11〇中未刪除而 戔留的登錄數據刪除。 此備份裝置i使用市售的零件而能達成比較小型且 j本，相較於設S刪之情況，可節省空間及u 或本。 •25- 201250473 在上 電池150 明中亦可 又， 基板1A . 之主機板 板2A上_ 介面部、 置之構成 又， 完成旗標 入工作用 此等旗標 SRAM。 述實施形態中，雖然工作用記憶冑1〇〇 可進行電池備份之SRAM所形成，但是在本ς 由FeRAM形成。 在上述實施形態中’上述備份裝置i係搭載於 上’雖然此基板U係可裝卸地安裝在主電腦2 2A ’但在本發明中亦可搭載於主電腦2之主機 ，在此情況，由於X作用記憶體、保存用記憶體、 及控制部係搭載於主機板上，因此能使備份裝 與主機板作成整體而小型化。 在上述實施形態令，雖然係將開放旗標F00、 FF〇〇、轉送中旗標fffo、刪除中旗標FFFF寫 記憶體100 ’但並不限制於此。例 >，亦可將 寫入於與工作用記憶體100不同的另設置的 =在上述實施形態中，雖然上述保存用 係由NOR型快閃記恃 心體形成，但是在本發明中，亦可使 用NAND型快閃記怜俨二 1定 J 6隐體、或SD卡記憶體。 又’在上述實施开;ί能 介而如 、 / 4中，雖然係使用FPGA120作為 "面部’但是在本發明φ 士 體電路）。 千，亦可使用ASIC(特定功能積 又’在上述實施形能 為控制却v a '怨中，雖然係使用微電腦130作 J邛，但疋在本 【圖彳冰时 対明中，亦可使用FPGA。 L _式間單說明】 第1圖係顯示本發 到主蛩货明之一貫施形態的備份裝置連接 J 土電腦之形態的圖。 -26-00〇lj, "0002", "0003", "0004 m lL U04". Therefore, even if the registration data being deleted is generated when the electric_road is generated, the registration data that has not been deleted and deleted in the storage memory can be surely deleted after the original power is turned off from the power-off. This backup device i can use a commercially available part to achieve a relatively small size, and saves space and space compared to the case of setting S. • 25- 201250473 In the upper battery 150, the base plate 1A of the base plate 1A can be configured as a face and a frame, and the flag SRAM is completed for flagging. In the embodiment, the working memory is formed by an SRAM capable of battery backup, but it is formed of FeRAM. In the above embodiment, the above-mentioned backup device i is mounted on the upper side. Although the substrate U is detachably attached to the host computer 2 2A ', it may be mounted on the host computer 2 in the present invention. In this case, Since the X-acting memory, the storage memory, and the control unit are mounted on the motherboard, the backup package and the motherboard can be made compact and compact. In the above embodiment, the open flag F00, FF, the transfer flag fffo, and the deletion flag FFFF are written to the memory 100', but the present invention is not limited thereto. In the above embodiment, the storage system may be formed by a NOR-type flash memory, but in the present invention, You can use the NAND flash to remember the J 6 hidden body, or the SD card memory. Further, in the above implementation, ί can be used as the "4", although the FPGA 120 is used as the "face" but in the present invention. Thousands, you can also use ASIC (specific function product and 'in the above implementation can be controlled but va' resentment, although the use of microcomputer 130 for J 邛, but in this [Figure 彳 対 対 , , , , , , , FPGA 。 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─ ─
1 A 2 2A 201250473 第2圖係針對上 <侑份裝置之工作月 用記憶體，顯示儲存登 錄數據之前的起始 第3圖係用於說 . 飞月登錄數據對上述jr 儲存' 及登錄數據從 β @ 伙作用記憶體朝保存 及儲存的圖。 第4圖係用於說明 兄月2錄數據對上述工 儲存、及依據微處理機 辦I π成旗標的寫入 第5圖係用於說明 兄明登錄數據對上述工 儲存、及登錄數據從工作 作用圮憶體朝保存 及儲存的圖。 第6圖係用於說明μ 月上述保存用記憶體 滿的狀態之圖。 第7圖係用於說明在上述保存用記憶 佔滿時’刪除被儲存於上述保存用記憶體 一部份的方法之圖。 第8圖係用於說明在上述保存用記憶 佔滿後，登錄數據從上述工作用記憶體朝 憶體轉送及儲存、及從上述保存用記憶體 一部份刪除的方法之圖。 【主要元件符號說明】 備份裝置 基板 主電腦 主機板 工作用記憶體 丨記憶體及保存 狀癌之圖。 .作用記憶體之 用記憶體轉送 作用記憶體之 之圖。 作用記憶體之 用記憶體轉送 被登錄數據佔 體被登錄數據 之登錄數據之 體被登錄數據 上述保存用記 將登錄數據之 -27- 100 201250473 101 第 1 工 作 用 記 憶 體 102 第 2 工 作 用 記 憶 體 110 保 存 用 記 憶 體 120 FPGA 12 1 衝 突 控 制 部 122 橋 接 部 130 微 電 腦 150 電 池 16 1 位 址 匯 流 排 162 區 域 位 址 匯 流 排 163 控 制 信 號 匯 流 排 164 區 域 位 址 匯 流 排 171 記 憶 體 控 制 信 號 172 主 記 憶 體 控 制 信 號匯流排 173 1¾ 域 記 憶 體 控 制 信號匯流排 190 電 源 斷 路 檢 測 部 2 10 PCI 匯 流 排 或 PCIe匯流排 -28-1 A 2 2A 201250473 Figure 2 is for the working memory of the upper < backup device, showing the start of the storage of the login data. Figure 3 is used to say. The monthly login data is stored in the above jr' and login The data is stored and stored from the β @ 记忆 memory. Figure 4 is used to illustrate the data recorded by the brothers and the moons for the above-mentioned work storage, and the writing of the flag according to the microprocessor. Figure 5 is used to illustrate the data of the brothers and the log-in data and the log-in data. The role of the work is to save and store the map. Fig. 6 is a view for explaining a state in which the storage memory for the above-mentioned storage is full. Fig. 7 is a view for explaining a method of deleting a part stored in the storage memory when the storage memory is full. Fig. 8 is a view for explaining a method of transferring and storing registration data from the working memory to the memory and erasing a part of the storage memory after the storage memory is full. [Description of main component symbols] Backup device Substrate Main computer Main board Working memory 丨 Memory and storage of cancer. The memory used to transfer memory to the memory of the memory. In the memory of the memory, the registration data of the registration data is registered. The data is registered. The storage data is used to register the data. -27- 100 201250473 101 The first working memory 102 The second working memory Body 110 Storage Memory 120 FPGA 12 1 Conflict Control Unit 122 Bridge Unit 130 Microcomputer 150 Battery 16 1 Address Bus 162 Area Address Bus 163 Control Signal Bus 164 Area Address Bus 171 Memory Control Signal 172 Main Memory Control Signal Bus 173 13⁄4 Domain Memory Control Signal Bus 190 Power Break Detection Unit 2 10 PCI Bus or PCIe Bus -28-