TW201248291A - Pixel via and methods of forming the same - Google Patents

Abstract

This disclosure provides systems, methods and apparatuses for pixel vias. In one aspect, a method of forming an electromechanical device having a plurality of pixels includes depositing an electrically conductive black mask (23) on a substrate (20) at each of four comers and along at least one edge region of each pixel, depositing a dielectric layer (35) over the black mask, depositing an optical stack (16) including a stationary electrode over the dielectric layer, and depositing a mechanical layer (14) over the optical stack. The method further includes providing a conductive via (138) in a first pixel of the plurality of pixels, the via disposed in the dielectric layer and electrically connecting the stationary electrode to the black mask, the via disposed in a position along an edge of the first pixel, spaced offset from the edge of the first pixel in a direction towards the center of the first pixel.

Description

201248291 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to an electromechanical system. [Prior Art] An electromechanical system includes an electrical component and a mechanical component, an actuator, a sensor, and a sensor 'optical component (for example, a mirror) ) and devices for electronic devices. Electromechanical systems can be manufactured at a variety of scales including, but not limited to, microscale and nanoscale. For example, a microelectromechanical system (MEMS) device can comprise a structure having a size ranging from about 1 micrometer to hundreds of micrometers or more. A nanoelectromechanical system (NEMS) device can comprise a structure having a size of less than one micron (including, for example, less than a few hundred nanometers). Electromechanical components can be fabricated using deposition, etching, lithography, and/or other micromachining methods that etch the substrate and/or portions of the deposited material layer or add layers to form electrical and electromechanical devices. One type of electromechanical system device is called an Interference Measurement Transducer (IMOD). As used herein, the term interferometric modulator or interferometric modulator refers to a device that selectively absorbs and/or reflects light using the principles of optical interference. In some embodiments, an interference measurement modulator can include three pairs of conductive plates, one or both of which can be wholly or partially transparent and/or reflective and capable of applying an appropriate electrical signal. After the relative movement. In one embodiment, one plate may comprise a fixed layer deposited on a substrate, and the other plate may comprise a separate layer from the fixed layer by an air gap - the position of the reflective film relative to the other plate The optical interference of the light incident on the interferometric modulator is varied. Interferometric transducer devices have a wide range of applications and are expected to be used to improve existing products and to create new products, especially 163409.doc 201248291, which is a display capable product. The array of interferometric measuring devices may comprise a mechanical layer at the corner of each pixel. A black mask may be included between the corners and the pixels to absorb light in the optically inactive area of each pixel. The black mask area can be modified to show the contrast ratio while also reducing the fill factor. There is a need for an interferometric measuring device having a smaller anchoring area for the mechanical layer and an improved fill factor. SUMMARY OF THE INVENTION Each of the systems, methods and apparatus of the present invention has several aspects of the invention, and the individual aspects of the invention are not to be construed as a single. An aspect of the subject matter described in the present invention may be implemented in a device comprising a pixel array, each pixel having: a substrate; a conductive black mask disposed on the substrate and at four of the pixels An optical inactive portion of the pixel is disposed at each of the corners and along at least the edge region of the pixel, the electrical layer is disposed above the black mask; an optical stack includes a solid electrode An optical stack is disposed over the dielectric layer and - a mechanical layer; t is located above the optical stack and defines a cavity between the mechanical layer and the optical stack. The mechanical layer can pass through the cavity Moving between the moving position and the (four) position 'and the mechanical layer is defined above the optical stack at each corner of the pixel. The pixel array includes - the first pixel "Hai-pixel has a dielectric layer The fixed electrode is electrically connected to the conductive via of the black mask, and the conductive via is disposed in the optically inactive region of the first pixel along the edge of the first pixel. s position of the conductive via In the interval Offset from an edge of the first pixel to a center of the first pixel 163409.doc 201248291. In some implementations, the pixel array further includes an edge adjacent the first pixel along an edge of the first pixel a second pixel, and the second pixel does not include a conductive body in the dielectric layer for electrically connecting the fixed electrode to the black mask. According to some embodiments, the first pixel is a high gap pixel X first The pixel is an intermediate gap pixel, and the pixel array further includes a low gap pixel adjacent to the high gap pixel on a side opposite to the high gap pixel and the intermediate gap pixel, and the low gap pixel does not include a medium An electrical layer is used to electrically connect a fixed electrode to a black body of a black mask. Another aspect of the method of forming a display device having a plurality of pixels can be implemented by performing the method described in this month. The method includes Depositing a conductive black mask on the substrate, the black mask obscuring the pixel at each of the four corners of each pixel and along at least one edge region of each pixel The non-active portion of the method includes: depositing a dielectric layer over the black mask; depositing an optical stack comprising a fixed electrode over the dielectric layer; and depositing a mechanical layer over the optical stack. The layer defines a cavity between the mechanical layer and the optical stack. The method further comprises: in each of the pixels, the corner is placed above the optical stack, and the device is activated by the device. Providing a conductive via in the pixel, the body is disposed on the dielectric layer and electrically connecting the comparator to the black=1 (four) is disposed in the optical_inactive region of the __ pixel The position of the conductive via is offset from the edge of the first pixel in a direction toward the south* toward the center of the first pixel by spacing. 163409.doc -6 - 201248291 Another aspect of the invention described in the present invention is embodied in an electromechanical device comprising a plurality of pixels, each pixel comprising: a substrate; a light absorbing member disposed on the substrate and at four of the pixels Each of the corners and along the pixel An edge region obscuring an optically inactive portion of the pixel; a dielectric layer disposed over the light absorbing member; and an optical stack comprising - a fixed electrode, the optical stack being disposed over the dielectric layer; A machine is positioned above the optical camp to define a "cavity" between the machine f and the optical stack. The mechanical layer can pass through the cavity to move between the actuated position and the loose position, and the mechanical layer is misaligned on the optical stack at each corner of the image 2. The pixel array includes a -th-pixel '帛 first pixel having a member for electrically connecting the fixed electrode to the light absorbing member in the dielectric layer, the connecting member being disposed in the first pixel-wire (4) area towel The position of the connecting member along one of the edges of the first pixel is offset from the edge of the first pixel in a direction toward the center of the first pixel. In some embodiments, the center of the self-conducting body to one of the edges of the first pixel is between W (four) and about 3 Å. In some embodiments, the ^ pixel-high gap pixel 'and wherein the plurality of pixels further comprises an intermediate gap pixel adjacent to the first pixel along an edge of the first pixel, and wherein The plurality of pixels further comprises a low gap pixel opposite to the intermediate gap pixel and adjacent to the first pixel, wherein the intermediate gap pixel and the low gap pixel do not comprise a dielectric layer for electrically fixing the fixed electrode Connect to one of the black mask components. Another embodiment of the invention can be implemented in a device comprising a pixel array, wherein each pixel comprises: a substrate; a conductive black mask </ RTI> disposed therein An optically inactive portion of the pixel is shielded on the substrate and at each of the four corners of the pixel; a dielectric layer disposed over the black mask; an optical stack including a fixed electrode, the optical stack An optical stack is disposed over the dielectric layer, and a mechanical layer positioned over the optical stack and defining a cavity between the mechanical layer and the optical stack. The mechanical layer is movable through the cavity between an actuated position and a relaxed position, and the mechanical layer is anchored above the optical stack at each corner of the pixel. The pixel array includes a first pixel having a conductive electrode electrically connected to the black mask in the dielectric layer, the conductive body being disposed at a corner of the first pixel, An optically inactive region of one of the first pixels is offset from the optical stack above the optical stack. In some embodiments, the pixel array further includes a second pixel adjacent to the first pixel, and the second pixel does not include a conductive layer in the dielectric layer for electrically connecting the black mask to the fixed electrode Conductor. According to some embodiments, the first pixel is a high gap pixel and the second pixel is an intermediate gap pixel, and the pixel array further comprises a low gap on a side of the intermediate gap pixel opposite to the south gap pixel. a pixel, and the low gap pixel does not include a conductive via in the dielectric layer for electrically connecting the black mask to the fixed electrode. In some embodiments, the via is spaced apart from the mechanical stack by a distance of between about 6 and about 8 卩m. In some embodiments, the conductive layer of the conductive system is used to electrically connect the conductive bus layer of the black mask to the opening of the optical stack 163409.doc 201248291. Another aspect of the invention described in the present invention can be formed by forming one of a plurality of pixels. The method comprises: depositing a conductive black mask on the substrate to shield an optically inactive portion of the pixel at each of the four corners of each pixel; depositing a dielectric layer over the black mask; An optical stack comprising a fixed electrode is deposited over the dielectric layer; a mechanical layer is deposited over the optical stack; and the mechanical layer is anchored above each optical stack at each corner of each pixel. The mechanical layer defines a cavity for each pixel between the mechanical layer and the optical stack. The method further includes providing a conductive via in one of the plurality of pixels, the conductive body electrically connecting the fixed electrode to the black mask in the dielectric layer, the conductive body being disposed at the first At one of the corners of the pixel, the mechanical layer is offset from above the optical stack in an optically inactive region of the first pixel. In some embodiments, the method further comprises: depositing a sacrificial layer prior to depositing the mechanical layer; and removing the sacrificial layer after depositing the mechanical layer to form the cavity, the sacrificial layer having a selected to define the cavity One thickness of one height. According to some embodiments, the method further includes forming an anchoring aperture in the sacrificial layer, the anchoring aperture defining a location at which the mechanical layer is anchored above the optical stack. Another aspect of the subject matter described in the present invention may be implemented in a device comprising one of a plurality of pixels. 'Each pixel comprises: a substrate; a member for absorbing light' disposed on the substrate and at the pixel Each of the four corners obscures one of the optically inactive portions of the pixel; a dielectric layer disposed 163409.doc -9-201248291: the second:: above the member; and an optical stack, which includes - fixed An electrical stack (4) is placed over the dielectric layer. The pixel (4) includes - the first pixel has a fixed electrode electrically connected in the dielectric layer: a member of the member, the connecting member is disposed at the first pixel, and is free from the first pixel An offset in the optically inactive region where the mechanical layer is anchored above the optical stack. In some embodiments, the inter-gap pixel is adjacent to a low pixel, and the low-level opposite side and the low-gap pixel are not one of the absorbing members. The first pixel-high-gap pixel and the pixel array further comprises a middle gap pixel, wherein the intermediate gap image is included in the dielectric layer, and the gap pixel is included in the dielectric layer The gap gap pixel is adjacent to the high gap and the intermediate gap and the fixed electrode are electrically connected to the details of the description in the description of the light. Self-Description, Aspects and Advantages "Note that other features, dimensions may not be drawn to scale [Embodiment] The schema of the subject matter described in the specification and the scope of the patent application 'The relative dimensions of the following figures are the same in the various drawings. The reference numerals and symbols indicate the same elements. The following detailed description is directed to some such embodiments for the purpose of describing the aspects of the invention. However, the teachings herein can be applied in many different ways. The described embodiments can be implemented in any device configured to display either dynamic (e.g., video) or static (e.g., still image) and any image, whether text, circle, or image. More specifically, it is contemplated that such implementations can be implemented in or associated with a variety of electronic devices, such as, but not limited to, mobile phones, enabled multimedia networks. Road's cellular mobile phone, mobile TV receiver, wireless device, smart phone, Bluetooth device, personal data assistant (PDA), wireless email receiver, handheld or portable computer, small laptop, notebook Computer smart laptop, tablet, printer, photocopying machine, scanner, fax device, GPS receiver/navigator, camera, Mp3 player, camcorder, game console, watch, clock, Calculator, television monitor, flat panel display, electronic reading device (eg, e-book reader), computer monitor, car display (eg, odometer display, etc.), cockpit control device and/or display, camera viewfinder display (for example, a display in a vehicle - a rear view camera), an electronic photo album, an electronic billboard or a card, a projector, a building Structure, microwave, refrigerator, stereo system, cassette recorder or player, DVD player, CD player, VCR, radio, portable memory crystal, laundry 'dryer, washer/dryer, Parking meters, packaging (eg, electromechanical systems (EMS), MEMS and non-MEMS), aesthetic structures (eg, an image display on a piece of jewelry), and a variety of electromechanical systems. The teachings herein may also be used in non-display applications such as, but not limited to, electronic switching devices, RF ferrites, sensors, accelerometers, gyroscopes, motion sensing devices, magnetic, inertial components of consumer electronics. , consumer electronic components, parts, variable capacitance diodes, liquid crystal devices, electrophoresis devices, drive solutions, manufacturing procedures, electronic test equipment. Therefore, the teachings are not intended to be limiting; only the embodiments depicted in the drawings may be broadly applicable as would be readily apparent to those skilled in the art. 163409.doc 201248291 The present invention discloses an electromechanical device having an improved fill factor. The fill factor of an electromechanical device or the ratio of the optically active area of the device to the total area of the electromechanical device may be limited by the area of a light absorbing black mask. The electromechanical device can be an interference measurement modulator device comprising a plurality of pixels and a mechanical layer anchored to one of the optical stacks above the black mask at the corners of each pixel. In some embodiments, a conductive conduction system is used to electrically connect the "electrode" of the device to the black mask. The conductive body is offset from where the mechanical layer is anchored above the optical stack to help reduce the area of the black mask. For example, if the via body is used to shift the mechanical layer region at the pixel corner 光学 in the optical stack, the size of the black mask at the pixel corner 减小 can be reduced, because the cat region does not need to be large. Taking into account the misalignment between the pixel via and the anchor region. By reducing the area of the black mask at the pixel corners, the optical inactive area of the array can be reduced, thereby improving the fill factor. In some embodiments, the vias are not included in the dielectric layer of each pixel. In fact, the conductive body can be periodically positioned throughout the interferometric transducer device (eg, near a corner of the pixel configured to have a high gap (or cavity) height) to reduce the black The total area of the mask and improved fill factor. For example, in one configuration that includes pixels (or sub-pixels) having various gap heights, a conductor can be positioned only near one of the corners (or sub-pixels) of one of the highest gaps. In one of the other embodiments, the optically inactive region is spaced along the conductive body at a position toward one of the edges of the pixel in a pixel toward the 'one conductive conduction system, and one of the centers of the pixel is self-aligned. The edge of the image is 163409.doc -12- 201248291. The black mask can include a channel extending from one of the pixels to a channel of the via along the edge of the pixel. One side of the channel may comprise a widened portion (or a bulge) that is generally wider than the remainder of the channel width. The protrusion surrounds the footprint of the via, which helps to increase the robustness of the via to process variations. In some embodiments, it is not necessary to include the via along each edge of each pixel. In other words, the via may be provided only for a particular edge of a particular pixel (e.g., in a high gap pixel along one of the edges shared by the high gap pixel and an intermediate gap pixel) to reduce the total area of the black mask. Particular embodiments of the subject matter described in this disclosure can be implemented to achieve one or more of the following potential advantages. In some embodiments, a pixel array can include an improved fill factor and/or a black mask having a reduced area. Further, some embodiments may increase the process robustness of an interference measuring device for electrically connecting a black mask to a conductive body of a fixed electrode. In addition, some embodiments may improve the yield of the dry/sampling device by modifying the device tolerances for manufacturing variations. In addition, some embodiments may be used to reduce the number of vias in a pixel array and/or to provide a pixel array having one of the vias only over a small portion of the array. One example of a suitable electromechanical system (EMS) or MEMS device to which one of the described embodiments can be applied is a reflective display device. The reflective display device can be coupled with an interferometric transducer (IM〇D) to selectively absorb and/or reflect light incident thereon using the principles of optical interference. The IM〇D may comprise an absorber movable relative to the absorber and an optical resonant cavity defined between the absorber and the reflector. The reflector can be moved to two 163409.doc -13· 201248291 or more than two different positions' This changes the size of the optical resonators and thereby affects the interference measurement modulation! The reflection of I can produce a fairly broad spectral band that can be shifted across the visible wavelength to produce different colors "by varying the thickness of the optical cavity (ie, by changing the reflection) The position of the body) to adjust the position of the spectral band. 1 shows an example of an isometric view depicting one of two adjacent pixels in a series of pixels of an interferometric transducer (IMOD) display device. The IMOD display includes - or a plurality of interferometric display elements. In such devices, the pixels of the MEMS display element can be in a bright or dark state. In the bright ("loose", "open" or "on" state) state, the display component reflects most of the incident visible light to, for example, the user. In contrast, in dark ("actuated", "closed", or "closed") states, the display element reflects a small amount of incident visible light. In some embodiments, the light reflectance properties of the inverted and closed states can be reversed. The mem_ element can be configured to reflect primarily at a particular wavelength that allows for one color display other than black and white. The IMOD display device can include an array of columns/rows. Each ι can include a pair of reflective layers (ie, a movable reflective layer and a fixed partial reflective layer). The pair of reflective layers are positioned at a variable and controllable distance from each other to form an air gap (also known as an air gap). The movable reflective layer is movable between at least two positions for an optical gap or cavity. In a first position (ie, a relaxed position), the movable reflective layer can be positioned to be away from the fixed portion of the reflective layer A relatively large distance apart. In a second position (ie, an actuating position), the movable reflective layer can be positioned closer to the partially reflective layer. From the 163409.doc • 14 · 201248291 two layers of reflection The incident light may be constructively or destructively interfered depending on the position of the movable reflective layer to produce an overall reflective or non-reflective state for each pixel. In some embodiments, the IMOD may be in a reflective state when not actuated. Medium that reflects light in the visible spectrum and, when actuated, may be in a dark state, reflecting light outside the visible range (eg, infrared light). However, in some other embodiments, an IM〇D When not actuated, it may be in a dark state and in a reflective state when actuated. In some embodiments, introducing an applied voltage may drive the pixel to change state. In some other embodiments 'an applied charge can drive the pixel To change the state. The depicted portion of the pixel array in Figure 1 includes two adjacent interferometric transducers 12. In the IMOD 12 on the left (as illustrated), a mechanical layer or a movable reflective layer 14 is illustrated. The description is in a relaxed position at a predetermined distance from the optical stack 16 containing a portion of the reflective layer. The voltage v〇 applied across the left IMOD 12 is insufficient to cause actuation of the movable reflective layer 14. The IMOD on the right side 12, the movable reflective layer 14 is illustrated as being in an approximate moving position adjacent or adjacent to the optical stack 16. The voltage vbias applied across the right IMOD 12 is sufficient to maintain the movable reflective layer 14 in the actuated position. The reflection property of the pixel 12 in Fig. 1 is generally illustrated by an arrow π indicating the light incident on the pixel !2 and the light 15 reflected from the left pixel 12. Not illustrated in detail, but a substantial portion of the light 13 incident on the pixel 12 will be transmitted through the transparent substrate 20 toward the optical stack 16. A portion of the light incident on the optical stack 16 will be partially reflected through the optical stack 16. The layer and a portion will be reflected back through the transparent substrate 2〇. Transmitted through 163409.doc 201248291 The portion of the light 13 that passes through the optical stack 16 will be reflected back toward the transparent substrate 20 at the movable reflective layer 14 (and through the transparent substrate) 2) The interference (constructive or destructive) between the light reflected from the partially reflective layer of the optical stack 16 and the light reflected from the movable reflective layer 14 will determine the wavelength of the light 15 reflected from the pixel 12. The optical stack 16 can comprise a single layer or several layers. The (etc.) layer can comprise one or more of an electrode layer, a portion of the reflective and partially transmissive layers, and a transparent dielectric layer. In some embodiments, optical stack 16 is electrically conductive, partially transparent, and partially reflective&apos; and can be fabricated, for example, by depositing one or more of the above layers on a transparent substrate 20. The electrode layer may be formed of a variety of materials such as various metals such as indium tin oxide (IT〇). The partially reflective layer can be formed from a variety of materials that are partially reflective, such as various metals such as chromium (Cr), semiconductors, and dielectrics. The partially reflective layer can be formed from one or more layers of material and each of the layers can be formed from a single material or a combination of materials. In some embodiments, optical stack 16 can comprise a single-half transparent metal or semiconductor thickness that acts as both an optical absorber and a conductor, and (eg, 'optical stack 16 or other structure of IMOD') is different, conductive A stronger layer or portion can be used to carry signals between IMOD pixels. The optical stack 16 can also include one or more conductive or dielectric layers covering one or more conductive layers or a conductive/absorptive layer. In some embodiments, as further described below, the layer(s) of optical stack 16 can be rounded into parallel strips and can form column electrodes in a display device. As understood by those of ordinary skill, the term "patterning" is used herein to refer to masking and etching procedures. In some embodiments, a highly conductive and reflective material such as 163409.doc 16· 201248291 (A1) can be used for the movable reflective layer i4, and such strips can form row electrodes in a display device. The movable reflective layer 14 is formed as a deposited metal layer or a plurality of deposited metal layers, a series of flat strips (orthogonal to the column electrodes of the optical stack 丨6) to form a deposit on top of the column ι 8 and One of the deposits between the pillars 18 involves the sacrificial material. When the sacrificial material is etched, a defined gap 19 or optical cavity can be formed between the movable reflective layer 14 and the optical stack 16. In some embodiments, the spacing between the crucibles 18 can be from about 1 μηη to 1〇00 μηι, and the gap 19 can be on the order of less than 1 〇, 〇〇〇 (Α). In some embodiments, each pixel of the IMOD (whether in an actuated state or in a relaxed state) essentially forms a capacitor by a fixed reflective layer and a moving reflective layer. As illustrated by the pixel 12 on the left side of the figure, when no voltage is applied, the movable reflective layer 14 remains in a mechanically relaxed state with a gap 19 between the movable reflective layer 14 and the optical stack 16. However, when a potential difference (for example, a voltage) is applied to at least one of the selected column and the row, the capacitor formed at the intersection of the column electrode and the row electrode at the corresponding pixel starts to be charged, and the electrostatic force pulls the electrode Pull together. If the applied voltage exceeds a threshold, the movable reflective layer 14 can be deformed and moved

It is common for a general practitioner to understand that a direction is called "the separation distance of ^. No bow. Although in some cases" or "row", but "column" and the other party is called 163409.doc •17- 201248291 "Line" is arbitrary. In other words, in some orientations, a column can be considered a row and a row can be considered a column. In addition, the display elements can be configured uniformly as orthogonal columns and rows (an "array") or as a non-linear configuration (a "mosaic") having a particular positional offset relative to each other, for example. The terms "array" and "mosaic" can refer to any configuration. Therefore, although the display is referred to as a package S array J or "mosaic", in any of the examples, the elements themselves need not be configured to be orthogonal to each other or arranged in a _ uniform distribution, but may include asymmetric shapes and unevenness. Distribution of components. Figure 2 shows an example of a system block diagram illustrating one of the electronic devices of a 3x3 interferometric transducer display. The electronic device includes a processor 21 that is configurable to execute - or a plurality of software modules. In addition to executing a job system, the processor 21 can also be configured to execute one or more software applications 'including a web browser, a telephone application, an email program, or any other software application. The processor 21 can be configured to communicate with an array of drivers (4). The array driver 22 can include a signal to provide (eg, a display array or panel buckle-column driver circuit 24 and a row of driver circuits %. The cross-section of the lion display device illustrated in Figure i is by the line in Figure 2 w does not show. Although Figure 2 illustrates the array of IM〇D for clarity, the display array 3G may contain a plurality of thin d, and the number of excitation D in the column may be different from the fine D in the row. The number, and vice versa. Circle 3 shows the circular solution diagram! The position of the movable reflection layer of the interferometric transducer is applied to the electromigration-example. For the Μ·interference measurement modulator' column The /row (ie, 'common/segmented) write procedure can utilize such a device as illustrated by Figure 163409.doc 201248291 - the hysteresis property-interference measurement modulator can be used, for example, at approximately 1 volt volt The potential difference is such as to cause the movable reflective layer or the mirror self-relaxing state to change to an actuated state. When the electric wish is reduced from this value, the movable reflective layer maintains its state, because the voltage drops back to (for example) Following, however, the movable reflective layer Until the voltage drops below 2 volts, it is completely loose. Therefore, 'there is a voltage range of about 3 volts to 7 volts as shown in FIG. 3' in which there is a towel device in a relaxed state or an actuated state. In the case of a stable voltage-applied window, there is a voltage range of about 3 volts to 7 volts. In this context, the window is referred to as a "hysteresis window" or a "stability window." One of the lag characteristics display arrays can be designed to address one or more columns at a time such that the pixel to be actuated in the addressed column is exposed to about 1 定 during addressing a given column. One of the voltage differences of volts, and the pixel to be relaxed is exposed to a voltage difference of approximately zero volts. After addressing, the pixels are exposed to a steady state or a bias voltage difference of approximately 5 volts such that the pixels Staying in the previous strobe state. In this example, after addressing, each pixel experiences a potential difference within a "stability window" of about 3 volts to 7 volts. This hysteresis property makes the pixel design (eg, Illustrated in the figure) The same applied voltage condition remains stable in the pre-existing state of the constant motion or relaxation. Because each IMOD pixel (whether in the actuated state or in the relaxed state) essentially forms a capacitor by the fixed reflective layer and the moving reflective layer. Therefore, this steady state can maintain a stable voltage within the hysteresis window without substantially consuming or losing power. Furthermore, if the applied voltage potential remains substantially fixed, substantially little or no current flows into the IMOD pixel. .doc -19- 201248291 In some embodiments, the data signal can be generated by applying a data signal in the form of a "segmented" voltage along the set of row electrodes, depending on the desired change in state of the pixels in a given column, if any. A frame of an image. Each column of the array can be positioned in turn so that one column is written to the frame at a time. To write the desired data to the pixels in the column, a segment voltage corresponding to the desired state of the pixels in the first column can be applied to the row electrodes and can be presented as a particular "common" voltage or 彳§ One of the first form of the pulse is applied to the first column of electrodes. Then 'the segment voltage set can be changed to correspond to the desired change in the state of the pixels in the second column (if present), and a second common voltage can be applied to the second column electrode". In some embodiments, first The pixels in the column are unaffected by changes in the segment voltage applied along the row electrodes and remain in the state they were set during the first common voltage column pulse. This procedure can be repeated in a sequential manner for the entire series of columns or rows to produce an image frame. The new image data can be used to refresh and/or update the frames by repeating the program continuously for a desired number of frames per second. The resulting state of each pixel is determined by the combination of segments and common signals applied across each pixel (i.e., the potential difference across each pixel). Figure 4 shows an example of a table illustrating one of various states of an interferometric modulator when various common voltages and segment voltages are applied. As will be readily appreciated by those of ordinary skill, a "segmented" voltage can be applied to a row or column electrode and a "common" voltage can be applied to the other of the row or column electrodes. As illustrated in Figure 4 (and in the timing diagram shown in Figure 5B), when a release voltage VCrel is applied along a common line, there is no voltage applied along the segment line (i.e., 'high segment voltage VSh and The low segment voltage vSl), along with all of the interferometric modulator elements along the line 163409.doc •20·201248291, will be placed in a relaxed state, either a released state or an unactuated state. In particular, when a release voltage VCreiJ^ is applied along a common line, a potential voltage across the modulator (or referred to as a pixel voltage) applies a high segment voltage VSH and a low segment voltage along a corresponding segment line of the pixel. VSl is in a slack window (see Figure 3, also known as a release window). When a holding voltage (such as a high holding voltage VCH0LD H or a low holding voltage VCh〇ld_l) is applied to a common line, the state of the interference measuring modulator will remain constant. For example, a relaxed IMOD will remain in a relaxed position and the actuation 1MOD will remain in the consistent position. The hold voltage can be selected such that when a high segment voltage VSH and a low segment voltage VSL are applied along the corresponding segment line, the pixel voltage will remain within a stability window. Therefore, the segment voltage swing (i.e., the difference between the high segment voltage vsH and the low segment voltage VS1) is less than the width of the positive or negative stability window. When an address or actuation voltage (such as a high address voltage VCADD_H or a low address voltage VCadd-L) is applied to a common line, data can be selectively along the line by applying a segment voltage along the respective segment lines. Write to the modulator. The segment voltage can be selected such that actuation depends on the segment voltage applied. When a site voltage is applied along a common line, applying a segment voltage will result in a pixel voltage within the stability window, causing the pixel to remain unactuated. In contrast, applying a different-segment voltage 胄 results in a pixel voltage that exceeds the stability window, which in turn causes actuation of the pixel. The particular segmentation voltage that causes the actuation can vary depending on the addressing voltage used. In some embodiments 'When a high address voltage VCADD H is applied along a common line, applying a high segment 163409.doc -21 - 201248291 voltage VSH can cause a modulator to remain in its current position while applying a low segment voltage VSL can cause the modulator to actuate. As a corollary, when a low address voltage 乂 (^003) is applied, the effect of the segment voltage can be reversed, the middle segment voltage VSH causes the modulator to be actuated, and the low segment voltage vS1 acts on the modulator. The state has no effect (ie, remains stable). In some embodiments, a hold voltage, an address voltage, and a segment voltage for the same polarity potential difference can be generated across the modulator. In some other implementations, the modulation can be used The alternating polarity of the potential difference of the transformer. The alternation of the polarity across the modulator (i.e., the alternation of the polarity of the write process) can reduce or inhibit charge accumulation that can occur after repeating a single polarity write operation. 5A shows an example of one of the display data frames illustrating the 3x3 interferometric modulator display of FIG. 2. FIG. 5B shows a frame that can be used to write the display data illustrated in FIG. 5A. An example of one of the common signal and segmented signal timing diagrams. These signals can be applied to, for example, the 3χ3 array of Figure 2, which will ultimately result in the display of the line time 60e of the display configuration illustrated in Figure 5 The actuating modulator of Figure 5A is in a dark state (i.e., where a majority of the reflected light is outside the visible spectrum) to cause a dark appearance to, for example, one of the viewers. Prior to the frame illustrated in 5A, the pixels may be in any state, but the writer illustrated in the timing diagram of Figure 5B assumes that each modulator has been released and resides in a line before the first line time 6〇a During the first line time 60a: a release voltage 70 is applied to the common line 1; the voltage applied to the common line 2 starts at a high hold voltage 72 and moves 163409.doc 22· 201248291 to one Release voltage 70; and apply a low hold voltage % along common line 3. Therefore, within the duration of first line time 60a, the modulator along common line i (common 1, segment 1), (common 1 , segment 2) and (common 丨, segment 3) remain in a relaxed or unactuated state, along the common line 2 modulator (common 2, segment 1), (common 2, segment 2) And (common 2, segment 3) will move to a relaxed state, and along the common line 3 modulator (common 3 ' Segment 1}, (Common 3, Segment 2) and (Common 3, Segment 3) will remain in their previous states. Referring to Figure 4, the segment voltages applied along segment lines 1, 2 and 3 will be The state of the interferometric modulator has no effect, because the common line 1, 2 or 3 is not exposed to the voltage level causing the actuation during the online time 6〇a (ie, VCrel_relaxation and VChold_l-stability During the first line time 60b, the voltage on common line 1 moves to a high hold voltage 72, and all of the modulators along common line 1 remain in a relaxed state regardless of the applied segment voltage. Since no addressing or actuation voltage is applied on common line 1. Due to the application of the release voltage 7〇, the modulator along common line 2 remains in a loose state and along the common line 3 modulator ( Common 3 'segment 1), (common 3, segment 2) and (common 3, segment 3) will relax when the voltage along common line 3 is moved to a release voltage 70. During the third line time 60c' by the common line! A high address voltage 74 is applied to address the common line 1. Since a low segment voltage 64 is applied along segment lines 1 and 2 during the application of this address voltage, the pixel voltage across the modulator (common 1, segment 1) and (common 1 segment 2) is greater than the modulation The high end of the positive stability window (ie, 'the voltage difference exceeds a predefined threshold'), and the modulators (common 1 'segment 1) and (common 1, segment 2) are actuated. Conversely, because a high segment voltage 62 is applied along segment I63409.doc •23- 201248291 line 3, the pixel voltage across the modulator (common 1, segment 3) is less than the cross-modulator (common segmentation, segmentation) The voltages of 丨) and (common 丨, segment 2) are maintained within the positive stability window of the modulator; therefore, the modulator (common 1 'segment 3) remains slack. During the online time 6〇c, the voltage along common line 2 is reduced to a low hold voltage 76, and the voltage along common line 3 is maintained at a release voltage 70' so that the modulators along common lines 2 and 3 remain In a relaxed position. During the fourth line time 6 〇d, the voltage on common line 1 returns to a high hold voltage 72' such that the modulators along common line 1 remain in their respective addressed states. The voltage on common line 2 is reduced to a low address voltage 78. Since a high segment voltage 62 is applied along the segment line 2, the pixel voltage across the modulator (common 2, segment 2) is lower than the low end of the negative stability window of the modulator, thereby causing the modulator (Common 2, Section 2) Actuated. Conversely, because a low segment voltage 64 is applied along the segment lines 33, the modulators (common 2, segment 〇 and (common 2, segment 3) remain in a relaxed position. On common line 3 The voltage is increased to a high hold voltage 72 to maintain the modulator along common line 3 in a relaxed state. Finally, during the fifth line time 60e, the voltage on the common line is maintained at a high hold voltage 72, and The voltage on line 2 is maintained at a low hold voltage 76 to maintain the modulators along common lines 1 and 2 in their respective address states. The voltage on common line 3 is increased to a high address voltage 74 to address the common edge. Modulator of line 3. Since a low segment voltage 64 is applied to segment lines 2 and 3, the modulator (common 3' segment 2) and (common 3, segment 3) are actuated along The high segment voltage 62 applied by segment line 1 causes the modulator (common 3, 163409.doc • 24-201248291 segment i) to remain in a relaxed position. Therefore, at the end of the fifth line time 6〇e' The 3x3 pixel array is in the state shown in Figure 5A and will remain there as long as a holding voltage is applied along the common line In the state, there is no change in the segment voltage that can occur when addressing a modulator along other common lines (not shown). In the timing diagram of Figure 5B, a given write procedure (ie, line time to 60e) may include the use of a hold voltage and a high address voltage or a low hold voltage and a low address voltage. Once the write procedure has been completed for a given common line (and the common voltage is set to have the same polarity as the actuation voltage) Keeping the voltage), the pixel voltage remains within a given stability window and does not pass through the window until a release voltage is applied across the common line. Also, since each-modulator is written as before the address modulator The release time of the program, so the actuation time of the variator (rather than the release time) can determine the line time. Specifically, the release time of one of the modulators is greater than the actuation time: in the scheme, as shown in Fig. 5B As depicted in the figure, the release voltage can be applied for longer than

Early in the morning. In a different way, you can change the voltage applied along the common line or the segment line to the old | especially after the loss of the modulator (such as different color modulators) The variation of the actuation voltage and the release voltage. The details of the structure of the interferometric transducers that are based on the principles set forth above may vary widely. For example, Figures 6A through 6B show examples of cross-sections of different embodiments of an interferometric transducer, including a movable reflective layer 14 and its structure. An example of a cross-section of one of the interferometric transducer displays of the map exhibiting (i.e., the movable reflective layer u) is deposited orthogonally from the substrate 2g. 163409.doc '25- 201248291 support 18 on. The shape of the movable reflective layer 14 of each IMOD in Fig. 6B is substantially square or rectangular and is attached to the tether 32 of the branch member at or near the corner. In Figure 6C, the movable reflective layer 14 is substantially square or rectangular in shape and is suspended from a variable layer 34 which may comprise a flexible metal. The deformable layer 34 can be directly or indirectly connected to the substrate 2〇 around the perimeter of the movable reflective layer 14. These connections are referred to herein as support columns. The embodiment shown in Figure 6 (: has the added benefit of decoupling the optical function from the movable reflective layer 14 and its mechanical function, which can be implemented by the deformable layer 34. This decoupling is allowed for The structural design and materials of the moving reflective layer 14 and the structural design and materials for the deformable layer 34 are optimized independently of each other. Figure 6D shows another example of an im 〇 D where the movable reflective layer 14 contains a reflection Sublayer 14a. The movable reflective layer 14 rests on a support structure, such as support post 18. The support posts 18 provide the movable reflective layer 14 and the lower fixed electrode (i.e., the optical stack in the illustrated IMOD) The separation of one of the portions 16 is such that, for example, a gap 19 is formed between the movable reflective layer 4 and the optical stack 16 when the movable reflective layer 14 is in a relaxed position. The movable reflective layer 14 A conductive layer 14c and a support layer 14b that can be configured to function as an electrode can also be included. In this example, the conductive layer 14c is disposed on a side of the support layer 14b away from the substrate 20, and the reflection Sublayer 14a is arranged The support layer 1413 is adjacent to the other side of the substrate 2. In some embodiments, the reflective sub-layer 1 is privately conductive and can be disposed between the support floor 14b and the optical stack 16. The support layer 14b can comprise a One or more of a dielectric material (eg, 'sodium niobium oxide (Si0N) or cerium oxide (Si〇2)) 163409.doc • 26_201248291 layers. In some embodiments, the support layer Mb can be one of the layers Stacking 'for example' a three-layer stack such as si〇2/SiON/Si〇2. Either or both of the reflective sub-layer 14a and the conductive layer 14C may comprise, for example, about 0.5% copper (Cu) Aluminum (A1) alloy or another reflective metal material. The use of conductive layers 143, 14 above and below the dielectric support layer 14b balances stress and provides enhanced electrical conductivity. In some embodiments, for a variety of design purposes ( The reflective sub-layer 14a and the conductive layer i4c may be formed of different materials, such as to achieve a particular stress distribution within the movable reflective layer 14. As illustrated in Figure 6D, some embodiments may also include a black mask structure 23. The black mask structure 23 can be formed in optics In the active area (eg, between pixels or below the column 18) to absorb ambient light or stray light. The black mask structure 23 can also be reflected or transmitted through the inactive portion of the display by inhibiting light from being inactive portions of the display. While improving the optical properties of a display device, thereby increasing the contrast ratio, the black mask structure 23 can be electrically conductive and configured to function as an electrical bus layer. In some embodiments, the column electrodes can be connected to the black The mask structure 23 is used to reduce the resistance of the connected column electrodes. The black mask structure 23 can be formed using a variety of methods including deposition and patterning techniques. The black mask structure 23 can comprise one or more layers. For example, in some embodiments, the black mask structure 23 comprises a molybdenum chromium (MoCr) layer, a ceria (si〇2) layer, and an aluminum used as a reflector and a bus layer, which serve as an optical absorber. The thickness of the layers is in the range of about 3 〇A to 80 A, 500 A to 1000 A, and 500 A to 6000 A, respectively. One or more layers may be patterned using a variety of techniques, including photolithography and dry etching (including, for example, tetrafluoromethane (Cf4) for MoCr and Si〇2 layers 163409.doc -27- 201248291 And/or oxygen (〇2) and gas (ci2) and/or tri-carbide (BC13) for the aluminum alloy layer. In some embodiments, the black mask 23 can be a standard gauge or an interferometric stacking structure. In such interference measurement stack black mask structures 23, conductive reflectors can be used to transmit or carry signals between the fixed electrodes below the optical stack 16 of each column or row. In some embodiments, a spacer layer 35 can be used to substantially electrically isolate the absorber layer 16a from the conductive layer in the black mask 23. Figure 6E shows another example of an IMOD in which the movable reflective layer 14 is self-supporting. The embodiment of Fig. 6E does not include support posts 18 as compared to Fig. 6D. Rather, the movable reflective layer 14 contacts the underlying optical stack 16' at a plurality of locations and provides sufficient support for the curvature of the movable reflective layer 14 when the voltage across the interferometric transducer is insufficient to cause actuation. The movable reflective layer 14 is returned to the unactuated position of Figure 6E. For clarity, an optical stack 16 that may contain a plurality of different layers is shown to include an optical absorber 16a and a dielectric 16b. In some embodiments, the optical absorber 16a can be used as both a fixed electrode and a portion of a reflective layer. In an embodiment such as that shown in Figs. 6A to 6E, "im" is used as a viewing device in which an image is viewed from the front side of the transparent substrate 2 (i.e., the side opposite to the side on which the modulator is disposed). In such embodiments, the Z-face portion of the device (i.e., 'any knife behind the movable reflective layer 14 of the display device contains, for example, the deformable layer 34 illustrated in Figure 6C) can be configured to operate without impact or negative effects. The image quality of the display device is due to the fact that the reflective layer is called to shield such portions of the device. For example, in some implementations, the 'movable reflective layer 14 can be followed by a bus bar structure (not described in 163409.doc • 28·201248291), which provides optical properties and modulators for the modulator The ability to separate mechanical and electrical properties, such as voltage addressing and movement caused by addressing. Further, the embodiment of Figs. 6A to 6E can simplify processing such as, for example, patterning. Figure 7 shows an example of a flow chart illustrating one of the manufacturing procedures 80 of an interferometric modulator, and Figures 8A-8E show examples of cross-sectional schematic illustrations of corresponding step segments of such a manufacturing procedure. In some embodiments, in addition to the other blocks not shown in Figure 7, the fabrication process 8 can also be implemented to produce, for example, the general type of interferometric modulators illustrated in Figures 1 and 6. Referring to Figure 1 & Figures 6 and 7, the process 8 begins with block 82' in which an optical stack 16 is formed over substrate 20. Figure 8A illustrates this optical stack 16 formed over the substrate 20. The substrate 2 can be a transparent substrate (such as glass or plastic) that can be flexible or relatively hard and inflexible and may have been subjected to previous preparation procedures (eg, cleaning) to facilitate the effectiveness of the optical stack 16. form. As discussed above, the optical stack 16 can be electrically conductive, partially transparent, and (four) reflective, i can be fabricated, for example, by depositing one or more layers having the desired properties on the transparent substrate 2 . In Figure 8A, the optical stack 16 includes a multilayer structure having one of the sub-layers 16 &amp; and i6b' but in some other embodiments, more or fewer sub-layers may be included. In some embodiments, one of the sub-layers..., (10) may have both optical absorption and electrical conductivity properties in a coarse state, such as a combined conductor/absorber sub-layer 16&amp; Further, one or more of the sub-layers 16a, 16b can be converted into parallel strips and can be formed as column electrodes in the display device. Masking and money-cutting programs or other programs known in the art __appropriate program 163409.doc -29. 201248291 Perform this patterning. In some embodiments, the sub-layers i6a, _ may be an insulating layer or a dielectric layer such as one or more metal layers (eg, one or more reflective layers and/or conductive layers) ) The sub-layer (10) above. In addition, the optical stack 16 can be patterned into individual and parallel strips that form the display. The process 80 continues at block 84 to form a sacrificial layer 25 over the optical stack 16. The sacrificial layer 25 is then removed to form the cavity 19 (e.g., at block 9A) and thus the sacrificial layer 25 is not shown in the resulting interferometric modulator 12 illustrated in FIG. FIG. 8B illustrates a partial fabrication apparatus including a sacrificial layer 25 formed over the optical stack 16. Forming the sacrificial layer 25 over the optical stack 16 can include depositing yttrium fluoride (yield selected to provide a gap or cavity 19 of a desired design size (see also Figures i and 8E) after subsequent removal (see also Figures i and 8E) XeF2) (tactile material) such as molybdenum (M〇) or amorphous germanium (Si). The deposition of the sacrificial material may be performed using deposition techniques such as: physical vapor deposition (PVD, such as sputtering), plasma enhanced chemical vapor deposition (PECVD), thermal chemical vapor deposition (thermal c VD) ) or spin coating. The process 80 continues at block 86 to form a support structure (e.g., one of the posts 18 illustrated in Figures i, 6 and 8C). Forming the pillars 18 can include patterning the sacrificial layer 25 to form a support structure void, followed by a deposition method (such as PVD, PECVD, thermal CVD, or spin coating) to apply a material (eg, a polymer or an inorganic material, such as an oxidative dream) Deposited into the pores to form the column 18. In some embodiments, the support structure apertures formed in the sacrificial layer can extend through both the sacrificial layer 25 and the optical stack 16 to the underlying I63409.doc • 30·201248291 board 20' such that the column 18 The lower end contacts the substrate 20 as illustrated in FIG. 6A. Alternatively, as depicted in FIG. 8C, apertures formed in the sacrificial layer 25 may extend through the sacrificial layer 25' but not through the optical stack 16. For example, the figure illustrates contact with an upper surface of the optical stack 16. The lower end of the support column 18. The post 18 or other support structure can be formed by depositing a layer of support structure material over the sacrificial layer 25 and patterning to remove portions of the support structure material that are positioned away from the voids in the sacrificial layer 25. As illustrated in Figure 8C, the support structure can be positioned within the aperture, but can also extend at least partially over a portion of the sacrificial layer 25. As noted above, the patterning of the sacrificial layer and/or the support pillars 18 can be performed by a patterning and etching process, but can also be performed by an alternative residual method. The process 80 continues at block 88 to form a movable reflective layer or film (such as the movable layer 14 illustrated in Figures 1, 6 and 8D can be deposited by employing, for example, a reflective layer (e.g., aluminum, aluminum alloy) One or more deposition steps

One of the mechanical sublayers is chosen for its mechanical properties. Or more may include for it, etc. • The other sub-layer 14b may comprise a needle. Since the sacrificial layer 25 is still present in the portion of the fabricated interference measurement modulator formed at the block 88, the movable reflective layer 在4 is This order segment is typically immovable by one of the sacrificial layers 25. Contains one

163409.doc -31 · 201248291 Put "IMOD". As described above in connection with Figure 1, the movable reflective layer 14 can be patterned into individual and parallel strips that form the rows of the display. The routine 80 continues at block 90 to form a cavity (e.g., as shown in Figures 1, such as 6 and cavity 19 as illustrated in Figure 8E). The cavity 19 can be formed by exposing the sacrificial material 25 (deposited at block 84) to an etchant. For example, it can be effectively removed by dry chemical etching, for example by exposing the sacrificial layer 25 to a gaseous or vaporous etchant, such as a vapor derived from solid xenon difluoride (XeF2) (usually relative to surrounding The structure of the cavity 19 selectively removes one of the desired amounts of material to segment to remove one of the molybdenum materials such as molybdenum (Mo) or amorphous germanium (a-Si). Other etching methods such as wet etching and/or plasma etching may also be used. Because the sacrificial layer 25 is removed during block 90, the movable reflective layer 14 is typically movable after this stage segment. The resulting fully or partially fabricated im〇d after removal of the sacrificial material 25 may be referred to herein as a "release" IMOD. The present invention discloses an electromechanical device having an improved fill factor. In some embodiments, the electromechanical device can be an interference device comprising an array of pixels and one of the mechanical layers anchored to each of the optical stacks at each corner. The conductive body may be provided in the (four) column-pixel towel to electrically connect a solid electrode to the black material 1 at the corner of the pixel, and the pixel may be free from the pixel at the corner of the pixel. In the fairy area; optical shift (4) to determine the offset of the mechanical layer. Compared with the design in which the mechanical layer is placed on the optical stack #-(4) hole, the displacement of the conductive body can reduce the area of the black mask. H can be used in the pixel array. Shifting the body to improve the filling factor 163409.doc -32· 201248291 For example, shifting the conducting body from the anchoring hole can reduce the size of the anchoring hole, thereby allowing the black mask to be lowered at the corner of the pixel The area. Therefore, shifting the via from (10) to the hole can increase the fill factor by reducing the black mask area, thereby improving the fill by increasing the ratio of the optically active area in the pixel array relative to the total area of the array. Factor. In some embodiments, the vias are provided only for some of the pixels (or a small portion of the pixels), thereby further improving the fill factor of the pixel array. For example, the via may be provided only at one of the corners of one of the pixels having the largest gap size. Figure 9 shows an example of a flow chart illustrating one of the manufacturing procedures of an interference measurement modulator. The program 100 begins at block 1〇2. In block 104, a black mask is formed over a substrate. The substrate can be, for example, a transparent substrate comprising one of glass or plastic. The black mask can comprise a plurality of materials and/or layers comprising glass or a transparent polymeric material that allows viewing of images through the substrate. With continued reference to FIG. 9, the black mask structure can be configured to absorb optically inactive regions (such as regions between pixels and/or regions in the vicinity of pixel corners where the mechanical layer is curved to improve the optical properties of a display device). Ambient or stray light "In addition, the black mask structure is electrically conductive and can be configured to function as an electrical bus layer. As mentioned above, the black mask structure can comprise a plurality of layers. In block 106, a dielectric layer is provided over the black mask. The dielectric layer can be used to electrically isolate portions of the black mask from one or more subsequent deposited layers. The dielectric layer can be any suitable electrical insulator including, for example, cerium oxide (Si〇2), cerium oxynitride (SiON), and/or tetraethyl orthophthalate 163409.doc -33- 201248291 (TEOS) . </ br>

The middle column provides, for example, electrical contacts. As will be further described below, the procedure 1 illustrated in Figure 9 is not formed in the continuing electrical layer of block 1 to 8 to the one of the black mask. The guide needs to include a via for each pixel of the interferometric modulator array. In fact, only one of the pixels of the array may be provided with a conducting body to improve the fill factor. In block 110, an optical stack is formed over the dielectric layer and the via. The optical stack includes a fixed electrode, and a portion of the optical stack known above the conductive body can be used to make an electrical connection between the fixed electrode and the black mask. The program 100 illustrated in FIG. 9 is in the block. 112 continues with a sacrificial layer formed over the optical stack. The sacrificial layer is then removed to form a gap. Forming the sacrificial layer over the optical stack can include depositing a fluorine etchable material such as molybdenum (Mo) or amorphous germanium (a-Si) with a thickness selected to provide a thickness of one of a desired size after subsequent removal. . Multiple sacrificial layers can be deposited to achieve a plurality of gap sizes. For example, for an IMOD array, each gap size can represent a different reflected color. In block 114, one of the anchor holes offset from the via is formed in the sacrificial layer. The anchoring hole can be formed by removing the sacrificial layer in a portion near a corner of one of the pixels. As will be described in more detail below, the anchoring holes can be used to form a post for supporting a subsequent deposition mechanical layer and/or to allow a self-supporting mechanical layer to contact the optical stack and/or another layer. The anchor hole formed in the block I63409.doc • 34 · 201248291 114 is not aligned with the conductive body formed in the block ” ” ” ” ” ” ” The anchoring aperture has a smaller dimension relative to one of the schemes in which the conducting body overlaps the anchoring aperture 'this is because the misaligned aperture need not include additional margin to account for alignment with the conducting body. Reducing the size of the anchoring aperture can help improve the fill factor of the interferometric array of modulators'. This is because reducing the size of the anchoring aperture allows for reducing the area of the optically inactive black mask disposed at the corners of the pixel. . The procedure illustrated in Figure 9 is continued at block η6 to form a mechanical layer. As previously described, the mechanical layer can be formed by one or more deposition steps in conjunction with one or more patterning, masking, and/or etching steps. The process 100 illustrated in Figure 9 continues at block 118 to form a cavity or gap. The gap can be formed by exposing a sacrificial material, such as a sacrificial material deposited in the block 丨丨2, to an etchant. For example, the etchable sacrificial material can be removed by dry chemical etch, such as molybdenum, tungsten, poly-Si or single crystal germanium (s-Si). After the sacrificial layer is removed, the mechanical layer is typically released by applying a voltage between the fixed electrode and the mechanical layer and the mechanical layer is moved between the intermeshing position and a relaxed position by electrostatic force. The mechanical layer can be anchored to the black mask a formed in block 104 at a pixel, &lt; - Part of the optical stack above.隹 Wan block 119 ends the diagram illustrating the procedure 丨〇〇. The details can be as follows. Many additional steps may be taken before, during or after the illustrated sequence, but this step is omitted for clarity. μ寻超 163409.doc -35- 201248291 Figure 10A to i〇R show the manufacture of an interference measurement modulator &lt; An example of a cross-sectional schematic solution of each step in a method. In Fig. 1A, a black mask structure 23 has been provided on a substrate 20. As noted above, the substrate 20 can comprise a variety of transparent materials. One or more layers may be provided on the substrate prior to providing the black mask junction (10). For example, as shown in FIG. 1A, an etch stop layer 122 has been provided prior to providing the black mask structure 23 to serve as an etch stop when patterning the black mask. In some embodiments, the etch stop layer 122 has an aluminum oxide layer having a thickness in the range of from about 50 to 25 Å (e.g., about 160 A). The black mask structure 23 can be configured to absorb ambient or stray light in optically inactive regions (e.g., between pixels) to improve the optical properties of a display device by increasing the contrast ratio. Additionally, the black mask structure 23 can be electrically conductive and can be configured to function as an electrical bus layer. With continued reference to Figure 10A, the black mask structure 23 can include one or more layers. In some embodiments, the black mask structure 23 includes an optical absorber layer 23a, a dielectric layer 23b, and a bus layer 23c. In some embodiments, a MoCr layer is used as the optical absorption layer 23a, a SiO 2 layer is used as the dielectric layer 23b, and an aluminum alloy layer is used as the bus layer 23 c, wherein one of the thicknesses of the layers is respectively (for example) Approximately 30 A to 80 A, 500 A to 1000 A and 500 A to 6000 A in the park. FIG. 10B illustrates providing a forming structure 126 over the substrate 20. The shaped structure 12 6 can comprise a buffer oxide layer, such as SiO 2 (Si 〇 2) » The shaped structure 126 can have a thickness, for example, in the range of about 500 A to 6000 A. The forming structure 126 can help by filling the sink 163409. Doc •36- 201248291 The gap between the flow structure or black mask structure 23 to maintain a relatively flat profile across one of the substrates. However, as will be described in greater detail below, the forming structure 126 can overlap a portion of the black mask structure 23 to aid in forming a kink in the casing layer. In particular, one or more layers (including mechanical layers) may be deposited over the shaped structure 126, thereby substantially replicating one or more geometric features of the shaped structure 126. For example, as illustrated in FIG. 10B, the forming structure 126 can overlap the black mask structure 23 to form a protrusion 129 that can create a conformal layer in a subsequent deposition conformal layer such as a mechanical layer. Extend the wave or kink up. While the various electromechanical systems devices illustrated herein are shown and described as comprising a shaped structure 126, one of ordinary skill in the art will recognize that the method of forming a mechanical layer as described herein is applicable to the lack of a process for forming the structure U6. Figure i〇c illustrates the provision of a spacer or dielectric layer 35. The dielectric layer 35 may comprise, for example, cerium oxide (Si 〇 2), cerium oxynitride (si 〇 N), and/or tetraethyl orthophthalate (TEOS). In some embodiments, the thickness of the dielectric layer 35 is in the range of about 3000 A to 6000 A, however, the dielectric layer 35 can have a variety of thicknesses depending on the desired optical properties. As will be described in further detail below with reference to Figures 1A and 10F, it may be removed over the black mask structure 23 ("upper" here refers to the side of the black mask structure opposite the substrate 2") The dielectric layer 35 is configured to allow formation of a conductive body for electrically connecting a fixed electrode to the black mask structure 23. FIG. 10D illustrates providing a color enhancement structure 134 over the dielectric layer 35. The color enhancement structure 134 can be selectively provided at various pixel junctions 163409. Doc •37· 201248291 Above the structure. For example, in a multi-color interference measurement modulator implementation employing multiple gap heights, a color enhancement structure 134 can be provided on a modulator having a particular gap size. In some embodiments, the color enhancement structure 134 is a layer of cerium oxynitride (Si〇N) having a thickness ranging from about 1500 A to about 2500 A (e.g., about 1900 A). The SiON layer can be patterned using any suitable technique, including, for example, an etching procedure using one of tetrafluoromethane (Cf4) and/or oxygen (?2). One or more layers may be provided on the dielectric layer 35 prior to providing the color enhancement structure 134. For example, as shown in FIG. 10D, an etch stop layer 135 has been provided prior to providing the color enhancement structure 134. In some embodiments, the etch stop layer 135 has a range of between about 50 A and 250 A ( For example, a layer of alumina having a thickness of about 'about U0A. FIG. 10E illustrates the formation of a via 138 in the dielectric layer 35. As will be described in more detail below, the via 138 can allow a subsequent deposited layer to contact the black mask structure 23 » as shown in Figure 10E, without the need to include a via above each of the black masks 23. The fact that the conductors can be placed periodically in the interferometric transducer increases the fill factor of the array. 10F and 10G illustrate the formation of an optical stack 16 over the dielectric layer 35 and the via 138. The optical stack 16 can include a plurality of layers. For example, the optical stack 16 can include a fixed electrode layer 14 (such as molybdenum chromium (MoCr)), a transparent dielectric layer 141 (such as cerium oxide (Si 〇 2)), and an etch stop layer 142 (such as alumina). (A10x)), the etch stop layer ι 42 is used to protect the transparent dielectric layer 141 during subsequent sacrificial layer squeezing procedures and/or etch during the sacrificial layer removal process. The etch stop layer i 42 can have a portion 163409. Doc -38· 201248291 Reflective materials such as various metals, semiconductors and dielectrics. The partially reflective layer can be formed from one or more sub-layers, and each of the sub-layers can be formed from a single material or a combination of materials. In some embodiments, some or all of the layers of optical stack 16 (e.g., comprising solid-state electrodes 140) are patterned into parallel strips and may form column electrodes in a display device. As illustrated in Figures 10F and 10G, one or more layers of the optical stack 16 can physically and electrically contact the black mask structure 23. For example, the conductive body 138 allows the fixed electrode 14 to electrically contact the black mask structure. 23 Figures 10H through iJ illustrate the provision and patterning of a plurality of sacrificial layers over the optical stack 16. As will be discussed below, the sacrificial layers are subsequently removed to form a gap or cavity. The use of a plurality of sacrificial layers can help to form a display device having a large amount of oscillating optical gap. For example, &gt; illustrates that various gap sizes can be produced by selectively providing a first sacrificial layer 144, a second sacrificial layer 145, and a third sacrificial layer 146. This may provide a sum-to-gap size (or "high gap") equal to the thickness of the first, second and third sacrificial layers 144 to 146 such as the sides, equal to about the second and third sacrificial layers The thickness of 145, 146 - the sum - the second gap size (or "intermediate gap") and one of the thicknesses of the third sacrificial layer 丨 46, the second gap size (or "low gap"). For - interference measurement (4) (4), a high gap may correspond to a high gap pixel, an intermediate gap may correspond to an intermediate gap pixel 'and a low gap may have a virtual i gap corresponding to a low gap pixel. Each of these pixels having different gap sizes can produce - different reflective colors. Because of A, these pixels can be referred to herein as high-gap pixels, intermediate between 163409. Doc -39· 201248291 Gap pixel or low gap pixel. Forming the first, second, and third sacrificial layers 144-146 over the optical stack 16 can include depositing molybdenum (ruthenium) or amorphous germanium (a-si). In some embodiments, the first sacrificial layer 144 is a molybdenum (Mo) layer having a thickness ranging from about 200 A to about 1000 A (eg, about 400 A), the second sacrificial layer 145 Having a layer having a thickness ranging from about 2 A to about 1000 A (eg, 'about 400 A), and the third sacrificial layer 146 having a range from about 600 A to about 2000 A layer of Mo between one of A (for example, about 1600 A). Although FIG. 10A to FIG. 10J illustrate a group in which the second sacrificial layer 145 is provided over the first sacrificial layer ι44 and the third sacrificial layer 146 is provided over the first and second sacrificial layers 144, 145. State, but other configurations are also possible. For example, the first, second, and third sacrificial layers 144 through 146 need not overlap, and more or fewer sacrificial layers can be formed to provide the desired gap size. FIG. 10A illustrates sacrificial layers 144 through 146 between patterned pixels. The sacrificial layers can be patterned in a variety of ways, including the use of an etchant such as gas (cl2) and/or oxygen (〇2). As will be described below, removing portions of the sacrificial layers 144-146 between pixels, such as at the corners of the pixels, can create anchor holes 150 that can be used to form a support Subsequent deposition of one of the mechanical layers of the column and/or aid in anchoring a self-supporting mechanical layer. The anchor hole 15〇 of the partially fabricated interference measuring modulator, which has been illustrated by the circular solution, is not aligned with the conducting body 138. Because the anchoring aperture 150 need not include additional margin to account for alignment with the conductive body 38, the conductive body 138 is anchored to the 163409. Doc • 40- 201248291 The holes 150 overlap to form an anchoring conductor, which allows the anchoring hole 150 to have a smaller width W1. Furthermore, by deflecting the conducting body 138 and the anchoring hole 150, The non-uniformity associated with anchoring holes and conductor misalignment across pixels can be avoided. Moreover, as illustrated in Figure 10L, in some embodiments, it is not necessary to include a via 138 over each of the regions of the black mask 23. In fact, the vias can be provided periodically over all of the pixels of less than one array. By reducing the width w of the anchor hole 150 and reducing the total number of the conductive bodies 138 in the modulator array by reducing the interference, the total area of the black mask 23 can be reduced, thereby improving Fill factor. Figure 10L illustrates the provision and patterning of a mechanical layer of a reflective layer Ua and a support layer 14b. The reflective layer 14a can be a reflective material comprising, for example, an aluminum alloy. In some embodiments, the reflective layer 14a comprises at about 0. 3 weight. /. To 1. Copper aluminum copper (AlCu) in the range of 0% by weight (for example, about 5%). The reflective layer 14a can be of any suitable thickness, such as a thickness in the range of from about 2 in about 500 Å (e.g., about 3 Å A). The support layer 14b can be used to assist a photolithography process by acting as an anti-reflective layer and/or to help achieve the desired mechanical flexibility of one of the fully fabricated mechanical layers. In some embodiments, the support layer 14b is a layer of cerium oxynitride (SiON) having a thickness in the range of from about 5 Å to about 1 Å (e.g., about 25 Å A). Figure 10M illustrates the provision of an etch over the support layer 14b over the transparent dielectric layer 141 on the bottom of the anchor holes 15 and over the sacrificial layers 144 to 46 on the sidewalls of the anchor holes 15A. Stop layer 154. The etching stops 163409. Doc 201248291 Layer 154 can be, for example, alumina having a thickness in the range of about loo A to about 3 〇〇a (eg, about 200 A) (eight 〇〇 layer. The etch stop layer 154 can be employed) The layers of the interference measuring device are protected from subsequent etching steps. For example, as will be described below, when the sacrificial layers 144 to 146 are removed to release the mechanical layer, the button stop layer 154 can protect the support layer from The etchant is used to remove one of the sacrificial layers M4 to 146. Figures 10N to 10P illustrate providing and patterning a first support layer 160, a second support layer 161, and a third support layer 162. The first, second, and third support layers 16 to 162 are used for various functions. For example, the first, second, and third support layers 16A to 162 may be used to form a support structure, including a pillar and And/or rivets. Further, the first, second, and third support layers 160-162 may be incorporated into all or a portion of the mechanical layer to help achieve structural stiffness corresponding to one of the desired actuation voltages and/or Or to help obtain a self-supporting mechanical layer. As illustrated in Figure 10P, the first A portion 16〇3 of the support layer 160 can be used as a support pillar for a high gap pixel and an intermediate gap pixel, and a portion 16% of the first support layer 160 can be included in a mechanical layer of a low gap pixel. The use of the first, second and third support layers 16A to 162 to provide a plurality of functions across pixels of different gap heights may improve the design of the interference measuring device. In some embodiments, the mechanical layer may Self-supporting above the symmetrical pixels and above the other pixels by one (four) or other structural struts. The sacrificial layers 144 to 146 can then be removed to form individual pixels in the interferometric array of moduli. By the first, second and third buildings 163409. Doc - 42 - 201248291 Layers 160 through 162 are selectively included in the mechanical layer above each pixel of the array to vary the thickness of the mechanical layer formed on the sacrificial layers. For example, the third supporting layer 162 may be disposed above the high gap pixel, the intermediate gap pixel and the low gap pixel, and the second supporting layer 161 may be provided above the intermediate gap pixel and the low gap pixel, and the first supporting layer 160 Can be provided above the low gap pixels. By varying the thickness of the mechanical layer across the heights of the different gap heights, the desired hardness of the mechanical layer can be achieved for each gap height. For color display applications, this can help to allow the same pixel for different size air gaps. Dynamic voltage. The first, second and third support layers 160 to 162 may be formed by a dielectric material such as yttrium oxynitride (SiONO). In some embodiments, each of the thicknesses of the first, second, and third support layers 16A through 162 can range from about 600 A to about 3000 A (e.g., about 1 A). Figure 10Q illustrates the provision and patterning of a cap layer 14c to form a complete mechanical layer 14. The cap layer 14c may be conformally provided over the support layers 162 and may have a pattern similar to the pattern of the reflective layer 14a. Patterning the cap layer Me is similar to the patterned reflective layer... can help balance the stress in the mechanical layer 14. The shaping and curvature of the mechanical layer after removal of the sacrificial layers 144 to 146 can be controlled as described below by balancing the stress in the mechanical layer μ. In addition, the equilibrium stress in the mechanical layer 14 can reduce the sensitivity of the height of the release interference modulating enthalpy to temperature. The cap layer 14c may be a metal material and may be, for example, the same material as the reflective layer 14a. In some embodiments, the cap layer comprises at about 0. 3 wt% y. 〇% by weight (for example, about wt%) 163409. Doc-43-201248291 Copper aluminum copper (AlCu), and the thickness of the cap layer 14c is selected to be in the range of about 200 A to about 500 A (e.g., about 300 A). As noted above, the mechanical layer 14 can include a plurality of layers across different pixels of the interferometric array of interferometric measurements. Additional details of the mechanical layer 14 can be as follows. Figure 10R illustrates the removal of the sacrificial layers 144 through 146 to form a first or high gap 19a, a second or intermediate gap 19b, and a third or low gap 19c. Additional steps may be employed prior to forming the first gap 19a, the second gap 19b, and the third gap 19c. For example, sacrificial relief holes may be formed in the mechanical layer 14 to aid in the removal of the sacrificial layers 144-146. The gaps 19a to 19c can be formed by exposing the sacrificial layers 144 to 146 to a surname as described above. The sacrificial layer can be exposed for effective removal (typically selectively removed relative to the structure surrounding the gaps 19a-19c). Other selective etching methods can also be used, such as wet etching and/or plasma etching. The button stop layer 154 protects the first support layer 16 from the sacrificial release chemistry used to remove the sacrificial layers 144-146. This may allow the first floor layer 160 to be one of the structural materials that will otherwise be chemically etched by the release of the sacrificial layer. The dielectric cap layer 142 can protect layers of the optical stack 16 (such as the dielectric layer 141) from sacrificial release chemistry to remove the sacrificial layers 144-146. The inclusion of the dielectric cap layer 142 can help reduce or prevent damage to the optical stack during release, thereby improving optical performance. The first, second and third gaps 19a to 19c may correspond to interference measurements 163409. Doc •44· 201248291 Enhance the cavity of different colors. For example, the first, second, and third gaps 19a through 19c may have heights selected to enhance interference, e.g., blue, red, and green, respectively. The first or high gap 19a can be associated with a first or high gap pixel 172a, the second or intermediate gap i9b can be associated with a second or intermediate gap pixel 172b, and the third or low gap i9c can be associated with A third or low gap pixel 172c is associated. To allow substantially the same actuation voltage to fold the mechanical layer for each gap size, the mechanical layer 14 may comprise different materials, different numbers of layers, or different thicknesses over each of the gaps 19a through 19c. Therefore, as shown in FIG. 1A, the mechanical layer 14 may include a reflective layer 14a, a support layer i4b, an etch stop layer 154, a third support layer 162, and a cap layer 14c in a portion above the high gap 19a, and the mechanical layer. 14 may further include a second support layer 161 at a portion above the intermediate gap 19b. Similarly, the mechanical layer 14 may further include a first support layer at a portion above the low gap 19c as compared to a portion of the mechanical layer 14 above the high gap 19a. 160 and a second support layer 16i. As described above, the first, second, and third support layers 16A through 162 can provide different functions across the different ranges of the interferometric modulator P train. For example, the first support layer 160 can be used to support the mechanical layer 14 above the low gap pixels and increase the structural stiffness of the low gap pixels. In addition, the second supporting layer (6) can support the mechanical layer 14 on the intermediate gap pixel and the low gap pixel; Τ increase the structural rigidity of the intermediate gap pixel and the low gap pixel, and the third floor 162 can be used to increase the low gap pixel Structural rigidity of intermediate gap pixels and high gap pixels. Therefore, the first portion (10) of the first support layer 16A is used to support the mechanical layer 14 in the height and middle 163409. Doc -45 - 201248291 A column above the gap 19a, 19b, and the second portion 160b of the first support layer 16 is contained in the mechanical layer 14 above the low gap 19c. The use of a plurality of slabs allows substantially the same actuation voltage to be indexed for each gap size. After removing the sacrificial layers 144 to 146, the mechanical layer 14 can be displaced.  A launch height is achieved away from the substrate, and the shape or curvature can be changed at this time for a variety of reasons, such as residual mechanical stress. As described above, the cap layer 14c can be used with the reflective layer 14a to help balance the stress in the mechanical layer when the mechanical layer is released. Accordingly, the cap layer 1 complement may have a thickness, composition, and/or stress selected to assist in modulating the emission and curvature of the mechanical layer after removal of the sacrificial layers 144-146. Furthermore, a mechanical layer 14 is provided over the forming structure 126 and in particular above the projection 129 of the figure ι, in which a kink is formed by controlling the thickness of the forming structure 126 to control the geometric characteristics of the kink pi, Thereby the stress in the mechanical layer 14 is controlled. Controlling the emission height allows for the selection of a particular gap size (the desired gap size from a manufacturing and optical performance perspective). The anchoring holes 15A of FIG. 10K are not aligned with the conductive body 138 as described above. Thus, as shown in Fig. 10R, the mechanical layer 14 is anchored to the optical stack 16 above the black mask 23 at a point offset from the conductive body Π8. As described above, the mechanical layer 14 is anchored at a point offset from the conductive body 138 relative to a design in which the mechanical layer 14 is anchored above the black mask 23 in the same region as the conductive body is positioned. A smaller black mask 23 can be allowed, for example, by having the conductive body 138 self-anchoring one of the mechanical layers 14 to anchor the aperture 163409. Doc • 46 · 201248291 Shift, the size of the anchor hole does not need to have an increased area to account for alignment with the process of the conductor 138. In addition, the non-uniformity associated with the anchor holes and the misalignment of the vias across the pixels can be avoided by offsetting the vias 38 from the anchor holes used to secure the mechanical layer 14. Therefore, the fill factor of the interferometric modulator array can be improved by shifting the via 138 from the misaligned aperture. Further, as illustrated in Figure 10R, the conductive body 138 need not be included in each pixel. The reality system can provide a conducting body over all of the pixels of less than one array. For example, as shown in Figure 10R, a conductive body 138 is already included near one of the corners 123 of the high gap pixel 172a. Further, a via is not included at the corner of the intermediate gap pixel 17 or the low gap pixel 172c. By providing a conducting body for less than all of the pixels of the array, the total number of conductive bodies in the array of interferometric modulators can be reduced&apos; and the total area of the black mask 23 can then be reduced. Since the black mask 23 is optically opaque, reducing the total area of the black mask 23 improves the fill factor of the pixel array. As illustrated in Figure 10R, the black mask 23 has a larger footprint than one of the footprints of the structure used to support the mechanical layer 14. For example, the first portion 160a of the first support layer 160 operates as one of the support pillars for the portion of the mechanical layer 14 associated with the high gap pixel 172a, and has a smaller black mask 23 at the corner 隅123 of the high gap pixel 172a. One width of the width. The additional width of the black mask 23 around the anchoring region of the mechanical layer can shield a curved portion of the mechanical layer 14 during actuation. For example, when the mechanical layer 14 is actuated, although a majority of the mechanical layer 14 can be aligned in a plane and can be in contact with the optical stack 16, one portion of the mechanical layer 14 (eg, along the edge of a pixel) may not be optical Stack 16 contacts, and therefore may not provide additional black 163409. Doc 201248291 In the case of a color mask, the interference measurement produces an undesired color. Portions of the mechanical layer 14 that are not in contact with the optical stack during actuation may be added for pixels having a larger gap height. For example, the curved region of the high gap pixel n2a may be larger than the curved region of the low gap pixel 172c because the gap i9a is larger than the gap 19c. In some embodiments, a conduction system such as via 138 is included at one or more corners of the largest gap size pixel. Positioning the conductive bodies 138 near the corners of the pixels of the largest gap size may be advantageous because the high gap pixels may have a larger curved area in the actuated state, and thus relative to the intermediate gap pixels and the low gap pixels There may be a large optical inactive area at the pixel corner 。. Thus, in some embodiments, the black mask can be larger at the corners of the high-gap sub-pixels to account for larger hip-curved regions and provide space for a conductive body. However, since it is not necessary to include a via for each pixel of the array, the total area of the black mask 23 can be reduced and the fill factor of the interferometric modulator array can be improved. The conductive bodies, such as the conductive body 138, can have a variety of shapes and sizes. For example, the conductive bodies can be shaped as a circle, an ellipse, an octagon, and/or any other suitable shape. The size of the conductors can vary with the process. In some embodiments, each of the vias 138 has an anode. 5 μίη to about 3. In the range of 0 μπι (for example, about 2. 4 μιη) One of the maximum widths. Additional details of the conductors can be as follows. Figures 11A through 11C show examples of schematic views of various cross-sectional measurement modulator arrays. In Fig. 11A, an interference measurement modulator array 180 is illustrated. The interferometric modulator array 180 includes a plurality of different spaces 163409. Doc • 48· 201248291 The gap size pixel includes a first gap or high gap pixel 174a, a second gap or intermediate gap pixel 1 74b, and a third gap or low gap pixel 174c. The contour, intermediate and low gap pixels 174a through 174c can be similar to the high, middle and low gap pixels 172a through 172c of Figure 10R. However, the contour, middle and low gap pixels 174a through 174c need not be identical to the contour, intermediate and low gap pixels 172a through 172c. As shown in Fig. 11A, a conductive black mask is disposed on the substrate at each corner of the contour, intermediate and low gap pixels 丨 74 &amp; 174c. Although not illustrated in Figure 11A, a dielectric layer has been provided over the black mask and an optical stack comprising a fixed electrode has been provided over the dielectric layer. A conductive body 138 is used to electrically contact the fixed electrodes of the optical stack to respective portions of the black mask 23. The mechanical layer 14 is positioned over the optical stack to define the gap height of the high, intermediate, and low gap pixels 174a through 174c. The mechanical layer 14 is anchored above the black mask 23 at each of the corners of the equal, intermediate, and low gap pixels 174a through 174c. For example, the high-gap pixel 17A includes four corners 123a to 123d, and the mechanical layer is at the anchor hole i5〇a of each of the four corners 123&amp;, 23b 123 (1 and 123d, respectively) 150b, 150c and the measurement are above the optical stack. As described above, the mechanical layer 14 can be anchored over the black mask in a number of ways. For each pixel of the array (10), surround each pixel-per-pixel The area of the black mask 23 does not need to be the same. In fact, for a pixel having a relatively large gap (such as a pixel with a maximum gap size), the area of the black mask at the -pixel corner 可 can be larger. Machine 163409 added during the actuation period. Doc -49· 201248291 Mechanical bending. For example, the area of the black mask at each of the corners 123 to 123d of the high gap pixel l74a is larger than the area of the black mask at the corner 隅123e of the intermediate gap pixel (10) and the black mask is at the corner of the low gap pixel 17乜. The area of 123f. As shown in Fig. 11A, an additional portion or protrusion of the black mask at the corner 隅123a of the high gap pixel 174a can be used to provide the via 138. With continued reference to FIG. 11A, in some embodiments, the conductive body 138 is positioned at one of the corners of the high gap pixel 174a adjacent to an intermediate gap pixel. However, as will be described below with reference to Figures 11B and lie, the conductive body 38 can be provided at other locations and/or at a plurality of corners of the high gap pixel. The distance from the center of the anchor hole to the edge of the pixel to the edge of the black mask may vary depending on the gap height of one pixel. For example, the distance from the edge of the black mask to the center of the anchor hole of a high gap pixel along a line may range from about 10 μm to about 12 μΐη2, and the edge from the black mask reaches a low or middle along the line. The distance d2 of the center of the anchor hole of the gap pixel may range from about 7 μm to about 9 μm. Continuing to refer to Fig. 11A', in addition to providing a black mask 23 at the pixel corners, a black mask 23 may be included in other regions of the pixel, such as along the edges of the pixels. Black mask regions along the edges of the pixels can also be used to provide electrical connections along a column or row and can include breaks along one or more edges of each pixel to provide the desired electrical connection capability. For example, the black mask 23 includes a break along one of the edges bordering the high gap pixel 174a and the low gap pixel 174c. In some embodiments, the cleavage has a length in the range of from about 2 μηι to about 3 μηι. 163409. Doc • 50· 201248291 As described above, the interferometric array 180 includes a conductive body that is offset from the wrong pupil or other structure used to secure the mechanical layer 14. For example, at the corner 隅123a of the high gap pixel 174a, the via 138 is offset from the anchor hole 15〇&amp; In some embodiments, the distance from the conductor to the center of the anchoring hole to which the mechanical layer is secured ranges from about 6 μΓη to about 8 _. The viewing of the conductive body 138 and the anchoring aperture may allow the anchoring aperture to have a smaller area relative to the one in which the conductive body overlaps the anchoring aperture to form an anchoring conductor when viewed from above. For example, the anchor hole 5〇a need not include an additional margin to account for alignment with the via 138 disposed at the corner 隅123a of the high gap pixel 174a. In some embodiments, a circular conductor and a circular misalignment are used, which is Jinding? The radius of Ll5〇a is in the range of about 4 μηι to about 7 (four) and the half (four) of the conductive body 138 is in the range of about 2 to about 4 μm. These conductors can be provided at the _ corner of each high-gap pixel in Figure 11A. For example, the high gap pixel 174a includes a conducting body &quot;8&apos; at a first corner 隅123&amp; but does not include a conducting body at the second, third, and fourth corners 隅123b to 123d of the high gap pixel 174a. Figure 11B illustrates an interferometric modulator array 182 of Figure 11B in accordance with another embodiment. The interferometric modulator array 182 of Figure 11B is similar to the interferometric modulator array of Figure ha! The modulating array (8) includes a conducting body at two corners of each high-gap pixel. For example, the high gap pixel 174a includes a via at the first corner and the second corner (10)! 38, but a conducting body is not included in the third corner of the high gap pixel (10) and the fourth corner 隅123d. I63409. Doc * 51 - 201248291 Figure lie illustrates an interference measurement modulator array 184 according to yet another embodiment. The interferometric modulator array 184 of Figure lie is similar to the interferometric modulator array 18A of Figure 11A, except that the interferometric modulator array 184 includes a conducting body at each of the four corners of each high gap pixel. except. For example, the high gap pixel 174a includes a via 138 at the first, second, third, and fourth corners 123a through 1253d. One of ordinary skill in the art will appreciate that other configurations of the conductors 138 other than the configuration of the vias 138 illustrated in Figures 11A-11C are also possible, including, for example, each high gap pixel. There is one configuration of three conductors, wherein both the high gap pixel and the intermediate gap pixel comprise one configuration of the conductor and/or any other suitable configuration. Figure 12 shows an example of a flow chart illustrating one of the manufacturing procedures 19 of an interference measurement modulator. The program 19 begins at block 191. In block 192, a black mask is formed over a substrate. The substrate can be, for example, a transparent substrate, and the black mask structure can be electrically conductive and configured to absorb ambient or stray light in the optically inactive pixel region. The black mask shields each corner of each pixel in the pixel array of the interferometric transducer. Additional details of the black mask can be as described above. In block 193, a dielectric layer is provided over the black mask. The dielectric layer can be used to electrically isolate the black mask from one or more subsequent deposited layers. The dielectric layer can be any suitable electrical insulator including, for example, cerium oxide (SiO 2 ), cerium oxynitride (SiON), and/or tetraethyl orthophthalate (TE 〇s). Additional details of the dielectric layer can be as previously described. The routine 190 illustrated in Figure 12 continues at block 194, where the mediation is at 163409. Doc •52· 201248291 An optical stack is formed above the electrical layer. As noted above, the optical stack of an interferometric transducer can be electrically conductive, partially transparent, and partially reflective, and can include a fixed electrode for providing electrostatic operation to the interferometric modulator device. In block 195, a mechanical layer is formed over the optical stack. Forming the mechanical layer can include providing a sacrificial layer; depositing _ or a plurality of layers over the sacrificial layer; and removing the sacrificial layer to release the mechanical layer. Continuing with reference to Figure 12, the process 190 continues at block 196 where the mechanical layer is anchored above the optical stack at each corner of each pixel of the array. For example, a support post can be formed at a corner of a pixel and the support post can be used to anchor the mechanical layer above the optical stack at the corners of the pixel. However, the mechanical layer can be anchored in other ways as described above. In block 198, a conductive via is provided in one of the pixels of the array. The conductive via system is in the dielectric layer and electrically connects the fixed electrode to the black mask. The conduction system is disposed at one corner of the pixel and is offset from where the mechanical layer is anchored above the optical stack in an optically inactive region of the pixel. Compared with one of the conductors and one of the mechanical layers, one of the designs is designed to allow the conductor to be offset from the position at which the mechanical layer is anchored at the corner of the pixel to allow a smaller black mask. . Additional details of the biasing conductor can be as previously described. The method ends at block 199. Figure 13A shows an example of a schematic plan view of an interferometric modulator array 2〇〇. The illustrated interferometric device array 200 includes a first or south gap pixel 202a, a second or intermediate gap pixel 202b, and a 163409. Doc • 53- 201248291 Second or low gap pixel 202c, a mechanical layer 14, a black mask 23, an anchor hole 150, and a conductive body 138. Although not illustrated for improved pattern definition, a dielectric layer has been provided over the mask 23 and an optical stack of one of the fixed electrodes has been provided over the dielectric layer. The conductive bodies 138 are for electrically contacting the fixed electrodes of the optical stack to respective portions of the black mask 23. The black mask 23 is arranged at the corner of each pixel and along the edge of the pixel. P knife. The black mask 23 can be used to provide electrical connections along a column or row and can include breaks along one or more edges of each pixel to provide the desired electrical connection capability. For example, the black mask 23 includes one of the edges that are bordered by the high gap pixel 2〇2a and the intermediate gap pixel 202b. In some embodiments, the fractures have a length d3 in the range of from about 2 μηι to about 4 μηη. With the pixel array (4) of Figures UA through UC, the pixel array 200 of Figure 13a includes a via disposed along the edge of the pixel. For example, one of the edges of the high-gap pixel 2, which is bordered by the intermediate gap pixel, is placed in the high-gap pixel 202a, and one of the channels 2〇4 of the color-reducing mask 23 is a conductive body. As shown in Fig. 13A, in this embodiment, it is not necessary to include a via at the pixel corner 。. The fact ‘ can include a via 138 along the edge of the pixel, and the via 138 can be offset from the edge of the pixel in one of the directions toward the center of the pixel. Providing the vias 138 along the edges of the pixels (rather than at the corners of the pixels) in this manner can help improve the fill factor of the interferometric measuring device by reducing the area of the black mask used to mask the corners of the pixels. As shown in Figure ,, not all pixel edges need to include a turn-on 163409. Doc -54· 201248291 Body. For example, as shown in Figure UA, a via can be provided only in high gap pixels. In some implementations, the high-gap pixels are included in the high-gap pixels according to the edge of the high-gap pixel that is connected to the intermediate gap pixel. The via 138 may be disposed in a channel of the black mask extending along the edge of the pixel, and one side of the channel including the via 138 may include a black mask block or bump 2 that surrounds the footprint of the via 138. 3. By including bumps 2G3 in the black mask channel, the conductive bodies 138 can become more robust to process variations. For example, the black mask bumps 2〇3 can reduce topological variations in the area surrounding each of the vias 138, thereby reducing manufacturing variations associated with depositing a conformal layer over the vias. As shown in Fig. 13A, the vias and bumps can be arranged in high gap pixels. Since the high-gap pixel can contribute a lower reflectance than the low and intermediate-gap pixels, it has a one-bump design in a middle and/or low-gap pixel, and the bump is provided in a high-gap pixel to generate brightness. Smaller impact. In some embodiments, such as the embodiment illustrated in Figure 13A, the &apos;conductor 138 is positioned about one-half of the length along one of the pixel edges of the high gap pixel 2〇2a. However, the via 138 can be provided in other locations along one of the edges of the pixel. In some embodiments, the via 138 is; t-bit 9 is between about 1/3 to about 2/3 of the length of the pixel edge. Figure 13B shows an example of a cross-sectional unintended solution taken along the line of the interferometric modulator of Figure 13A. The cross section includes a high gap pixel 2〇2a, an intermediate gap pixel “hole, substrate 2〇, black mask channel 2〇4, black mask protrusion 2〇3, conductive body 138, #刻止层122, shaped junction 163409. Doc • 55· 201248291 structure 126, dielectric layer 35, color enhancement structure 134, etch stop layer 135, optical stack 16, high gap 19a and intermediate gap i9b, reflective layer 14a, support floor 14b, etch stop layer 154, The second and third support layers 161, 162 and the cap layer 14c. Additional details of the contour gap and intermediate gap pixels 202a, 202b may be similar to the detail β previously described.  In some embodiments, the width d4 of the black mask from the edge of the protrusion 203 to the edge of the high gap pixel 202a adjacent to the intermediate gap pixel 202b is in the range of about 3 μηι to about 4 μηη, and does not have In a region of the black mask of the protrusion 2〇3, the width ds from the edge of the black mask to the edge of the same pixel is in the range of about 2 μm to about 3 μm. The protrusion 203 may have any suitable area. . In embodiments in which a portion of the raised circle is circular, the radius of the projection is in the range of from about 3 μηι to about 5 μηη. The distance d6 from the edge of the conductive body 138 to the edge of the black mask bump 2〇3 can be selected to reduce the topological variation of the region surrounding the via 丨38. For example, the conductive bodies 138 can cause a topological change in the subsequent deposition of a conformal layer, such as layers from the optical stack 16 to the cap layer 14c. By increasing the distance, the topology can be reduced. In some embodiments, the distance is selected to be in the range of from about 2 μηη to about 3 μηι. The conductive body 138 can be offset from the edge of the pixel by any suitable distance in one direction toward the center of the pixel. In some embodiments, the distance d from the center of the conductive body 138 to the edge of the high gap pixel 2〇2a bordering the intermediate gap pixel 202b is in the range of about 1 μηι to about 3 μηη. Figure 14 shows an example of a flow chart illustrating one of the manufacturing procedures of an interference measurement modulator. The program 210 begins at block 211. At block 163409. Doc • 56- 201248291 212, a black mask is formed over a substrate. The substrate can be, for example, a transparent substrate, and the black mask structure can be configured to absorb ambient light or stray light in an optically inactive area, such as an area between pixels, and can conduct electricity. The black mask can mask each corner and at least one edge region of each pixel in the pixel array of one of the interference measurement modulators. The additional details of the black mask can be as previously described. In block 214, a dielectric layer is provided over the black mask. The dielectric layer can be used to electrically isolate the black mask from one or more subsequent deposited layers. The dielectric layer can be any suitable electrical insulator including, for example, silica (Sl 2 ), bismuth oxynitride (SiON), and tetraethyl orthophthalate (TEOS). Additional details of the dielectric layer can be as previously described. With continued reference to Figure 14, the process 210 continues at block 216 where an optical stack is formed over the dielectric layer. As noted above, the optical stack of the interferometric transducer can be electrically conductive, partially transparent, and partially reflective, and can include a fixed electrode for providing electrostatic operation to the interferometric modulator device. In block 218, a mechanical layer is formed over the optical stack. Forming the mechanical layer can include: providing a sacrificial layer; depositing one or more layers over the sacrificial layer; and removing the sacrificial layer to release the mechanical layer. The process 21 illustrated in Figure 14 continues at block 220 where the mechanical layer is tinned over the optical stack at each corner of the matrix, for example, as described above, a support post can be formed The corners of the pixels 隅, p, may be used to record the mechanical layer above the optical stack at the corners of the pixel and/or the mechanical layer may be self-supporting. In block 222, a via is provided in one of the pixels of the array. The 163409. Doc • 57· 201248291 The conduction system is disposed in the dielectric layer and electrically connects the fixed electrode to the black mask. The conduction system is disposed along one of the edges of the pixel and offset from the edge of the pixel in a direction toward one of the centers of the pixels. In some embodiments, the conduction system is formed in one of the black masks from one corner of the pixel extending along an edge of the pixel to another corner of the pixel, and one side of the channel includes the via One of the occupied areas is raised. By including a protrusion surrounding the footprint of the via on one side of the black mask channel, the via can become more robust to process variations. For example, the bumps can reduce topological variations in the area surrounding the via, thereby reducing manufacturing tolerances associated with depositing a conformal layer over the via. The projections can be of any suitable shape&apos; including, for example, a portion of a circle, a hexagonal octagon, a rectangle or a ladder. In some embodiments, the protrusions can be included on both sides of the channel. The method ends at block 223. 15A and 15B show an example of a system block diagram illustrating a display device 40 including a plurality of interferometric modulators. The display device 4 can be, for example, a cellular or mobile phone. However, the same components of the display device 4 or slight variations thereof also illustrate various types of display devices, such as televisions, e-book readers, and portable media players. The display device 40 includes a housing 41, a display 30, an antenna 43, a speaker 45, an input device 48, and a microphone 46. The outer casing 41 can be formed by any of a variety of manufacturing procedures, including injection molding and vacuum forming. In addition, the outer casing 41 can be made of any of a variety of materials including, but not limited to, plastic, metal 'glass, rubber and ceramic, or a combination thereof. The housing 41 can include a removable portion (not shown) that can be removed 163409. The doc -58- 201248291 section can be interchanged with other removable parts of different colors or with different logos, images or symbols. As described herein, display 30 can be any of a variety of displays, including bistable or analog displays. The display 30 can also be configured to include a flat panel display (such as a plasma, anus, OLED, STN LCD, or TFT LCD) or a non-flat panel display (such as a _CRT or other tube device), as described herein, The display 3A can include an interference measurement modulator display. The assembly of the display device 4 is schematically illustrated in Figure 15B. The display device 40 includes a housing 41' and can include at least partially enclosed in the housing Additional components. For example, the display device 4A includes a network interface 27 including an antenna that is consuming to the transceiver 47. The transceiver 47 is coupled to the processor 21, the processor 21 The control hardware 52 is coupled to the adjustment hardware 52. The adjustment hardware 52 can be configured to adjust a signal (eg, an adjustment signal 52 is coupled to a speaker 45 and a microphone W. The processor 21 is also coupled to an input device such as a driver controller 29. The driver controller 29 is coupled to a frame buffer 28 and an array driver 22' which in turn is coupled to the display array 3A. A power supply H5G can be Power is provided to all components for a particular display device 4() design. The network interface 27 includes an antenna 43 and a transceiver 47 such that the display device can communicate with - or multiple devices via a network. Interface η may also have some processing power to avoid, for example, data processing requirements of processor 21. Antenna 43 may transmit and receive signals. In some embodiments, the I63409. Doc •59- 201248291 Antenna 43 according to IEEEl6. 11 standard (including IEEE1611(a)'(b) or (g)) or IEEE 802. The 11 standard (including IEEE 8〇2 Ua, b, g*n) transmits and receives radio frequency (RF) signals. In some other implementations, the antenna 43 transmits and receives rF signals in accordance with the BLUETOOTH standard. In the case of a cellular telephone, the antenna 43 is designed to receive code division multiple access (CDMA), frequency division multiple access (FDMA), time division multiple access (TDMA), Global System for Mobile Communications (GSM). , GSM/General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Terrestrial Relay Radio (TETRA), Wideband CDMA (W-CDMA), Evolutionary Data Optimization (2\^_DO), lxEV -DO, EV-DO Rev A, EV-DO Rev B, High Speed Packet Access (HSPA), High Speed Downlink Packet Access (HSDPA), High Speed Uplink Packet Access (HSUPA), Evolved High Speed Packet Storage Take (HSPA+), Long Term Evolution (LTE), AMPS, or other known signals used to communicate within a wireless network, such as one that utilizes 3G or 4G technology. The transceiver 47 can pre-process signals received from the antenna 43 such that the processor 21 can receive and further manipulate the signals, and the transceiver 47 can also process signals received from the processor 21 such that the signals are It is emitted from the display device 40 via the antenna 43. In some embodiments, the transceiver 47 can be replaced by a receiver. In addition, the network interface 27 can be replaced by an image source that can store or generate image data to be sent to the processor 21. The processor 21 can control the overall operation of the display device 40. The processor 21 receives data (such as compressed image data from the network interface 27 or an image source) and processes the data into raw image data or is easily processed into one of the original image data formats. The processor 21 163409. Doc -60- 201248291 The processed data can be sent to the drive controller 29 or the frame buffer 28 for storage. Raw material usually refers to information that identifies the image characteristics at each location within the image. For example, such image characteristics may include color, saturation, and grayscale. The processor 21 can include a microcontroller, cpu or logic unit to control the operation of the display device 40. The conditioning hardware 52 can include amplifiers and filters for transmitting signals to the speaker 45 and for receiving signals from the microphone 46. The conditioning hardware 52 can be a discrete component within the display device 4 or can be incorporated into the processor 21 or other components. The driver controller 29 can retrieve the original image data generated by the processor 21 directly from the processor 21 or from the frame buffer 28 and can reformat the original image data to enable high speed transmission to the array driver. twenty two. In some embodiments, the driver control 重新 29 can reformat the original image-bee material into a data stream having one of the raster-like formats such that it has a timing suitable for scanning across the display array. The drive controller 29 then sends the formatted information to the array driver 22. Although the -drive controller 29 (such as an LCD controller) is typically associated with the system processor 21 as a separate integrated circuit (ic), such controllers can be implemented in a multi-modal manner. For example, the controller can be embedded in the processor 21 as a hardware, embedded in the processor 21 as a software, or fully integrated into the hardware with the array driver 22. The array driver 22 can receive formatted information from the driver controller 29 and can reformat the video material into a parallel set of waveforms that are applied to the χ-y pixels from the display multiple times per second. Matrix 163409. Doc 201248291 Hundreds and sometimes thousands (or more) of leads. In some embodiments, driver controller 29, array driver 22, and display array 30 are suitable for any type of display described herein. For example, the driver controller 29 can be a conventional display controller or a bi-stable display controller (e.g., an IMOD controller). Additionally, the array driver Μ can be a conventional driver or a bi-stable display driver (e.g., a display driver). Additionally, the display array 3 can be a conventional display array or a bi-stable display array (e.g., one containing an array of im〇d arrays). In some embodiments, the driver controller 29 can be integrated with the array driver 22. This embodiment is more common in highly integrated systems such as cellular phones, watches, and other small area displays. In some embodiments, input device 48 can be configured to allow, for example, a user to control the operation of display device 40. The input device 48 can include a keypad (such as a qWERTY keyboard or a telephone keypad), a button, a switch, a joystick, a touch sensitive screen, or a pressure sensitive film or a thermal film. The microphone 46 can be configured as an input device of the display device 40. In some embodiments, voice commands through microphone 46 can be used to control the operation of the display device (10). Power supply 5G can include a variety of energy storage devices as are well known in the art. For example, the power supply 50 can be a rechargeable battery such as a nickel cadmium battery or a lithium ion battery. The power supply 50 can also be a renewable energy source, a capacitor or a solar cell (including a plastic solar cell or a solar cell paint). The power supply 5 can also be configured to receive power from a wall socket. β 163409. Doc - 62 - 201248291 In some embodiments, control programmability resides in a driver controller 29 that can be located in several locations in an electronic display system. In some other implementations, control programmability resides in the array driver 22. The above optimizations can be implemented in any number of hardware and/or software components and in various configurations. The various illustrative logic, logic blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein can be implemented as an electronic hardware, a computer software, or a combination of both, which has been generally described in terms of functionality and The interchangeability of hardware and software is illustrated in the various illustrative components, blocks, modules, circuits, and steps described above. Whether or not this functionality is implemented in hardware or software depends on the specific application and design constraints imposed on the overall system. The hardware and data processing apparatus for implementing the various illustrative logic, logic blocks, modules, and circuits described in connection with the aspects disclosed herein can be implemented or executed by a general single-chip or multi-chip processor, A digital signal processor (DSP), an application specific integrated circuit (ASIC), a programmable closed array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, etc. It is designed to perform any combination of the functions recited herein. A general purpose processor can be a microprocessor or any conventional processor, controller, microcontroller or state machine. A processor is also implemented as a combination of computing devices (e.g., a gift-microprocessor combination), a plurality of microprocessors, one or more microprocessor cores, or any other such configuration. In some embodiments, specific steps and methods may be performed by circuitry dedicated to the 弋 function. In the - or multiple aspects, the described functions can be implemented on hardware, number 163409. Doc •63- 201248291 Bit electronic circuits, computer software, and Boeing, including any combination of this description = and other structural equivalents or the like. The implementation of the subject matter can also be implemented as one of the computer program media or a plurality of computer programs (ie, one of the computer program instructions) Various modifications of the implementations described in the present invention can be readily understood by those skilled in the art, and the principles defined herein may be applied to other embodiments without departing from the spirit or scope of the present invention. The scope of the invention is not intended to be limited to the embodiments shown herein, but is in accordance with the invention, the principles and the novel features disclosed herein. The word "exemplary" is used exclusively herein. Any use of the embodiments as "exemplary" or provided as an example is not necessarily to be construed as preferred or advantageous over other embodiments. It will be readily understood that the terms "upper" and "lower" are sometimes used to facilitate the description of the schema and to indicate the relative position of the schema orientation on a suitably oriented page, and may not be reversed. The specific features of the m〇D are implemented as described in the specification. The specific features described in the background of the individual embodiments may also be implemented in combination in a single-implementation. Conversely, in the context of a single embodiment The various features described may also be implemented in various embodiments or in any suitable sub-combination. In addition, although the features may be described above as being in a particular combination and even if so initially claimed, in some cases' One or more features from the claimed combination may be excised from the combination and the claimed combination may be related to a sub-combination or a sub-combination change 163409. Doc -64 - 201248291

Similarly, the use of -~ in the drawings should not be construed as requiring the operations to be depicted in the specific/item order shown, but this operation, or the execution of all _ narration === or sequential execution of these, Can - the shape of the flow chart 4 to achieve the desired result. This and the arbitrarily, one or more exemplary procedures are intended. However, it is not depicted that its "sexuality 1" and other operations can be combined with an illustrative procedure. For example, 济+Λ ^ is one or more additional operations before, after, or at the same time as any of the illustrated operations. In some cases, multi-task processing month _ al. levee and parallel processing may be advantageous. Furthermore, the separation of the various plug-in &lt;seed system components in the above embodiments should not be understood to require this separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together. - Single-software products are applied or packaged into multiple software products. In addition, other embodiments are in the scope of the following application patents, and the actions recited in the scope of the patent can be performed in a different order and still achieve the desired result. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 shows an example of an isometric view of one of two adjacent pixels in a series of pixels depicting an interferometric transducer (IM〇D) display device. Figure 2 shows an example of a system block diagram illustrating one of the electronic devices illustrated and having a 3x3 interferometric transducer display. Figure 3 shows an example of one of the graphs of the position of the movable reflective layer and the applied voltage of the interferometric transducer of Fig. 4 shows an example of one of a table illustrating various states of an interferometric modulator when various common and segmented voltages are applied. 163409.doc -65- 201248291 Figure 5A shows an example of one of the display data frames illustrating the 3x3 interferometric transducer display of Figure 2. Figure 5B shows an example of a timing diagram for one of the common and segmented signals that can be used to write the frame of the display data illustrated in Figure 5A. Figure 6A shows an example of a partial cross-section of the interference measurement modulator display of Figure 1. Figures 6B through 6E show examples of cross sections of different embodiments of an interferometric transducer. Figure 7 shows an example of a flow chart illustrating one of the manufacturing processes of an interference measurement modulator. Figures 8A through 8E show examples of cross-sectional schematic solutions of various step segments in the method of fabricating an interference measurement modulation method. Figure 9 shows an example of a flow chart illustrating a manufacturing procedure for an interference measurement modulator. A plan of the array in the method - one of the manufacturing processes Fig. 10A to Fig. 10R show an example of a schematic diagram of a cross section of each step of manufacturing an interference measurement modulation. Figures 11A through 11C show examples of schematic solutions of various interferometric modulators. Figure 12 shows an example of a flow chart illustrating an interference measurement modulator. Figure 13A shows an example of an interference measurement modulator.

Schematic diagram of the plan view interferometric measurement modulator Figure 13B shows an example of a cross-sectional schematic of one of the arrays taken along line 13B-13B of Figure 13A. Figure 163409.doc -66 - 201248291 Figure 14 shows an interferometric measurement modulation An example of a flowchart of one of the manufacturing procedures. 1A and 1B show an example of a system block diagram illustrating a display device including a plurality of interferometric modulators. [Main component symbol description] 12 Interference measurement modulator (imod)/pixel 13 Light 14 Mechanical layer/movable reflective layer 14a Reflective sublayer/conductive layer/reflective layer/sublayer 14b Support layer/dielectric support layer/ Sublayer 14c Conductive Layer/Cap Layer 15 Light 16 Under Optical Stacking/Optical Stacking 16a Absorbing Layer/Optical Absorber/Absorber Sublayer 16b Dielectric/Sublayer 18 Column/Support/Support Column 19 Gap/Cavity 19a high gap/first gap 19b intermediate gap/second gap 19c low gap/third gap 20 transparent substrate/underlying substrate 21 processor 22 array driver 23 black mask/interference measurement stack black mask structure 163409.doc -67- 201248291 23a Optical Absorption Layer 23b Dielectric Layer 23c Confluence Layer 24 Column Driver Circuit 25 Sacrificial Layer 26 Row Driver Circuit 27 Network Interface 28 Frame Buffer 29 Driver Controller 30 Display Array / Display Panel / Display 32 Tether 34 deformable layer 35 spacer/dielectric layer 40 display device 41 housing 43 antenna 45 speaker 46 microphone 47 transceiver 48 input device 50 power supply 52 adjustment Body 60a First line time 60b Second line time 163409.doc • 68- 201248291 60c Third line time 60ά Fourth line time 60e Fifth line time 62 High segment voltage 64 Low segment voltage 70 Release voltage 72 High hold voltage 74 High address voltage 76 low hold voltage 78 low address voltage 122 etch stop layer 123 high gap pixel angle 隅123a high gap pixel angle 隅123b high gap pixel angle 隅123c high gap pixel angle 隅123d high gap pixel angle隅123e intermediate gap pixel angle 隅123f low gap pixel angle 隅126 shaped structure 129 protrusion 134 color enhancement structure 135 etch stop layer 138 conductive via 140 fixed electrode layer 163409.doc - 69 - 201248291 141 transparent dielectric layer 142 etch stop layer/dielectric protection layer 144 first sacrificial layer 145 second sacrificial layer 146 third sacrificial layer 150 anchor hole 150a anchor hole 150b anchor hole 150c anchor hole 150d anchor hole 154 Layer 160 first support layer 160a first portion of first support layer 160b second portion of first support layer 161 second support Layer 162 third support layer 171 kink 172a high gap pixel / first gap pixel 172b intermediate gap pixel / second gap pixel 172c low gap pixel / third gap pixel 174a high gap pixel / first gap pixel 174b intermediate gap pixel / Two gap pixels 174c low gap pixels / third gap pixels 180 interference measurement modulator array 163409.doc -70- 201248291 182 184 200 202a 202b 202c 203 interference measurement modulator array interference measurement modulator array interference Measurer Array Array - Gap Pixel / High Gap Pixel Second Gap Pixel / Intermediate Gap Pixel Third Gap Pixel / Low Gap Pixel Black Mask Bump 204 Black Mask Channel Common line 1 Common Line 1 Common line 2 Common Line 2 Common line 3 Common line 3 Segment line 1 Segment line 1 Segment line 2 Segment line 2 Segment line 3 Segment line 3 163409.doc 71

Claims (1)

201248291 VII. Patent Application Range: 1 · A device comprising: a pixel array, each pixel having: a substrate; a conductive black mask disposed on the substrate and at each of the four corners of the pixel And shielding an optically inactive portion of the pixel along at least an edge region of the pixel; a dielectric layer ' disposed over the black mask; an optical stack disposed over the dielectric layer, the optical The stack includes a fixed electrode; and a cavity is defined between the optical stack, the mechanical layer can pass through the cavity to move between a consistent position and a loose position, the mechanical layer being at each corner of the pixel Anchored on the optical stack, wherein the pixel array includes a first pixel, and the first pixel has a conductive layer electrically connected to the black mask in the dielectric layer, the conductive via Arranging in an optically inactive region of one of the first pixels along a position of the edge of the first pixel, and the bit i of the conductive via is spaced toward one of the centers of the first pixel The edge is offset from the first pixel. 0. The device of claim 2, wherein the pixel array further comprises a second pixel of the edge of the pixel adjacent to the first pixel, the second pixel not including the dielectric layer for The lightning is connected to the black body of the black mask. 1 pole electrical connection 163409.doc 201248291 3. A device as claimed in claim 2, wherein the cavity of the chirped pixel is at a height of the cavity of the second pixel. The device of claim 3, wherein the first pixel system, the high gap pixel and the first pixel is an intermediate gap pixel 'and wherein the pixel array is further included on a side opposite to the high gap pixel and the intermediate gap pixel a low gap pixel adjacent to the high gap pixel, and wherein the low gap pixel does not include a conductive body in the dielectric layer for electrically connecting the fixed electrode to the black mask. 5. The device of claim 3 wherein the black mask comprises a channel extending from the corner of the pixel to the one of the vias along the edge of the first pixel. 6. The device of claim 5, wherein the channel comprises a protrusion that surrounds one of the occupied areas of the conductive body. 7. The device of claim 6, wherein the channel of the raised black mask is included. The p-score has a width from one edge of the bump to the edge of the pixel. The width ranges from about 3 μηι to about 4.5 μηη. 8. The device of claim 7, wherein a portion of the first channel of the black mask that does not include the protrusion has a width from one edge of the channel of the black mask to one of the edges of the pixel, The width ranges from about 2 jaws to about 3 μηι. 9. The device of claim 3 wherein the distance from one of the centers of the conductor to the first edge is between about 1 pm and about 3 μιη. 10. The device of claim 6, wherein the black mask comprises at least one of an optical absorption layer, a dielectric layer, and a conductive bus layer. 163409.doc 201248291 11. 12. 13. 14. 15. 16. If the request item 1 〇&gt;# 〈褒置' where the conduction system is used in the dielectric layer for the black cover, the seed 10 The child's conductive busbar is electrically connected to the optical stator - open U. As the request item 丨丨&gt;#教置, it further includes being configured to apply - one of the voltages, a pseudo-anaesthetic band A, and a hard-pressed love 1: path 'where at least a portion of the mechanical layer is substantially applied when the bias voltage is applied The upper side is parallel to the substrate. The device of claim 1, further comprising: a display; a processor configured to communicate with the display, the processor configured to process the image material; and A memory device configured to communicate with the processor. The device of claim 13, further comprising: a driver circuit configured to transmit at least one signal to the display; and a controller configured to send at least a portion of the image data to the driver Circuit. The apparatus of claim 14, further comprising configured to transmit the image data to an image source module of the processor. A method of forming a display device having a plurality of pixels, comprising: depositing a conductive black mask on a substrate, the black mask being at each of four corners of each pixel and along each pixel At least one edge region obscuring an optically inactive portion of the pixel; depositing a dielectric layer over the black mask; 163409.doc 201248291 depositing an optical stack on the dielectric layer 'The optical stack includes a fixed electrode, Depositing the mechanical layer over the optical stack, the mechanical layer defining a cavity between the mechanical layer and the optical stack; at a corner of each pixel 4, the mechanical layer is misaligned above the optical (four); and your soft coat JL y % 守通赵, the 琢 conducting body is disposed on the dielectric layer towel and electrically connecting the sinus fixed electrode to the black mask. The conducting body is disposed in the optically inactive area of the first pixel along the first In the pixel-edge-position, and wherein the position of the conductive via is offset from the edge of the first pixel in a direction toward the center of the first pixel. 17. The method of claim 16, further comprising: depositing a sacrificial layer prior to depositing the mechanical layer; and removing the sacrificial layer to form the cavity after depositing the mechanical layer, wherein the sacrificial layer has a Select to define one of the thicknesses of one of the chambers. The method of claim 17 includes the step of: forming, in each corner of the first pixel, a "reduction hole" in the sacrificial layer, each of the fixed holes being defined in each of the primes - the corner is above the optical stack (four) The machine 19. The method of claim 18, further comprising the mechanical layer in each of the support columns. Formed in the pupil 20. If the size of the request item 16 is large, i where the black mask is deposited further white, the margin extends along the edge of the first image from the edge of the pixel to the edge of the pixel. 163409.doc 201248291 The black mask of the whole body - the passage. 21. 22. 23. 24. 25. The method of claim 20 wherein the black mask is deposited further to form an area-of-area-protrusion in the channel. The method of claim 16, wherein the pixel is a high-gap pixel, and wherein the plurality of pixels are in a gap with the edge u of the first---(10) material, and wherein the plurality of pixels and the plurality of pixels A pixel adjacent to and intersecting the intermediate gap pixel _: pixel' wherein the intermediate gap and the low gap pixel are in the dielectric layer for electrically connecting the fixed electrode to one of the conductive masks. μ black has the method of claim 16, wherein it further comprises forming a reflective layer on a surface of the cavity at the mechanical level, the reflective layer and the optical stack forming an interference measuring cavity. The method of claim 23, further comprising applying a bias voltage to the optical stack such that at least a portion of the mechanical layer is substantially parallel to the substrate. An electromechanical device comprising: a plurality of pixels each per pixel comprising: a substrate; a member for absorbing light disposed on the substrate and at each of the four corners of the pixel and along the pixel At least one edge region masks one of the optically inactive portions of the pixel; a dielectric I' disposed over the optical absorbing member; and an optical stack disposed on the dielectric layer, the optical stack package I63409.doc 201248291 a fixed electrode; and a mechanical layer positioned over the optical stack to define a cavity between the mechanical layer and the optical stack, the mechanical layer being movable through the cavity to move between an actuated position and a relaxed position The mechanical layer is anchored above the optical stack at each corner of the pixel, wherein the pixel array includes a first pixel having the dielectric layer for electrically connecting the fixed electrode to the One of the members of the light absorbing member is disposed in the optically inactive region of one of the (four)-pixels along one of the edges of one of the first pixels, and wherein the position of the connecting member The spacing is offset from the edge of the first pixel in a direction toward the center of the first pixel. 26. The electromechanical device of claim 25 wherein the light absorbing member comprises a channel extending from the corner of the pixel to the connecting member along the edge of the first pixel. The electromechanical device of claim 26 wherein the channel comprises a protrusion that surrounds one of the occupied areas of the connecting member. The electromechanical device of claim 25, wherein the first pixel is a high gap pixel, and wherein the plurality of pixels further comprises an intermediate gap pixel adjacent to the first pixel along the edge of the first pixel, And wherein the complex = pixel further comprises adjacent to the first pixel and the intermediate gap image: a low gap pixel 'of the intermediate gap and the low gap comprising the dielectric layer for the fixing The electrode is electrically connected to one of the members of the black mask. 163409.doc