201246613 六、發明說明： 【發明所屬之技術領域】 本發明係有關-種光電半導體封裝結構，特別是指一種具靜 電放電保濩能力之光電半導體散熱封裝結構。 【先前技術】 現今半導體製程技術發展成熟，更進一步發展製程技術進入奈米 階段，以便於積體電路可用更小體積執行相同之事務，但是製程越 且越精密下，導致積體電路之設計須比以往更加注意靜電放電 (Electrostatic Discharge，ESD)之影響。就光電領域而言，如發光 二極體(LED)、雷射二極體⑽κ貞測器、太陽能電池、光放大器及 電晶體等光電半導體的產品，已廣泛應用在生活中的各個層面，然而， 它們也同樣需要面對日益嚴重的靜電問題。 靜電放電是由於電路之電子元件與電子元件之間作動時，電路所 累積之電荷於未達-秒的時間内釋放，因此電路即衍生出相當大 間電壓’其係通常成為電子元件損壞的元兇。以發光二極體來說，由 於發光二極體基本上為異質i晶結構，容易產生晶格缺陷，導致 賴能力通常只能達到4GG〜酬伏特左右，而在製造程序或使用/上， 常會因為靜電放電作用而導致元件損毁，所以需要為發光二極體 提供靜電保護，以避免發光二極體封裝結構於作動咖為產 致發光二極體晶片損壞。 电導 傳統發光二極體封裝結構所採用之封裝基底（Subm〇unt) θ 由銅箔、玻璃纖維、鋁基材構成電路層/絕緣層/金屬層之結 又= 金屬層上面的絕緣層通常⑽—般的塗佈方法形成絕緣漆， = 易控制’電容量比較小，雖有抗靜電能力，但能力不足；而^， =方法f作的騰層之平坦度也利圭，使得發光二極體狱製= 的良率降低，導致成本的增加。 裊私中 為了增加發光效能，傳統發光二極體封裝結構之封裝美底會於表 3 201246613 面設置金屬反射層（ReflectQr)來增加整體亮度，細，通常金屬加 =的”粗链，要在這樣的表面上安裝發光二極體元件是不容易 的’所以發光-極體封裝製程的良率會不高” 發光二極體晶片的部份，則為了電性 十在 ，分離去除部==屬 吸收，沒辦法反射上去而造成部分底導體基板所 發光二㈣雖然屬於冷絲，但事實上，是—個發光時會產生高 熱的7〇件。轉換效率上，傳統白熾燈在· w的輸出效率中，約湖 轉換為紅外光輻射，施觀為熱，僅大約7%轉成可見光；相較之下， 發光二極體擁有約2G〜30%可以轉換為可見光，其餘都轉換成熱。由上 述Γ知’晶片_如此小的發光二極體晶片，轉換效率相對大上許多， 使得單位面積發熱量增^舉例來說，—瓣統高亮度發光二極體封 f ’表面面積1 ^，全部的熱產±量有約！ w，那麼單位面積發熱 量就有大約1GG W/cm2 ’不同於傳統白熾燈燈絲可财熱超過⑽叱， led的接面溫度操作時必須低於125t，才不至辟發光二極體操作。 因此’必須加強散熱設計，使單位面積發熱量降低至^cm2以下， 才能夠有效維持LE：D發光品質。 發光二極體接面溫度產生之熱對於放射波長的改變也有很大的影 響紅色、藍色、和、綠色發光二極體在不同的接面溫度下，波長都往 長波長位移，增減光技術上的_性，尤其是紅歸彡躲大。熱的 影響，僅造成發光二極體亮度降低、壽命減短且放射光波長位移等嚴 重問4 ’此外’也可此因為溫度過商，内部元件熱膨脹係數不均，導 致元件間承料大频減力㈣損。因此，高亮度發光二極體散熱 需求變成提高其使用效率的重要條件。 在封裝結構裡，黏接LED晶片與封裝基版或外殼的黏著劑也為重 要的一環，傳統LED多利用銀膠或是焊料，但其散熱性不佳。一般黏 合材料多為銀膠，銀膠主要是銀顆粒導熱，熱傳導係數約為3〜5w/(m.K) 4 201246613 依照銀含量略有不同，但是銀顆粒也會產生導熱阻隔現象，所以實際 的導熱效果並不好；在使用上塗膠環境和用具，被_品等需充分乾 燥，否則膠液易潮解引起固化不易等缺點。 利用半導體基板侧技術’減少光電半導體元件下方半導體基板 厚度，以-元熱傳導之熱阻公^ :熱阻=熱傳導雜厚度/(傳導係數 *熱傳導穿透之面積）’故減少半導體基板厚度，可以使降低献阻，有 效的把光電半導體元件產线熱料向散熱器，達到最佳散熱的目的 因此’傳統的發光二極體封裝結構並無法有效地隔轉電放電電 流、避免元件損毀、有效的將熱能導出，同時，對於提升發光二極體 的發光效能也仍具有極大的改善空間。 【發明内容】 鑒於以上的問題，本發明的主要目的在於提供一種具靜電放電保 護能力之光電料體散熱賴結構，乃域基絲錢盖，將光 電+導體縣製㈣良率和光電半導錄魏力予贿昇，同時，並 有效提高光電半導體縣結構的抗靜魏力與賴能力，進而達到減 >、兀件損毁、提高產品質量、以及降低生產成本。 本發明的另一目的在於提供一種具靜電放電保護能力之 ’係藉由於絕緣層與電路層之間設置有反射層，同時 ^導肢基板侧技術’使其半導體基板產生凹槽，凹槽之斜面側 效射光電半導财生的光，而有助於光電半導體元件之出光 電半=封ίίί述^ ’本發明所揭露之具靜電放電保護能力之光 基底的底部為丰基底和光電半導體元件所構成，而封裝 射m為+導體基板，並在半導體基板上方依序設有金屬声、反 “達成路ί中光電半導體元件則安裝於絕緣層上方i與電 具有ί=;性其 高光電半導體元件='、可獲赠效的㈣，概，不但可提 體讀的封農良率，並可提昇封裝基底之電容特性，使光 201246613201246613 VI. Description of the Invention: [Technical Field] The present invention relates to an optoelectronic semiconductor package structure, and more particularly to an optoelectronic semiconductor heat dissipation package structure having electrostatic discharge protection capability. [Prior Art] Nowadays, the semiconductor process technology is mature, and the process technology is further developed into the nano stage, so that the integrated circuit can perform the same transaction in a smaller volume, but the more precise and precise the process, the design of the integrated circuit must be Pay more attention to the effects of Electrostatic Discharge (ESD) than ever before. In the field of optoelectronics, optoelectronic semiconductors such as light-emitting diodes (LEDs), laser diodes (10) κ detectors, solar cells, optical amplifiers and transistors have been widely used in all aspects of life. They also need to face the growing problem of static electricity. Electrostatic discharge is caused by the fact that when the electronic components of the circuit are operated between the electronic components and the electronic components, the electric charge accumulated by the circuit is released within a period of less than one second, so that the circuit derives a relatively large voltage, which is usually the culprit of electronic component damage. In the case of a light-emitting diode, since the light-emitting diode is basically a heterogeneous i-crystal structure, lattice defects are easily generated, and the ability to lay is usually only about 4 GG to volts, and in the manufacturing process or use/on, it is often Because the electrostatic discharge action causes the component to be damaged, it is necessary to provide electrostatic protection for the light-emitting diode to prevent the light-emitting diode package from being damaged by the operating diode. The package substrate used for the conventional light-emitting diode package structure (Subm〇unt) θ is composed of copper foil, glass fiber, aluminum substrate, circuit layer / insulation layer / metal layer junction = insulation layer above the metal layer (10) General coating method to form insulating varnish, = easy to control 'the capacitance is relatively small, although there is anti-static ability, but the ability is insufficient; and ^, = method f for the flatness of the layer is also Ligui, so that the light two Extreme body system = lower yield, resulting in increased costs. In order to increase the luminous efficiency in the smuggling, the package of the traditional LED package structure will be provided with a metal reflective layer (ReflectQr) on the surface of Table 3 201246613 to increase the overall brightness, fine, usually metal plus = "thick chain, in It is not easy to mount a light-emitting diode element on such a surface. Therefore, the yield of the light-emitting body package process will not be high. The portion of the light-emitting diode wafer is separated for the electrical property. It is absorbed, there is no way to reflect it and some of the bottom conductor substrate is illuminated. Although it belongs to the cold wire, it is actually a 7-piece that generates high heat when it emits light. In terms of conversion efficiency, in the output efficiency of the traditional incandescent lamp, the lake is converted into infrared radiation, and the heat is applied, only about 7% is converted into visible light; in contrast, the light-emitting diode has about 2G~30 % can be converted to visible light and the rest converted to heat. From the above-mentioned 晶片 'wafer _ such a small light-emitting diode wafer, the conversion efficiency is relatively large, so that the heat per unit area is increased. For example, the high-brightness light-emitting diode of the valve has a surface area of 1 ^ , the total amount of heat production is about! w, then the heating capacity per unit area is about 1GG W/cm2 ′. Unlike traditional incandescent filaments, the heat can be more than (10) 叱, and the junction temperature of the LED must be lower than 125t, so that the LED operation is not realized. Therefore, it is necessary to strengthen the heat dissipation design so that the heat per unit area is reduced to less than ^cm2, so that the LE:D illumination quality can be effectively maintained. The heat generated by the junction temperature of the light-emitting diode also has a great influence on the change of the radiation wavelength. The red, blue, and green light-emitting diodes are shifted to long wavelengths at different junction temperatures, and the light is increased or decreased. Technical _ sex, especially the red blame to hide. The influence of heat only causes the brightness of the light-emitting diode to decrease, the life is shortened, and the wavelength of the emitted light is severely affected. 4 'Besides' can also be because the temperature is excessively quotient, the thermal expansion coefficient of the internal components is uneven, resulting in a large frequency of load between the components. Reduce the force (four) damage. Therefore, the heat dissipation requirement of the high-brightness light-emitting diode becomes an important condition for improving the efficiency of use. In the package structure, the adhesion of the LED chip to the package substrate or the outer casing is also an important part. The conventional LED uses silver glue or solder, but its heat dissipation is not good. Generally, the adhesive material is mostly silver glue. The silver glue is mainly silver particles. The heat transfer coefficient is about 3~5w/(mK). 4 201246613 According to the silver content, the silver particles will also have thermal conduction barrier, so the actual heat conduction. The effect is not good; in the use of the glued environment and utensils, the product should be fully dried, otherwise the glue is easy to deliquesce and cause curing difficulties. The semiconductor substrate side technology is used to reduce the thickness of the semiconductor substrate under the optoelectronic semiconductor component, and to reduce the thickness of the semiconductor substrate by the thermal resistance of the heat conduction of the element: thermal resistance = heat conduction thickness / (conductivity * area of heat conduction penetration) The utility model can reduce the resistance and effectively feed the hot material of the optoelectronic semiconductor component to the heat sink for the purpose of optimal heat dissipation. Therefore, the conventional LED package structure cannot effectively separate the electric discharge current, avoid component damage, and effectively The heat energy is exported, and at the same time, there is still a great room for improvement in improving the luminous efficacy of the light-emitting diode. SUMMARY OF THE INVENTION In view of the above problems, the main object of the present invention is to provide a heat-dissipating structure of a photoelectric material body having an electrostatic discharge protection capability, which is a domain-based silk cover, a photovoltaic + conductor county system (four) yield and photoelectric semi-conductance Recording Wei Li to bribe, at the same time, and effectively improve the anti-static Wei Li and the ability of the optoelectronic semiconductor county structure, and then reduce the damage, damage, improve product quality, and reduce production costs. Another object of the present invention is to provide an electrostatic discharge protection capability by providing a reflective layer between the insulating layer and the circuit layer, and at the same time, the semiconductor substrate substrate has a groove, and the groove is formed. The beveled side of the photo-electrically-conducting semi-conducting light, and contributes to the optoelectronic semiconductor component's photoelectric half-capacitance. The bottom of the optical substrate with electrostatic discharge protection capability disclosed in the present invention is a rich substrate and an optoelectronic semiconductor. The component is formed, and the package injection m is a +conductor substrate, and the metal sound is sequentially arranged on the semiconductor substrate, and the reverse is achieved. The photo-semiconductor component is mounted on the insulating layer and the electricity has ί=; Optoelectronic semiconductor components = ', can be given a gift (four), general, not only can improve the quality of the agricultural read-up, and can improve the capacitance characteristics of the package substrate, make light 201246613
電半導體封裝結構的抗靜電能力大幅提昇。同時，本發明更在絕緣層 與電路層之間設有反射層，來減少光電半導體元件的光損失程度'，; 將光電半導體元件之發光效率予以提昇。 X 當然，本發明在絕緣層與光電半導體元件之間，更設有一共晶層， 此共晶層主要特徵是使用低熔點合金當作接合材料，以增加導 升散熱性。 〒.、，、手把 為使對本發明的目的、特徵及其功能有進一步的了解， 式詳細說明如下： 一 【實施方式】 請參照第1圖’係繪示本發明之第一實施例所提供之具靜電放電 保護能力之光電半導體散熱封裝結構的示意圖。 根據本實施例所揭露之具靜電放電保護能力之光電半 裝結構[主要包含封裝基底⑽和安裝於封裝基底1GG上方之至一 光電半導體元件，本實施例是以兩個發光二極體2〇〇之光電半導體元 件為代表；封裝基底100的底部為半導縣板11〇，且通常是石夕半導 體基板’如圖飾，半導縣板11Q上方為金助m，並形成反射 層130於金屬層12〇上，再藉由一半導體製程形成薄且平坦之絕緣層 140於^^13G上’並於絕緣層14()上製作有電，於絕緣^ 上更形成有-共晶層16Q ’且共晶層⑽上並安裝綠半導體元件之 發光二極體200 ’且發光二極體2〇〇與電路層15〇構成電性連接。 反射層130的材質為一般之反射金屬材料，譬如，銀、錄、紹或 5合m上的絕緣層140，為了增加抗靜電能力，可 疋一 $氮化鋅等絕緣材料，或是高介電性（HIGH-K)材料， : 氧化銥(Ir〇2)、氧化铪⑽0或氧化釓_)等 稀土 7G素氧化物。 八阳層160係利用低溶點合金固作方式低炫點合金係例如 推恭二二t等金屬相互不同比例溶制，來達成低炼點的目的， 一 與半導體基板110皆由低熔點合金固作鍵合。 6 201246613 當然’除了上述之發光二極體200之外，光電半導體元件亦可為 有機發光二極體（OLED)、雷射二極體（LD)、光偵測器、光放大器、 太陽能電池、電晶體等以及其他接收光或發光之相關光電元件。 本實施例所示之發光二極體200是由透光基板210，以及形成於 透光基板210上方之n型半導體層220、主動層（Active Layer) 230、 P型半導體層240、p型接觸層250、η型接觸層260所構成；其中， 透光基板210可為皇寶石基板(§3口口1^1^)、碳化砍(8丨〇)基板、三氧化 二鋁(Ah〇3)基板、氮化鎵(GaN)基板、氮化鋁(Α1Ν)基板，η型半導體 層220則設置於透光基板210上，主動層230與η型接觸層260設置 於η型半導體層220上，ρ型半導體層240設置於主動層230上，ρ型 接觸層250設置於ρ型半導體層240上，且ρ型接觸層250與η型接 觸層260分別與正電壓源（V+)與負電壓源（V-)連接；在正常操 作下，順向偏壓施加於正電壓源與負電壓源之間，使ρ型半導體層Mo 之電洞與η型半導體層220之電子可於主動層230結合而發光，並經 由透光基板210發出。當有異常電壓脈衝或靜電脈衝產生時，電荷便 會沿著封裝基底100上之電路層150導通放電，而不會通過發光二極 體200的部份，如此可幫助發光二極體2〇〇達到靜電防護，避免元件 產生損壞。 另外’本實施例中’封裝基底1〇〇上方更安裝有一變阻器 (Varist〇r)300，其位於絕緣層丨4〇上方並電性連接於電路層15〇，而 且和發光二極體200以串聯的方式電性連接於正電壓源與負電壓源， 其具有消除異常電壓脈衝及靜電脈衝之功效，使得發光二極體2⑽可 耐較高電壓，來提供更完整的靜電放電之防護設計。 —上述實施例之發光二極體200是以表面黏著元件方式進行安裝，. 實務上亦可為覆晶方式。請參閱第2圖及第3圖，本發明之第二^施 例與第三實施例中，此二實施例皆無使用共晶層，發光^體^^ 以覆晶方式並使用錫球凸塊（s〇lder bump)(圖中省略未示）反貼接 合於封錄底1GG上，且第2圖繪示發光二極體謂直接接合於封裝 201246613 ΐΐΓ二==t其兩極(幽觸層250與n型接觸層26〇) 寿電路層150構成電性連接’而第3圖則繪示封裝基底刚之絕緣層 140具有穿孔而露出底下的反射層⑽，而可供發 兩ς =觸層爾η型接咖)分別和電路 除了前述三個實施例之外，本發明更可在半 槽設計，請參閱第4圖所示之第四實施例，如圖所示，土半 先利用侧技術形細邊斜面且底部平坦之_ 112，再於半導體基 板110上，由下而上依序形成金屬層12〇、反射層13〇、絕緣層⑽、 電路層150，及共晶層160，且共晶層·上並安裝有發光二極^測， 使發光二極體2GG置於封裝基底_所呈現出來之凹槽ιΐ2内。本實 施例除了，凹槽112結構之外，其餘結構係與第丨圖所示之第一實施例 相同，詳細結構說明係可參考前述說明。 請參閱第5圖，在本發明之第五實施例中，其半導體基板ιι〇亦 先利用蝴技術形成侧邊斜面且底部平坦之凹槽112，再於半導體基 板no上，由下而上依序形成金屬層12〇、反射層13〇、絕緣層^ 電路層150以及絕緣層14〇上的發光二極體2〇〇，發光二極體皆 以覆晶方式並使祕球凸塊（SQlder b_)(圖中省略未示）反貼接 合於封裝基底1G0上且置於其所呈現出來之凹槽112内且發光二極 體200直接接合於封裝基底100之電路層15〇上，發光二極體綱之 -極’P型接觸層250與η型接崎260,和電路層15G形成電性連接。 备然，本實施例除了凹槽112結構之外，其餘結構係與第 2圖所示之 第二實施例相同。 續請參閱第6圖，在本發明之第六實施例中，此半導體基板11〇 亦具有侧邊斜面且底部平坦之凹槽112，再於半導體基板nG上，由 下而上依序形成金屬層12G、反射層13〇、絕緣層14Q、電路層15〇以 及絕緣層14G上的發光二極體咖，發光二極體同樣以覆晶方式 並使用錫球凸塊（solder b_)(圖巾省略未示）反貼接合於封裝基 201246613 =出來之凹槽112内，且封裝基底⑽之絕緣 層140具有穿孔而露出底下的反射層13〇，而可供發光二極體 2接觸層250與η型接觸層260 ’分別和電路層150及反射# -Γ3 ^ ^ 112 興第3圖所不之第三實施例相同。 根據本發明所揭露之具靜電放電保護能力之光電半導體封裝社 構、’其封裝基底係為半導體基板/金屬層/反射層/絕緣層/電路= 半導體基板/金屬層/反射層/絕緣層/共晶層/電路 曰 助光電半導體元件封裝製程中進行接合時的黏著力的增 二，.大巾破升製程良率；而且，半導體製程製作_型絕緣層 可以使電容的電容量增加，因為電容c= UA)/d， 為9 ==厚ΐ，上下層中間所夹的絕緣層如果是以半導體二 二衣、4、厚度可以有效地加以控制，大幅增加電容量，由於 :與=放電容有絕對的關係’洩放電容越大，抗靜電的能力也因而;曾 :此’本發明具靜電放電紐能力之光電半導體封裝結構，係具 有相虽良好之抗靜電釋放能力，將可以減少元件損毁 量二 以及降低生產成本。 门座口口買里 -此ί=係使用m纪...等金屬相互不同比例炫製，利用 性，使得光料導體與職驗容諸和；將半 蝕刻技術形成凹槽，凹槽為側壁斜面底部平坦，減4 =板的厚度;再者共晶層使用低炫點金屬材質，低 =糸，上半導體基板厚度減少，由一元熱傳導之熱^ 料路徑厚度/(熱料舰*熱傳導《之面積）〔她 柄，」Α〕,’提南鋪導係數織料路徑厚度減少有利於熱阻降 面二产降=導體70件產生的熱能有效傳導，達成光電半導體元件結 的目的’降低光電半導體元件結面溫度過高對於光電半導 組兀件產生的波長位移、壽命減少等問題。 201246613 矽 本身 二光都被吸收，導致出光效率不佳助而 +導體基板射挪成凹槽，凹槽為側壁斜面 封裝基底的金屬層和絕緣層之間，除了有助於 出光效率，也可以藉由將反射層全面設置於封 面積，如此，當財勝独往光電半導體封裝結構之發光= 7然本㈣以前述之實補揭露如上，然其並刺以限定本發 二iL脫ΐ本發明之精神和範圍内，所為之更動與潤飾，均屬本發 】=利_誠。關於本發衝界定之保護翻請參考所附之申請 寻利範圍。 【圖式簡單說明】 光電半 第1圖為本發明之第—實施繼提供之具靜電放電保護能力之 導體封裝結構的示意圖； 第2圖為本發明之第二實施例所提供之具靜電放電保護能力之光 導體封裝結構的示意圖； 第3圖為本發明之第三實施例所提供之具靜電放電保護能力之光電半 導體封裝結構的示意圖； 第4圖為本發明之第四實施例所提供之具凹槽設計之光電半導體封裝 結構的示意圖； 第5圖為本發明之第五實施例所提供之具凹槽設計之光電半導體封裝 結構的示意圖；及 第6圖為本發明之第六實施例所提供之具凹槽設計之光電半導體封裝 結構的示意圖。 【主要元件符號說明】 1〇〇封裝基底 110半導體基板 凹槽 201246613 120金屬層 130反射層 140絕緣層 150電路層 160共晶層 200發光二極體 210透光基板 220 η型半導體層 230主動層 240 ρ型半導體層 250 ρ型接觸層 260 η型接觸層 300變阻器The antistatic capability of the electrical semiconductor package structure is greatly enhanced. At the same time, the present invention further provides a reflective layer between the insulating layer and the circuit layer to reduce the degree of light loss of the optoelectronic semiconductor component, and to improve the luminous efficiency of the optoelectronic semiconductor component. X Of course, the present invention further comprises a eutectic layer between the insulating layer and the optoelectronic semiconductor component, and the eutectic layer is mainly characterized by using a low melting point alloy as a bonding material to increase the heat dissipation of the conduction. 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。 A schematic diagram of an optoelectronic semiconductor heat dissipation package structure with electrostatic discharge protection capability. The photoelectric half-mount structure having the electrostatic discharge protection capability disclosed in the embodiment [mainly includes a package substrate (10) and an optoelectronic semiconductor component mounted over the package substrate 1GG, and the embodiment is based on two light-emitting diodes 2〇 The photo-semiconductor semiconductor device is represented by a semiconductor device; the bottom of the package substrate 100 is a semi-conducting plate 11 〇, and is usually a Shi Xi semiconductor substrate as shown in the figure, and a semi-conducting plate 11Q is above the gold assist m, and a reflective layer 130 is formed. On the metal layer 12, a thin and flat insulating layer 140 is formed on the ^13G by a semiconductor process and electrically formed on the insulating layer 14 (), and a - eutectic layer 16Q is formed on the insulating layer. And the light-emitting diode 200' of the green semiconductor element is mounted on the eutectic layer (10), and the light-emitting diode 2 is electrically connected to the circuit layer 15A. The material of the reflective layer 130 is a general reflective metal material, for example, an insulating layer 140 on silver, magnet, or 5 in m. In order to increase the antistatic capability, an insulating material such as zinc nitride or high dielectric material may be used. Electrical (HIGH-K) material, : rare earth 7G element oxide such as cerium oxide (Ir 〇 2), cerium oxide (10) 0 or cerium oxide _). The 8th layer of the 8th layer is made of a low-melting point alloy. The low-point alloy is used in a low-point alloy. For example, the metals such as the ruthenium and the second are dissolved in different proportions to achieve a low melting point. Solid bonding. 6 201246613 Of course, in addition to the above-mentioned light-emitting diode 200, the optoelectronic semiconductor component can also be an organic light-emitting diode (OLED), a laser diode (LD), a photodetector, an optical amplifier, a solar cell, Transistors and the like as well as other related optoelectronic components that receive light or illuminate. The light emitting diode 200 shown in this embodiment is a transparent substrate 210, and an n-type semiconductor layer 220, an active layer 230, a P-type semiconductor layer 240, and a p-type contact formed over the transparent substrate 210. The layer 250 and the n-type contact layer 260 are formed; wherein, the transparent substrate 210 can be a gemstone substrate (§3 mouth 1^1^), a carbonized chopping (8丨〇) substrate, and an aluminum oxide (Ah〇3) a substrate, a gallium nitride (GaN) substrate, an aluminum nitride substrate, an n-type semiconductor layer 220 is disposed on the transparent substrate 210, and an active layer 230 and an n-type contact layer 260 are disposed on the n-type semiconductor layer 220. The p-type semiconductor layer 240 is disposed on the active layer 230, the p-type contact layer 250 is disposed on the p-type semiconductor layer 240, and the p-type contact layer 250 and the n-type contact layer 260 are respectively connected to the positive voltage source (V+) and the negative voltage. a source (V-) connection; under normal operation, a forward bias is applied between the positive voltage source and the negative voltage source such that electrons of the p-type semiconductor layer Mo and the electrons of the n-type semiconductor layer 220 are available to the active layer 230 The light is combined and emitted through the light-transmitting substrate 210. When an abnormal voltage pulse or an electrostatic pulse is generated, the electric charge is electrically discharged along the circuit layer 150 on the package substrate 100 without passing through the portion of the light emitting diode 200, thus helping the light emitting diode 2〇〇 ESD protection is achieved to avoid damage to components. In addition, in the present embodiment, a varistor 300 is mounted on the package substrate 1 , and is disposed above the insulating layer 并 4 并 and electrically connected to the circuit layer 15 〇 , and the light emitting diode 200 The series connection is electrically connected to the positive voltage source and the negative voltage source, which has the effect of eliminating abnormal voltage pulses and electrostatic pulses, so that the LED 2 (10) can withstand higher voltages to provide a more complete protection design for electrostatic discharge. The light-emitting diode 200 of the above embodiment is mounted by means of a surface-adhesive element. In practice, the flip-chip method can also be used. Referring to FIG. 2 and FIG. 3, in the second embodiment and the third embodiment of the present invention, the two embodiments do not use a eutectic layer, and the illuminating body is formed by flip chip and using solder ball bumps. (s〇lder bump) (not shown in the figure) is reversely bonded to the cover bottom 1GG, and Fig. 2 shows the light-emitting diode is directly bonded to the package 201246613 ΐΐΓ二==t its two poles (the viscous layer 250 and the n-type contact layer 26 〇) the life circuit layer 150 constitutes an electrical connection 'and the third figure shows that the insulating layer 140 of the package substrate has a perforation to expose the underlying reflective layer (10), and is available for two ς = touch In addition to the foregoing three embodiments, the present invention can be designed in a half-slot. Please refer to the fourth embodiment shown in FIG. 4, as shown in the figure. The side is formed with a thin bevel and the bottom is flat, and then on the semiconductor substrate 110, the metal layer 12, the reflective layer 13, the insulating layer (10), the circuit layer 150, and the eutectic layer 160 are sequentially formed from bottom to top. And the eutectic layer is mounted with a light-emitting diode, so that the light-emitting diode 2GG is placed on the package substrate _ 2 inside. In addition to the structure of the recess 112, the rest of the structure is the same as the first embodiment shown in the figure, and the detailed structural description can be referred to the foregoing description. Referring to FIG. 5, in the fifth embodiment of the present invention, the semiconductor substrate ιι is first formed by a butterfly technique to form a side slope and a bottom flat groove 112, and then on the semiconductor substrate no, from bottom to top. Forming a metal layer 12〇, a reflective layer 13〇, an insulating layer ^ circuit layer 150, and a light-emitting diode 2〇〇 on the insulating layer 14〇, the light-emitting diodes are in a flip chip manner and the secret ball bumps (SQlder) The b_) (not shown) is reversely bonded to the package substrate 1G0 and placed in the recess 112 formed therein and the LED 2 is directly bonded to the circuit layer 15 of the package substrate 100. The polar body-P-type contact layer 250 and the n-type contact 260 are electrically connected to the circuit layer 15G. Incidentally, the present embodiment is the same as the second embodiment shown in Fig. 2 except for the structure of the groove 112. Continuing to refer to FIG. 6 , in the sixth embodiment of the present invention, the semiconductor substrate 11 〇 also has a groove 112 with a side slope and a flat bottom, and then sequentially forms a metal from the bottom to the top on the semiconductor substrate nG. The layer 12G, the reflective layer 13〇, the insulating layer 14Q, the circuit layer 15〇, and the light-emitting diode on the insulating layer 14G, the light-emitting diode is also in a flip chip manner and uses a solder ball bump (solder b_) Occasionally omitted, the anti-sticking is bonded into the recess 112 of the package base 201246613, and the insulating layer 140 of the package substrate (10) has perforations to expose the underlying reflective layer 13〇, and the contact layer 250 of the LED 2 can be contacted. The n-type contact layer 260' is the same as the third embodiment of the circuit layer 150 and the reflection #-Γ3 ^ ^ 112, respectively. An optoelectronic semiconductor package structure with electrostatic discharge protection capability according to the present invention, 'the package substrate is a semiconductor substrate/metal layer/reflective layer/insulation layer/circuit=semiconductor substrate/metal layer/reflective layer/insulation layer/ The eutectic layer/circuit assists the increase of the adhesion force during bonding in the optoelectronic semiconductor device packaging process, and the process yield is improved by the semiconductor wafer manufacturing process. Moreover, the semiconductor manufacturing process can increase the capacitance of the capacitor because Capacitance c = UA) / d, is 9 == thick ΐ, the insulation layer sandwiched between the upper and lower layers can be effectively controlled if it is based on semiconductor 22, 4, thickness, greatly increase the capacitance, due to: = discharge It has an absolute relationship. The larger the bleeder capacitance, the more antistatic ability. The optical semiconductor package structure with the electrostatic discharge capability of the present invention has a good antistatic discharge capability and can be reduced. Component damage is two and the production cost is reduced. The mouth of the door is bought in the mouth - this ί = is the use of m Ji ... and other metals in different proportions of the sleek, utilization, so that the light conductor and the job test capacity; the half etching technology to form the groove, the groove is The bottom of the slope of the sidewall is flat, minus 4 = the thickness of the plate; in addition, the eutectic layer is made of low-diffuse metal material, low = 糸, the thickness of the upper semiconductor substrate is reduced, and the thickness of the thermal path by the one-component heat conduction / (heat carrier * heat conduction) "The area" [her handle," Α], 'Tinan's coefficient of woven fabric path thickness reduction is beneficial to the thermal resistance drop surface two production drop = the thermal energy generated by the conductor 70 is effectively conducted to achieve the purpose of the photoelectric semiconductor component junction' Reducing the problem that the junction temperature of the optoelectronic semiconductor component is too high for the wavelength shift and lifetime of the phototransistor assembly is reduced. 201246613 二The two lights are absorbed, which leads to poor light output efficiency and the +conductor substrate is moved into a groove. The groove is between the metal layer and the insulating layer of the sidewall bevel package base, in addition to contributing to light extraction efficiency, By fully arranging the reflective layer on the encapsulation area, the luminescence of the fascinating optoelectronic semiconductor package structure is determined by the above-mentioned actual replenishment as described above, but it is punctured to define the second iL dislocation. Within the spirit and scope of the invention, the changes and refinements are all in the hair of this invention. Please refer to the attached application for the scope of protection for the protection of the definition of this haircut. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 2 is a schematic view showing a conductor package structure with electrostatic discharge protection capability provided by the first embodiment of the present invention; FIG. 2 is an electrostatic discharge provided by a second embodiment of the present invention. FIG. 3 is a schematic diagram of an optoelectronic semiconductor package structure with electrostatic discharge protection capability according to a third embodiment of the present invention; FIG. 4 is a fourth embodiment of the present invention Schematic diagram of an optoelectronic semiconductor package structure having a groove design; FIG. 5 is a schematic view showing a photovoltaic semiconductor package structure having a groove design according to a fifth embodiment of the present invention; and FIG. 6 is a sixth embodiment of the present invention A schematic diagram of an optoelectronic semiconductor package structure having a recessed design is provided. [Main component symbol description] 1〇〇 package substrate 110 semiconductor substrate recess 201246613 120 metal layer 130 reflective layer 140 insulating layer 150 circuit layer 160 eutectic layer 200 light emitting diode 210 light transmissive substrate 220 n-type semiconductor layer 230 active layer 240 p-type semiconductor layer 250 p-type contact layer 260 n-type contact layer 300 varistor