201243566 六、發明說明： 【發明所屬之技術領域】 本發明涉及PCI-Express ( PCl-e )類型的半導體儲存裝置。 本發明尤其涉及用於PCI-Express類型的儲存裝s的備份及恢 復系統及方法。 【先前技術】 心著人們對更多電腦儲存容量的需求的增大，積極開展只 在尋求更好的解決方案的研究。有資料儲存介質等通過機械方 式儲存/讀取資料的各種硬碟解決方案。但不幸的是，硬碟的 資料處理速度往往很慢。尤其是，在現有解決方案中，在資料 儲存介質和主機之間仍然採用無法達到具有高速資料登錄/輸 出性能的記憶體磁片資料處理速度的介面。因此，現有技術的 解決方案無法保證記憶體磁片性能的合理使用。 【發明内容】 本發明實施例提供用於支援為主機的低速資料處理速度 的PCI-EXpress (PCl_e)類型的儲存裝置的備份及恢復功能。 尤其是，本發明實施例提供連接於一個以上（即一套）半導體 儲存裝置（semiconductor storage devices (SSDs))的備份及恢 復功能。一般而言，本發明提供連接於備份控制器和備份儲存 裝置的二次電源裝置。在一次電源裝置停用時（例如，發生故 障時）’啟動上述二次電源裝置。為應對上述啟動，上述備份 控制器備份儲存於上述儲存系統的任何半導體儲存裝置的任 何資料（不僅是保存於上述儲存系統的主記憶體或與之連接的 任何主機伺服器的主記憶體的任何資料）。在上述主記憶體重 201243566 ’備份的所有資料 新啟動時’上述二次電職置將停用，而且 將恢復為原資源。 根據本發明的—方面，提供—種半導體儲存 :复系統，其特徵在於，包括:半導體儲存裝置(Se一201243566 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a semiconductor storage device of the PCI-Express (PCl-e) type. More particularly, the present invention relates to a backup and recovery system and method for a PCI-Express type storage device. [Prior Art] With the increasing demand for more computer storage capacity, we are actively pursuing research that seeks only better solutions. There are various hard disk solutions that store/read data mechanically, such as data storage media. But unfortunately, hard disk data processing speed is often very slow. In particular, in the existing solution, an interface that cannot achieve the processing speed of the memory disk data with high-speed data registration/output performance is still used between the data storage medium and the host. Therefore, prior art solutions cannot guarantee the proper use of memory disk performance. SUMMARY OF THE INVENTION Embodiments of the present invention provide a backup and recovery function of a PCI-EXpress (PCl_e) type storage device for supporting low-speed data processing speed for a host. In particular, embodiments of the present invention provide backup and recovery functions for connection to more than one (i.e., a set of) semiconductor storage devices (SSDs). In general, the present invention provides a secondary power supply unit coupled to a backup controller and a backup storage device. The secondary power supply unit described above is activated when the primary power supply unit is deactivated (for example, when a failure occurs). In order to cope with the above startup, the backup controller backs up any data stored in any semiconductor storage device of the storage system (not only any of the main memory stored in the main memory of the storage system or any host server connected thereto) data). In the above-mentioned main memory weight 201243566 ‘ all the information backed up at the time of the new start-up, the above secondary power position will be deactivated and will be restored to the original resource. According to an aspect of the present invention, there is provided a semiconductor storage: complex system, comprising: a semiconductor storage device (Se
StorageDevice，SSD)備份控制器、備份儲存裝置及盘至少一 個半導體儲存裝置記憶體則部連接的二次電職置，、而上述 -次電源裝置為應縣電源裝置的停職概動，而且，上述 備份控制H為應對上述主電職置的轉轉保存於至少一 個上述轉體儲存裝置記憶體磁片部的半導體儲存裝置資料 恢復至上述備份儲存裝置。 根據本發_第二方面，提供—種半導體儲存裝置備份及 恢復系統，其特徵在於，白扭.户水么Μ 行絲於包括.儲存錢，其包括儲存系統主 記憶體和至少-個半導體儲存裝置記憶體磁片部；主機伺服 器’其包括伺服器主記憶體部；及二次電源裝置，連接於備份 控制器和備份儲存裝置，而上述備份控彻為應對主電源裝置 的停用而被啟動’而且’上述備份控制器為應對上述主電源裝 置的故障而將上述主機伺服器主記憶_伺服器資料、上述儲 存系統主記紐的儲存魏資料及保存於至少-個上述半導 體錯存裝置記憶體磁片部的半導體儲存裝置資料恢復至上述 備'份儲存裝置。 根據本發明的第二方面，提供—種半導體儲存裝置備份及 恢復方法，其特徵在於，包括如下步驟：提供半導體儲存裝置 備伤控制H、備份f轉裝置及與至少-辨導體齡裝置記憶 體磁片部連接的二次電職置；為麟主電源裝置的停用而啟 201243566 動上述二次電源裝置；為應對上述主電源裝置的故障，上述備 份控制器將保存於至少一個上述半導體儲存裝置記憶體磁片 部的半導體儲存裝置資料恢復至上述備份儲存裝置。 根據上述構成的本發明’提供用於支援為主機的低速資料 處理速度的pci_Express (ρα·〇類_儲存裝置的備份及恢 復功能。尤其是，本發明實施例為一個以上（即一套）半導體 儲存裝置（semiconductor storage devices (SSDs))提供備份及 恢復功能。 77 本發明的上述概和其他特徵可通過如下結合附圖進行 的對本發明的各種方面的說明變得更加顯而易見。 【實施方式】 下面’結合附圖對本發明示謝生實施例進行詳細說明，而 附圖中顯示示例性實施例。但是，本發明可通過各種其他形式 實現’不受在此描述的示例性實施例的限制。這些實施例的目 的是徹底完整地向本領域技術人纽明本發_範圍。而若级 本發明實施_說明帶來不必要的混淆，已公開的特徵和触 的詳細說明將被省略。 用於本說明書的術語的目的只是描述特定的實施例，而非 限制本發明。與此_，帛於本書騎語RAID是指獨立 磁片的冗餘陣列（redundantArray〇fIndependentDisks ;原指 低價磁片的冗餘陣列(Redund德ay 〇f”曰StorageDevice, SSD) backup controller, backup storage device and at least one semiconductor storage device memory connected to the secondary power position, and the above-mentioned secondary power supply device is the suspension of the power supply device of the county, and The backup control H restores the semiconductor storage device data stored in the memory portion of the at least one of the transfer storage devices to the backup storage device in response to the transfer of the main electrical service. According to the second aspect of the present invention, there is provided a semiconductor storage device backup and recovery system, characterized in that the white twist is included in the storage, including the storage system main memory and at least one semiconductor. a storage device memory disk portion; a host server 'which includes a server main memory portion; and a secondary power supply device connected to the backup controller and the backup storage device, and the above backup control is for the main power supply device to be deactivated And the booting controller is configured to store the host server main memory_server data, the storage system main memory storage information, and the at least one semiconductor fault in response to the failure of the main power supply device. The semiconductor storage device data of the memory portion of the memory device is restored to the above-mentioned storage device. According to a second aspect of the present invention, a semiconductor storage device backup and recovery method is provided, comprising the steps of: providing a semiconductor storage device repair control H, a backup f-transfer device, and at least a discriminating conductor age device memory The secondary electric power device connected to the magnetic disk portion; the secondary power supply device is activated for the deactivation of the primary power supply device; in order to cope with the failure of the main power supply device, the backup controller is stored in at least one of the above semiconductor storage devices The semiconductor storage device data of the memory portion of the device memory is restored to the backup storage device. According to the present invention having the above configuration, a backup and recovery function for supporting a low-speed data processing speed for a host is provided. In particular, the embodiment of the present invention is one or more (ie, one set) semiconductor. The storage and storage functions (SSDs) provide backup and recovery functions. The above-described and other features of the present invention will become more apparent from the following description of the embodiments of the invention. The embodiments of the present invention are described in detail with reference to the accompanying drawings, in which FIG. The purpose of the embodiments is to fully and completely illuminate the scope of the present invention. However, if the implementation of the present invention introduces unnecessary confusion, the detailed description of the disclosed features and touches will be omitted. The terminology of the present specification is for the purpose of describing particular embodiments only, and is not limiting of the invention. Book ride language RAID Redundant Array of Independent refers to a magnetic sheet (redundantArray〇fIndependentDisks; originally referred to a redundant array of low-cost magnetic sheet (Redund de ay 〇f "said
Disks))。-般而言，魏叫術是在多個硬碟上的不同地點（因 此’重複）儲存相同資料的方式。通過將資料儲存於多個磁片， 可使輸人/輸鱗行明_方式錢，從而麟其性能。因 201243566 多個磁片會增加平均故障間隔時間（_η time between failures ’ MTBF) ’因此’重複儲存資料還可以提高崎故障性。 除非有特殊的定義’用於本說明書的資料（包括技術及科 學術語）具有與本領域技術人員通常理解的含義相_意思。 除非在本說明書中進行定義，與詞典中定義的術語相同的通常 使用的術語’在相關技術和本發明的脈絡中有與其含義一致的 意思，而非以理想化或過度形式化的意思去解釋。 下面，結合附圖對一實施例PCI-Express (PCI-e)類型的 儲存裝置進行詳細說明。 本發明實施例提供用於支援為主機的低速資料處理速度 的PCI-Express (PCI_e)類型的儲存裝置的備份及恢復功能。 尤其是，本發明實施例提供用於一個以上（即一套）半導體儲 存裝置（semiconductor storage devices (SSDs))的備份及恢復 功能。一般而言，本發明提供連接於備份控制器和備份儲存裝 置的二次電源裝置。在一次電源裝置不運轉時（例如，發生故 障時）’啟用上述二次電源裝置。為應對上述運轉，上述備份 控制器備份儲存於上述儲存系統的任何半導體儲存裝置的任 何資料（不僅是保存於上述儲存系統的主記憶體或與之連接的 任何主機伺服器的主記憶體的任何資料）。在上述主記憶體重 新運轉時，上述二次電源裝置的運轉將停止，而且％備份的所 有資料將恢復為原資源。 上述PCI-Express (PCI-e)類型的儲存裝置，通過 PCI-Express類型的介面在上述主機和記憶體磁片之間進行資 料通信的過程中，調整在上述主機和記憶體磁片之間發送/接 201243566 收的貝料㈣的同步，從而在為上述主機的低速資料處理速度 的同時支援為上述記憶體磁片的高速資料處理速度，以支援 上述魏體的性能’在财技躺介面環境巾最錄度地進行 高速處理。典型實施例中· 了町挪咖技術但也可採 用其他方式。例如，本發明可採用提供利用sas/sata介面的 SAS/SATA類型儲存裝置的SAS/SATA技術。 如圖1為本發明一實施例PCI-Express (PCI_e)類型的受 二10控制的儲存裝置(例如，向PCI_Express (PCI-e)類型 提供儲存功能）結構概略示意圖。如圖所示，圖丨表示一實施 例受RAID控制的PCI_Express類型的儲存裝置包括：記憶 體磁片部（或稱為高速半導體儲存裝置刚）刚，包括具備 多個揮發性半導體記憶體的多個記憶體磁片；RAID控制器 =〇，連接於半導體儲存裝置腸；（例如，ρα·Εχρ職主機） "面邛200，在上述記憶體磁片部和電腦主機之間提供連接； 控制器部300，·輔助電源部,利用通過上述ρα_Εχ卿s 主機介面部從上述主機傳送的上述電源進行充電以維持一定 的電源；電源控制部，將從上駐機傳遞㈣源通過上述 主機PCI-EXpress介面部供應至上述控制器部、上述記憶體磁 片部、上述備份儲存部及上述備份控制部，而且，在通過上述 主機PCI-Express介面部從上述主機傳送的電源中斷或從上述 主機傳送的電源發生錯糾，從上述獅電源部接收電源並通 過上述控部向上述記紐糾賴應獅；備份儲存部 600 ’儲存上述記憶體磁片部的資料；及備份控制部，根 據上述主機_示或在從上述主機傳送的電源魏錯誤時 201243566 份儲存在上述備份儲存勒的上述記憶體磁片部的資料。 上述記憶體磁片部觸包括多個具備多個用於高速資料 登錄/輸的多個揮發性半導體記憶體（例如，DDR、ddr2、 DDR3 SDRAM)的§己憶體磁片，並根據上述控制器300控 制輸入及輸出資料。上述記憶體磁片部1〇〇可具有上述記憶體 磁片並列設置的結構。 上述PCI-Express主機介面部2〇〇在主機和上述記憶體磁 片部刚之間提供連接魏。上述主機可為電腦系統或類似的 設備，且可具備PCI-Express介面和電源裝置。 上述控制器部300，調整在上述PCI_Express主機介面部 200和上述記憶體磁片部1〇〇之間發送/接收的資料信號的同 步，以控制上述PCI-Express主機介面部200和上述記憶體磁 片部100之間的資料發送/接收速度。 圖2為圖1的高速半導體儲存裝置1〇〇的結構概略示意 圖。如圖所示，半導體儲存裝置/記憶體磁片部1〇〇，包括：（例 如，PCI-EXpress主機）主機介面（圖i所示的介面2〇〇或如 圖所示的另外的介面）202、與備份控制模組7〇〇連接的DMA (Direct Memory Access ’直接記憶體存取）控制器3〇2、Ε(χ (Error Correction Code ’改錯碼）控制器及用於控制作為高速 儲存裝置*的記憶體602的一個以上單元6〇4的記憶體控制琴 306。 圖3為用於本實施例上述pci-Express類型儲存裝置的上 述控制器部結構概略示意圖。如圖3所示，本實施例控制部 300 ’包括.§己憶體控制模組310 ’控制上述記憶體磁片部1〇〇 201243566 的資料登錄/輸出；DMA控制模組320，控制上述記麵控制 模組310以根據通過上述Ρα_Εχρ·主機介面部·接收的 來自主機的指示向上述記憶體磁片部1〇〇儲存資料，或從上述 記憶體磁片部100讀取資料以將上述資料提供給上述主機，·緩 衝器330 ’根據上述DMA控制模組的控制緩衝資料；同步控 制模組340 ’在DMA控制模組320的控制下，通過上述dma 控制模組32G#上述記憶體控麵組綱接收與從上述記憶體 磁片部100讀取的資料對應的資料信號時，通過調整資料信號 的同步具備與Ρα·Εχρ觀if雜定誠崎錢度，以將上 述同步龍鎌傳送至PCI_ExP聰域介_ ，而在通 過上述PCI-EXpress主機介面部2〇〇從上述主機接收資料信號 時，通過罐上述麵信_同步具備_於上述記憶體磁片 部1〇〇的通信協定（例如，PCI、PCI_X或PCI_e等）對應的傳 送速度’以通過上述DMA控制模組320和記憶體控制模組3 i 〇 將上述同步域傳送至上述記鐘磁牌⑽；及高速介面模 組350 ’高速處理在上述同步控制模組34〇和上述d隐控制 模組320之間發送/接收的資料。在此，上述高速介面模組挪 包括具有雙重緩衝聽構的緩衝器和糊仵列結構的緩衝 器’而且’在利用上述緩衝器緩衝在上述同步控制模組⑽和 上述DMA控制模組320之間發送/接收的資料的同時，調整資 料時鐘以在無損失的情況下，高速處理在上述同步控麵組 340和上述DMA控制模組32〇之間發送/接收的資料。 、上述輔助電源部400可由可在充電電池或類似的襄置構 成’因此，上述輔助電源部400通常利用通過上述pa_Express 201243566 主機介面部200從上述主機傳送的電源進行充電以維持一定 it’另外，根據上述電源控卿5〇0的控制向上述電源控 制部500供應已充電電源。 上述電源控制部500將從上述主機傳遞的電源通過上述Disks)). In general, Wei called is the way to store the same data at different locations (and so on) on multiple hard drives. By storing the data in a plurality of magnetic sheets, it is possible to input and lose the scales, thereby lining the performance. Since 201243566 multiple floppy disks will increase the mean time between failures (_η time between failures ' MTBF) ' so 'repetition of stored data can also improve the squeegee failure. Unless specifically defined, the materials (including technical and scientific terms) used in this specification have meanings that are commonly understood by those skilled in the art. Unless otherwise defined in the specification, the commonly used terminology which is the same as the term defined in the dictionary has the meaning of the meaning in the related art and the context of the present invention, and is not explained by the meaning of idealization or over-formalization. . DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a PCI-Express (PCI-e) type storage device of an embodiment will be described in detail with reference to the accompanying drawings. Embodiments of the present invention provide backup and recovery functions for a PCI-Express (PCI_e) type of storage device for supporting low speed data processing speed for a host. In particular, embodiments of the present invention provide backup and recovery functions for more than one (i.e., a set of) semiconductor storage devices (SSDs). In general, the present invention provides a secondary power supply unit coupled to a backup controller and a backup storage device. The above secondary power supply unit is activated when the primary power supply unit is not operating (for example, when a failure occurs). In order to cope with the above operation, the backup controller backs up any data stored in any semiconductor storage device of the storage system (not only any of the main memory stored in the main memory of the storage system or any host server connected thereto) data). When the above main memory weight is newly operated, the operation of the above secondary power supply device will be stopped, and all the data of the % backup will be restored to the original resource. The PCI-Express (PCI-e) type storage device is configured to transmit between the host and the memory magnetic disk during a data communication between the host and the memory magnetic disk through a PCI-Express type interface. /Synchronization of the bedding material (4) received by 201243566, so as to support the high-speed data processing speed of the above-mentioned memory magnetic sheet while supporting the low-speed data processing speed of the above-mentioned host, in order to support the performance of the above-mentioned Wei body's environment The towel is processed at the highest speed. In the exemplary embodiment, the town Noga technology is used, but other methods are also available. For example, the present invention may employ SAS/SATA technology that provides a SAS/SATA type storage device utilizing a sas/sata interface. 1 is a schematic diagram showing the structure of a PCI-Express (PCI_e) type of storage device controlled by 20 (for example, providing a storage function to a PCI_Express (PCI-e) type) according to an embodiment of the present invention. As shown in the figure, the storage device of the PCI_Express type controlled by the RAID in an embodiment includes: a memory magnetic disk portion (or a high-speed semiconductor storage device), including a plurality of volatile semiconductor memories. Memory disk; RAID controller = 〇, connected to the semiconductor storage device intestine; (for example, ρα·Εχρ职主机) "面邛200, providing a connection between the memory disk portion and the host computer; The device unit 300 and the auxiliary power source unit perform charging by using the power source transmitted from the host through the ρα_Εχ s host interface, to maintain a constant power supply, and the power control unit transmits (4) the source from the host to the host PCI- The EXpress interface is supplied to the controller unit, the memory magnetic disk unit, the backup storage unit, and the backup control unit, and is interrupted by a power transmission from the host through the host PCI-Express interface or transmitted from the host. The power supply has been wrongly corrected, receiving power from the above-mentioned lion power supply unit and arranging the lions through the above-mentioned control unit to the above-mentioned counters; backup storage 600' stores the data of the magnetic disk portion of the memory; and the backup control unit stores the data of the memory disk portion of the backup storage device according to the host device or the power supply error transmitted from the host computer; . The memory disk portion includes a plurality of § memory sheets having a plurality of volatile semiconductor memories (for example, DDR, ddr2, DDR3 SDRAM) for high-speed data registration/transmission, and according to the above control The device 300 controls input and output data. The memory magnetic sheet portion 1A may have a structure in which the memory magnetic sheets are arranged in parallel. The PCI-Express host interface 2〇〇 provides a connection between the host and the memory disk portion. The host can be a computer system or the like and can have a PCI-Express interface and a power supply unit. The controller unit 300 adjusts synchronization of data signals transmitted/received between the PCI_Express host interface 200 and the memory disk unit 1 to control the PCI-Express host interface 200 and the memory magnetic body. The data transmission/reception speed between the slice units 100. Fig. 2 is a schematic view showing the configuration of the high-speed semiconductor memory device 1 of Fig. 1. As shown, the semiconductor memory device/memory disk portion 1 includes: (eg, a PCI-EXpress host) host interface (interface 2 shown in FIG. 1 or another interface as shown) 202. DMA (Direct Memory Access) controller connected to the backup control module 7A2, Ε (χ (Error Correction Code) error controller) and used for control as a high speed The memory of one or more units 6〇4 of the memory 602 of the storage device* controls the piano 306. Fig. 3 is a schematic diagram showing the structure of the controller unit used in the above-described pci-Express type storage device of the present embodiment. In this embodiment, the control unit 300' includes a data recording/output of the memory disk unit 1〇〇201243566, and a DMA control module 320 for controlling the surface control module 310. The data is stored in the memory magnetic sheet portion 1A according to an instruction from the host through the above-mentioned Ρα_Εχρ·host interface, or the data is read from the memory magnetic sheet portion 100 to supply the data to the host. · The buffer 330' is controlled according to the control buffer data of the DMA control module; the synchronization control module 340' is controlled by the DMA control module 320, and the memory control surface group is received by the DMA control module 32G# When the data signal corresponding to the data read by the memory magnet unit 100 is adjusted, the synchronization signal is adjusted to the Ρα·Εχρ观 if the amount of the Sakizaki money is used to transmit the synchronous dragon 至 to the PCI_ExP. When the data signal is received from the host by the PCI-EXpress host interface 2, the communication protocol (for example, PCI, PCI_X, or the above-mentioned memory disk unit 1) is provided through the can. PCI_e, etc. corresponding transmission speed 'to transmit the synchronization domain to the clock magnetic card (10) through the DMA control module 320 and the memory control module 3 i ;; and the high speed interface module 350 'high speed processing in the above synchronization The data transmitted/received between the control module 34 and the d hidden control module 320. Here, the high speed interface module includes a buffer with a double buffer structure and a buffer of a paste column structure. And 'while' adjusting the data clock while buffering the data transmitted/received between the synchronous control module (10) and the DMA control module 320 by using the buffer to perform high-speed processing in the synchronization without loss The data transmitted/received between the control group 340 and the DMA control module 32A. The auxiliary power supply unit 400 may be configured to be in a rechargeable battery or the like. Therefore, the auxiliary power supply unit 400 is generally utilized by the above pa_Express. 201243566 The host interface unit 200 is charged from the power source transmitted from the host to maintain a constant level. In addition, the charged power source is supplied to the power source control unit 500 according to the control of the power source control unit 〇0. The power supply control unit 500 passes the power transmitted from the host through the above
Pd_Exp職主機介面部供應至上述控制器部、上 憶體磁片部_、上述備份儲存部_及上述備份控制部. 與此同時’在通過上述ρα_Εχρ職主機介面部綱從上 述主機傳送的電源中斷或從上述主機傳動的電源超過間值 時’上述電源控制部500從上述辅助電源部4〇〇接收電源，而 且，通過上述控制器部向上述記憶體磁片冑刚供癖 電源。 〜 上述備份儲存部_由如硬碟等低速揮發性儲存裝置構 成，用以保存上述記憶體磁片部100的資料。 上述備份控制部700控制上述備份儲存部_的資料登錄 ，出以備份儲存至上述備份儲存部内的上述記憶體磁片、 部100的資料，另外，根據上述主機的指示或在因從上述主機 傳送的電源超㈣值而導致上述域電源錯辦，備份儲存在 上述備伤儲存部6GG内的上述記憶體磁片部丨⑽的資料。 -圖4至圖6為用於半導體儲存裝置的備份及恢復系統詳細 不意圖。首A ’如圖4所示，—種系，其具備連接於其 ，身連接於磁片儲存部11〇的儲存裝置控制器遍的主控制器 P 300和套半導體儲存裝置記憶體磁片部（下稱“半導體儲 存裝置励）。另外，示出連接不間斷電源裝置420 (UninterrutablePowerSupply ’ 之主電源裝置 41〇，用 201243566 以向系統9〇〇供應主電源q另外，根據本發明，二次電源裝置 連接於半導體儲存裝置備份控制器7〇 、 及至少-辨《儲存裝置輯翻=；^#裝置 =般而言，二次電源裝置43〇為應對主電源裝置的停 用而被啟動。發生上述情況時，備健㈣將儲存於上述 ^導體儲存裝置100的半導體儲存裝置資料儲存於備份儲存 裝置_A。根據本實_，當完成上述半導體儲魏置資料 =備份時’停用二次電源裝置。另外，主電源裝置彻重 新被啟動時，備份控從上述備份儲存裝置6·向上 述+導體儲存裝置恢復上述半導體儲存裝置資料。 本實施例對圖5所示的單一半導體儲存裝置系統9ι〇進行 2細的說明。與如圖4所示的系統類似上述系統⑽， 匕括其自身連接於主記賴（緩存）⑼的儲存裝置控制器 ^、快閃賴料導·雜置13G、卿（Ha·崎 =uo、DDR (DoubleDataRate，雙倍數據速率）半導體 子裝置150。另外，圖5示出連接於不間斷電源裝置必以 口系統900供應主電源的主電源裝置彻。與此同時，根據本 =明，二次電源裝置不僅連接於主記憶體12〇和醜半The Pd_Exp host device is supplied to the controller unit, the upper memory unit _, the backup storage unit _, and the backup control unit. At the same time, the power transmitted from the host through the ρα_Εχρ When the power supply that is interrupted or transmitted from the host exceeds the inter-value, the power supply control unit 500 receives power from the auxiliary power supply unit 4, and the power supply is supplied to the memory magnetic sheet by the controller unit. The backup storage unit _ is composed of a low-speed volatile storage device such as a hard disk for storing the data of the memory disk unit 100. The backup control unit 700 controls the data registration of the backup storage unit_ to back up the data stored in the memory disk and the unit 100 in the backup storage unit, and is transmitted from the host according to the instruction of the host. If the power supply exceeds the value of (4), the domain power supply is misplaced, and the data of the memory disk unit (10) stored in the damage storage unit 6GG is backed up. - Figures 4 to 6 are detailed and not intended for a backup and recovery system for a semiconductor storage device. As shown in FIG. 4, the first A' has a main controller P300 connected to the storage device controller connected to the magnetic disk storage portion 11 and a magnetic storage portion of the semiconductor storage device memory. (hereinafter referred to as "semiconductor storage device excitation". In addition, it is shown that the main power supply device 420 is connected to the uninterruptible power supply device 420 (Uninterrutable PowerSupply ', and the main power supply q is supplied to the system 9 2012 with 201243566. In addition, according to the present invention, The power supply device is connected to the semiconductor storage device backup controller 7A, and at least the "storage device is turned over"; ^# device = generally, the secondary power supply device 43 is activated in response to the deactivation of the main power supply device. When the above situation occurs, the maintenance (4) stores the semiconductor storage device data stored in the above-mentioned conductor storage device 100 in the backup storage device_A. According to the actual implementation, when the semiconductor storage device is completed, the backup is disabled. a secondary power supply device. In addition, when the main power supply device is completely restarted, the backup control restores the semiconductor storage device from the backup storage device 6 to the +-conductor storage device. The present embodiment is a detailed description of the single semiconductor storage device system 9 shown in Fig. 5. The system (10) is similar to the system shown in Fig. 4, including itself connected to the master record (cache) (9). Storage device controller ^, flashing material guide, miscellaneous 13G, qing (Ha saki = uo, DDR (Double Data Rate) semiconductor sub-device 150. In addition, Figure 5 shows the connection to the uninterruptible power supply The device must supply the main power supply device of the main power supply by the mouth system 900. At the same time, according to the present invention, the secondary power supply device is not only connected to the main memory 12 and the ugly half.
存裝置15〇，而且’還連接於半導體儲存裝置備份控制 器7〇〇及備份儲存裝置600A V -般而言’二次電源裝置·為應對主電源裝置備的停 用而被啟動。發生上述情況時，備份控制器不僅將上述主 ，憶體120的主記憶體資料，而且，還將儲存於上述半導體儲 存震置100的半導體儲魏置資料儲存於備份儲存裝置 201243566 600A。根據本實施例，當完成上述半導翻^存裝置資料的備 伤時’ V用一次電源裝置430。另外，主電源裝置41〇重新被 啟動時’備份控制器7〇〇從上述備份儲存震置6〇〇A向上述半 _儲存裝置獅恢復上述半導體儲存裝置資料，或向上述主 記憶體120恢復上述主記憶體資料。 一圖6在更複雜地網路化了的場景中說明上述概念。如圖所 不，主機祠服器92〇與儲存系、统93〇連接。如騎*，儲存系 統930，包括與其本身連接於主記憶體（緩存）12〇的儲存裝 置控制器36〇連接的儲存控制器、快閃記憶體半導體儲存 裝置 130、HDD (High Density Drive) ho 及 DDR 半導體儲 存裝置15〇。域舰n 92G，包減其本身連接料記憶體 (緩存）120的儲存裝置控制器36㈣接的主控制器部3〇〇、 快閃記憶辭導體儲存裝置13G、⑽及錢通道 Channel ’ FC)控制器 16〇。 另外’圖6示出連接於不間斷電源裝置42〇以向主機伺服 器920和儲存系、统930供應主電源的主電源裝置41〇。另外， 根據本發明’二次電源裝置剔連接於半導體儲縣置備份控 制器700、備份儲存裝置6〇〇A、儲存系统93〇的主記憶體⑽ 和DDR半導體儲存裝置⑼及主機飼服器9如的主記憶體 120。 一般而言’二次電源裝i 430為應對主電源裝置彻的停 用而被啟動。發生上述情況時，將儲存於上述半導 __資料、儲細咖的主記憶㈣的 料及主機伺服器92〇的主記憶體的飼服器資料儲存於備份 13 201243566 =存裝置6〇GA °根據本實闕，當完成上述半麵儲存農置 資料的備份時’停用二次電源裝置。另外主電源裝置4⑴ 重新被啟動時，備份控制器7〇〇各向上述半導體儲存裝置 励、儲存系、统920肚記憶體12〇及主機伺服器920的主記 憶體120 ’恢復上述半導體儲存裝f資料、上述儲存系統資料 及上述伺服器資料。 上述運行的詳細過程如下： 1. 正常運行 a. AC電源向上述辅助電源裝置（不間斷電源装置）供 應電源； ^ b. 上述辅助電源裝置（不間斷電源裝置）對揮發性轉至 備份電池進行充電； c. 系統利用上述輔助電源震置（不間斷電源褒置）驅動 上述系統； d. 此電池不用於正常運行’而是為上述電池的充電利 用上述主電源； e. 上述二次電源不用於上述電源的節約。 2. 應急運行 a.備份 I. AC電源斷開·>辅助魏裝置（不間斷電源裝置） 斷開+啟動二次電源裝置（電池）； II. 二次電源裝置向上述半導體儲存裝置、上述半導體 儲存裝置備份控制器及±述備份儲存裝置供應DC 電源； 201243566 逑+導體儲存裝置模組備份控制器自動將上述 =從上述半導體儲存裝置備份至上述備份儲存 f完成找備份錢，均轉_存裝置模 .、、且傷健錄向上述魏提示完成備份 iv.上述電池系統停止上述二次電源公用。 b.恢復 l在恢復AC電源時’上述二次電源裝置連接於上述 辅助電源裝置（不間斷電源裝置）；上述主電源裝 置啟動時，上述電池純檢測上述情況並提示給上 述揮發性模組備份控制器； 上述半導體儲存裝置模_份控㈣將上述資料 從上述備份儲存裝·復至上述半導體儲存褒置； 证完成恢復時，上述半導體儲存裝置模組備份控制器 向上述電池系統傳送信號，而且，上述電池停止二 次電源供應。 雖然圖示或描述了神丨性實_，但本領频術人員可在 不脫離本發明權利要求書的範圍之内，對本發明的形狀和細節 進行修改。與此同時，在不脫離本發明核心範圍的前提下，對 本發明進行各觀更’以給本發_技_容應用較狀況或 材料。因此，本發明不受上述為詳細說明本發明而列舉的特定 最佳實施躺關，本發明可包括屬於卿侧要求書範圍 之内的所有實施例。 曰巳 上述對本發明各種方面的記載的目的達到說明和記載的 目的。不排他性地或以準確地形式限制本發明，可進行各種變 201243566 更和變化。對於技術人員而言理所當然的變更和變化都屬於權 利要求書中定義的本發明的範圍之内。 【圖式簡單說明】 圖1為一實施例PCI-Express (PCI-e)類型的儲存裝置結 構概略示意圖； 圖2為圖1的尚速半導體儲存裝置的結構概略示意圖； 圖3為圖1的控制器部結構概略示意圖。 圖4為本發明-實施例半導體儲存裝置的備份及恢復系 統結構概略示意圖； 圖5為根據本發明-實施例在單一半導體齡裝置系統 内實現的如圖4所示的備份及修復系統概略示意圖； 圖6為根據本發明一實施例在通過網路連接的半導體儲 存裝置系_實_如圖4 的備份及修㈣統概略示意 圖。 上述附圖不是按尺寸縮放的。上述附圖只是概略示意圖， =非表述本發日轉定的參數。上述_只是贿本發明的典型 f施例’因此，不應理解成對本發明的限制。在上述附圖中， 相似的附圖標記表示類似的元件。 【主要元件符號說明】 100 .半導體儲存裝置（記憶體碑片部） 100” ：半導體儲存裝置 11〇 :磁片儲存部 120 :主記憶體 130 :快閃記憶體半導體儲存農置 201243566 140 ： HDD 150 ： DDR半導體儲存裝置 160 ： 光纖通道控制器 200 : 介面 300 ： 控制器 302 ： DMA控制器 306 ： 記憶體控制器 310 ： 記憶體控制模組 320 ： DMA控制模組 330 : 緩衝器 340 ： 同步控制模組 350 ： 高速介面模組 360 ： 儲存裝置控制器 400 ： 輔助電源 410 ： 主電源裝置 420 ： 不間斷電源裝置 430 ： 二次電源裝置 500 ： 電源控制部 600 : 備份儲存部 600A :内部記憶體備份 600B :資料備份 602 ： 記憶體 604 :單元 700 ： 内部備份控制器 17 201243566 800 : RAID控制器 900 :狀態監視器 910 :單一半導體儲存裝置系統 920 :主機伺服器 930 :儲存系統The storage device 15 is also connected to the semiconductor storage device backup controller 7A and the backup storage device 600A V - in general, the secondary power supply device is activated in response to the suspension of the main power supply device. When the above situation occurs, the backup controller not only stores the main memory data of the main memory and the memory 120, but also stores the semiconductor storage data stored in the semiconductor storage device 100 in the backup storage device 201243566 600A. According to this embodiment, the primary power supply unit 430 is used when the semiconductor data of the above-described semiconductor storage device is completed. In addition, when the main power supply device 41 is restarted, the backup controller 7 recovers the semiconductor storage device data from the backup storage device 6A to the semi-storage device lion, or restores to the main memory 120. The above main memory data. Figure 6 illustrates the above concept in a more complex networked scenario. As shown in the figure, the host server 92 is connected to the storage system. For example, the storage system 930 includes a storage controller, a flash memory semiconductor storage device 130, and an HDD (High Density Drive) ho connected to the storage device controller 36 connected to the main memory (cache) 12A. And DDR semiconductor storage device 15〇. The domain ship n 92G, the storage device controller 36 (4) of the storage device memory (cache) 120, the main controller unit 3, the flash memory conductor storage device 13G, the (10) and the money channel Channel 'FC) Controller 16〇. Further, Fig. 6 shows a main power supply unit 41A connected to the uninterruptible power supply unit 42 to supply main power to the host server 920 and the storage system 930. In addition, according to the present invention, the 'secondary power supply device is connected to the semiconductor storage county backup controller 700, the backup storage device 6A, the main memory (10) of the storage system 93, and the DDR semiconductor storage device (9) and the host feeder. 9 as the main memory 120. In general, the secondary power supply i 430 is activated in response to a complete shutdown of the main power supply unit. When the above situation occurs, the storage device stored in the semi-conductive __ data, the main memory of the fine coffee (4), and the main memory of the host server 92 储存 are stored in the backup 13 201243566 = storage device 6 〇 GA ° According to the present embodiment, when the backup of the above-mentioned half-side storage agricultural materials is completed, the secondary power supply device is deactivated. When the main power supply device 4(1) is restarted, the backup controller 7 restores the semiconductor storage device to the main memory 120' of the semiconductor storage device excitation, storage system, system memory 920, and host server 920. f data, the above storage system data and the above server data. The detailed procedure of the above operation is as follows: 1. Normal operation a. AC power supply to the above auxiliary power supply unit (uninterruptible power supply unit); ^ b. The above auxiliary power supply unit (uninterruptible power supply unit) transfers the volatile to the backup battery. Charging; c. The system uses the above auxiliary power source to set (uninterruptible power supply) to drive the above system; d. The battery is not used for normal operation', but the above main power source is used for charging the above battery; e. The savings in the above power supply. 2. Emergency operation a. Backup I. AC power disconnection · > Auxiliary Wei device (uninterruptible power supply device) Disconnect + start secondary power supply device (battery); II. Secondary power supply device to the above semiconductor storage device, the above Semiconductor storage device backup controller and ± backup storage device supply DC power supply; 201243566 逑 + conductor storage device module backup controller automatically backup the above = from the above semiconductor storage device to the above backup storage f to complete the backup money, both turn _ Save the device module., and the injury record to the above Wei prompt to complete the backup iv. The above battery system stops the above secondary power supply. b. Recovery l when the AC power source is restored, the secondary power supply device is connected to the auxiliary power supply device (uninterruptible power supply device); when the main power supply device is activated, the battery detects the above situation and prompts the volatile module backup The semiconductor storage device module (4) stores the data from the backup storage device to the semiconductor storage device; when the card is restored, the semiconductor storage device module backup controller transmits a signal to the battery system. Moreover, the above battery stops the secondary power supply. Although the present invention has been illustrated or described, the shapes and details of the present invention may be modified by those skilled in the art without departing from the scope of the appended claims. At the same time, the present invention may be applied to various aspects or materials without departing from the scope of the invention. Therefore, the present invention is not limited to the specific embodiments described above, which are set forth in the Detailed Description of the Invention. The present invention may include all embodiments within the scope of the claims. The above description of the various aspects of the invention has been achieved for purposes of illustration and description. The present invention may be limited not exclusively or in an accurate form, and various changes may be made to the 201243566. All changes and modifications which come naturally to the skilled person are within the scope of the invention as defined in the claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram showing the structure of a PCI-Express (PCI-e) type storage device according to an embodiment; FIG. 2 is a schematic diagram showing the structure of the still-speed semiconductor storage device of FIG. 1. FIG. Schematic diagram of the structure of the controller unit. 4 is a schematic diagram showing the structure of a backup and recovery system of a semiconductor storage device according to an embodiment of the present invention; FIG. 5 is a schematic diagram of a backup and repair system shown in FIG. 4 implemented in a single semiconductor age device system according to an embodiment of the present invention. FIG. 6 is a schematic diagram of a backup and repair (four) system of a semiconductor storage device connected through a network according to an embodiment of the present invention. The above figures are not scaled. The above figures are only schematic diagrams, = not the parameters that are forwarded on the date of this issue. The above is merely a typical example of the invention, and therefore should not be construed as limiting the invention. In the above figures, like reference numerals indicate like elements. [Description of main component symbols] 100. Semiconductor storage device (memory tablet unit) 100": semiconductor storage device 11: magnetic disk storage portion 120: main memory 130: flash memory semiconductor storage farmer 201243566 140 : HDD 150 : DDR semiconductor storage device 160 : Fibre Channel controller 200 : Interface 300 : Controller 302 : DMA controller 306 : Memory controller 310 : Memory control module 320 : DMA control module 330 : Buffer 340 : Synchronization Control module 350: High-speed interface module 360: Storage device controller 400: Auxiliary power supply 410: Main power supply device 420: Uninterruptible power supply device 430: Secondary power supply device 500: Power supply control unit 600: Backup storage unit 600A: Internal memory Volume Backup 600B: Data Backup 602: Memory 604: Unit 700: Internal Backup Controller 17 201243566 800: RAID Controller 900: Status Monitor 910: Single Semiconductor Storage Device System 920: Host Server 930: Storage System