TW201238266A - Hybrid transmission system for transmitting signal with different directionality by optical fiber and electrical transmission line - Google Patents

Hybrid transmission system for transmitting signal with different directionality by optical fiber and electrical transmission line Download PDF

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TW201238266A
TW201238266A TW100107675A TW100107675A TW201238266A TW 201238266 A TW201238266 A TW 201238266A TW 100107675 A TW100107675 A TW 100107675A TW 100107675 A TW100107675 A TW 100107675A TW 201238266 A TW201238266 A TW 201238266A
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Taiwan
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servant
data signal
speed data
signal
chip
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TW100107675A
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Chinese (zh)
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TWI440320B (en
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John Lynn
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Simula Technology Inc
Optomedia Technology Inc
Netgami System Llc
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Abstract

A hybrid transmission system for transmitting signal with different directionality by optical fiber and electrical transmission line is disclosed. The hybrid transmission system includes a master system and a slave system. The master system connects to a hybrid connector through a first electrical transmission line and a first optical fiber. The slave system connects to the hybrid connector through a second electrical transmission line and a second optical fiber so that signal can be transmitted between the master system and the slave system through the hybrid connector, wherein the first and second electrical transmission line are responsible for transmitting bi-directional control signal between the master system and the slave system. The first and second optical fiber are responsible for transmitting uni-directional data signal transmitted from the master system to the slave system. In this way, when the hybrid transmission system is applied on a hand-held electronic device (for example: notebook computer, mobile phone and video player…) by providers, the master system (equivalent to a control circuit of hand-held electronic device) can transmit mass uni-directional data signal (for example: image or video data signal) to the slave system (equivalent to a display circuit of hand-held electronic device) by extremely high frequency through the optical fiber. However, low speed bi-directional control signal (or uni-directional audio data signal) is transmitted between the master system and the slave system through the traditional electrical transmission line. Providers only need to change specification of connection interface between the master system and the slave system in small-scale without requirement of changing design of the whole system. The hybrid transmission system can be realized on traditional hand-held electronic device easily so that the hand-held electronic device has very high image transmission speed and quality. Since most electrical transmission lines and the corresponding terminals for transmitting image data in traditional connectors are replaced by the optical fibers so that complexity of the hybrid connector structure can be simplified for decreasing volume of the hybrid connector. Problem of high frequency noise interference caused by using high frequency electrical signal to transmit image data in traditional connectors can be solved effectively.

Description

201238266 六、發明說明: 【發明所屬之技術領域】 本發明係一種訊號傳輸系統’尤指一種利用光纖及電氣傳輸 線傳輸不同方向性訊號之混合式傳輸系統(hybrid transmission system),該混合式傳輸系統係利用電氣傳輸線,傳輸一主系統 (master system)及一僕系統(slave system)間之雙向控制訊號 (bi-directional control signal),且利用光纖,傳輸由該主系 統傳送至該僕系統之單向數據訊號(uni-directi〇nal data signal)。如此,不僅能輕易地將該混合式傳輸系統實現在傳統之 手持式電子裝置上,且能大幅提高該等手持式電子裝置之影像傳 輸速率及品質,並大幅縮小該主系統及僕系統間所使用之一混合 式連接器(hybrid connector)之體積及複雜度。 【先前技術】 按,近年來,由於影像顯示技術的不斷進步,各式影音設備 已為人們帶來了前所未有的高畫質視覺享受,基於消費者對高晝 質視訊的強烈需求’及其所隱含的魔大商機,#者亦不斷開發出 各式先進之影音介面,用以連接一影音源(如:桌上型電腦、藍光 播放器…等)及-顯示設備(如:電腦顯示器、液晶電視··等),其 中尤以數位視況’丨面(Digital Visual Interface,以下簡稱DVI) 及高解析度多媒體介面(High Definiti〇n Multimedia201238266 VI. Description of the Invention: [Technical Field] The present invention relates to a signal transmission system, particularly a hybrid transmission system that transmits optical signals and electrical transmission lines using different directional signals, the hybrid transmission system. Using an electrical transmission line to transmit a bi-directional control signal between a master system and a slave system, and using the optical fiber to transmit a single transmission from the host system to the servant system Uni-directi〇nal data signal. In this way, the hybrid transmission system can be easily implemented on the conventional handheld electronic device, and the image transmission rate and quality of the handheld electronic device can be greatly improved, and the main system and the servant system can be greatly reduced. Use the volume and complexity of one of the hybrid connectors. [Prior Art] In recent years, due to the continuous advancement of image display technology, various audio-visual equipments have brought unprecedented high-definition visual enjoyment to people, based on consumers' strong demand for high-quality video. Implied Magic Business Opportunity, #者 has also continuously developed a variety of advanced audio and video interfaces to connect an audio and video source (such as: desktop computers, Blu-ray players, etc.) and - display devices (such as: computer monitors, LCD TV··etc.), especially digital digital interface (Digital Visual Interface (DVI) and high-definition multimedia interface (High Definiti〇n Multimedia)

Interface,以下最受矚目,且已逐漸成為市場主流, 炫僅扼要介紹此二介面之特性及規格如下: ⑴數位視訊介面⑽):是由Digital Display Working G_ 201238266 於二不工作小組所斷—種視訊介面標準,以期透過數位 的傳送方式,提昇電腦顯示器的影像畫面品質,目前 廣泛應用於液晶電視、數碑投影機等顯示設 + 爾顯示系統包括一傳送号 般 建在ϋ谓η $ 中該傳送器係内 建在&像源(如·桌上型電腦、藍光播放器· 晶片中,該接收器則是一題干〜U不卞 疋顯不δ又備(如.電腦顯示器、液晶 後^ 上的Γ塊電路,用以接受該傳送11傳來之數位影 訊’且對其進行解碼後,再由該顯示設備播放出來。謂 介面係全部採賴位格式傳輸影像,以確保由—影像源傳輸 到一顯不設備的數位影像訊號不易受到雜訊干擾,進而能維 持數位影像訊號的完整性’以在該顯示設備上呈現出更清晰 的影像;反之,傳統VGA介面(即傳統15pin D型接頭)係先 將心像源產生之數位影像訊號轉換為類比訊號,再將類比 訊號傳送至-顯示設備,最後’再透職顯示設_換為數 位影像訊號’始^呈現itl來,故傳統VGA介面舰之影像訊 號不僅極$受_訊干擾’亦會造成訊絲減,致其影像品 質遠較DVI介面為差。查,DVI介面連接s(c_ct〇r)之端 子(Pin)數,依單通道及雙通道的不同,可為丨卜別支端子, 且DVI介面之最大傳輸速率介於每秒3. 7〜7. *個億位元 (Giga bit per second ’ 以下簡稱 Gbps)。 ⑵ 南解晰度多媒體介面(HDMI):是一種全數位化景》像/聲音傳 送介面,用以傳送無壓縮的音頻訊號及視頻訊號,且已被廣 泛應用於機上盒、DVD播放機、個人電腦、電視遊樂器、綜 合擴大機、數位音響等f彡切上’赠為料影音源與電視 201238266 機間之一共通的資料傳輸通道。^^丨介面的最大特色是整合 影音訊號一起傳輸,與傳統影音分離傳輸不同,此外,它採 用了非壓縮式的數位資料傳輸’以有效降低數位與類比轉換 中所造成的訊號干擾與衰減,故與DVI介面相較,DVI介面之 特性較適用於電腦顯示器,HDMI介面則因結合了音訊傳輸功 能,更適宜於作為新一世代多媒體影音設備的傳輸介面。 查,HDMI介面連接器之端子(pin)數,依其連接器之規格 (A-Type及Β-Type)不同,可為19〜29支端子,且HDMI介面之 最大傳輸速率已超過每秒1〇 /[固億位元⑽ps)以上。 r據上所述可知,隨著高晝質數位影像技術的不斷提升,各式 s 齡雜⑽彡音)訊號之 麵tr職hne)數量e Α幅增加,·,若影像源(或影音源) 傳制之傳輪介面無法提供每秒1健位元(Gbps)以上之 法似設備上所呈現之雜品狀解晰度,勢必將無 Μ足—般>肖費者對高晝f影像的基本要求。 源應用至兩個獨立之影像 介面,故謂^ 為傳輸數位影像(或影音)訊號之 及其内端子數量H介面連接11本身尺寸之大小、結構之複雜度 …,員不没備(如:電腦顯示器、液晶電視…等)之嗖 彳並無太大影響,、祕寻」之认 子數量較多,㈣綠尺寸鼓、騎麵雜且端 (如:筆記本_則、之私特式電子裝置 手持式電子裝晋心 影音播放器等…)令,以做為該等 、控制電路與顯示電路間傳輸數位影像(或影音) 201238266 訊號之介面。 查’目前’各式手持式電子裝置(如:筆記本電腦、行動電話 及影音播放H等·..)幾乎已成為人們日常生活及工作中不可或缺 之工具’該等手持式電子裝置中控制電路鋪示電關,用以傳 輸數位影像(或影音)訊號之介面’仍普遍使用傳統Rs—咖或I2C 介面’其+ RS-232介面是美國電子工業聯盟(EIA)制定的序列 貝料通訊的介面標準’被廣泛應用於電腦串解之岐連線,其 介面之最大傳輸速率原則上不超過每秒2G,_位元(bps),代 介面則是飛繼公司為了讓主機板、狀絲統或手機能連接至 低速週邊裝置’而在_年代發展出之内部電路整合介面,是一 種串列通訊匯流排,使用多主從(master and也⑹架構,目前 I2C介面之最大傳輸速率可達每秒3·4個百萬位元㈣ second ’以下_Mbps)。由以上所述可知,在傳統手持式電子裝 置中’用以在控制電路與顯示電路間傳輸數位影像(或影音)訊號 =面’無論係採用RS-232或代介面,均已無法勝任傳輸高畫 質數位影像U料)·㈤、練秒丨_ _ 之重眚女杯。 —故如何„又。十出一種新穎之訊號傳輸系統,不僅能輕易地被 ^在前述舰之各式顿式電子裝置上,錢大陳高該等手 j電子裝置之f彡轉觀率及品f,並大幅料料手持式電 裝置之控制電路與顯示電路間所使用之—連接器之體積及複雜 而有效免除傳統連接H因使用高頻電氣訊號傳輸影像數據 ^成之高獅訊干_題,即成為本發明在此亟欲解決的重要 课題。 201238266 【發明内容】 有鑑於此,發明人乃依多年實務經驗,並經過多次的實驗及 測試後,終於設計出本發明之一種利用光纖及電氣傳輸線傳輸不 同方向性訊號之混合式傳輪系統(hybrid transmissi〇n system) 〇 本發明之一目的,係將該混合式傳輸系統應用至一手持式電 子裝置(如:筆記本電腦、行動電話及影音播放器等…),該混合 式傳輸系統包括一主系統(master system)及一僕系統(slave system)’s亥主系統相當於手持式電子裝置之一控制電路,該僕系 統相當於手持式電子裝置之一顯示電路,該主系統係透過一第一 電氣傳輸線及一第一光纖,與一混合式連接器(hybr id⑽nect〇r) 相連接,該僕系統係透過一第二電氣傳輸線及一第二光纖,與該 混合式連接器相連接,使得該主系統及僕系統間能透過該混合式 連接器’傳輸訊號,其中該第―及第二電氣傳輸線係負責傳輸該 主系統及僕系統間之雙向控制訊號(bi_directi〇nal control signal)’s玄第一及第二光纖係負責傳輸由該主系統傳送至該僕系 統之單向數據訊號(uni_direetic)nal data啦如)。如此,由於 «玄主系統能透·等光纖,將大量之單向數據訊獻如:影像或影 音數據訊號)’以極高的速率,傳送至該齡統,但該H统與撲 系統間仍透過傳統之電氣傳輸線,傳輸低速率之雙向控制訊號, 故’業者僅需小幅變更該主系統與僕系統間連接介面之規格,而 無為大幅變動整個系統之設計,即能輕易地將該混合式傳輸系統 =現在傳統之手持式電子裝置上,使得該等手持式電子裝置不僅 此具備極狀影像傳輸速率及品質,且因料紐取代了傳統連 201238266 接器中用以傳輸影像數據之大多數電氣傳輸線及其對應之端子, 不僅使該混合式連接器本身之結構複雜度得以大幅簡化,進而大 幅縮小該混合式連接器之體積,尚能有效免除傳統連接器因使用 高頻電氣訊號傳輸影像數據所造成之高頻雜訊干擾問題。 本發明之另一目的,係該雙向控制訊號包括該主系統所產生 之一第一控制訊號及該僕系統所產生之一第二控制訊號,其中該 第一控制訊號係由該主系統傳送至該僕系統,用以控制該僕系統 之動作,該第二控制訊號係由該僕系統傳送至該主系統,用以控 制該主系統之動作。 本發明之又一目的,係該第一及第二控制訊號之傳輸速率為 每秒十個百萬位元(即,10Mbps以下),該單向數據訊號係一高速 數據訊號’該高速數據訊號之傳輸速率為每秒一個億位元以上 (即,lGbps以上)。 本lx明之又另一目的,係該主系統包括一主電路(master circuit)、一時脈控制晶片(ci〇ck)、一主串列介面控制器(MasterInterface, the following is the most popular, and has gradually become the mainstream of the market, Hyun only want to introduce the characteristics and specifications of the two interfaces as follows: (1) Digital Video Interface (10): It is broken by Digital Display Working G_ 201238266 The video interface standard, in order to enhance the image quality of computer monitors through digital transmission, is currently widely used in LCD TVs, digital tablet projectors, etc. The display system includes a transmission number, which is built in ϋ η $ The transmitter is built in the & image source (such as · desktop computer, Blu-ray player, chip, the receiver is a dry ~ U does not show the δ and prepared (such as. computer monitor, LCD The block circuit on the back ^ is used to receive the digital video transmitted from the transmission 11 and is decoded by the display device. The interface is used to transmit images in all formats to ensure that - The digital image signal transmitted by the image source to a display device is not susceptible to noise interference, thereby maintaining the integrity of the digital image signal to be presented on the display device. Clear image; on the contrary, the traditional VGA interface (ie, the traditional 15-pin D-type connector) converts the digital image signal generated by the image source into an analog signal, and then transmits the analog signal to the display device, and finally 're-distribution display _ Switching to a digital video signal 'starts ^present itl, so the traditional VGA interface ship's image signal is not only extremely _ interference, it will also cause the signal to be reduced, so that its image quality is far worse than the DVI interface. Check, DVI interface The number of the terminals of the s (c_ct〇r), the number of the terminals (Pin), according to the single channel and the two channels, the maximum transfer rate of the DVI interface is 3. 7~7. Giga bit per second (hereinafter referred to as Gbps) (2) South Resolution Multimedia Interface (HDMI): is an all-digital image/audio transmission interface for transmitting uncompressed audio signals and video signals. It has been widely used in set-top boxes, DVD players, personal computers, TV game instruments, integrated amplifiers, digital audio, etc. It is a common data transmission channel for the gift room and TV 201238266. ^^丨 interface The main feature is that the integrated video and audio signals are transmitted together, which is different from the traditional video and audio transmission. In addition, it uses uncompressed digital data transmission to effectively reduce the signal interference and attenuation caused by digital and analog conversion, so it is compatible with the DVI interface. Compared with the DVI interface, the HDMI interface is more suitable for the transmission interface of the new generation of multimedia audio and video equipment. The number of terminals (pins) of the HDMI interface connector is The connector specifications (A-Type and Β-Type) are different, can be 19 to 29 terminals, and the maximum transmission rate of the HDMI interface has exceeded 1 〇 / [solid billion (10) ps) per second. According to the above, as the high-quality digital image technology continues to improve, the number of s (m) ) ) ) ) ) ) tr tr tr tr tr tr tr tr tr tr tr tr h h 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像 影像The pass-through interface can't provide the ambiguity of the groceries presented on a device like 1 bit per second (Gbps), which is bound to be unsatisfactory. Basic requirements. The source is applied to two independent image interfaces, so it is said that the size of the digital image (or audio and video) signal and the number of terminals in the H interface 11 are different in size and structure complexity. There is not much impact on computer monitors, LCD TVs, etc., and there are a lot of recognitions in the secret search. (4) Green size drums, riding faces and ends (such as: notebooks, then, private electronics) The device is equipped with a handheld electronic device, a video player, etc., as a interface for transmitting digital images (or audio and video) 201238266 between the control circuit and the display circuit. Checking 'current' various handheld electronic devices (such as laptops, mobile phones and video playback H, etc.) has become an indispensable tool in people's daily life and work. Control in these handheld electronic devices The circuit provides a gateway for transmitting digital image (or audio and video) signals. 'The traditional Rs-Caf or I2C interface is still commonly used'. The +RS-232 interface is a serial feed communication developed by the Electronic Industries Alliance (EIA). The interface standard 'is widely used in computer serial connection. The maximum transmission rate of the interface is not more than 2G per second, _ bit (bps). The generation interface is Feiji company in order to make the motherboard and the filament Or the mobile phone can be connected to the low-speed peripheral device', and the internal circuit integration interface developed in the _ era is a serial communication bus, using multi-master slave (master and also (6) architecture, the current maximum transmission rate of the I2C interface can reach Seconds 3.4 million bits (four) second 'below _Mbps). It can be seen from the above that in the conventional handheld electronic device, 'the digital image (or audio and video) signal=face' used between the control circuit and the display circuit is incapable of transmitting high regardless of the RS-232 or the generation interface. Picture quality digital image U)) (5), practice seconds _ _ the weight of the female cup. - So how to „ again. Ten out of a novel signal transmission system, not only can be easily used in the various types of electronic devices of the aforementioned ships, Qian Da Chen Gao, the hand-j electronic device Product f, and the material used between the control circuit and the display circuit of the hand-held electrical device - the volume of the connector and the complex and effective elimination of the traditional connection H. The use of high-frequency electrical signals to transmit image data _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Hybrid transmissi〇n system for transmitting different directional signals using optical fibers and electrical transmission lines. One of the objects of the present invention is to apply the hybrid transmission system to a handheld electronic device (eg, a notebook computer, Mobile phones and video players, etc...), the hybrid transmission system includes a master system and a slave system. One of the handheld electronic device control circuits, the servant system is equivalent to one of the handheld electronic device display circuits, the main system is through a first electrical transmission line and a first optical fiber, and a hybrid connector (hybr id (10) nect〇r Connected to the hybrid connector through a second electrical transmission line and a second optical fiber, such that the main system and the servant system can transmit signals through the hybrid connector, wherein the The first and second electrical transmission lines are responsible for transmitting a bi-directional control signal between the primary system and the servant system. The first and second optical fibers are responsible for transmission from the primary system to the servant system. Unidirectional data signal (uni_direetic) nal data, such as.) Thus, because the "Xuan main system can penetrate and other optical fibers, a large number of one-way data such as: video or video data signals" is transmitted at a very high rate. Up to the age, but the H system and the flutter system still transmit the low-rate two-way control signal through the traditional electrical transmission line, so the operator only needs to change the main system slightly. The specifications of the interface between the systems, without greatly changing the design of the entire system, can easily be the hybrid transmission system = now on the traditional handheld electronic device, so that the handheld electronic device not only has a polar image transmission Speed and quality, and the replacement of most of the electrical transmission lines and their corresponding terminals used in the traditional connection of the 201238266 connector to transmit image data, not only greatly simplifies the structural complexity of the hybrid connector itself, but also greatly Reducing the volume of the hybrid connector can effectively eliminate the high frequency noise interference caused by the use of high frequency electrical signals to transmit image data by the conventional connector. Another object of the present invention is that the bidirectional control signal includes the main The system generates a first control signal and a second control signal generated by the servant system, wherein the first control signal is transmitted by the main system to the servant system for controlling the action of the servant system. The second control signal is transmitted by the servant system to the main system for controlling the action of the main system. Another object of the present invention is that the transmission rate of the first and second control signals is ten million bits per second (ie, 10 Mbps or less), and the one-way data signal is a high-speed data signal 'the high-speed data signal The transmission rate is more than one hundred million bits per second (ie, above 1 Gbps). Another object of the present invention is that the main system includes a master circuit, a clock control chip (ci〇ck), and a main serial interface controller (Master).

Serial lnterface Controller)、一串化晶片(serializer)及一 光訊發射晶片(Optical Transmitter),其中該主電路除能產生 該第一控制訊號外,尚能分別產生一參考時脈訊號及該高速數據 訊號;該時脈控制晶片係與該主電路相連接,以接收該主電路傳 來之該參考時脈訊號,且據以分別產生—低速時脈訊號及一高速 時脈訊號;該主φ列介面控㈣,係分別與猶脈控制晶片及該 主電路相連接,以接收該時脈控制晶片傳來之該低速時脈訊號, 且根據該低猶脈減’職主電路傳來之該第—控制訊號轉換 成月b透過電氟傳輸線傳輸之格式,且透過該第—電氣傳輸線傳輸 201238266 至該混合式連接器;該串化晶片係分別與該時脈控制晶片及該主 電路相連接,以接收該時脈控制晶片傳來之該高速時脈訊號,且 根據該高速時脈訊號’將該主電路傳來之該高速數據訊號轉換成 能透過光纖傳輸之格式;及該光訊發射晶片,係與該串化晶片相 連接’以接收該串化晶片傳來之高速數據訊號,且透過該第一光 纖發射至該混合式連接器。 本發明之又另一目的,係該僕系統包括一光訊接收晶片 (Optical receiver)、一 時脈及資料回復晶片(ci〇ck and data recovery,簡稱CDR)、一解串化晶片(Deserializer)、一僕串列 介面控制器(Slave Serial Interface Controller)及一儒電路 (slave circuit)所組成,其中該光訊接收晶片係透過該第二光 纖,與該混合式連接器相連接’以接收該主系統傳來之高速數據 訊號;該時脈及資料回復晶片係與該光訊接收晶片相連接,以接 收該光訊接收晶片傳來之高速數據訊號,且據以產生一回復時脈 訊號;該解串化晶片係與該時脈及資料回復晶片相連接,以接收 δ亥時脈及k料回復晶片傳來之南速數據訊號,且根據該時脈及資 料回復晶片所產生之該回復時脈訊號’將該高速數據訊號轉換成 該僕系統能使用之格式;該僕串列介面控制器係透過該第二電氣 傳輸線,與該混合式連接器相連接’以接收該主系統傳來之該第 一控制訊號’且將該第一控制訊號轉換成該僕系統能使用之格 式;及該僕電路係與該解串化晶片相連接,以接收該解串化晶片 傳來之該高速數據訊號,且與該僕串列介面控制器相連接,以接 收該僕串列介面控制器傳來之該第一控制訊號,或將所產生之該 第二控制訊號,依序透過該僕串列介面控制器、該第二電氣傳輸 201238266 線及該混合式連接^,傳輸至該主系統。 本發明之又另一目的,係該主電路尚能產生一低速數據訊號 (如·音頻數據訊號)’且將該低速數據訊號傳送至該主串列介面 控制器’該主串列介面控制器能根據該低速時脈訊號,將該主電 路傳來之該低速數據訊號轉換成能透過電氣傳輸線傳輸之格式, 且透過該第一電氣傳輸線傳輸至該混合式連接器,使得該僕串列 介面控制器能透過該第二電氣傳輸線,接收該混合式連接器傳來 之該低速數據訊號’且將該低速數據訊號轉換成該僕系統能使用 之格式’並傳送至該僕電路,其中該低速數據訊號之傳輸速率為 每秒十個百萬位元以下(即,10Mbps以下)。 本發明之又另一目的,係該僕系統尚包括一電壓控制振盪晶 片(voltage-controlled oscillator,以下簡稱 VC0 ),係與該僕 串列介面控制器相連接’以根據該僕串列介面控制器自該低速數 據訊號所獲得之該低速時脈訊號,計算且產生該高速時脈訊號, 以令該時脈及資料回復晶片能根據該電壓控制振盪晶片傳來之該 高速時脈訊號,產生一回復時脈訊號,使得該解串化晶片根據該 回復時脈訊號,將該時脈及資料回復晶片傳來之高速數據訊號轉 換成該僕系統能使用之格式。 為便貴審查委員對本發明之目的、電路架構及其功效,能有 更進一步之認識與瞭解’茲列舉若干實施例且配合圖式,詳細說 明如下: 【實施方式】 本發明係一種利用光纖及電氣傳輸線傳輸不同方向性訊號之 201238266 混合式傳輸系統(hybrid transmission system),請參閱第1圖 所示之第一個較佳實施例,該混合式傳輸系統10係應用至一手持 式電子裝置(如:筆記本電腦、行動電話及影音播放器等…),包 括一主系統(master system)2〇 及一僕系統(slave system)3〇,該 主系統20相當於手持式電子裝置之一控制電路,該僕系統3〇相 當於手持式電子裝置之一顯示電路,該主系統2〇係透過一第一電 氣傳輸線21及一第一光纖22,與一混合式連接器40(hybrid connector)相連接,該僕系統30係透過一第二電氣傳輸線31及 一第二光纖32,與該混合式連接器4〇相連接,使得該主系統2〇 及僕系統30間能透過該混合式連接器4〇,傳輸訊號,其中該混合 式連接器40係由一公連接器(或母連接器)41及一母連接器犯(或 公連接器)相互插接而成一體,使得該第一及第二電氣傳輸線21、 31能彼此連接,共同負責傳輸該主系統2〇及儒系統3〇間之雙向 控制訊號(bi-directional control signal),且使該第一及第二 光纖22、32能彼此連接,以共同負#傳輸由該主系統如傳送至 該僕系統30之單向數據訊號(uni_direeti㈣丨咖啦如)。 在第-個較佳實施财,復請參閱第丨圖所示,該雙向控制 訊號包括該主系統20所產生之-第—控制訊號及該僕系統即所 產生之-第二控制訊號,其中該第—控制訊號係由該主系統如 送至該僕緣3G,職控繼僕祕3Q之動作,該第二控 係由該僕系統30傳送至該主系,统2〇,用以控制該主系统卽動 作’該第-及第二控制訊號之傳輸速率為每秒十個、 下’該單向數據tfl號則係-高速數據訊號,該高速數據訊 輸速率為每秒一個億位元以上。 ' 12 201238266 如此,由於該主系統20能透過該等光纖22、32,將大量之單 向數據訊號(如」影像或影音數據訊號),以極高的速率,傳送至 該僕系統30 ’故能大幅提高該主系統20及僕系統3〇間之影像數 據號之傳輸速率及品質,進而使手持式電子裝置能具備呈現$ 晝質影像之能力。另’由於’該主系統20與僕系統3〇間仍係透 過傳統之電氣傳輸線21、31,傳輸低速率之雙向控制訊號,故, 業者僅需小幅變更該主系統20與僕系統30間連接介面之規格, 而無需大幅變動整個糸統之设計,即能輕易地將該混合式傳輸系 統10實現在傳統之手持式電子裝置上。此外,由於該等光纖22、 32取代了傳統RS-232或I2C介面中用以傳輸影像數據之大多數電 氣傳輸線及其對應之端手,不僅使該混合式連接器本身之纟士構 複雜度得以大幅簡化,進而大幅縮小了該混合式連接器4〇之體 積,尚能有效免除傳統RS-232或I2C連接器因需使用高頻電氣訊 號傳輸影像數據所造成之高頻雜訊干擾問題。 為了更進一步簡化第1圖所示之該混合式傳輸系統1〇,在本 發明之第二個較佳實施例中,請參閱第2圖所示,該混合式傳輸 系統50之該主系統20及僕系統3〇間係直接透過一第三電氣傳輸 線51相連接,以傳輸由該主系統2〇傳送至該僕系統3〇之單向數 據訊號,且直接透過一第三光纖52,傳輸該主系統2〇及僕系統 30間之雙向控制訊號,如此,即能完全省略第丨圖所示之該混合 式連接器40之設置成本及佔用空μ,以達成簡化第i圖所示之該 混合式傳輸系統10之目的。 在本發明之第三個較佳實施例中,請參閱第丨及3圖所示, 亦可依系統中各元件的實際配置需求,使第丨圖所示之該主系統 13 201238266 20之第電氣傳輸線2i及第一光纖22,與一第一混合式連接器 43(包3 a連接城母連接器)相連接,並使第1麟示之該撲系 統30之第—電氣傳輸線31及第二光纖犯,與—第二混合式連接 盗44(包a母連接減公連接器)相連接,且該第一及第二混合式 連接器43 44間係藉一混合式纜線(hybrid純⑷刊相連接,以 透過該混合式_ 7Q内之—第四電氣傳輸線71及—第四光纖 72刀另J使对及第二混合式連接器43、彼此連接,以使該 第-及第二電氣傳輸線2卜31彼此連接,共同負責傳輸該主系統 20及僕系統30間之雙向控觀號,且使該第一及第二光纖22、 32彼此連接’共同負責傳輸由該主系統2〇傳送至該僕系統3〇之 單向數據减。如此,即能藉由該混合錢線7Q之設計,大幅增 加該主糸統20及僕系統3〇間相對位置之設計彈性。 茲僅以第1圖所示之第一個較佳實施例為例,揭示其細部構 成如第4圖所示’至於,第二及三個較佳實施例之細部構成則參 照第4圖所,而不再逐-贅述。請錢第4圖所示,該主系統 20包括一主電路201 (master circuit)、一時脈控制晶片2〇2 (clock)、主串列介面控制器 203 (Master Serial Interface Controller)、一串化晶片204 (Serializer)及一光訊發射晶片 205 (Optical Transmitter),其中該主電路201不僅能產生該第 一控制訊號’尚能分別產生一參考時脈訊號及該高速數據訊號 (如.:影像或影音數據訊號);該時脈控制晶片202係透過一第一 時脈線G,與該主電路201相連接,以接收該主電路201傳來之 該參考時脈訊號,且據以分別產生一低速時脈訊號及一高速時脈 訊號;該主串列介面控制器203係透過一第二時脈線C2及一第一 201238266 主匯流排Μ! ’分別與該時脈控制晶片2〇2及該主電路2〇1相連接, 以接收該時脈控制晶片202傳來之該低速時脈訊號,且根據該低 速時脈訊號,將該主電路2〇1傳來之該第一控制訊號轉換成能透 過電氣傳輸線傳輸之格式,且透過該第一電氣傳輸線21,傳輸至 該混合式連接器40 ;該串化晶片204係透過一第三時脈線C3及一 第二主匯流排Ms ’分別與該時脈控制晶片202及該主電路201相 連接,以接收該時脈控制晶片202傳來之該高速時脈訊號,且根 據該高速時脈訊號’將該主電路2〇1傳來之該高速數據訊號轉換 成能透過光纖傳輸之格式;該光訊發射晶片2〇5係與該串化晶片 204相連接’以將該串化晶片2〇4傳來之高速數據訊號轉換成光訊 號’且透過該第一光纖22發射至該混合式連接器40。 復參閱第4圖所示,該僕系統30包括一光訊接收晶片305 (Optical receiver)、一 時脈及資料回復晶片 306(clock and data recovery ’ 以下簡稱 cdr )、一解串化晶片 304(Deserializer)、 一僕串列介面控制器 3〇3(Slave Serial Interface Controller) 及一僕電路301 (slave circuit)所組成,其中該光訊接收晶片305 係透過該第二光纖32,與該混合式連接器40相連接,以將該主系 統20傳來之高速數據訊號轉換成電氣訊號;該時脈及資料回復晶 片306係與該光訊接收晶片305相連接,以接收該光訊接收晶片 305傳來之高速數據訊號,且據以產生一回復時脈訊號;該解串化 晶片304係與該時脈及資料回復晶片306相連接,以接收該時脈 及資料回復晶片306傳來之高速數據訊號,且透過一第四時脈線 & ’接收該時脈及資料回復晶片306所產生之該回復時脈訊號,並 根據該回復時脈訊號,將該高速數據訊號轉換成該僕電路301能 201238266 使用之格式;該僕串列介面控制器3〇3係透過該第二電氣傳輸線 31 ,與該混合式連接器40相連接,以接收該主系統20傳來之 該第一控制訊號’且將該第一控制訊號轉換成該僕電路3〇1能使 用之格式;該僕電路3〇1係透過一第一僕匯流排Sl,與該僕串列 介面控制器303相連接’以接收該僕串列介面控制器3〇3傳來之 該第一控制訊號,或將所產生之該第二控制訊號,依序透過該僕 串列介面控制器303、該第二電氣傳輸線31,及該混合式連接器 40,傳輸至該主系統2〇;該僕電路3〇1並透過一第三僕匯流排S3, 與該解串化晶片304相連接,以接收該解串化晶片3〇4傳來之該 高速數據訊號。 在本發明之第一個較佳實施例中,若該高速數據訊號僅為一 影像數據訊號(不包括音頻數據訊號),復參閱第4圖所示,則該 主電路201尚能產生一單向(uni_directi〇nal).之低速數據訊號 (即,音頻數據訊號),且透過一第二主匯流排M2,將該低速數據 5孔號傳送至該主串列介面控制器203,嗣,該主串列介面控制器 2 〇3會根據該時脈控制晶片2 〇2所產生之該低速時脈訊號,將該主 電路201傳來之該低速數據訊號轉換成能透過電氣傳輸線傳輸之 格式’且透過該第一電氣傳輸線21”傳輸至該混合式連接器40, 使得該僕串列介面控制器303能透過該第二電氣傳輸線31” ,接 收該展合式連接器4〇傳來之該低速數據訊號’且將該低速數據訊 號轉換成該僕系統30能使用之格式,並且透過一第二僕匯流排 &傳送至3玄僕電路3〇1 ’其中該低速數據訊號之傳輸速率亦為每 秒十個百萬位元以下。 參閱第5圖所示,乃本發明之第四個較佳實施例,其中該僕 16 201238266 系統30尚包括一電壓控制振盪晶片3〇7(v〇ltage_c〇ntr〇lled oscillator,簡稱VCO )’該電壓控制振盪晶片307係透過一第五 時脈線G,與該僕串列介面控制器3〇3相連接,以根據該僕串列 介面控制器303自該低速數據訊號所獲得之該低速時脈訊號,計 异且產生該尚速時脈訊號,該電壓控制振盪晶片3〇7並透過一第 六時脈線G,與該時脈及資料回復晶片306相連接,以令該時脈 及資料回復晶片306能根據該電壓控制振盪晶片3〇7傳來之該高 速時脈訊號,產生一回復時脈訊號,再透過該第四時脈線G,傳 送至該解Φ化晶#腿,贿該解φ彳tBsa>} 3G4能根據該時脈及資 料回復晶片306傳來之高速數據訊號及其所產生之該回復時脈訊 號,將該高速數據訊號轉換成該僕電路3〇1能使用之格式,並透 過該第三僕匯流排& ’傳送至該僕電路301。 本發明為了使前述實施例之該混合式傳輸系統丨〇能被輕易地 實現在傳統之手持式電子裝置上,而無需大幅變動整個系統之設 計’復參閱第4及5圖所示’該主系統20及僕系統30中該主串 列介面控制器203及僕串列介面控制器303間之連線介面,仍可 採用傳統之RS-232或I2C介面規格,以透過傳統之魏傳輸線及 端子,傳輸該雙向控制訊號(及單向之該低速數據訊號)。 §本發明採用傳統RS-232介面時,參閱第β圖所示可知,該 主串列介面控制器203及僕串列介面控制器3〇3間,僅有三種訊 號接聊相連接’意即’該主串列介面控· 2G3之訊號傳送腳τχ 係連接至該僕串列介面控制器303之訊號接收腳RX,以將前述實 施例中由該衫統2G聽生找第—㈣爾(及單向之該低速 數據魏)傳送至該僕系統3〇;該主串列介面控制器2⑽之訊號接 17 201238266 收腳RX係連接至該僕串列介面控制器3〇3之訊號傳送腳τχ,以將 前述實施例中由該僕系統30所產生之該第二控制訊號傳送至該主 系統20;該主串列介面控制器203之接地腳ground則係連接至該 僕串列介面控制器303之接地腳GROUND。 當本發明採用傳統I2C介面時,參閱第7圖所示可知,該主串 列介面控制器203及僕串列介面控制器303間,最多僅有六種訊 號接腳相連接,意即,二者之SD、SCLK、cs、INT、s〇und_id及 ground等對應接腳,係彼此相連,其中該SD接腳係根據saK接 腳所產生之同步時脈(Synchr〇nizecj ci〇ck),進行串列雙向訊號 (Serial bi-directi〇nal Signai)之同步(sychr〇nized)傳輸,以 將前述實施例巾由社純2Q職生之第—控觀號(及單向之 該低速數據峨)傳送至賴魏3Q,或將倾彳m 3Q所產生 之第二控制訊號傳送至該主系統20 ;該CS、INT及S0UND_ID等接 腳係可選擇使S(QptiQnal)之接腳,其巾該腳傳送之訊號係 表不該主系統20準備傳送該第一控制訊號(及單向之該低速數據 峨)至該僕系統30,或表示該主系統2〇準備接收該儒系統如 傳來之該第二控制訊號,該接腳絲示該齡統%欲傳送該 第二控制,至該主系㈣’該麵D—ID接腳絲辞頻雜訊 號(即’單向之該低速數據訊號)之傳輸速率,可為腿接腳所 產生之同步時脈頻率之1/n,意即,每n個同步時脈訊號,將產生 ^個音頻雜職’吨行㈣Μ統2G傳賴低速數據訊號至 该僕系統30之單向傳輸。 據上所述’無論本發明係採用傳統RS-232或I2C介面,復參 閱第6及7圖所示’執行該主串列介面控制器朋及撲串列介面 201238266 控制器303間控制訊號之雙向傳輸(及低速數據訊號之單向傳輸) 所使用之電氣傳輸線21、31及其對應之端子數量’實極為有限, 另’由於本發明之前述光纖22、32已取代了傳統RS-232或I2C 介面中用以執行該主串列介面控制器203及僕串列介面控制器 303間高速數據訊號(如:影像或影音數據訊號)單向傳輸所使用之 大量電氣傳輪線及其對應之端子數量,故本發明確實能大幅簡化 前述實施例巾該混合式連接^1 4Q之結構複雜度,進*大幅縮小該 混合式連接H 4G之歸,使得本發明之該混合式傳齡統能更輕 易地被實現在輕薄短小之手持式電子裝置上。鶴能清楚揭示該 混合式連接器之結構,特針對本發明採用傳統RS_232或介面 時各該混合式連接器之實施態樣詳細說明如下: (1) RS-232規格之混合式連接器:錢第8圖所示,該混合式連 接器80僅有五個訊號腳位,其中第一腳位801係供第1及3圖 所示光纖22及32相連接之對應腳位,第二及三腳位觀及簡 係供第6圖所示該主串列介面控制器2()3之接地腳贈仙與該 僕串列介面控制器3G3之接地腳⑽UND相連接之對應腳位,第 四及五腳位8G4及8G5係供第6圖所示該主串列細控制器2〇3 之訊號傳送腳TX與該僕串列細控制器聊之訊號接收腳. 及該主串列介面控制器203之訊號接收腳RX與該僕串列介面控 制器303之訊號傳送腳τχ,相互連接之對應腳位。 ⑵第y種Ιΐ介面規格之混合式連接器:參閱第請所示,該混 。式連接盗卯僅有十五個訊號腳位,其中第一腳位·係供第 賴22 *32树接之賴驗,其它電氣傳輸 線所對應之腳位係、用以傳送差動訊號㈤ferentiai 201238266 signal) ’其中第二及三腳位9〇2及9()3係供第7圖所示該主串 列介面控制器203之第-組接地腳GR〇UND與該僕串列介面控制 器303之第一組接地腳gr_d相連接之對應腳位,第四及五腳 位904及905係供第7圖所示該主串列介面控制器203之sd接 腳(接收SD+及SD-差動訊號)與該僕串列介面控制器3〇3之邓 接腳(傳送SD+及SD-差動訊號)相連接之對應腳位,第六及七腳 位906及907係供第7圖所示該主串列介面控制器2〇3之5(:1^ 接腳(傳送SCLK +及SCLK -差動訊號)與該僕串列介面控制器 3〇3之SCLK接腳(接收SCLK +及SCLK -差動訊號)相連接之對 應腳位’第八及九腳位908及909係供該主串列介面控制器2〇3 之第二組接地腳GROUND與該僕串列介面控制器_之第二組接 地腳GROUND相連接之對應腳位’第十及十一腳位91〇及911係 供第7圖所示該主串列介面控制器2〇3之CS接腳(傳送cs +及 CS -差動訊號)與該僕串列介面控制器303之cs接腳(接收cs + 及cs -差動訊號)相連接之對應腳位,第十二及十三腳位912 及913係供第7圖所示該主串列介面控制器2〇3之〖NT接腳(接 收INT +及INT -差動訊號)與該僕串列介面控制器3〇3之mT 接腳(傳送INT +及INT -差動訊號)相連接之對應腳位,第十四 及十五腳位914及915係供第7圖所示該主串列介面控制器2〇3 之S0UNDJD接腳(傳送S0UNDJD +及S01MLID -差動訊號)與 該僕串列介面控制器303之S0UND—ID接腳(接收S0UNDJD +及 S0UND_ID -差動訊號)相連接之對應腳位》 (3)第二種I2C介面規格之混合式連接器:參閱第1〇圖所示,該 混合式連接器100僅有八個訊號腳位,其中第一腳位101係供 20 201238266 第1及3圖所示光纖22及32相連接之對應腳位,其它電氣傳 輸線所對應之腳位係用以傳送邏輯電位訊號(logical leVel =ignal)’其中第二腳位1Q2係供第7圖所示該主串列介面控制 器203之第一組接地腳GR〇UND與該僕串列介面控制器洲3之第 組接地腳GiOTD姆接之對應腳位,第三驗⑽係供第7 圖所不該主串列介面控制器2〇3之SD接腳(接收SD邏輯電位訊 號)與該僕串列介面控制器3〇3之SD接腳(傳送SD親電位訊 號)相連接之對應腳位’第四腳位1〇4係供第7圖所示該主串列 )丨面控制器203之SCLK接腳(傳送SCLK邏輯電位訊號)與該僕 串列介面控制器303之SCLK接腳(接收SCLK邏輯電位訊號)相 連接之對應腳位’第五腳位1〇5係供該主串列介面控制器觸 之第一組接地腳GROUND與該僕串列介面控制器3〇3之第二組接 地腳G_ND相連接之對應腳位,第六腳位1()6係供第7圖所示 該主串列介面控制器2〇3之CS接腳(傳送CS邏輯電位訊號)與 亥僕串列介面控制器3〇3之cs接腳(接收cs邏輯電位訊號)相 連接對應腳位’第七腳位1〇7係供第7圖所示該主串列介面 控制器203之INT接腳(接收INT邏輯電位罐)與該僕串列介 面控制器303之INT接腳(傳送INT邏輯電位訊號)相連接之對 應腳位,第八腳位1〇8係供第7圖所示該主串列介面控制器2〇3 之SOUNDjD接腳(傳送S0UNDJD邏輯電位訊號)與該僕串列介 面控制器303之S0UND_ID接腳(接收S0UND_ID邏輯電位訊號) 相連接之對應腳位。 據上所述’復請參閱第1及3 ®所示,當本發明之該混合式 專輸系、.4 10被應用至—手持式電子裝置(如:筆記本電腦、行動 201238266 電活及影音播放料...)時,由於該主系統2g(相當於手持式電子 裝置之控職路)能透過轉光纖22、32,將大量之柏數據訊號 (如·影像數據訊號)’以極高的速率’傳送至該㈣統勵當於 手持式電子裝置H電路),但該主彡統2Q與齡統㈣仍透 過傳統之魏雜線21、31,傳輸低速率之雙向㈣訊號,故, 業者僅需小㈣更社系統2G缝_ 3q間之介面規格如上 述’而無需大觀動整個线之設計,即能㈣地舰混合式傳 輸系統10貫現在傳統之手持式電子裝置上,餅鱗手持式電子 裝置不僅能具備極高之影像傳輸速率及品質,尚因鱗光纖22、 32取代了傳統RS-232或代介面中大部份之電氣端子及傳輸線, 復晴參閱第6〜10圖所示’故本發明亦大幅地簡化了前述實施例中 該混合式連接H 40、43、44及齡式_ 7Q之結構複雜度,進 而使該混合錢接H 4Q、43、44本身之_制大_小,以有 效免除傳統連接㈣需使用高頻電氣峨傳輸前述影像數據所造 成之高頻雜訊干擾問題。 按以上所述,僅為本發明之若干較佳實施例,惟,本發明 所主張之_$·,並^舰於此。凡熟悉該項技藝之人士,依 據本發明所揭露之技術内容,可輕易思及之等效變化,均不脫離 本發明所保護之範嘴。 【圖式簡單說明】 第1圖係本發明之第—錄佳實關之㈣架構示意圖; 第2圖係本發明之第二個較佳實施彳狀彡統架構示意圖; 第3圖係本發明之第三個較佳實關之祕架構示意圖; 22 201238266 第4圖H1圖所示之第 第5圖係本發明之第四=佳實施例之電路方塊示意圖; t 6 佳實施例之電路方塊示意圖; 护制器門值之㈣實施例巾主串列介面控制11及僕串列介面 控似間採用傳統㈣32介面連線之電路方塊示意圖; 第7。_本_之前着施财主串列介面控㈣及鮮列介面 控制器間採用傳統1¾介面連線之電路方塊示意圖; 第8圖係本發明之前述實施例中混合式連接器採用傳統RS-232介 面規格之實施態樣示意圖; 第9圖係本發明之前述實施例中混合式連接器採用傳統第一種 介面規格之實施態樣示意圖;及 第10圖係本發明之前述實施例中混合式連接器採用傳統第一種 I2c介面規格之實施態樣。 【主要元件符號說明】 混合式傳輸系統 .... 主系統 .... 主電路 .·.· 時脈控制晶片 …· 主串列介面控制器 .·.· 串化晶片 ·… 光訊發射晶片 ·… 第電氣傳輸線 ·_·· 第光纖 ···· 償糸統 · · · 23 、21 201238266 僕電路 …·· ….301 僕串列介面控制器 ·…· …· 303 解串化日日片 ….304 光訊接收日曰片 ….305 時脈及k料回復日日片 ..... .….306 電壓控制振盪晶片 …·_ …307 第二電氣傳輸線 ·…· …·· 31、31’ 、31” 第二光纖 ·…· …32 混合式連接器 ·…· •…· 40、80、90、100 公連接器 …· "… 41 母連接器 ·… .….42 第一混合式連接器·… .…· 43 第二混合式連接器.… .….44 第三光纖 ··… •…· 52 第三電氣傳輸線 ·… …·. 51 混合式麗線 ·… …70 第四電氣傳輸線 ·… …71 第四光纖 ·… …72 腳位 …· ••…801 〜805、901 〜915、101 〜108 第一時脈線 ·… ….· Cl 第二時脈線 .… …..G 第三時脈線 ·… …·. G 第四時脈線 ·… …..C4 第五時脈線 ·… …..C5 24 201238266 第六時脈線 Ce 第一主匯流排 ......... 第二主匯流排 M2 第三主匯流排 M3 第一僕匯流排 S! 第二僕匯流排 s2 第三僕匯流排 & 25A serial lnterface controller, a serializer, and an optical transmitter, wherein the main circuit can generate a reference clock signal and the high speed data separately from the first control signal. The clock control chip is connected to the main circuit to receive the reference clock signal from the main circuit, and accordingly generates a low speed clock signal and a high speed clock signal; the main φ column The interface control (4) is respectively connected to the juxta control chip and the main circuit to receive the low-speed clock signal transmitted from the clock control chip, and according to the low-voltage circuit of the main circuit - the control signal is converted into a format transmitted by the HF transmission line, and the 201238266 is transmitted to the hybrid connector through the first electrical transmission line; the serialized chip is respectively connected to the clock control chip and the main circuit, Receiving the high speed clock signal transmitted from the clock control chip, and converting the high speed data signal transmitted from the main circuit into permeable light according to the high speed clock signal The transmission format; information and the light emitting chip, connected to the serial-based wafers' high-speed serial data signal to the receiving of the wafer came, and transmitted to the hybrid connector through the first optical fiber. Still another object of the present invention is to provide an optical receiver, a clock and data recovery (CDR), a deserializer, and a deserializer. a slave serial interface controller (Slave Serial Interface Controller) and a slave circuit, wherein the optical receiving chip is connected to the hybrid connector through the second optical fiber to receive the main a high-speed data signal transmitted from the system; the clock and data recovery chip is connected to the optical receiving chip to receive the high-speed data signal transmitted from the optical receiving chip, and accordingly generate a reply clock signal; The deserialization chip is connected to the clock and the data recovery chip to receive the south speed data signal transmitted from the δ Hz clock and the k material recovery chip, and the reply clock generated by the wafer is recovered according to the clock and the data. The signal 'converts the high speed data signal into a format usable by the servant system; the servant serial interface controller is connected to the hybrid connector through the second electrical transmission line Receiving 'to receive the first control signal transmitted from the main system' and converting the first control signal into a format usable by the servant system; and the servant circuit is connected to the deserialization chip to receive the Desynchronizing the high speed data signal sent from the chip, and connecting to the servant serial interface controller to receive the first control signal sent by the servant serial interface controller, or generating the second The control signal is transmitted to the main system through the servant serial interface controller, the second electrical transmission 201238266 line, and the hybrid connection. Still another object of the present invention is that the main circuit can generate a low speed data signal (eg, an audio data signal) and transmit the low speed data signal to the main serial interface controller 'the main serial interface controller> The low-speed data signal transmitted from the main circuit can be converted into a format transmittable through the electrical transmission line according to the low-speed clock signal, and transmitted to the hybrid connector through the first electrical transmission line, so that the serial interface is The controller can receive the low-speed data signal transmitted by the hybrid connector through the second electrical transmission line and convert the low-speed data signal into a format usable by the servant system and transmit to the servant circuit, wherein the low speed The data signal transmission rate is less than ten million bits per second (ie, less than 10 Mbps). According to still another object of the present invention, the servant system further includes a voltage-controlled oscillator (hereinafter referred to as VC0) connected to the servant serial interface controller to control according to the servant serial interface. The high speed clock signal is calculated and generated from the low speed clock signal obtained by the low speed data signal, so that the clock and the data recovery chip can control the high speed clock signal transmitted from the oscillation chip according to the voltage. A reply clock signal is generated, so that the deserialized chip converts the high-speed data signal transmitted from the clock and the data recovery chip into a format usable by the servant system according to the reply clock signal. For the sake of the purpose of the present invention, the circuit architecture and its effects, the present invention can be further understood and understood. The following is a detailed description of the embodiments: The electrical transmission line transmits a 201238266 hybrid transmission system with different directional signals. Referring to the first preferred embodiment shown in FIG. 1, the hybrid transmission system 10 is applied to a handheld electronic device ( Such as: notebook computers, mobile phones and video players, etc.), including a master system 2〇 and a slave system 3〇, the main system 20 is equivalent to one of the handheld electronic devices control circuit The servant system 3 is equivalent to one display circuit of the handheld electronic device. The main system 2 is connected to a hybrid connector 40 through a first electrical transmission line 21 and a first optical fiber 22. The servant system 30 is connected to the hybrid connector 4 through a second electrical transmission line 31 and a second optical fiber 32, so that the main system 2〇 The servant system 30 can transmit signals through the hybrid connector 4, wherein the hybrid connector 40 is made up of a male connector (or female connector) 41 and a female connector (or male connector). The two first and second electrical transmission lines 21, 31 can be connected to each other, and are jointly responsible for transmitting the bi-directional control signal between the main system 2 and the Confucian system 3, and The first and second optical fibers 22, 32 can be connected to each other to collectively transmit a unidirectional data signal (uni_direeti) transmitted by the host system to the servant system 30. In the first preferred embodiment, as shown in the figure, the two-way control signal includes a - control signal generated by the main system 20 and a second control signal generated by the servant system, wherein The first control signal is sent to the servant 3G by the main system, and the second control system is transmitted by the servant system 30 to the main system, and is controlled by the main system. The main system 卽 action 'the transmission rate of the first and second control signals is ten per second, and the unidirectional data tfl number is a high-speed data signal, and the high-speed data transmission rate is one hundred million bits per second. Above yuan. ' 12 201238266 Thus, since the main system 20 can transmit a large number of unidirectional data signals (such as "images or video data signals" to the servant system 30 through the optical fibers 22, 32" The transmission rate and quality of the image data number between the main system 20 and the servant system 3 can be greatly improved, thereby enabling the handheld electronic device to have the capability of presenting a quality image. In addition, since the main system 20 and the servant system 3 still transmit the low-rate bidirectional control signals through the conventional electrical transmission lines 21, 31, the operator only needs to slightly change the connection between the main system 20 and the servant system 30. The interface specification can be easily implemented on conventional handheld electronic devices without significantly changing the design of the entire system. In addition, since the optical fibers 22, 32 replace most of the electrical transmission lines and their corresponding end-hands for transmitting image data in the conventional RS-232 or I2C interface, the complexity of the hybrid connector itself is not only complicated. It has been greatly simplified, which greatly reduces the size of the hybrid connector. It can effectively eliminate the high-frequency noise interference caused by the traditional RS-232 or I2C connector due to the use of high-frequency electrical signals to transmit image data. In order to further simplify the hybrid transmission system 1 shown in FIG. 1, in the second preferred embodiment of the present invention, referring to FIG. 2, the main system 20 of the hybrid transmission system 50 And the servant system 3 is directly connected through a third electrical transmission line 51 to transmit a unidirectional data signal transmitted from the main system 2 to the servant system 3, and directly transmitted through a third optical fiber 52. The two-way control signal between the main system 2 and the servant system 30, so that the setup cost and the occupied space μ of the hybrid connector 40 shown in the figure can be completely omitted, so as to simplify the simplification shown in FIG. The purpose of the hybrid transmission system 10. In the third preferred embodiment of the present invention, as shown in the third and third figures, the main system 13 shown in the figure can be made according to the actual configuration requirements of the components in the system. The electrical transmission line 2i and the first optical fiber 22 are connected to a first hybrid connector 43 (the package 3 a is connected to the female connector), and the first electrical transmission line 31 and the first The second optical fiber is connected to the second hybrid connection thief 44 (including a female connection reduction connector), and the first and second hybrid connectors 43 44 are connected by a hybrid cable (hybrid pure (4) The connection is made to connect the second hybrid connector 43 to each other through the fourth electrical transmission line 71 and the fourth optical fiber 72 in the hybrid _7Q, so that the first and the third The two electrical transmission lines 2b are connected to each other, and are jointly responsible for transmitting the two-way control number between the main system 20 and the servant system 30, and connecting the first and second optical fibers 22, 32 to each other 'co-responsible for transmission by the main system 2单向 Transfer to the servant system 3 〇 one-way data minus. So, you can use the hybrid money line 7Q The design greatly increases the design flexibility of the relative position between the main system 20 and the servant system. The first preferred embodiment shown in Fig. 1 is taken as an example to reveal the detailed structure as shown in Fig. 4. 'As for the details of the second and third preferred embodiments, reference is made to Fig. 4, and will not be described again. As shown in Fig. 4, the main system 20 includes a main circuit 201 (master circuit). a clock control chip 2〇2 (clock), a main serial interface controller 203, a serializer 204, and an optical transmitter 205 The 201 can generate not only the first control signal but also a reference clock signal and the high speed data signal (such as: image or video data signal); the clock control chip 202 transmits a first clock line G And the main circuit 201 is connected to receive the reference clock signal transmitted by the main circuit 201, and respectively generate a low speed clock signal and a high speed clock signal; the main serial interface controller 203 Through a second clock line C2 and a first a 201238266 main bus Μ! 'connected to the clock control chip 2〇2 and the main circuit 2〇1, respectively, to receive the low-speed clock signal transmitted from the clock control chip 202, and according to the low speed a pulse signal, the first control signal transmitted from the main circuit 2〇1 is converted into a format transmittable through an electrical transmission line, and transmitted to the hybrid connector 40 through the first electrical transmission line 21; the serialized chip The 204 is connected to the clock control chip 202 and the main circuit 201 through a third clock line C3 and a second main bus line Ms' to receive the high speed clock transmitted from the clock control chip 202. Signaling, and converting the high-speed data signal transmitted from the main circuit 2〇1 into a format transmittable through the optical fiber according to the high-speed clock signal; the optical transmitting chip 2〇5 is connected to the serialized chip 204 'The high-speed data signal transmitted from the serialized chip 2〇4 is converted into an optical signal' and transmitted to the hybrid connector 40 through the first optical fiber 22. Referring to FIG. 4, the servant system 30 includes an optical receiver 305, a clock and data recovery 306 (cdr), and a deserializer 304 (Deserializer). And a slave serial interface controller (Slave Serial Interface Controller) and a slave circuit 301, wherein the optical receiving chip 305 is connected to the hybrid through the second optical fiber 32. The device 40 is connected to convert the high speed data signal transmitted from the main system 20 into an electrical signal; the clock and data recovery chip 306 is connected to the optical receiving chip 305 to receive the optical receiving chip 305. The high speed data signal is generated, and a reply clock signal is generated; the deserialization chip 304 is connected to the clock and data recovery chip 306 to receive the high speed data from the clock and the data recovery chip 306. a signal, and receiving the reply clock signal generated by the clock and the data recovery chip 306 through a fourth clock line & ', and converting the high speed data signal according to the reply clock signal The servant circuit 301 can be used in the format of 201238266; the servant serial interface controller 3〇3 is connected to the hybrid connector 40 through the second electrical transmission line 31 to receive the main system 20 The first control signal 'and converts the first control signal into a format usable by the servant circuit 3〇1; the servant circuit 〇1 is transmitted through a first servant bus S1, and the servant serial interface controller 303 Connected to receive the first control signal sent by the servant serial interface controller 3〇3, or sequentially send the generated second control signal through the servant serial interface controller 303, the second An electrical transmission line 31, and the hybrid connector 40, is transmitted to the main system 2〇; the servant circuit 3〇1 is connected to the deserialization chip 304 through a third servant bus S3 to receive the solution The high speed data signal transmitted from the serial chip 3〇4. In the first preferred embodiment of the present invention, if the high speed data signal is only an image data signal (excluding the audio data signal), as shown in FIG. 4, the main circuit 201 can still generate a single a low-speed data signal (ie, an audio data signal) to (uni_directi〇nal), and transmitting the low-speed data 5 hole number to the main serial interface controller 203 through a second main bus M2, ie, The main serial interface controller 2 〇3 controls the low-speed clock signal generated by the chip 2 〇 2 according to the clock, and converts the low-speed data signal transmitted from the main circuit 201 into a format that can be transmitted through the electrical transmission line. And transmitting to the hybrid connector 40 through the first electrical transmission line 21", so that the servant serial interface controller 303 can receive the low speed transmitted from the extended connector 4 through the second electrical transmission line 31" The data signal 'and converts the low-speed data signal into a format usable by the servant system 30, and transmits it to the visor circuit 3〇1' through a second servant bus & the transmission rate of the low-speed data signal is also each Ten one million yuan or less. Referring to FIG. 5, which is a fourth preferred embodiment of the present invention, the servant 16 201238266 system 30 further includes a voltage controlled oscillating wafer 3〇7 (v〇ltage_c〇ntr〇lled oscillator, VCO for short). The voltage controlled oscillating wafer 307 is coupled to the servant serial interface controller 〇3 via a fifth clock line G to obtain the low speed from the low speed data signal according to the servant serial interface controller 303. The clock signal is different and generates the current speed pulse signal. The voltage controls the oscillation chip 3〇7 and is connected to the clock and the data recovery chip 306 through a sixth clock line G to make the clock. And the data recovery chip 306 can control the high speed clock signal transmitted from the oscillating wafer 3〇7 according to the voltage to generate a reply clock signal, and then transmit the signal to the Φ 晶晶# through the fourth clock line G. , the bribe can be solved φ彳tBsa>} 3G4 can respond to the high-speed data signal transmitted from the chip 306 and the generated reply clock signal according to the clock and the data, and convert the high-speed data signal into the servant circuit 3〇1 The format that can be used, and through the third servant stream &Amp; 'transmitted to the slave circuit 301. The present invention is to enable the hybrid transmission system of the foregoing embodiment to be easily implemented on a conventional handheld electronic device without greatly changing the design of the entire system. [Refer to Figures 4 and 5] The connection interface between the main serial interface controller 203 and the servant serial interface controller 303 in the system 20 and the servant system 30 can still adopt the traditional RS-232 or I2C interface specification to pass the traditional Wei transmission line and terminal. Transmitting the two-way control signal (and the one-way low-speed data signal). § When the conventional RS-232 interface is used in the present invention, as shown in FIG. β, the main serial interface controller 203 and the serial interface controller 3〇3 are connected by only three types of signals. 'The main serial interface control · 2G3 signal transmission pin τ 连接 is connected to the signal receiving pin RX of the servant serial interface controller 303, in order to listen to the first (4) in the foregoing embodiment. And the one-way low-speed data is transmitted to the servant system 3; the main serial interface controller 2 (10) is connected to the signal 17 201238266, and the RX is connected to the signal transmission pin of the servant serial interface controller 3〇3 Τχ, to transmit the second control signal generated by the servant system 30 in the foregoing embodiment to the main system 20; the grounding foot ground of the main serial interface controller 203 is connected to the servant serial interface control The grounding pin GROUND of the device 303. When the conventional I2C interface is used in the present invention, as shown in FIG. 7, it can be seen that between the main serial interface controller 203 and the servant serial interface controller 303, only six kinds of signal pins are connected, that is, two. The corresponding pins of SD, SCLK, cs, INT, s〇und_id and ground are connected to each other, wherein the SD pin is based on the synchronization clock (Synchr〇nizecj ci〇ck) generated by the saK pin. Synchronous (sychr〇nized) transmission of the serial bi-directional signal (Serial bi-directi〇nal Signai), in order to use the first embodiment of the above-mentioned embodiment to control the number of the 2Q students (and the one-way low-speed data 峨) Transfer to Lai Wei 3Q, or transfer the second control signal generated by the dumping m 3Q to the main system 20; the CS, INT and S0UND_ID pins can be selected to make the S (QptiQnal) pin, the towel The signal transmitted by the foot indicates that the main system 20 is ready to transmit the first control signal (and the one-way low-speed data 峨) to the servant system 30, or that the main system 2 is ready to receive the Confucian system. The second control signal, the pin wire indicates that the age is to transmit the second control to the main (4) The transmission rate of the D-ID pin's speech frequency noise signal (ie, the one-way low-speed data signal) may be 1/n of the synchronous clock frequency generated by the leg pin, that is, each n synchronized clock signals will generate a one-way transmission of the audio miscellaneous 't line (four) system 2G pass low speed data signal to the servant system 30. According to the above description, the traditional RS-232 or I2C interface is used in the present invention. Referring to Figures 6 and 7, the main serial interface controller and the serial interface 201238266 controller 303 control signals are executed. Two-way transmission (and one-way transmission of low-speed data signals) The number of electrical transmission lines 21, 31 and their corresponding terminals used is extremely limited, and 'because the aforementioned optical fibers 22, 32 of the present invention have replaced conventional RS-232 or A plurality of electrical transmission lines used for one-way transmission of high-speed data signals (such as video or video data signals) between the main serial interface controller 203 and the serial serial interface controller 303 in the I2C interface and corresponding thereto The number of terminals, the present invention can greatly simplify the structural complexity of the hybrid connection ^1 4Q of the foregoing embodiment, and greatly reduce the return of the hybrid connection H 4G, so that the hybrid ageing system of the present invention can It is easier to implement on a thin, short handheld electronic device. He can clearly reveal the structure of the hybrid connector, and the implementation of each hybrid connector is specifically described as follows when the conventional RS_232 or interface is used in the present invention: (1) RS-232 hybrid connector: money As shown in FIG. 8, the hybrid connector 80 has only five signal pins, wherein the first pin 801 is a corresponding pin for connecting the optical fibers 22 and 32 shown in FIGS. 1 and 3, and the second and third. The pin position and the simple line are the corresponding pin positions of the ground pin of the main serial interface controller 2 () 3 and the ground pin (10) UND of the servant serial interface controller 3G3 shown in FIG. And the five-pin 8G4 and 8G5 are used for the signal receiving pin TX of the main serial trainer 2〇3 shown in FIG. 6 and the signal receiving leg of the servant string controller. And the main serial interface control The signal receiving pin RX of the device 203 and the signal transmitting pin τ of the servant serial interface controller 303 are connected to each other. (2) Hybrid connector of the y-th Ιΐ interface specification: Refer to the description, please. There are only fifteen signal pins in the connection, and the first pin is for the Lai 22 *32 tree connection. The other electrical transmission lines correspond to the foot position and are used to transmit the differential signal (5) ferentiai 201238266 Signal) 'where the second and third legs 9〇2 and 9()3 are for the first group of grounding pins GR〇UND and the servant serial interface controller of the main serial interface controller 203 shown in FIG. The first set of grounding legs gr_d of 303 are connected to the corresponding pins, and the fourth and fifth legs 904 and 905 are used for the sd pins of the main serial interface controller 203 shown in FIG. 7 (receiving SD+ and SD-difference) The signal is connected to the corresponding pin of the Deng pin (transmit SD+ and SD-differential signal) of the servant serial interface controller 3〇3, and the sixth and seventh pin positions 906 and 907 are for the seventh figure. Show the main serial interface controller 2〇3 5 (: 1 ^ pin (transmit SCLK + and SCLK - differential signal) and the SCLK pin of the servant serial interface controller 3 〇 3 (receive SCLK + and SCLK-differential signal) corresponding pin position '8th and 9th pin 908 and 909 are for the second serial grounding foot GROUND of the main serial interface controller 2〇3 and the servant serial interface controller_ First The two sets of grounding feet GROUND are connected to the corresponding pin '10th and 11th pin 91〇 and 911 for the CS pin of the main serial interface controller 2〇3 shown in Figure 7 (transmit cs + and CS - the differential signal) is connected to the corresponding pin of the cs pin (receiving cs + and cs - differential signal) of the servant serial interface controller 303, and the twelfth and thirteenth pin 912 and 913 are for the first Figure 7 shows the NTT pin (receive INT + and INT - differential signal) of the main serial interface controller 2〇3 and the mT pin of the servant serial interface controller 3〇3 (transmit INT + and INT - differential signal) connected to the corresponding pin, the fourteenth and fifteenth pin 914 and 915 are for the S0UNDJD pin of the main serial interface controller 2〇3 shown in Figure 7 (transmit S0UNDJD + and S01MLID - differential signal) and the corresponding pin of the S0UND_ID pin (receiving S0UNDJD + and S0UND_ID - differential signal) of the servant serial interface controller 303" (3) a mixture of the second I2C interface specifications Connector: As shown in Figure 1, the hybrid connector 100 has only eight signal pins, and the first pin 101 is for 20 201238266. The optical fibers 22 and 32 shown in Figures 1 and 3 are connected. Correct In the pin position, the pin corresponding to the other electrical transmission line is used to transmit a logical potential signal (logical leVel = ignal), wherein the second pin 1Q2 is the first of the main serial interface controller 203 shown in FIG. The grounding pin GR〇UND and the corresponding pin of the first group of grounding feet GiOTD of the servant serial interface controller 3, the third test (10) is for the main serial interface controller 2第3 The SD pin (receive SD logic potential signal) and the SD pin of the servant serial interface controller 3〇3 (transmit SD pro-potential signal) are connected to the corresponding pin 'fourth pin 1〇4 system for the first 7 shows the main string) the SCLK pin of the kneading controller 203 (transmitting the SCLK logic potential signal) and the corresponding pin of the SCLK pin of the servant serial interface controller 303 (receiving the SCLK logic potential signal) Bit 'the fifth pin 1〇5 is the corresponding pin connected to the first set of grounding feet GROUND touched by the main serial interface controller and the second set of grounding legs G_ND of the servant serial interface controller 3〇3 The sixth pin 1 () 6 is used for the CS pin (transmit CS logic potential signal) of the main serial interface controller 2 〇 3 shown in FIG. 7 The cs pin (receive cs logic potential signal) of the column interface controller 3〇3 is connected to the corresponding pin position. The seventh pin position 1〇7 is used for the INT pin of the main serial port interface controller 203 shown in FIG. (Receive INT logic pot) The corresponding pin connected to the INT pin (transmit INT logic potential signal) of the servant serial interface controller 303, and the eighth pin 1 〇 8 is for the main picture shown in FIG. The SOUNDjD pin of the serial interface controller 2〇3 (transmitting the S0UNDJD logic potential signal) and the corresponding pin connected to the S0UND_ID pin of the servant serial interface controller 303 (receiving the S0UND_ID logic potential signal). According to the above description, please refer to the first and third ®, when the hybrid transmission system of the present invention, .4 10 is applied to the handheld electronic device (eg, laptop, mobile 201238266 electro-active and audio-visual) When playing the material...), the main system 2g (equivalent to the control circuit of the handheld electronic device) can transmit a large amount of data signals (such as image data signals) through the optical fibers 22 and 32. The rate 'transmitted to the (4) unified excitation in the handheld electronic device H circuit), but the main system 2Q and the age system (4) still transmit the low-rate two-way (four) signal through the traditional Wei line 21, 31, therefore, The industry only needs small (four) more social system 2G seam _ 3q interface specifications as above] without the need to greatly adjust the design of the entire line, that is, (four) ground ship hybrid transmission system 10 through the traditional handheld electronic devices, cake scales The handheld electronic device can not only have a very high image transmission rate and quality, but also replaces most of the electrical terminals and transmission lines of the conventional RS-232 or generation interface by the scale fiber 22, 32. See Figure 6 to 10 for the re-clearing. As shown, the present invention also substantially simplifies the foregoing In the example, the hybrid structure connects the structural complexity of H 40, 43, 44 and the ageing type _ 7Q, so that the hybrid money is connected to the H 4Q, 43, 44, and the _ system is large and small, so as to effectively eliminate the traditional connection (4). High-frequency electrical 峨 transmits the above-mentioned image data caused by high-frequency noise interference. In view of the above, it is only a few preferred embodiments of the present invention, but the present invention claims to be _$. Any person familiar with the art can easily think of equivalent changes according to the technical content disclosed in the present invention without departing from the scope of protection of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a structure of a fourth embodiment of the present invention; FIG. 2 is a schematic diagram of a second preferred embodiment of the present invention; A schematic diagram of the third preferred embodiment of the architecture; 22 201238266 FIG. 4 is a block diagram showing a circuit diagram of a fourth embodiment of the present invention; t 6 a circuit block of a preferred embodiment Schematic diagram of the protection device threshold (4) embodiment of the main serial interface control 11 and the servant serial interface control diagram using the traditional (four) 32 interface connection circuit block diagram; _This is a circuit block diagram of the traditional serial interface control (4) and the traditional interface controller between the fresh interface controllers. Figure 8 is a hybrid connector using the conventional RS-232 in the foregoing embodiment of the present invention. FIG. 9 is a schematic view showing an implementation of a conventional first interface specification of the hybrid connector in the foregoing embodiment of the present invention; and FIG. 10 is a hybrid embodiment of the foregoing embodiment of the present invention. The connector uses the implementation of the traditional first I2c interface specification. [Main component symbol description] Hybrid transmission system.... Main system.... Main circuit.··· Clock control chip...· Main serial interface controller.··· Serialized chip·... Optical transmission Wafer·... The first electric transmission line···· The first optical fiber··········································································· Japanese film ....304 Optical reception day ... film ....305 clock and k material reply to the Japanese film ..... ..... 306 voltage control oscillation chip ...·_ ... 307 second electrical transmission line ·...· ...· · 31, 31', 31” Second Fiber·...· ...32 Hybrid Connector·...· •...· 40, 80, 90, 100 Male Connector...· "... 41 Female Connector..... 42 First Hybrid Connector·.........· 43 Second Hybrid Connector.......44 Third Fiber··... •...· 52 Third Electrical Transmission Line·...··. 51 Hybrid Line· ...70 Fourth electric transmission line·...71 Fourth optical fiber·...72 pin position...·••...801~805, 901~915 101 ~ 108 First clock line ..... · Cl Second clock line ......G Third clock line ..... G fourth clock line ..... C4 fifth time Pulse line........C5 24 201238266 Sixth clock line Ce First main bus bar...... Second main bus bar M2 Third main bus bar M3 First servant bus bar S! Two servant bus s2 third servant bus & 25

Claims (1)

201238266 七、申請專利範圍: 1、一種利用光纖及電氣傳輸線傳輸不同方向性訊號之混合式傳輸 系統’該混合式傳輸系統包括一主系統及一僕系統,該主系統 係透過一第一電氣傳輸線及一第一光纖,與一混合式連接器相 連接,該僕系統係透過一第二電氣傳輸線及一第二光纖,與該 混合式連接器相連接,使得該主系統及僕系統間能透過該混合 式連接,在其間傳輸訊號,其中該第一及第二電氣傳輸線係 負責傳輸該主系統及僕系統間之雙向控制訊號,該第一及第二 光纖係負貝傳輸由該主系統傳送至該僕系統之單向數據訊號, "亥雙向控制訊號包括該n統所產生之—第—控制訊號及該僕 系、,充所產生之-第二控制訊號’該第_控制訊號係由該主系統 傳送至該㈣統’用以翻該僕祕之動作,該第二控制訊號 係由該僕系統傳送至該主系統,用以控制該主系統之動作。 2如„月求項1所述之混合式傳輸系統,其中該第一及第二控制訊 號之傳輪速率為每秒十個百萬位元以下。 3 ^求項2所述之混合式傳輸系统,其中該單向數據訊號係一 两速數據纖,該S賴據轉之傳率為每秒—個億位元 以上。 4、㈣求項3所述之混合式傳輪系統,其中該主系統包括: 主電路’⑽產生$第-控制訊號,該主電路尚能分別產生一 參考時脈訊號及該高速數據訊號; —時脈控制,係與該主電路相連接,以接收該主電路傳來 ^亥參考喊磁,且翻相產生—低猶脈綱及一高速 26 201238266 -主串列介面㈣n ’係分顺該時脈控偏狀該主電路相 連接,以触鱗脈㈣“傳來之該低耕脈訊號 ,且根據 該低速時脈訊號’將該主電路傳來之該第一控制訊號轉換成能 透過電氣傳齡傳輸之格式,錢過該第-電氣傳輸線傳輸至 該混合式連接器; 一串化晶片,係分別與該時脈控制晶片及該主電路相連接,以 接收该時脈控制晶>|傳來之該高速時脈訊號,且根據該高速時 脈訊號,將該主電路傳來之該高速數據訊號轉換成能透過光纖 傳輸之格式;及 一光3孔發射S曰片,係與該串化晶片相連接,以接收該串化晶片 傳來之高速數據訊號,且透過該第一光纖,發射至該混合式連 接器。 5、如請求項4所述之混合式傳輸系統,其中該僕系統包括: 一光訊接收晶片,係透過該第二光纖,與該混合式連接器相連 接,以接收該主系統傳來之高速數據訊號; 一時脈及資料回復晶片,係與該光訊接收晶片相連接,以接收 該光訊接收晶片傳來之高速數據訊號,且據以產生一回復時脈 訊號; 一解串化晶片,係與該時脈及資料回復晶片相連接,以接收該 時脈及資料回復晶片傳來之高速數據訊號,且根據該時脈及資 料回復晶片所產生之該回復時脈訊號,將該高速數據訊號轉換 成該僕系統能使用之格式; 一僕串列介面控制器,係透過該第二電氣傳輸線,與該混合式 連接器相連接,以接收該主系統傳來之該第一控制訊號,且將 27 201238266 該第一控制訊號轉換成該僕系統能使用之格式;及 一僕電路’係與該解串化晶片相連接,以接收該解串化晶片傳 來之該高速數據訊號,且與該僕串列介面控制器相連接,以接 收該僕串列介面控制器傳來之第一控制訊號,或將所產生之該 第二控制訊號’依序透過該僕串列介面控制器、該第二電氣傳 輸線、S亥混合式連接器及該主串列介面控制器,傳輸至該主電 路。 6、 如請求項5所述之混合式傳輸系統,其中該主電路尚能產生一 低速數據§孔5虎,且將S亥低速數據訊號傳送至該主串列介面控制 器’該主串列介面控制器能根據該低速時脈訊號,將該主電路 傳來之遠低速數據说號轉換成能透過電氣傳輸線傳輸之格式, 且透過該第一電氣傳輸線傳輸至該混合式連接器,使得該僕串 列介面控制器能透過該第二電氣傳輸線,接收該混合式連接器 傳來之該低速數據訊號,且將該低速數據訊號轉換成該僕系統 月b使用之格式,並傳送至該僕電路,其中該低速數據訊號之傳 輸速率為每秒十個百萬位元以下。 7、 如請求項4所述之混合式傳輸系統,其中該主電路尚能產生一 低速數據訊號,且將該低速數據訊號傳送至該主串列介面控制 器’該主串列介面控制器能根據該低速時脈訊號,將該主電路 傳來之該低速數據訊號轉換成能透過電氣傳輸線傳輸之格式, 且透過該第一電氣傳輸線傳輸至該混合式連接器,其中該低速 數據訊號之傳輸速率為每秒十個百萬位元以下。 8、 如請求項7所述之混合式傳輸系統,其中該僕系統包括: 一僕串列介面控制器’係透過該第二電氣傳輸線,與該混合式 28 201238266 連接器相連接,以接收該主系統傳來之該第一控制訊號及低速 數據訊號,且將該第一控制訊號及低速數據訊號轉換成該僕系 統能使用之格式; 一光訊接收晶片,係透過該第二光纖,與該混合式連接器相連 接,以接收該主系統傳來之高速數據訊號; 一電壓控制振盪晶片,係與該僕串列介面控制器相連接,以根 據該僕串列介面控制器自該低速數據訊號所獲得之該低速時 脈訊號,計算且產生該高速時脈訊號; I 一時脈及資料回復晶片,係分別與該光訊接收晶片及該電壓控 制振盪晶片相連接,以接收該光訊接收晶片傳來之高速數據訊 號,且根據該電壓控制振盪晶片傳來之該高速時脈訊號,產生 一回復時脈訊號; 一解串化晶片,係與該時脈及資料回復晶片相連接,以接收該 a寺脈及資_復以傳來之高速數據訊號,且根獅時脈及資 料回U所產生之該回復時脈訊號,將該高速數據訊號轉換 成該僕系統能使用之格式;及 -僕電路’係與該料化晶片相連接,以接收該解串化晶片傳 來之該高速數據訊號,且與該僕串列介面控制器相連接,以接 收該僕串列介面控制器傳來之第一控制訊號及低速數據訊 號’或將所產生之該第二控制訊號,依序透過賴串列介面控 制器、該第二電氣傳輸線、該混合式連接器及該主串列介面控 制器,傳輸至該主電路。 9、如請求項6或8所述之混合式傳輸系統,其中該高速數據訊號 係一影像數據訊號。 29 201238266 10、 如請求項9所述之混合式傳輪系統,其中該低速數據訊號係 一聲音數據訊號。 11、 如請求項10所述之混合式傳輪系統,係設置在一手持式電子 裝置中。 12、 一種利用光纖及電氣傳輸線傳輸不同方向性訊號之混合式傳 輸系統,該混合式傳輸系統包括一主系統及一僕系統,該主系 統係分別透過一電氣傳輸線及一光纖,與該僕系統相連接,其 中該電氣傳輸線係負責傳輸該主系統及僕系統間之雙向控制訊 號,該光纖係負責傳輸由該主系統傳送至該僕系統之單向數據 訊號,該雙向控制訊號包括該主系統所產生之一第一控制訊號 及該僕系統所產生之一第二控制訊號,該第一控制訊號係由該 主系統傳送至該僕系統,用以控制該僕系統之動作,該第二控 制讯唬係由該僕系統傳送至該主系統,用以控制該主系統之動 作。 13、 如請求項12所述之混合式傳輸系統,其中該第一及第二控制 Λ號之傳輸速率為每秒十個百萬位元以下。 14、 如請求項13所述之混合式傳輸系統,其中該單向數據訊號係 一高速數據訊號,該高速數據訊號之傳輸速率為每秒一個億位 元以上。 15、 如請求項14所述之混合式傳輸系統,其中該主系統包括: 一主電路,能產生該第一控制訊號,該主電路尚能分別產生一 參考時脈訊號及該高速數據訊號; 一時脈控制晶片,係與該主電路相連接,以接收該主電路傳來 之該參考時脈訊號,且據以分別產生一低速時脈訊號及一高速 201238266 時脈訊號; 一主串列介面控制器,係分別與該時脈控制晶片及該主電路相 連接’以接收該時脈控制晶片傳來之該低速時脈訊號,且根據 該低速時脈訊號,將該主電路傳來之該第一控制訊號轉換成能 透過電氣傳輸線傳輸之格式,且透過該電氣傳輸線傳輸至該僕 系統; 一串化晶片,係分別與該時脈控制晶片及該主電路相連接,以 接收該時脈控制晶片傳來之該高速時脈訊號,且根據該高速時 脈訊號,將該主電路傳來之該高速數據訊號轉換成能透過光纖 傳輸之格式;及 一光訊發射晶片,係與該串化晶片相連接,以接收該串化晶片 傳來之高速數據訊號,且透過該光纖,發射至該僕系統。 16、如請求項15所述之混合式傳輸系統,其中該僕系統包括: 一光訊接收晶片,係透過該光纖,接收該主系統傳來之高速數 據訊號; 一時脈及資料回復晶、片,係與該光訊接收晶片相連接,以接收 該光訊接收晶片傳來之高速數據訊號,且據以產生一回復時脈 訊號; 一解串化晶片’係與該時脈及資料回復晶片相連接,以接收該 時脈及資料回復晶片傳來之高速數據訊號,且根據該時脈及資 料回復晶片所產生之該回復時脈訊號,將該高速數據訊號轉換 成該僕系統能使用之格式; 一僕串列介面控制器,係透過該電氣傳輸線,接收該主系統傳 來之該第一控制訊號,且將該第一控制訊號轉換成該僕系統能 31 201238266 使用之格式;及 一僕電路’係與該解串化晶片相連接,以接收該解串化晶片傳 來之該咼速數據訊號’且與該僕串列介面控制器相連接,以接 收該僕串列介面控制器傳來之第一控制訊號,或將所產生之該 第二控制訊號’依序透過該僕串列介面控制器、該電氣傳輸^ 及該主串列介面控制器,傳輸至該主電路。 17、 如請求項16所述之混合式傳輸系統,其中該主電路尚能產生 一低速數據訊號,且將該低速數據訊號傳送至該主串列介面控 制器,該主串列介面控制器能根據該低速時脈訊號,將該主電 路傳來之該低速數據訊號轉換成能透過電氣傳輸線傳輸之格 式,且透過該電氣傳輸線傳輸至該僕系統,使得該僕串列介面 控制器能透過該電氣傳輸線,接收該主系統傳來之該低速數據 訊號,且將該低速數據訊號轉換成該僕系統能使用之格式,並 傳送至該僕電路,其中該低速數據訊號之傳輸速率為每秒十個 百萬位元以下。 18、 如請求項15所述之混合式傳輸系統,其中該主電路尚能產生 一低速數據訊號,且將該低速數據訊號傳送至該主串列介面控 制器,該主串列介面控制器能根據該低速時脈訊號,將該主電 路傳來之魏速數據訊號轉換成能透過電氣傳輸線傳輸之格 式且透過該電氣傳輸線傳輸至該僕系統,其中該低速數據訊 號之傳輸速率為每秒十個百萬位元以下。 19、 如請求項18所述之混合式傳輸系統,其中該撲系統包括: 一僕Φ列介面控制器,係透過該電氣傳輸線,接收該主系統傳 來之該第-控觀號及低速數據峨,且將該第-控制訊號及 32 201238266 低速數據訊號轉換成該僕系統能使用之格式; 一光訊接收晶片,係透過該光纖,接收該主系統傳來之高速數 據訊號; 一電壓控制振盪晶片,係與該僕串列介面控制器相連接,以根 據該僕串列介面控制器自該低速數據訊號所獲得之該低速時 脈訊號’計算且產生該高速時脈訊號; 一時脈及資料回復晶片’係分別與該光訊接收晶片及該電壓控 制振盪晶片相連接,以接收該光訊接收晶片傳來之高速數據訊 5虎,且根據該電壓控制振盪晶片傳來之該高速時脈訊號,產生 一回復時脈訊號; 一解串化晶片,係與該時脈及資料回復晶片相連接,以接收該 時脈及資_復晶㈣來之高魏據載,且根_時脈及資 料回復晶㈣產生之該_時脈贿,_高速數據訊號轉換 成該僕系統能使用之格式;及 -僕電路’係與該解串化晶片相連接,以接收該解串化晶片傳 來之該高速數據訊號,且與該僕串列介面控制器相連接,以接 串列介面控制器傳來之第一控制訊號及低速數據訊 说’或將舰生之該第二㈣簡,鱗魏 制器輸線及該主串列介面控制器,傳輸至該主電面控 峨,綱高速數據 21 :=:號所述之輯輸系統’其中該低綱訊號係 22、如請求項21 _之混合式傳輸祕,係設置在—手持式電子 33 201238266 裝置中。 23、 一種利用光纖及電氣傳輸線傳輸不同方向性訊號之混合式傳 輸系統,該混合式傳輸系統包括一主系統及一僕系統,該主系 統係透過一第一電氣傳輪線及一第一光纖,與一第一混合式連 接器相連接,該僕系統係透過一第二電氣傳輸線及一第二光 纖’與一第二混合式連接器相連接,該第一混合式連接器及該 第二混合式連接器間係藉一混合式瘦線相連接,以透過該混合 式纜線内之一第三電氣傳輸線及一第三光纖,分別使該第一及 第二電氣傳輸線彼此連接,以傳輸該主系統及僕系統間之雙向 控制訊號,且使該第一及第二光纖彼此連接,以傳輸由該主系 統傳送至S亥僕糸統之單向數據訊號,其中該雙向控制訊號包括 該主系統所產生之一第一控制訊號及該僕系統所產生之一第二 控制訊號,該第一控制訊號係由該主系統傳送至該僕系統,用 以控制該僕系統之動作,該第二控制訊號係由該僕系統傳送至 該主系統’用以控制該主系統之動作。 24、 如請求項23所述之混合式傳輸系統,其中該第一及第二控制 訊號之傳輸速率為每秒十個百萬位元以下。 25、 如請求項24所述之混合式傳輸系統,其中該單向數據訊號係 一高速數據訊號,該高速數據訊號之傳輸速率為每秒一個億位 元以上。 26、 如請求項25所述之混合式傳輪系統,其中該主系統包括: 一主電路,此產生该第一控制訊號,該主電路尚能分別產生一 參考時脈訊號及該高速數據訊號; 一時脈控制晶片,係與該主電路相連接,以接收該主電路傳來 34 201238266 之該參考時贩訊號,且據以分別產生—低及 時脈訊號; ^ -主串列介面控制器,係分別與該時脈控制晶片及該主電路相 連接’以接收該時脈控制晶片傳來之該低_脈訊號,且根據 該低速時脈訊號,將該主電路傳來之該第一控制訊號轉換成能 透過電氣傳輸線傳輸之格式,錢過該第—魏傳輸線傳輸至 該第一混合式連接器; 一串化晶片’係分別與該時脈控制晶片及該主電路相連接,以 接收摘脈㈣⑼傳來之該高速時脈峨,且根據該高速時 脈訊號’將社電轉來之該高速數據訊號賴成能透過光纖 傳輸之格式;及 一光訊發射晶片,係與該串化則相連接,以接㈣串化晶片 傳來之高速數據訊號’且透過該第—光纖,發射至該第一混合 式連接器。 27、如請求項26所述之混合式傳輸系統,其中該僕系統包括: 一光訊接收晶片’係透職第二光纖,與該第二混合式連接器 相連接,以接收該主系統傳來之高速數據訊號; -時脈及資料回復晶片’係與該光訊接收晶片相連接,以接收 該光訊接收晶片傳來之高速數據訊號,且據以產生一回復時脈 訊號; -解串化晶片’係與該時脈及資料回復晶片相連接,以接收該 時脈及資料回復晶片傳來之高速數據訊號,且根據該時脈及資 料回復晶片所產生之該回復時脈訊號,將該高速數據訊號轉換 成該僕系統能使用之格式; 35 201238266 -僕串列介面控制器,係透過該第二電氣傳輸線,與該第二混 合式連接器相連接,以接收該主系統傳來之該第—控制訊號, 且將》亥第-控制訊號轉換成該僕系統能使用之格式;及 僕電係與該解串化晶片相連接,以接收該解串化晶片傳 來之該高速數據訊號,且與該僕串列介面控制器相連接,以接 收該僕串列介面控制器傳來之第一控制訊號,或將所產生之該 第二控制訊號’依序透過該僕串列介面控制器、該第二電氣傳 輸線、該第二混合式連接器、該混合式齡、該第一混合式連 接器及該主串列介面控制器,傳輸至該主電路。 28、 如清求項27所述之混合式傳齡統,其巾該主電路尚能產生 一低速數據訊號,且將該低速數據訊號傳送至該主串列介面控 制器’該主串列介面控制器能根據該低速時脈訊號,將該主電 路傳來之該低速數據訊號轉換成能透過電氣傳輸線傳輸之格 式,且透過該第一電氣傳輸線傳輸至該第一混合式連接器,使 得該僕串列介面控制器能透過該第二電氣傳輸線,接收該第二 混合式連接器傳來之該低速數據訊號,且將該低速數據訊號轉 換成該僕系統能使用之格式,並傳送至該僕電路,其中該低速 數據訊號之傳輸速率為每秒十個百萬位元以下。 29、 如請求項26所述之混合式傳輸系統,其中該主電路尚能產生 一低速數據訊號,且將該低速數據訊號傳送至該主串列介面控 制器’該主串列介面控制器能根據該低速時脈訊號,將該主電 路傳來之該低速數據訊號轉換成能透過電氣傳輸線傳輸之格 式’且透過該第一電氣傳輸線傳輸至該第一混合式連接器,其 中該低速數據訊號之傳輸速率為每秒十個百萬位元以下。 36 201238266 30、如請求項29所述之混合式傳輸系統,其中該僕系統包括: 一僕串列介面控制器’係透過該第二電氣傳輸線,與該第二混 合式連接器相連接,以接收該主系統傳來之該第一控制訊號及 低速數據訊號’且將該第一控制訊號及低速數據訊號轉換成該 僕系統能使用之格式; 一光訊接收晶片’係透過該第二光纖,與該第二混合式連接器 相連接’以接收該主系統傳來之高速數據訊號; 一電壓控制振盪晶片’係與該僕串列介面控制器相連接,以根 據該僕串列介面控制器自該低速數據訊號所獲得之該低速時 脈訊號’計算且產生該高速時脈訊號; 時脈及資料回復晶片’係分別與該光訊接收晶片及該電壓控 制振盪晶片相連接’以接收該光訊接收晶片傳來之高速數據訊 號’且根據該電壓控制振盪晶片傳來之該高速時脈訊號,產生 一回復時脈訊號; 一解串化晶片,係與該時脈及資料回復晶片相連接,以接收該 時脈及-貝料回復晶片傳來之高速數據訊號,且根據該時脈及資 料回復晶片所產生之該回復時脈訊號,將該高速數據訊號轉換 成該僕系統能使用之格式;及 一僕電路,係與該解串化晶片相連接,以接收該解串化晶片傳 來之該高速數據訊號,且與該僕串列介面控制器相連接,以接 收該僕串列介面控制器傳來之第一控制訊號及低速數據訊 號’或將所產生之該第二控制訊號’依序透過該僕串列介面控 制器、該第二電氣傳輸線、該第二混合式連接器、該混合式纜 線、該第一混合式連接器及該主串列介面控制器,傳輸至該主 37 201238266 電路。 31、 如請求項28或30所述之混合式傳輸系統,其中該高速數據 訊號係一影像數據訊號。 32、 如請求項31所述之混合式傳輸系統,其中該低速數據訊號係 一聲音數據訊號。 33、 如請求項32所述之混合式傳輸系統,係設置在一手持式電子 裝置中。 38201238266 VII. Patent application scope: 1. A hybrid transmission system for transmitting different directional signals by using optical fibers and electrical transmission lines. The hybrid transmission system includes a main system and a servant system, and the main system is transmitted through a first electrical transmission line. And a first optical fiber connected to a hybrid connector, wherein the servant system is connected to the hybrid connector through a second electrical transmission line and a second optical fiber, so that the main system and the servant system can pass through The hybrid connection transmits a signal therebetween, wherein the first and second electrical transmission lines are responsible for transmitting a bidirectional control signal between the primary system and the servant system, and the first and second optical fiber transmissions are transmitted by the primary system The one-way data signal to the servant system, "Hai two-way control signal includes the first-control signal generated by the n-system and the servant system, and the second control signal generated by the charging-the second control signal Transmitted by the main system to the (four) system for turning the servant, the second control signal is transmitted by the servant system to the main system for controlling the main system The action of the system. 2 The hybrid transmission system of claim 1, wherein the first and second control signals have a transmission rate of less than ten million bits per second. 3 ^ Hybrid transmission according to item 2 The system, wherein the one-way data signal is a two-speed data fiber, and the transmission rate of the data is more than one hundred million bits per second. 4. The hybrid transmission system according to item 3, wherein The main system includes: a main circuit '(10) generates a $th-control signal, the main circuit can respectively generate a reference clock signal and the high-speed data signal; - a clock control is connected to the main circuit to receive the main The circuit is called ^hai reference shouting magnetic, and the phase is generated - low Juji and a high speed 26 201238266 - main serial interface (four) n ' is divided into the clock control biased the main circuit connected to touch the scale pulse (four) "The low-pour pulse signal is transmitted, and the first control signal transmitted from the main circuit is converted into a format that can be transmitted through the electrical age transmission according to the low-speed clock signal, and the money is transmitted to the first-electric transmission line to The hybrid connector; a serialized wafer, respectively The pulse control chip and the main circuit are connected to receive the high speed clock signal transmitted by the clock control crystal, and the high speed data signal transmitted from the main circuit is converted into the high speed clock signal according to the high speed clock signal a format capable of transmitting through an optical fiber; and a light 3-hole transmitting S-chip connected to the serialized wafer to receive a high-speed data signal transmitted from the serialized chip, and transmitted to the hybrid through the first optical fiber Connector. 5. The hybrid transmission system of claim 4, wherein the servant system comprises: an optical receiving chip coupled to the hybrid connector via the second optical fiber to receive the primary system a high-speed data signal; a clock and data recovery chip is coupled to the optical receiving chip to receive the high-speed data signal transmitted from the optical receiving chip, and accordingly generate a reply clock signal; a deserialized chip And connecting to the clock and the data recovery chip to receive the high-speed data signal transmitted from the clock and the data recovery chip, and recovering the reply clock signal generated by the chip according to the clock and the data, the high speed The data signal is converted into a format usable by the servant system; a servant serial interface controller is connected to the hybrid connector through the second electrical transmission line to receive the first control signal transmitted by the main system And converting the first control signal of 27 201238266 into a format usable by the servant system; and a servant circuit is connected to the deserialization chip to receive the deserialization The high-speed data signal transmitted from the chip is connected to the servant serial interface controller to receive the first control signal sent by the servant serial interface controller, or to generate the second control signal The sequence is transmitted to the main circuit through the servant serial interface controller, the second electrical transmission line, the S-Hybrid connector, and the main serial interface controller. 6. The hybrid transmission system of claim 5, wherein the main circuit is capable of generating a low speed data § hole 5 tiger, and transmitting the S Hai low speed data signal to the main serial interface controller 'the main string The interface controller can convert the far low speed data number transmitted from the main circuit into a format transmittable through the electrical transmission line according to the low speed clock signal, and transmit the same to the hybrid connector through the first electrical transmission line, so that the interface The servant serial interface controller can receive the low-speed data signal transmitted by the hybrid connector through the second electrical transmission line, and convert the low-speed data signal into a format used by the servant system, and transmit to the servant The circuit wherein the low speed data signal has a transmission rate of less than ten million bits per second. 7. The hybrid transmission system of claim 4, wherein the main circuit is capable of generating a low speed data signal and transmitting the low speed data signal to the main serial interface controller 'the main serial interface controller can Transmitting the low-speed data signal transmitted from the main circuit into a format transmittable through the electrical transmission line, and transmitting the same to the hybrid connector through the first electrical transmission line, wherein the transmission of the low-speed data signal is performed according to the low-speed clock signal The rate is below ten million bits per second. 8. The hybrid transmission system of claim 7, wherein the servant system comprises: a servant serial interface controller 'connecting to the hybrid 28 201238266 connector through the second electrical transmission line to receive the The first control signal and the low speed data signal are transmitted from the main system, and the first control signal and the low speed data signal are converted into a format usable by the servant system; and an optical receiving chip is transmitted through the second optical fiber, The hybrid connector is connected to receive the high speed data signal transmitted from the main system; a voltage controlled oscillating chip is connected to the servant serial interface controller, according to the servant serial interface controller from the low speed The low speed clock signal obtained by the data signal calculates and generates the high speed clock signal; the I clock and the data recovery chip are respectively connected to the optical receiving chip and the voltage controlled oscillation chip to receive the optical signal. Receiving a high-speed data signal transmitted from the chip, and controlling the high-speed clock signal transmitted from the oscillating chip according to the voltage to generate a reply clock signal; The deserialized chip is connected to the clock and the data recovery chip to receive the high-speed data signal transmitted by the a temple pulse and the resource, and the reply time generated by the root lion clock and the data back U a pulse signal, the high speed data signal is converted into a format usable by the servant system; and a servant circuit is coupled to the materialized wafer to receive the high speed data signal transmitted from the deserialized chip, and The servant serial interface controller is connected to receive the first control signal and the low speed data signal transmitted by the servant serial interface controller or to generate the second control signal sequentially through the serial interface controller The second electrical transmission line, the hybrid connector and the main serial interface controller are transmitted to the main circuit. 9. The hybrid transmission system of claim 6 or 8, wherein the high speed data signal is an image data signal. The method of claim 9, wherein the low speed data signal is a voice data signal. 11. The hybrid transmission system of claim 10 arranged in a handheld electronic device. 12. A hybrid transmission system for transmitting different directional signals using an optical fiber and an electrical transmission line, the hybrid transmission system comprising a main system and a servant system, the main system being respectively transmitted through an electrical transmission line and an optical fiber, and the servant system Connected, wherein the electrical transmission line is responsible for transmitting a two-way control signal between the primary system and the servant system, and the optical fiber is responsible for transmitting a unidirectional data signal transmitted by the primary system to the servant system, the two-way control signal including the primary system Generating a first control signal and a second control signal generated by the servant system, the first control signal being transmitted by the main system to the servant system for controlling the action of the servant system, the second control The signal is transmitted from the servant system to the main system for controlling the action of the main system. 13. The hybrid transmission system of claim 12, wherein the first and second control apostrophes have a transmission rate of less than ten million bits per second. 14. The hybrid transmission system of claim 13, wherein the one-way data signal is a high speed data signal, and the high speed data signal has a transmission rate of more than one hundred million bits per second. The hybrid transmission system of claim 14, wherein the main system comprises: a main circuit capable of generating the first control signal, wherein the main circuit can respectively generate a reference clock signal and the high speed data signal; a clock control chip is connected to the main circuit to receive the reference clock signal from the main circuit, and respectively generate a low speed clock signal and a high speed 201238266 clock signal; a main serial interface a controller is connected to the clock control chip and the main circuit respectively to receive the low speed clock signal transmitted by the clock control chip, and the main circuit is transmitted according to the low speed clock signal The first control signal is converted into a format transmittable through the electrical transmission line and transmitted to the servant system through the electrical transmission line; a serialized chip is respectively connected to the clock control chip and the main circuit to receive the clock Controlling the high speed clock signal transmitted from the chip, and converting the high speed data signal transmitted from the main circuit into the optical fiber according to the high speed clock signal Format; information and a light emitting chip, connected to the serial-based wafers, wafer to receive the string of data coming from the high-speed signal, and transmitted through the optical fiber to transmit the slave system. The hybrid transmission system of claim 15, wherein the servant system comprises: an optical receiving chip, the high-speed data signal transmitted from the main system is received through the optical fiber; a clock and data recovery crystal and chip Connected to the optical receiving chip to receive the high-speed data signal transmitted from the optical receiving chip, and accordingly generate a reply clock signal; a deserialized chip' and the clock and data recovery chip Connected to receive the high-speed data signal transmitted from the clock and the data recovery chip, and convert the high-speed data signal into the servant system according to the clock signal generated by the clock and the data recovery chip. a servant serial interface controller receives the first control signal transmitted by the main system through the electrical transmission line, and converts the first control signal into a format used by the servant system 31 201238266; The servant circuit is coupled to the deserialization chip to receive the idle data signal transmitted from the deserialized chip and is coupled to the servant serial interface controller. Receiving the first control signal sent by the servant serial interface controller, or sequentially transmitting the generated second control signal through the servant serial interface controller, the electrical transmission ^, and the main serial interface interface Transmitter to the main circuit. 17. The hybrid transmission system of claim 16, wherein the main circuit is capable of generating a low speed data signal and transmitting the low speed data signal to the main serial interface controller, the main serial interface controller capable Transmitting the low-speed data signal transmitted from the main circuit into a format transmittable through the electrical transmission line, and transmitting the electrical transmission line to the servant system, so that the servant serial interface controller can transmit the low-speed clock signal An electrical transmission line receives the low-speed data signal transmitted by the main system, and converts the low-speed data signal into a format usable by the servant system, and transmits the format to the servant circuit, wherein the low-speed data signal has a transmission rate of ten per second. Below one million. 18. The hybrid transmission system of claim 15, wherein the main circuit is capable of generating a low speed data signal and transmitting the low speed data signal to the main serial interface controller, the main serial interface controller capable According to the low-speed clock signal, the Wei speed data signal transmitted from the main circuit is converted into a format that can be transmitted through the electrical transmission line and transmitted to the servant system through the electrical transmission line, wherein the transmission rate of the low-speed data signal is ten per second. Below one million. 19. The hybrid transmission system of claim 18, wherein the blasting system comprises: a servant Φ column interface controller, receiving the first-control view number and low-speed data transmitted by the main system through the electrical transmission line峨, and converting the first control signal and the 32 201238266 low speed data signal into a format usable by the servant system; an optical receiving chip receives the high speed data signal transmitted from the main system through the optical fiber; The oscillating chip is connected to the servant serial interface controller to calculate and generate the high speed clock signal according to the low speed clock signal obtained by the servant serial interface controller from the low speed data signal; The data recovery chip is connected to the optical receiving chip and the voltage controlled oscillating wafer respectively to receive the high-speed data from the optical receiving chip, and the high-speed data transmitted from the oscillating wafer is controlled according to the voltage. The pulse signal generates a reply clock signal; a deserialized chip is connected to the clock and the data recovery chip to receive the clock and the polycrystal The high Wei is based on the data, and the root_clock and data recovery crystal (4) generated the _ time bribe, _ high-speed data signal is converted into the format that the servant system can use; and - servant circuit system and the deserialization The chip is connected to receive the high-speed data signal sent from the deserialized chip, and is connected to the servant serial interface controller to connect the first control signal and the low-speed data message sent by the serial interface controller 'Or the second (four) Jane, the scales of the ship, and the main serial interface controller, transmitted to the main electrical surface control, the high-speed data 21:=: 'The low-level signal system 22, such as the hybrid transmission secret of claim 21, is set in the handheld electronic 33 201238266 device. 23. A hybrid transmission system for transmitting different directional signals using an optical fiber and an electrical transmission line, the hybrid transmission system comprising a main system and a servant system, the main system transmitting a first electrical transmission line and a first optical fiber Connected to a first hybrid connector, the servant system is connected to a second hybrid connector through a second electrical transmission line and a second optical fiber, the first hybrid connector and the second The hybrid connector is connected by a hybrid thin wire to respectively connect the first and second electrical transmission lines to each other through a third electrical transmission line and a third optical fiber in the hybrid cable for transmission a two-way control signal between the primary system and the servant system, and connecting the first and second optical fibers to each other for transmitting a unidirectional data signal transmitted by the primary system to the servant system, wherein the two-way control signal includes the a first control signal generated by the main system and a second control signal generated by the servant system, the first control signal being transmitted by the main system to the servant system for controlling the servant The action of the system, the second control signal is transmitted by the servant system to the main system' to control the action of the main system. 24. The hybrid transmission system of claim 23, wherein the first and second control signals have a transmission rate of less than ten million bits per second. 25. The hybrid transmission system of claim 24, wherein the one-way data signal is a high speed data signal, and the high speed data signal has a transmission rate of more than one hundred million bits per second. The hybrid transmission system of claim 25, wherein the main system comprises: a main circuit, the first control signal is generated, and the main circuit can respectively generate a reference clock signal and the high speed data signal a clock control chip is connected to the main circuit to receive the reference traffic signal from the main circuit 34 201238266, and respectively generate a low-time pulse signal; ^ - a main serial interface controller, Connected to the clock control chip and the main circuit respectively to receive the low-pulse signal transmitted from the clock control chip, and the first control is transmitted from the main circuit according to the low-speed clock signal The signal is converted into a format that can be transmitted through the electrical transmission line, and the money is transmitted to the first hybrid connector through the first transmission line; a serialized chip is connected to the clock control chip and the main circuit respectively to receive Extracting the high-speed clock from the pulse (4) (9), and according to the high-speed clock signal, the high-speed data signal transferred from the social power is transmitted through the optical fiber; and an optical transmission Sheet, is connected to the line of the string, (iv) to access the string of high-speed data signal coming wafer 'transmitted through the first and - to transmit the first hybrid connector fiber. 27. The hybrid transmission system of claim 26, wherein the servant system comprises: an optical receiving chip responsive to the second optical fiber, coupled to the second hybrid connector for receiving the primary system The high-speed data signal; the clock and the data recovery chip are connected to the optical receiving chip to receive the high-speed data signal transmitted from the optical receiving chip, and accordingly generate a reply clock signal; The serialized wafer is connected to the clock and the data recovery chip to receive the high-speed data signal transmitted from the clock and the data recovery chip, and the reply clock signal generated by the wafer is recovered according to the clock and the data. Converting the high speed data signal into a format usable by the servant system; 35 201238266 - The servant serial interface controller is connected to the second hybrid connector through the second electrical transmission line to receive the main system transmission The first control signal is generated, and the "Hai-control signal" is converted into a format usable by the servant system; and the servant system is connected to the deserialization chip to receive the deserialization crystal The high-speed data signal transmitted from the chip is connected to the servant serial interface controller to receive the first control signal sent by the servant serial interface controller, or to generate the second control signal Transmitting to the main circuit through the servant serial interface controller, the second electrical transmission line, the second hybrid connector, the hybrid age, the first hybrid connector, and the main serial interface controller . 28. The hybrid ageing system of claim 27, wherein the main circuit is capable of generating a low speed data signal, and transmitting the low speed data signal to the main serial interface controller 'the main serial interface> The controller can convert the low-speed data signal transmitted from the main circuit into a format transmittable through the electrical transmission line according to the low-speed clock signal, and transmit the same to the first hybrid connector through the first electrical transmission line, so that the The servant serial interface controller can receive the low speed data signal transmitted by the second hybrid connector through the second electrical transmission line, and convert the low speed data signal into a format usable by the servant system, and transmit the The servant circuit, wherein the low-speed data signal has a transmission rate of less than ten million bits per second. 29. The hybrid transmission system of claim 26, wherein the main circuit is capable of generating a low speed data signal and transmitting the low speed data signal to the main serial interface controller 'the main serial interface controller can Transmitting, according to the low-speed clock signal, the low-speed data signal transmitted from the main circuit into a format transmittable through the electrical transmission line and transmitting to the first hybrid connector through the first electrical transmission line, wherein the low-speed data signal The transmission rate is less than ten million bits per second. The method of claim 29, wherein the servant system comprises: a servant serial interface controller operatively coupled to the second hybrid connector via the second electrical transmission line Receiving the first control signal and the low speed data signal transmitted by the main system and converting the first control signal and the low speed data signal into a format usable by the servant system; and an optical receiving chip is permeable to the second optical fiber Connecting to the second hybrid connector to receive a high speed data signal transmitted from the main system; a voltage controlled oscillation chip is coupled to the serial serial interface controller to control according to the serial interface The low speed clock signal obtained from the low speed data signal 'calculates and generates the high speed clock signal; the clock and data recovery chip 'connects to the optical receiving chip and the voltage controlled oscillation chip respectively to receive The optical signal receives the high-speed data signal transmitted from the chip and controls the high-speed clock signal transmitted from the oscillating chip according to the voltage to generate a reply clock signal. a de-serialization chip is connected to the clock and the data recovery chip to receive the high-speed data signal transmitted from the clock and the material recovery chip, and the wafer is generated according to the clock and the data recovery Responding to the clock signal, converting the high speed data signal into a format usable by the servant system; and a servant circuit connecting the deserialized chip to receive the high speed data signal transmitted by the deserialized chip, And connecting to the servant serial interface controller to receive the first control signal and the low speed data signal transmitted by the servant serial interface controller or to sequentially transmit the generated second control signal to the servant string The column interface controller, the second electrical transmission line, the second hybrid connector, the hybrid cable, the first hybrid connector, and the main serial interface controller are transmitted to the main circuit 37 201238266. 31. The hybrid transmission system of claim 28 or 30, wherein the high speed data signal is an image data signal. 32. The hybrid transmission system of claim 31, wherein the low speed data signal is an audio data signal. 33. The hybrid transmission system of claim 32, wherein the hybrid transmission system is disposed in a handheld electronic device. 38
TW100107675A 2011-03-08 2011-03-08 The use of optical fiber and electrical transmission lines to transmit different directional signals of hybrid transmission system TWI440320B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102739315A (en) * 2011-04-02 2012-10-17 矽玛科技股份有限公司 Hybrid transmission system capable of transmitting signals of different directions
TWI822549B (en) * 2023-01-07 2023-11-11 明基電通股份有限公司 Detection circuit for detecting transmission directionality of transmission line

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102739315A (en) * 2011-04-02 2012-10-17 矽玛科技股份有限公司 Hybrid transmission system capable of transmitting signals of different directions
CN102739315B (en) * 2011-04-02 2015-04-15 矽玛科技股份有限公司 Hybrid transmission system capable of transmitting signals of different directions
TWI822549B (en) * 2023-01-07 2023-11-11 明基電通股份有限公司 Detection circuit for detecting transmission directionality of transmission line
US12074662B2 (en) 2023-01-07 2024-08-27 Benq Corporation Detection circuit for detecting transmission directionality of transmission line

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