TW201236195A - Optoelectronic semiconductor chip - Google Patents

Optoelectronic semiconductor chip Download PDF

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Publication number
TW201236195A
TW201236195A TW101103749A TW101103749A TW201236195A TW 201236195 A TW201236195 A TW 201236195A TW 101103749 A TW101103749 A TW 101103749A TW 101103749 A TW101103749 A TW 101103749A TW 201236195 A TW201236195 A TW 201236195A
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TW
Taiwan
Prior art keywords
layer
semiconductor
semiconductor wafer
contact
sequence
Prior art date
Application number
TW101103749A
Other languages
Chinese (zh)
Inventor
Lutz Hoeppel
Original Assignee
Osram Opto Semiconductors Gmbh
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Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Publication of TW201236195A publication Critical patent/TW201236195A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/385Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body

Abstract

An optoelectronic semiconductor chip (1) is provided, including a carrier substrate (11), a semiconductor layer sequence (2), which includes a first semiconductor area (3) of a first conductive type, a second semiconductor area (5) of a second conductive type, and an active layer (4) arranged between them, a mirror layer (6) arranged between the carrier substrate (11) and the semiconductor layer sequence (2), an electrical isolating transparent capsule layer (10), which covers side edges (16) of the mirror layer (6) and side edges (21) of the semiconductor layer sequence (2), a bond pad (9), which is arranged laterally offset from the semiconductor layer sequence (2), a contact layer (7), which is used for electrical contacting of the second semiconductor area (5) and arranged at least on partial areas of the radiation emitting face (15), and an electrical connection layer (8), which conductively connects the bond pad (9) with the contact layer (7), and extends on the transparent capsule layer (10) over the side edges (21) of the semiconductor layer sequence (2) to the bond pad (9).

Description

201236195 六、發明說明: 【發明所屬之技術領域】 本發明涉及一種光電半導體晶片。 本發明特別是涉及一種所謂的薄膜發光二極體曰 片’其中半導體層序列之原來的生長基板被剝除,且: 而代之的是’該半導體層序列在與原來的生長基板相對 向的側面上與不同於該生長基板之载體相連接。在此種 薄膜發光二極體晶片中,於該半導體層序列之與載體基 板相向之側設有鏡面層之情況’因為可使往該載體基2 之方向所發出的輻射轉往輻射發出側之方向,使得可提 高輻射效益,因而為有利的。 就可見光譜區而t ’銀特別適合用作為該鏡面層的 材料’此乃因銀具有高反射率之特性,但銀另一方面對 腐蝕具有敏感性。 【先前技術】 向的輻射發出面 樣會產生輻射 通常可經由配置在與載體基板相對 上之接合墊來接觸光電半導體晶片。但 發出面的一部分被該接合墊遮蔽的缺點 根據文獻WO2008/13 1 735 A1可得知有另 方弋可 用來接觸一光電半導體晶片。在此處所述的半導體^曰片 中,第一和第二電性終端層配置在發光二極體晶片2與 該輻射發出面相對向的背側上,並藉由— _ 隔離層而互相 隔離;其中’第二電性終端層之部分區 Λ 1從半導體晶片 之背側經由活性層之一缺口而往半導體曰u 干等體晶片之前側的方 向延伸。上述半導體晶片之此種接觸具有輕射發出面因 -4- 201236195 為不具備一接合墊使得發出的輕射不會被遮蔽的優 然而’此種接觸的方式由於接觸孔經由活性層而延 因而失去發光面的一部分。 【發明内容】 本專利申請案主張德國專利申請案1 〇 2011 5 04.2之優先權’在此援用其已揭示的整個内容。 本發明的目的是提供一種改良型之光電半導 片’其中須形成一種接觸區,可使半導體晶片之幾 個面都可用來發光’且在輻射發出面不會發生明顯 蔽現象。此外,有利於同時保護半導體晶片所包含 面層不受到腐蝕。 上述目的係藉由申請專利範圍第1項之光電半 晶片來達成。本發明有利的其它配置和形式則描述 請專利範範圍之各附屬項中。 依據至少一配置方式’光電半導體晶片係包括 體基板及含有第一導電型之第一半導體區、第二導 之第二半導體區及配置在此二個半導體區之間的活 之半導體層序列。 第一半導體區係面向載體基板,且較佳是卩型 體區。第二半導體區係面向半導體晶片之輻射發出 且較佳是η型半導體區。 光電半導體晶片較佳是所謂之薄膜半導體晶片 中自半導體層序列剝除原來的生長基板,且半導體 列之與原來的生長基板相對向之側係與載體基板 接。 點。 伸, 010 體晶 乎整 的遮 的鏡 導體 於申 :載 電架 性層 半導 面, ,其 層序 相速 -5- 201236195 在δ亥載體基板和該半導體層序列之間 有金屬或金屬合金之一鏡面層。此鏡面層 或銀或由其構成。由於就可見光譜區而言 I·生之特性,所以較佳為以銀作為鏡面層的 層另外亦可有利地形成有接觸第一半導體 區〇 此外’光電半導體晶片包括一電性絕 層,其覆蓋鏡面層之側緣及半導體層序列 I·生、、邑緣之透明包封層保護鏡面層不受腐飯 透明包封層可使半導體層序列之側緣達成 光電半導體晶片具有以在橫向上偏離 的方式配置之接合墊。因此,此接合塾特 體基板上的半導體層序列旁邊,並非配置 列之輕射發出面上。此接合墊較佳是由至 形成。此接合墊亦可包括多個部分層,例 序列。 為了與第二半導體區形成電性接觸, 層配置在輻射發出面之部分區域上。 輻射發出面上之接觸層藉由電性連接 形成導電性連接。電性連接層在透明包封 體層序列之側緣而延伸至接合墊。 接合墊特別是配置在載體基板上之半 邊’而非輻射發出面上,所以光電半導體 出面未被明顯地遮蔽。在半導體層序列的i 觸結構未經由活性層而延伸。因此,、舌丨生》 有利地配置具 例如可具有鋁 銀具有高反射 材料。此鏡面 1的電性接觸 '緣之透明包封 之側緣。此電 。此外,藉由 電性絕緣。 半導體層序列 別是配置在載 在半導體層序 少一個金屬層 丨如鈦/鉑/金層 須至少一接觸 層而與接合墊 層上經由半導 導體層序列旁 晶片之輻射發 内部,上述接 罾之整個面可 201236195 有利地用 在一 半導體層 序列之部 別佳的保 入。半導 都具有一 接於鏡面 加在載體 透明包封 在一 來製備透 較小之很 來進行層 和施加在 緣的中間 來產生輻射。 有利的配置φ _ a ^ ’鏡面層所具有的橫向範圍小於 序列,JL由、头 /、透明包封層之部分區域在半導體層 分區域下方μ & ^ t伸。依此方式,鏡面層可受到特 =致使不會發生氧化作用及/或不受濕氣侵 g序列較佳是在半導體晶片之全部的側緣上 兄面層突出的突起。一個中間區有利地鄰 層之側緣’該中間區形成在半導體層序列和施 基板上之層序列之間。中間區中可有利地以該 層來填入, ,佳的配置中,可有利地藉由原子層沈積(ALD) =包封層。依此方法’可有利地產生缺陷密度 密的層。此外,此方法具有能以較小的中間區 沈積之優點。令間區特別是指在半導體層序列 该載體基板上之層序列之間鄰接於鏡面層之側 區0 —透月^封層較佳是具有氧化鋁、氧化錯石、氧化鈦、 ,化铪或氧化石夕。&等材料具有透明性和電性絕緣性時 :有和的。包封層特別是亦可具有多個部分層,其較佳 疋刀別包含上述材料之一。例如,透明包封層可包含由 Ah〇3, Zr〇2, Ti〇2或Hf〇2構成的一層或多個層,其中在 至少-個部分層上施加一種由Si〇2構成的保護層。依此 方式,一方面可使鏡面層受到良好的保護而不會發生氧 、水不會侵入且亦不會受到機械上的損傷。另一方面, 可在電性連接層和半導體晶片之側緣之間達成良好的電 201236195 性絕緣。此外,可有利 r A ^ 1- ^ ^ μ 也糟由透明包封層而在施加於載 性:接層層(其用來電性連接第一半導體區)和電 生連接層之間達成電性絕緣。 透明包封層較佳是且古 明包封層具有多個部分層,微米或更小的厚度。若透 之總厚度。 層’則所謂厚度是指透明包封層 具右:!層較佳是透明的。藉由接觸層是透明的,在與 觸層(例如,金屬層)比較下,不會發生 ^ ^ ^ ^ m - 皮遮蔽的現象。因此,可有利地 高因此使光電半導體晶片之效率提 在有利的配置中,桩撫a ^ 物。透明之可導m 層具有透明之可導電氧化 (IT⑺。 運氧化物特別有利的是銦錫氧化物 在另—有利的配置中 覆蓋輕射發出面之部觸層結構化,使其只 輕射發出面之表面包括在半導體層序列之作為 面= :特別有利…種情況下,由輕射發出 別有效。9所覆蓋的邹分區域發出之輻射發射率特 接觸層特別是可具有— 伸的接觸條。藉由此種接觸:或=在韓射發出面上延 注入至半導體層序列中…;’ °有利地將均勻的電流 體層序列之一角!^ $ 乂在電性連接層只鄰接於半導 夂姑姐 側緣時特別有利。 各接觸條較佳暑开< 士、 是可具有-種i,㈣‘如種柵格結構。各接觸條特別 -繞該輕射發出面之邊緣的邊條,以特別 -8- 201236195 是亦可將電流注入至半導體晶片之邊緣區域中。由邊條 開始,一條或多條接觸條有利地在輻射發出面上延伸, 以將儘可能均勻的電流注入至半導體層序列中。在輻射 發出面上延伸之各接觸條特別是可形成一種直角的 格。 在一有利的配置中,電性連接層具有透明之可導電 氧化物。在此種情況下,覆蓋半導體晶片之側緣的電性 絕緣之包封層、及在包封層上延伸之電性連接層都是透 明時是有利的。據此特別具有不會發生因輻射在半導體 B曰片之側緣上被吸收而造成一種加熱現象致使半導體晶 片之效率下降的優點。 Μ 電|·生連接層特別是可具有銦錫氧化物。特別是電性 連接層具有與接觸層相同的材料,使例如接觸層和電性 連接層都具有透明之可導電氧化物(例如,銦錫氧化物)。 半導體層序列較佳是具有300微米或更小的橫向範 圍°半導體層序列特別是可具有矩形或正方形的橫切 面’其邊長為300微米或更小。就此種小的光電半導體 日曰片而言’在輻射發出面上與一接合墊形成傳統的接觸 時’較小的輕射發出面上的接合墊會覆蓋面積之較大部 刀’將會導致發生較大的遮蔽現象,所以此處所述的包 封和接觸之方式特別有利。 在一種配置中,半導體層序列具有多個相鄰而配置 的部分區域,其令此等部分區域藉由一個或多個溝渠而 互相隔開。 在此種配置中’—條金屬接觸條較佳是在至少,溝 -9- .201236195 :=1: ’ :屬接觸條使接合墊與電性連接層導電性連 中藉由電性接觸條可從一接合墊開始延伸,其 分別連接至各接觸條之::序列之至少-個部分區域 列之多伽却Y 、 條。依此方式,半導體層序 夕個分區域(該箄邱八P # 士 米或更小之於6款 有利地分別具有300微 片。此曰月圍)可組合成一較大的光電半導體晶 區域之橫向範圍在此種情況下可較該等部分 由唯==广多個部分區域之接觸較佳是藉 於多個該接合墊藉由至少-溝渠中介 接層。 接觸條而分別連接至電性連 發明。下將依據與圖1至圖7有關的各實施例來描述本 【實施方式】 各圖式中相同或作用相同 參考符號。所示的各元件和夂件分別標上相同的 例繪出。 〇元件之間的比例未必依比 圖1中以橫切面所示的光電半 第一導電型的第-半導體區3 =片1 W具有 導體區5之半導體層序列2。第及::導電型的第二半 裀主播^ 平導體區3車交传县η 1 +導體區且第二半導體區 較佳疋Ρ 第—半導栌铂 較佳疋η型半導體區。在 光電:;體IT二半導體區5之間配置-活性區4。 發出轄射之活性區。此活性佳是-種適合用來 雙異質結構、| 一量子 ::成為叩接面、 乂夕重式量子井結構。 -10- 201236195 半導體晶片1之半導體層序列2較佳是 :物半導體材料為主,特別是以钟化物、氮化物或鱗: 入化口物半導體材料為主。例如’半導體層序列2可包 S InxAlyGai-x.yN、、〜叫 χ yp 或 χ As 盆中 且x + yU。此外,此m_v化合物半導體 材料未必準確含有以上述數理形式所表示之組成。反 ^,此材料可具有—種或多種摻雜物質以及其它成分, :些成分基本上不會改變此材料之物理特 求簡單’上述形式只含有晶格之主要成分,這此主要: 分之一部分亦可由少量的其它物質來取代。 光電半導體晶片1且右澈 -、有載體基板11,其較佳是不同 *半導體層序列2之生長基板,且例如藉由連接層。而 與光電半導體晶片i連接,連㈣12特別是可為—種由 金屬或金層合金所構成的焊接層。載體基板"亦 錄方式製成。載體基板U較佳是具有導電性且用來盘第 +導體區3形成電性接觸。載體基板"較佳是 矽、鎳、銅或鉬。 八 為了使光電半導體W丨之㈣效益獲得改良 在半導體層序歹"和载體基板"之間配置鏡面層6。此 鏡面層6在面向載體基板u之側上配置在第 3:後’且特別是可與半導體層序歹"相鄰接。亦可I 半導體區3 :鏡面層6之間配置一中間層,其例如 疋缚的黏合促進層(未顯示)。在載體基板η和鏡面層6 之間配置例如連接層12(特別是由金屬或金屬合 的焊接層)、接觸金屬1 13(特別是可為請/金層序 201236195 歹J )及位障層14(其例如可以是TiW(N)層)。位障層 1 4特別疋可防止鏡面層6的成分擴散至接觸金屬層1 3 中或至連接層12中,且可防止反向的擴散。 鏡面層6特別是包含銀、鋁、或包含一種含有銀或 鋁之金屬合金。就可見光譜區而言,此等材料具有高反 射!·生及優良導電性之特性。鏡面^ 6具有使從活性層4 發::載體基板U之方向的輻射反射至輻射發出面Η的 力月b此外,鏡面層6亦用來與第一半導體區3達成電 精由配置在丰壤》g*曰υ 牛導體日日片1之輻射發出面15之至少一 接:的區域上之接觸層7來達成第二半導體區5之電性 :觸。半導體層序列2之形成半導體晶片丨之輕射= 5的表面較佳為具有粗糙度或發射結㈣ 體層序列2所發出之輻射發射率獲得改良。 接觸層7較佳A @ ΒΒ λα 土 有透明之導雷望1: 之接觸層7特別是具 上的接觸:7 錫氡化物。由於賴射發出面15 的接觸層7是透明的,所 1 ^ ifc ^ 0. 所以輪射在從光電半導體晶片 出時可有利地不受影響或只稍微受到影響。 為了儘可此減少從||射發出而1 ^ Ρ丄 出之釦鉍双从玄 細耵發出面15經由接觸層7而發 出面Μ Μ π ^ Γ· Α 警接觸層7只覆蓋輻射發 叫印1 5的部分區域的情 別是可n…1 有利。透明之接觸層7特 体r 土 a 如射發出面1 5上之接觸 ”(未顯示),該接觸條特是 半W曰Η ] 士 成—種拇格結構。 牛導體日日片1中’半導體屉 層6之側緣16是由電 :1之側緣21和鏡面 I絕緣之透明包封層1〇所覆蓋。 -12- 201236195 此包封層10具有伴罐 有保4鏡面層6使鏡面層6不受腐蝕之功 月匕 特別疋鏡面層6研a X丨h201236195 VI. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to an optoelectronic semiconductor wafer. More particularly, the present invention relates to a so-called thin film light-emitting diode chip in which the original growth substrate of the semiconductor layer sequence is stripped, and: instead, the semiconductor layer sequence is opposed to the original growth substrate. The side is connected to a carrier different from the growth substrate. In such a thin film light-emitting diode wafer, a mirror layer is provided on the side of the semiconductor layer sequence facing the carrier substrate 'because the radiation emitted in the direction of the carrier base 2 can be transferred to the radiation emitting side. The direction makes it possible to increase the radiation benefit and is therefore advantageous. The visible spectral region and t 'silver are particularly suitable for use as the material of the mirror layer. This is because silver has a high reflectivity characteristic, but silver is sensitive to corrosion on the other hand. [Prior Art] The radiation emitting surface generates radiation. The optoelectronic semiconductor wafer can usually be contacted via a bonding pad disposed on the opposite side of the carrier substrate. However, it is known that a part of the emitting surface is shielded by the bonding pad. According to the document WO 2008/13 1 735 A1, it is known that another electrode can be used for contacting an optoelectronic semiconductor wafer. In the semiconductor wafer described herein, the first and second electrical termination layers are disposed on the back side of the light-emitting diode wafer 2 opposite to the radiation emitting surface, and are mutually separated by the — _ isolation layer Isolation; wherein the partial region Λ1 of the second electrical termination layer extends from the back side of the semiconductor wafer via a gap of the active layer to the front side of the semiconductor wafer. Such contact of the above semiconductor wafer has a light-emitting surface. -4- 201236195 is a method in which a bonding pad is not provided so that the emitted light is not shielded. However, the manner of such contact is delayed due to the contact hole via the active layer. Lose part of the glowing surface. SUMMARY OF THE INVENTION This patent application claims the priority of the German Patent Application Serial No. PCT Application No. 2011. SUMMARY OF THE INVENTION It is an object of the present invention to provide an improved photovoltaic semi-conductor' in which a contact region is to be formed which allows portions of the semiconductor wafer to be used for illumination' and which does not obscure the radiation emitting surface. In addition, it is advantageous to simultaneously protect the surface layer contained in the semiconductor wafer from corrosion. The above object is achieved by the photoelectric semiconductor chip of claim 1 of the patent application. Other configurations and forms that are advantageous to the present invention are described in the various dependent claims. In accordance with at least one configuration, an optoelectronic semiconductor wafer includes a bulk substrate and a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity, and a sequence of a living semiconductor layer disposed between the two semiconductor regions. The first semiconductor region faces the carrier substrate and is preferably a germanium body region. The second semiconductor region emits radiation toward the semiconductor wafer and is preferably an n-type semiconductor region. Preferably, the optoelectronic semiconductor wafer is a so-called thin film semiconductor wafer in which the original growth substrate is stripped from the semiconductor layer sequence, and the semiconductor column is connected to the carrier substrate on the side opposite to the original growth substrate. point. Stretching, 010 crystallized mirror conductor in the application: carrier layer semi-conducting surface, its phase velocity -5 - 201236195 between the δH carrier substrate and the semiconductor layer sequence between metal or metal One of the mirror layers of the alloy. This mirror layer or silver is composed of or. Since the characteristics of the visible region are in the sense of the spectral region, it is preferred that the layer having silver as the mirror layer is additionally advantageously formed to contact the first semiconductor region. Further, the optoelectronic semiconductor wafer includes an electrical insulating layer. Covering the side edge of the mirror layer and the semiconductor layer sequence I. The transparent encapsulation layer of the edge of the semiconductor layer protects the mirror layer from the transparent encapsulation layer of the diced rice. The side edges of the semiconductor layer sequence can be realized in the lateral direction. The bond pads are configured in a deviating manner. Therefore, the side of the semiconductor layer on the bonded substrate is not disposed on the light emitting surface of the column. This bonding pad is preferably formed by . The bond pad can also include a plurality of partial layers, such as a sequence. In order to make electrical contact with the second semiconductor region, the layer is disposed over a portion of the radiation emitting surface. The contact layer on the radiation emitting surface is electrically connected to form a conductive connection. The electrically connected layer extends to the bond pads at the side edges of the sequence of transparent encapsulant layers. The bonding pads are arranged, in particular, on the half of the carrier substrate instead of the radiation emitting surface, so that the optoelectronic semiconductor exit surface is not significantly obscured. The i-contact structure of the semiconductor layer sequence does not extend through the active layer. Therefore, the tongue is advantageously configured to have, for example, aluminum silver having a highly reflective material. The electrical contact of the mirror 1 is the side edge of the transparent envelope of the edge. This electricity. In addition, it is electrically insulated. The semiconductor layer sequence is disposed in a semiconductor layer carrying a metal layer, such as a titanium/platinum/gold layer, at least one contact layer, and the bond pad layer is irradiated inside the wafer via the semiconducting conductor layer sequence, the above connection The entire surface of the crucible can be advantageously used in the semiconductor layer sequence of 201236195. The semiconductors are all connected to the mirror surface and are transparently encapsulated in the carrier to produce a relatively small layer and applied in the middle of the edge to generate radiation. Advantageously, the φ _ a ^ ′ mirror layer has a lateral extent smaller than the sequence, and a portion of the JL, head/, and transparent encapsulation layer is μ & ^ t under the semiconductor layer sub-region. In this manner, the mirror layer can be subjected to protrusions that do not cause oxidation and/or are not subject to moisture. The sequence is preferably a protrusion that protrudes over the entire side edge of the semiconductor wafer. An intermediate region advantageously has a side edge of the adjacent layer. The intermediate region is formed between the semiconductor layer sequence and the layer sequence on the substrate. This layer may advantageously be filled in the intermediate region, in a preferred configuration, advantageously by atomic layer deposition (ALD) = encapsulation. In this way, a layer having a dense density of defects can be advantageously produced. Moreover, this method has the advantage of being able to deposit in a smaller intermediate zone. In particular, the inter-regional region is adjacent to the side region of the mirror layer between the layer sequences on the carrier substrate of the semiconductor layer sequence. The vapor-blocking layer preferably has alumina, oxidized streak, titanium oxide, and bismuth oxide. Or oxidized stone eve. When materials such as & have transparency and electrical insulation: there is a sum. In particular, the encapsulating layer can also have a plurality of partial layers, which preferably comprise one of the abovementioned materials. For example, the transparent encapsulating layer may comprise one or more layers composed of Ah〇3, Zr〇2, Ti〇2 or Hf〇2, wherein a protective layer composed of Si〇2 is applied on at least one partial layer. . In this way, on the one hand, the mirror layer can be well protected without oxygen, water, and mechanical damage. On the other hand, good electrical 201236195 insulation can be achieved between the electrical connection layer and the side edges of the semiconductor wafer. In addition, it may be advantageous for r A ^ 1- ^ ^ μ to be electrically formed by the transparent encapsulation layer between the carrier layer: the interlayer layer (which is used to electrically connect the first semiconductor region) and the electro-generated connection layer. insulation. The transparent encapsulating layer is preferably and the ancient encapsulating layer has a plurality of partial layers, a thickness of micrometers or less. If the total thickness is penetrated. The layer 'the thickness is the transparent encapsulation layer with the right:! The layer is preferably transparent. By the contact layer being transparent, the ^ ^ ^ ^ m - skin masking phenomenon does not occur in comparison with the contact layer (e.g., metal layer). Therefore, it can be advantageously high to make the efficiency of the optoelectronic semiconductor wafer in an advantageous configuration. The transparent conductive m layer has transparent conductive oxidation (IT(7). It is particularly advantageous for the oxide oxide to cover the touch layer structure of the light emitting surface in another advantageous configuration, so that it is only lightly exposed. The surface of the emitting surface is included in the case of the semiconductor layer sequence as a surface =: particularly advantageous, the light emission is effective. The radiation emissivity of the Zoen region covered by 9 is particularly capable of having a stretch. Contact strips. By this contact: or = in the surface of the semiconductor emission, it is injected into the semiconductor layer sequence...; '° advantageously a corner of the uniform current body layer sequence! ^ 乂 电 in the electrical connection layer only adjacent to It is particularly advantageous when the semi-guided aunts have a side edge. Each contact strip is preferably a summer open < a gentleman, can have a kind of i, and (4) a kind of grid structure. Each contact strip is particularly - around the edge of the light emitting surface The side strips, in particular -8-201236195, can also inject current into the edge regions of the semiconductor wafer. Starting from the side strips, one or more contact strips advantageously extend over the radiation emitting surface to be as uniform as possible Current injection into the semiconductor In the layer sequence, the contact strips extending over the radiation emitting surface can in particular form a right-angled lattice. In an advantageous configuration, the electrical connection layer has a transparent electrically conductive oxide. In this case, the semiconductor is covered. It is advantageous to have an electrically insulating encapsulation layer on the side edges of the wafer and an electrically conductive connection layer extending over the encapsulation layer. This is particularly advantageous in that it does not occur due to radiation on the side edges of the semiconductor B. The effect of being absorbed causes a heating phenomenon to cause a decrease in the efficiency of the semiconductor wafer. Μ The electrical connection layer may in particular have indium tin oxide. In particular, the electrical connection layer has the same material as the contact layer, such as for example Both the layer and the electrical connection layer have a transparent conductive oxide (for example, indium tin oxide). The semiconductor layer sequence preferably has a lateral extent of 300 microns or less. The semiconductor layer sequence may in particular have a rectangular or square shape. The cross-section 'has a side length of 300 microns or less. For such a small optoelectronic semiconductor sundial sheet' when forming a conventional contact with a bonding pad on the radiation emitting surface The larger knives on the smaller light-emitting surface that cover the larger area will result in greater shadowing, so the manner of encapsulation and contact described herein is particularly advantageous. In one configuration, The semiconductor layer sequence has a plurality of adjacently disposed partial regions that are separated from each other by one or more trenches. In such a configuration, the '-metal contact strips are preferably at least, the trenches -9- .201236195 :=1: ' : The contact strip makes the bonding pad and the electrical connection layer conductively connectable from the bonding pad by the electrical contact strip, which are respectively connected to the contact strips:: sequence At least one partial region is listed as a plurality of gamma Y, strips. In this way, the semiconductor layer is sub-regional (the 箄 Qiu Ba P # 士米 or smaller than 6 advantageously has 300 microchips respectively. The lateral range of the larger photovoltaic semiconductor crystal regions can be combined in this case, and the contact of the plurality of partial regions is preferably borrowed from a plurality of the bonding pads. The layer is connected by at least a trench. The contact strips are respectively connected to the electrical connection invention. The following description will be made in accordance with the embodiments relating to Figs. 1 through 7; the same or the same reference numerals are used in the respective drawings. The components and components shown are labeled with the same example. The ratio between the germanium elements is not necessarily proportional. The photo-semi-first conductivity type first semiconductor region 3 = sheet 1 W shown in cross section in Fig. 1 has the semiconductor layer sequence 2 of the conductor region 5. The first and the second: the second half of the conductive type, the main conductor, the flat conductor area, the car, the η 1 + conductor region, and the second semiconductor region, preferably 疋Ρ, the semi-conductive platinum, preferably the 疋-type semiconductor region. The active region 4 is disposed between the photo-electricity:2 body semiconductor regions 5. Issue the active area of the ray. This activity is good for a double heterostructure, a quantum: a tantalum junction, and a quantum structure. -10- 201236195 The semiconductor layer sequence 2 of the semiconductor wafer 1 is preferably: the material semiconductor material is mainly composed of a carbide material, a nitride or a scale: a semiconductor material. For example, the 'semiconductor layer sequence 2 may include S InxAlyGai-x.yN, ~ χ yp or χ As in the basin and x + yU. Further, the m_v compound semiconductor material does not necessarily contain the composition represented by the above mathematical form. In contrast, the material may have one or more kinds of dopants and other components, and the components do not substantially change the physical requirements of the material. The above form only contains the main components of the crystal lattice, which is mainly: Some can also be replaced by a small amount of other substances. The optoelectronic semiconductor wafer 1 and the right substrate are provided with a carrier substrate 11, preferably a different growth substrate of the semiconductor layer sequence 2, and for example by a connection layer. In connection with the optoelectronic semiconductor wafer i, the junction (4) 12 may in particular be a solder layer composed of a metal or a gold layer alloy. The carrier substrate is also made by recording. The carrier substrate U is preferably electrically conductive and is used to form electrical contact with the +rd conductor region 3 of the disk. The carrier substrate " is preferably ruthenium, nickel, copper or molybdenum. VIII In order to improve the efficiency of the (4) optoelectronic semiconductor, the mirror layer 6 is disposed between the semiconductor layer 歹 " and the carrier substrate". This mirror layer 6 is disposed on the side facing the carrier substrate u at the 3rd: after and especially in the semiconductor layer. It is also possible to arrange an intermediate layer between the semiconductor regions 3: the mirror layer 6, which is, for example, a bonded adhesion promoting layer (not shown). Between the carrier substrate η and the mirror layer 6, for example, a connection layer 12 (particularly a metal or metal-bonded solder layer), a contact metal 1 13 (especially a request/gold sequence 201236195 歹J), and a barrier layer are disposed. 14 (which may for example be a TiW (N) layer). The barrier layer 1 4 prevents the composition of the mirror layer 6 from diffusing into the contact metal layer 13 or into the connection layer 12, and prevents reverse diffusion. The mirror layer 6 comprises, in particular, silver, aluminum or a metal alloy containing silver or aluminum. In terms of the visible spectral region, these materials have the characteristics of high reflection, good generation and excellent electrical conductivity. The mirror surface 6 has a force month b for reflecting radiation from the direction of the active layer 4: the carrier substrate U to the radiation emitting surface. In addition, the mirror layer 6 is also used to achieve electrical precision with the first semiconductor region 3. The contact layer 7 on the region of the at least one of the radiation emitting surface 15 of the magnetic conductor day 1 is to achieve the electrical property of the second semiconductor region 5: touch. The formation of the semiconductor layer sequence 2 of the semiconductor wafer is preferably a light-emitting surface of 5 with a roughness or an emission junction (4). The radiation emissivity of the bulk layer sequence 2 is improved. The contact layer 7 is preferably A @ ΒΒ λα soil having a transparent guide: the contact layer 7 is particularly in contact with: 7 tin telluride. Since the contact layer 7 of the radiation emitting surface 15 is transparent, 1 ^ ifc ^ 0. so that the radiation can advantageously be unaffected or only slightly affected when it is discharged from the optoelectronic semiconductor. In order to reduce the number of 铋 铋 从 从 从 从 从 从 从 从 从 从 从 从 从 从 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警 警The difference between the parts of the printed area 1 is n...1. The transparent contact layer 7 special body r soil a such as the contact on the emitting surface 15 (not shown), the contact strip is half W 曰Η ] 士成—the type of the thumb lattice structure. The side edge 16 of the semiconductor drawer layer 6 is covered by a side edge 21 of electricity: 1 and a transparent encapsulation layer 1 绝缘 insulated by the mirror surface I. -12- 201236195 This encapsulation layer 10 has a mirror layer 6 with a can. The mirror layer 6 is not subject to corrosion, and the mirror layer 6 is studied a X丨h

又到包封層1 〇的保護而不致發生 氧化或濕瘋侵入。鐘而麻^ , , A 層6之側緣16較佳是全部側面都 由包封層10所圍繞史 使鏡面層6在任何位置都未與環境 媒體直接相鄰接。 透明之包封層10龄4 β曰士^丨丨 Hf〇 . ς.η 較佳疋具有材料 Al2〇3, Zr〇2, Ti〇2, 且古s , ^種。在一種配置中’透明之包封層 化紹氣ΓΓ固部分層。例*,包封層10可具有由氧 氧化矽所槿:石、氧化鈦或氧化铪所構成的基底層和由 所構成的覆蓋層。此種透明之包封層10可特別有 效地保護鏡面声6 τ A * 了增ιυ 了特別有 層1〇之厚度^佳a广及,或濕氣侵入。透明之包封 以多層來構成時π ^米或更小。當透明之包封層10 多^來^成時,所謂包封層1〇的厚度是指總厚度。 在一尤佳之配置中,鏟 半導體層序列2者… 有的橫向範圍小於 在丰導% Μ & 透明之包封層10之部分區域10a SZ W Ψ 乙伸。鏡面層6之側緣1 ό在此種 配置中有利地盥车逡栌 ^ 體層序列2之側缝?^ μ 1相隔開。丰導 較佳”“和鏡面層6之側緣16之間的距離 較佳疋在0.5微米和5微半夕„ 士、认士 依此方4 ^ 未之間,尤佳時為大約3微米。 他此万式,鏡面; 一 a 6 了特別有效地受到保護。 輻射發出面15上之 接合墊9相連接。此接八 藉由電性連接層8而與 列2隔開# μ D塾9以在橫向上與半導體層序 為了二=’且特別是未覆蓋轄射發出面”。 為了將此接合墊9與接觸 上之電性連桩思。 I 7相連接’透明之包封層10 电注運接層8須經由丰導體s皮 千等體層序列2之側緣2 1而延 -13- 201236195 伸至接合墊。 連接層8特別是由輻射發出面15之邊緣區域 。、上之電J·生連接層8連接至透明之接觸層7)經由包封層 之卩刀區域(其覆蓋半導體層序列2之側緣2 1)而延伸 匕封層^之覆蓋著載體基板11(其上設有多個層12, ,)之區域。此接合墊9配置在電性連接層8之與半 導體層序列2之側、缘2 i相隔開的區域上,此區域是與配 置在載體基板111方之包封層1〇上之半導體層序列2 之主面平行而延伸。 電性連接層8較佳是含有透明之可導電氧化物,特 別疋銦錫氧化物。此電性連接層因此特別是可由與半導 體晶片之輻射發出面上之透明接觸層7相同的材料來形 成。在此種配置中,電性連接層8具有透明性是有利的。 據此具有不會發生穿過半導體晶片之側緣21上之透明 的包封層10之輻射被吸收而造成一種加熱現象而使半 導體晶片之效率下降的優點。 以下依據圖2A至圖21來詳述圖1中所示的光電半 導體晶片之製造方法之一實施例。 在圖2A中所示的方法之各中間步驟中,半導體層序 列2包括第一半導體區3、活性區4、及第二半導體區5, 此半導體層序列2生長在一種生長基板20上。此種生長 較佳是以磊晶方式來進行’特別是藉由MOVPE來進行。 半導體層序列2例如可含有氮化物化合物半導體材料且 該生長基板20是藍寶石基板。第一半導體區3較佳是p 型半導體區,且第二半導體區5較佳是η型半導體區。 -14- 201236195 你固所示的中間步驟中’鏡面屏κ >丄 ® & s,丨, 叫1 6施加在半導艚 層序列2之與生長基板20相對向的界 此鮫佳县咖 丨面上。鏡面層6因 此季又隹疋與ρ型半導體區3相鄰接。 含銀。 、兄面層6較佳是包 在鏡面層6上施加一個位障層14 ^ Τ; 'Λ/Ύ XT、y ^、例如可含右 T!W(N)。仅障層14具有使鏡面層6之 有 金Μ Μ Λ ic * 衬抖擴散至隨後之 么屬層及抑制反向擴散的功能。 在位障層14上跟隨著接觸金屬層13 個部分層,特別是鈦/翻/金層序列。’具可具有多 依上述方式所製造的層序列在與生長基板2〇 二的:側上例如藉由連接層12而與載體基板u相連 ^栽體基板η特別是可具有導電性且較佳是 矽、鎳、鋼或鉬。 頁 :,層12例如可以是一焊接層’特別是Ausn焊接 s疋,該載體基板11亦可直接以電鍍方式沈 接觸金屬層Η μ . LL ^ w ^ ^ 13上。在此種情況下,不需要該連接層12。 在圖2C所示的中間步驟中,從半導體層序列2剝離 板2〇°因為與原來之生長基板20相對向的载體 基板Π現已用作半導體晶片1之單—的載體’所以光電 I導體g y 0曰月1在與先前之圖式比較下為已旋轉18〇度。 例如可藉由雷射剝離處理而從半導體層序列2剝離生長 基板2〇(特別是藍寶石基板)。 在圖2D所示之中間步驟中,第二半導體區5之現在 已裸露的矣 衣面5又有一發射結構1 8。此發射結構1 8例如 曰 氧氧化鉀來進行的蝕刻而製成。依此方式,因 -15- 201236195 第二半導體區5之 <表面在已製成的半導體晶片 射發出面1 5,所以可# & 乃T用作輻 率獲得改I。 U ^ W的發射 在圖2Ε所示之令間步驟中,半導體層序 化成一平台(mesa)社姓 h構It is again protected by the encapsulation layer 1 without oxidation or wet intrusion. The side edge 16 of the A layer 6 is preferably surrounded by the encapsulation layer 10 so that the mirror layer 6 is not directly adjacent to the environmental medium at any location. Transparent encapsulation layer 10 years old 4 β gentleman ^丨丨 Hf〇 . ς.η preferably has materials Al2〇3, Zr〇2, Ti〇2, and ancient s, ^ species. In one configuration, the 'transparent encapsulation layered the gas stagnation portion. For example, the encapsulating layer 10 may have a base layer composed of cerium oxide, stone, titanium oxide or cerium oxide, and a coating layer composed of the same. Such a transparent encapsulating layer 10 can particularly effectively protect the specular sound 6 τ A *. The thickness of the layer is particularly high, or the moisture is intruded. The transparent envelope is composed of multiple layers of π ^ m or less. When the transparent encapsulating layer 10 is formed, the thickness of the encapsulating layer 1 是 refers to the total thickness. In a particularly good configuration, the shovel semiconductor layer sequence 2...the lateral extent is less than the partial area 10a SZ W Ψ B in the transparent encapsulation layer 10 . The side edge 1 of the mirror layer 6 is advantageously in this configuration for the side seam of the body layer sequence 2? ^ μ 1 is separated. Preferably, the distance between the convex guide and the side edge 16 of the mirror layer 6 is preferably between 0.5 micrometers and 5 micro-halfs, and between 4 and 4, and preferably about 3 micrometers. He is a versatile, mirrored surface; a 6 is particularly effectively protected. The bond pads 9 on the radiation emitting surface 15 are connected. This is separated from the column 2 by the electrical connection layer 8 # μ D塾9 in order to be in the lateral direction with the semiconductor layer for the second = 'and in particular the uncovered radiation emitting surface". In order to connect the bonding pad 9 with the electrical contact on the contact. I 7 phase connection 'transparent encapsulation layer 10 The electrospray connection layer 8 must be extended to the bonding pad via the side edge 2 1 of the bulk conductor sequence 2 -13-201236195. The connecting layer 8 is in particular an edge region of the radiation emitting surface 15. The upper connection layer 8 is connected to the transparent contact layer 7) and the carrier layer is covered by the enamel region of the encapsulation layer (which covers the side edge 2 1 of the semiconductor layer sequence 2) 11 (the area on which multiple layers 12, , are provided). The bonding pad 9 is disposed on a region of the electrical connection layer 8 spaced apart from the side of the semiconductor layer sequence 2 and spaced apart from the edge 2 i. This region is a semiconductor layer sequence disposed on the encapsulation layer 1 of the carrier substrate 111 side. The main faces of 2 extend in parallel. The electrically conductive layer 8 preferably contains a transparent, electrically conductive oxide, particularly indium tin oxide. This electrically connecting layer can thus be formed in particular from the same material as the transparent contact layer 7 on the radiation emitting surface of the semiconductor wafer. In such a configuration, it is advantageous that the electrical connection layer 8 has transparency. Accordingly, there is an advantage that radiation which does not pass through the transparent encapsulating layer 10 on the side edge 21 of the semiconductor wafer is absorbed to cause a heating phenomenon to lower the efficiency of the semiconductor wafer. An embodiment of the method of manufacturing the photovoltaic semiconductor wafer shown in Fig. 1 will be described in detail below with reference to Figs. 2A to 21 . In each intermediate step of the method shown in Fig. 2A, the semiconductor layer sequence 2 comprises a first semiconductor region 3, an active region 4, and a second semiconductor region 5, which is grown on a growth substrate 20. This growth is preferably carried out in an epitaxial manner, particularly by MOVPE. The semiconductor layer sequence 2 may, for example, contain a nitride compound semiconductor material and the growth substrate 20 is a sapphire substrate. The first semiconductor region 3 is preferably a p-type semiconductor region, and the second semiconductor region 5 is preferably an n-type semiconductor region. -14- 201236195 In the intermediate step shown by you, 'mirror screen κ > 丄® & s, 丨, called 1 6 is applied to the semi-conducting layer sequence 2 opposite to the growth substrate 20 Curry noodles. The mirror layer 6 is further adjacent to the p-type semiconductor region 3 in this season. Contains silver. Preferably, the matte layer 6 is coated with a barrier layer 14 ^ 包 on the mirror layer 6; 'Λ/Ύ XT, y ^, for example, may contain right T!W(N). Only the barrier layer 14 has a function of diffusing the gold layer Λ ic ic * of the mirror layer 6 to the subsequent genus layer and suppressing back diffusion. The partial barrier layer 14 is followed by 13 partial layers of the contact metal layer, in particular a titanium/turn/gold layer sequence. The layer sequence which can be produced in the above manner can be connected to the carrier substrate u, for example, by the connection layer 12 on the side opposite to the growth substrate 2, and the carrier substrate η can be electrically conductive and preferably It is tantalum, nickel, steel or molybdenum. The layer 12 can be, for example, a solder layer, in particular, an Aus solder s, which can also be directly contacted with the metal layer Η μ LL ^ w ^ ^ 13 by electroplating. In this case, the connection layer 12 is not required. In the intermediate step shown in FIG. 2C, the board 2 is peeled off from the semiconductor layer sequence 2 because the carrier substrate 相对 opposite to the original growth substrate 20 is now used as a carrier of the semiconductor wafer 1 so that the photo-I The conductor gy 0 曰 1 is rotated 18 degrees in comparison with the previous pattern. For example, the growth substrate 2 (particularly a sapphire substrate) can be peeled off from the semiconductor layer sequence 2 by laser lift-off treatment. In the intermediate step shown in Fig. 2D, the now exposed face 5 of the second semiconductor region 5 has an emission structure 18 again. This emission structure 18 is made by etching, for example, yttrium oxyhydroxide. In this way, since the surface of the second semiconductor region 5 of -15-201236195 is on the surface of the semiconductor wafer from which the semiconductor wafer is emitted, it can be used as the radiance. U ^ W emission In the inter-step shown in Figure 2, the semiconductor layer is sequenced into a platform (mesa)

Wesa)結構。於此,半導體層序列2 區域被剝蝕至鏡面;At 又遺緣 兄甸層6,以便能以所期望的形 來製成半導體層序列2 , ^ 小 此種結構化較佳是以微影術來 灯/、申例如可使用H3P〇4作為蝕刻劑。 在圖2F所示的下一個中間步驟中,須以-種敍刻處 ^將鏡面層6結構化,使鏡面層6具有—種較半導體 :序列2還小的橫向範圍。半導體層序列2較佳是在全 邛側面都具有一種由鏡面層6突出的突 面層6之側绥]< L A , 〜在鏡 別地鄰接著一個中間區,1 半導體層序列2和你_庶,, 八$成在 杜,a 障層14之間。鏡面層6之側緣16 特別疋.、半導體層序列2之側 、、 較佳是在0 5糌半知“丄 1相^ 5巨離。此距離 ^ υ3微水和5微米之間。 在圖2G所示的中間步驟中, 列上施加電性㈣μ 一 匕万式所I成的層序 =!·生絕緣之透明包封層1〇。此透 車父佳疋包含材料Al2〇3,Zr〇2,Ti〇 于層10 -種。透明包封層1〇較佳 盾23 2之至少 成。以此種原子層沈積(ALD)來製 的層。又 積之方法,則可有利地沈積特別純且密 行的優點,特別ΘΠ·Λ/ 在較小的中間區中進 荷別疋可在半導體屏. 於鄰接於鏡 曰序列2和位障層14之間 兄面層6之側緣16之中間區中進行。 圖2Η所示之下一中門牛跑丄 卜中間步驟中,第二半導體區5 201236195 之用作輻射發出面1 5之表面由透明之電性包封層裸露 出’這例如能以緩衝之氫氟酸(BOE,Buffered Oxide Etch) 來進行的蝕刻而達成。又,第二半導體區5之表面可藉 由感應耦合之電漿蝕刻(ICP)來處理,以預備稍後施加一 接觸層。 在圖21所示之中間步驟中,施加由透明的可導電氧 化物構成之層7,8且予以結構化。透明的可導電氧化物 層7, 8特別是一種IT〇層且例如具有大約25〇奈米之厚 度0 透明的可導電氧化物層之一部分7沈積在輻射發出 面1 5上’此一部分7形成透明之接觸層7以對第二半導 體區5形成電性接觸。 透月的"Τ導電氧化物層之另一部分8由透明之接觸 層7之邊緣區域超越半導體層序列之設有透明之包封層 之側緣2 1以延伸至包封層1 〇之平行於半導體層序列 2之主面而延伸之區域,此區域配置在位障層14上。透 明的可導電氧化物層之此一部分形成電性連接層8。 種配置中,透明之接觸層7和電性連接層8因 此是由相同的材料製成’且特別是可在相同的加工步驟 中被設置及/或被結構化。 尸叮不之光電半導體 兩丨裂成圖 :須在電f生連接層8之一區域上施加一接合墊9,棄 :戍::封層1〇上之配置在半導體層序列2旁之“ 千仃於半導體層序列2 之主面而延伸。接合塾9可J -個或多個金屬層,特別是鈦/崎層序列。, 201236195 圖3中以:視圖來顯示光電半導體晶片1的實施例 中。此實施例中,透明之垃錨品7 + Α <接觸層7在輻射發出面15上延 伸且不是施加在整面上而是具有多條接觸條Η。 2在轄射發出面15上形成拇格結構。此概格結構I 本實施例中是一種直角結構,立中 成八列和八行。 /、中各接觸條Π例如配置 透明之接觸層7結構化成接觸條17(特 結構)展現可達成良好的電流擴大之優二 流均句地由半導體層序列之整個橫 :電 晶…。此外,在各接觸條17之間 入二半導體 其令輻射發出面15未具備接觸層7 ’以便以此=區 成一特別良好的輻射發射率。 x來達 由各接觸條17所形成的透明接觸 層8而與第二接合塾9形成導電性連接連接 就像透明之接觸層7一樣是由透明之 連接層8 是IT〇)來形成。 電氧化物(特別 電性連接層8具有一區域8a,Α中此广 射發出* 之邊緣區中連接至透明之^'區域在輕 接声s 口 透明之接觸層7。雷极、* 接層8之另一部分8b在半導體晶片i之 電!·生連 之側緣21上延伸。電性連接層8之第三、L封層1 〇 透明之包封層1〇之平行於半導體層序配置在 之一區域上。接合塾9以在橫向上偏 ^延伸 方式配置於電性連接層8之此區域8c。導體層序列的 W連接層8和接合墊9較佳是配 曰曰片1之-角隅上。由於該接合塾9在 $電+導體 201236195 層序列成偏移地配置,所以經由輻射發出面丨5 _ 射率不受接合塾9之影響。此種方式的電性接觸對井^ 半導體晶片1特別有利,光電半導體晶片1 〜竣長大約 疋300微米或更小。在此種較小的光電半導體^片 在將一接合墊配置在輻射發出面15上時, 1中’ 对卬的輻射 之主要部分是由接合墊9之具有吸收性的材料所吸收 圖4中以俯視圖顯示光電半導體晶片i之另 一 例,其中半導體層序列具有多個互相隔開的部分^ 22 ’其分別被結構化成平台且藉由溝渠19而 一 > '相隔開。 半導體層序列之多個部分區域2 2分別被配置成像圖3 所示的實施例一樣。 光電半導體晶片1具有一個中央接合墊9,其配置 在電性連接層8上》電性連接層8經由半導體層^列之 區域22之側緣而延伸至透明之接觸層7。此外,由接合 墊9開始之金屬接觸條在溝準19 Φ证他 入 ° 未U笮延伸,金屬接觸條 19例如由與接合墊相同的材料所形成,且特別是斤以盘 接合墊相同的步驟來製成。電性連接層8不只在^導體 層序列之部分區域22之角隅上與接觸層7接觸,且亦在 半導體層序列之部分區域22之面向接觸條门之側緣上 與該接觸層7接觸。依此方式’可使至半導體層序列之 各別的部分區域22之邊緣區域中的電流注入更進一步 獲得改良。 ’ 圖4所示的實施例中,半導體層序列之部分區域η 較佳是分別具有300微米或更小的邊長。由於光電半導 體晶片1中多個此種部分區域22組合成一共同的光電半 -19- 201236195 1 ’其中 導體晶>{,所以可實現較大的光電半導體晶片 均勻的電流注入至全部的部分區域22中。 圖5顯不光電丰導^艘ag . 〜电千等體日日片1之另一實施例之 圖。本實補t,電㈣接層8由與接合塾9相同的材 料所構成’並非由與透明之接觸I 7相同的材料 成。電性連接層8和接合墊9例如可分別具有一種鈦/金 /翻層序列’且特別是同時被設置及/或被結構化。 以下結合圖6A至圖6E以依據中間步驟來詳述圖$ 所示之光電半導體晶片1之製造方法。本方法中,首先 進打先前於圖2A至圖2D中所述之中間步驟,其在此處 不再描述。 圖6A所示的中間步驟中,在第二半導體區5(其較 佳是η型半導體區)之先前設有發射結構丨8之表面上施 加接觸層7»接觸層7較佳是具有透明之可導電氧化物 (例如,ΙΤΟ)且例如可具有大約25〇奈米之厚度。第二半 導體區5之表面較佳是在施加透明之接觸層7之前以感 應式電漿蝕刻來處理,以使透明之接觸層7至第二半導 體區5之半導體材料之電性連接獲得改良。因此,相對 於圖2Α至圖21所示之製造方法而言,本實施例中在半 導體層序列2之結構化之前已施加完成透明之接觸層7。 然後’進行圖6Β所示之將半導體層序列2結構化成 平台結構’圖6C所示之鏡面層6之結構化及圖6D所示 之透明之電性絕緣的包封層1 〇之施加。此等步驟對應於 先前以圖2Ε至圖2G所示之各步驟,因此此處不再詳述。 圖6Ε所示的中間步驟中,在包封層1〇中產生一個 -20- 201236195 開口,使光電半導體晶片i之以透明之接觸層7來覆蓋 之輕射發出面15裸露出。 為了製成圖5所示之光電半導體晶片丨,隨後須施 加金屬層(例如,鈦/始/金層序列)且予以結構化,以形成 電性連接層8和接合墊9。 圖7中顯示光電半導體晶片1之另—實施例。此光 電半導體晶片1基本上與圖3所示之實施例一樣地形 成…丨而’電性連接層8不是由與透明之接觸層7相同 的材料來形成,而是由與接合墊9相同的材料來形成。 一金屬層在半導體層序列2旁形成接合墊9,此金屬層 因此亦在半導體晶片1之設有電性絕緣之包封層1〇之側 緣上延伸至輻射發出面1 5,此處金屬層與透明之接觸層 7鄰接’且使接觸層7與接合墊9形成電性連接。 本發明當然不限於依據各實施例所作的描述。反 之’本發明包含每一新的特徵和各特徵的每—種組合, 特別是包含各請求項或不同實施例之各種特徵之每一種 組合’相關的特徵或相關的組合本身雖未明顯地顯示於 各請求項中或各實施例中,但仍亦屬本發明。 【圖式簡單說明】 圖1是光電半導體晶片之第一實施例的橫切面圖。 圖2A至圖21是依據第一實施例來製造光電半導體 晶片之方法的各中間步驟的圖解。 圖3是光電半導體晶片之第二實施例的俯視圖。 圖4是光電半導體晶片之第三實施例的俯視圖。 圖5是光電半導體晶片之第四實施例的俯視圖。 -21 - 201236195 圖6A至圖6E是依據第四實施例來製造光電半導體 晶片之方法的各中間步驟的圖解。 圖7是光電半導體晶片之第五實施例的俯視圖。 【主要元件符號說明】 1 半導體晶片 2 半導體層序列 3 第一半導體區 4 活性區 5 第二半導體區 6 鏡面層 7 接觸層 8 電性連接層 9 接合塾 10 包封層 10a 包封層之部分區域 11 載體基板 12 連接層 13 金屬層 14 位障層 15 輻射發出面 16 鏡面層之側緣 17 接觸條 18 發射結構 19 溝渠 20 生長基板 -22- 201236195 21 半導體層序列之側緣 22 半導體層序列之部分區域 23 接觸條 -23-Wesa) structure. Here, the semiconductor layer sequence 2 region is ablated to the mirror surface; At is also the edge of the Xiadian layer 6, so that the semiconductor layer sequence 2 can be formed in a desired shape, which is preferably a lithography technique. For example, H3P〇4 can be used as an etchant. In the next intermediate step shown in Fig. 2F, the mirror layer 6 must be structured in a manner such that the mirror layer 6 has a lateral extent smaller than that of the semiconductor: sequence 2. The semiconductor layer sequence 2 preferably has a side surface of the protrusion layer 6 protruding from the mirror layer 6 on the side of the full 绥] LA, 〜 adjacent to an intermediate area in the mirror, 1 semiconductor layer sequence 2 and you _庶,, 八$成在杜, a barrier 14 between. The side edge 16 of the mirror layer 6 is particularly 疋., the side of the semiconductor layer sequence 2, preferably at 0 5 糌 half known as "丄1 phase ^ 5 macro separation. This distance ^ υ 3 micro water and 5 microns. In the intermediate step shown in Fig. 2G, a sequence of electric (four) μ 匕 式 = = = = = = = = = = = = = = = = = = = 〇 〇 〇 〇 〇 〇 层 层 层 层 层 层 层 层 层 层 层 层 层 层 层 〇 〇 Zr〇2, Ti〇 is in the layer 10. The transparent encapsulating layer 1 is preferably at least 232. The layer formed by such atomic layer deposition (ALD) can be advantageously used. The advantage of depositing is particularly pure and dense, in particular ΘΠ·Λ/ loading in a smaller intermediate zone can be on the semiconductor screen. On the side of the matte layer 6 between the mirror sequence 2 and the barrier layer 14 The middle portion of the edge 16 is carried out. In the middle step of the middle door cow running in Fig. 2, the surface of the second semiconductor region 5 201236195 used as the radiation emitting surface 15 is exposed by the transparent electrical encapsulation layer. This can be achieved, for example, by etching with buffered hydrofluoric acid (BOE, Buffered Oxide Etch). Again, the surface of the second semiconductor region 5 can be inductively coupled. Plasma etching (ICP) is used to prepare for later application of a contact layer. In the intermediate step shown in Figure 21, layers 7, 8 of transparent conductive oxide are applied and structured. The electrically conductive oxide layer 7, 8 is in particular an IT layer and has, for example, a thickness of about 25 nanometers. 0 One of the transparent conductive oxide layers 7 is deposited on the radiation emitting surface 15 'this part 7 is transparent The contact layer 7 is in electrical contact with the second semiconductor region 5. The other portion 8 of the transparent conductive layer of the transparent layer is formed by the edge region of the transparent contact layer 7 beyond the transparent layer of the semiconductor layer. The side edge 2 1 extends to a region of the encapsulation layer 1 that extends parallel to the major surface of the semiconductor layer sequence 2, and this region is disposed on the barrier layer 14. This portion of the transparent conductive oxide layer forms electricity. The connection layer 8. In the configuration, the transparent contact layer 7 and the electrical connection layer 8 are thus made of the same material 'and in particular can be arranged and/or structured in the same processing step. No photo-semiconductor Figure: A bonding pad 9 is applied to a region of the electrical connection layer 8 and is discarded: 封:: The top surface of the sealing layer 1 is placed next to the semiconductor layer sequence 2 And extended. The bonding stack 9 may have J- or more metal layers, in particular a titanium/sand layer sequence. 201236195 In Fig. 3, an embodiment of the optoelectronic semiconductor wafer 1 is shown in a view. In this embodiment, the transparent anchor 7 + Α < contact layer 7 extends over the radiation emitting surface 15 and is not applied over the entire surface but has a plurality of contact strips. 2 A thumb structure is formed on the radiation emitting surface 15 of the jurisdiction. This frame structure I is a right angle structure in this embodiment, and is formed into eight columns and eight rows. /, each of the contact strips, for example, a transparent contact layer 7 is structured into a contact strip 17 (special structure) exhibiting a good current spreading, which is achieved by the entire transverse sequence of the semiconductor layer sequence: electrocrystal... Furthermore, two semiconductors are interposed between the contact strips 17 so that the radiation emitting surface 15 does not have the contact layer 7' so as to form a particularly good radiation emissivity. The transparent contact layer 8 formed by each of the contact strips 17 is electrically connected to the second bonding pad 9 as in the case of the transparent contact layer 7, which is formed by the transparent connecting layer 8 being IT. The electrical oxide layer (the special electrical connection layer 8 has a region 8a, the edge region of the 广 in the 发出 连接 连接 连接 连接 连接 连接 连接 ' ' ' ' 在 在 ' ' ' ' ' ' 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The other portion 8b of the layer 8 extends over the side edge 21 of the semiconductor wafer i. The third, L-cladding layer 1 of the electrical connection layer 8 and the transparent encapsulation layer 1 are parallel to the semiconductor sequence. The bonding layer 9 is disposed on the region 8c of the electrical connection layer 8 in a laterally extending manner. The W connection layer 8 of the conductor layer sequence and the bonding pad 9 are preferably provided with the bonding sheet 1 Since the joint 9 is arranged offset in the sequence of the electric + conductor 201236195 layer, the radiation rate is not affected by the joint 9 via the radiation. The electrical contact in this manner It is particularly advantageous for the well semiconductor wafer 1 which has a length of about 疋300 μm or less. When such a small photovoltaic semiconductor sheet is disposed on the radiation emitting surface 15, 1 'The main part of the radiation to the sputum is absorbed by the absorbent material of the bonding pad 9. Another example of an optoelectronic semiconductor wafer i is shown in plan view in which the semiconductor layer sequence has a plurality of spaced apart portions 22' which are each structured into a platform and separated by a trench 19>. The plurality of partial regions 2 2 are respectively configured to be imaged as in the embodiment shown in Fig. 3. The optoelectronic semiconductor wafer 1 has a central bonding pad 9 which is disposed on the electrical connection layer 8 "electrical connection layer 8 via the semiconductor layer ^ The side edge of the region 22 extends to the transparent contact layer 7. In addition, the metal contact strip starting from the bonding pad 9 extends in the groove 19 Φ, and the metal contact strip 19 is, for example, bonded to the bonding pad. The same material is formed, and in particular, the same step is performed in the same manner as the disk bond pad. The electrical connection layer 8 is not only in contact with the contact layer 7 at the corners of the partial region 22 of the conductor layer sequence, but also in the semiconductor. The side of the partial region 22 of the layer sequence facing the contact strip is in contact with the contact layer 7. In this way, the current injection into the edge region of the respective partial regions 22 of the semiconductor layer sequence can be further advanced. The step is improved. In the embodiment shown in Fig. 4, the partial regions η of the semiconductor layer sequence preferably have side lengths of 300 μm or less, respectively, since a plurality of such partial regions 22 in the optoelectronic semiconductor wafer 1 are combined into one. The common photoelectric half-19-201236195 1 'where the conductor crystals>{, so that a larger current of the optoelectronic semiconductor wafer can be injected into all the partial regions 22. Fig. 5 shows that the photoelectric guide is not ag. A diagram of another embodiment of an electric thousand-day solar disk 1. The actual (t) bonding layer 8 is made of the same material as the bonding pad 9 'not being made of the same material as the transparent contact I 7 . The electrically connecting layer 8 and the bonding pad 9 can, for example, each have a titanium/gold/layering sequence and are in particular arranged and/or structured at the same time. The manufacturing method of the optoelectronic semiconductor wafer 1 shown in Fig. $ will be described in detail below with reference to Figs. 6A to 6E in accordance with an intermediate step. In the method, the intermediate steps previously described in Figs. 2A to 2D are first introduced, which will not be described here. In the intermediate step shown in Fig. 6A, the contact layer 7 is applied to the surface of the second semiconductor region 5 (preferably the n-type semiconductor region) on which the emitter structure 8 is previously provided. The contact layer 7 is preferably transparent. A conductive oxide (e.g., germanium) and, for example, can have a thickness of about 25 nanometers. The surface of the second semiconductor region 5 is preferably treated by inductive plasma etching prior to application of the transparent contact layer 7 to improve the electrical connection of the semiconductor material of the transparent contact layer 7 to the second semiconductor region 5. Therefore, with respect to the manufacturing method shown in Figs. 2 to 21, in the present embodiment, the transparent contact layer 7 is applied before the structuring of the semiconductor layer sequence 2. Then, the structuring of the mirror layer 6 shown in Fig. 6C and the application of the transparent electrically insulating encapsulation layer 1 shown in Fig. 6D are performed by structuring the semiconductor layer sequence 2 into a platform structure as shown in Fig. 6A. These steps correspond to the steps previously shown in Figures 2A through 2G and are therefore not described in detail herein. In the intermediate step shown in Fig. 6A, a -20-201236195 opening is formed in the encapsulation layer 1 to expose the light-emitting surface 15 covered by the transparent contact layer 7 of the optoelectronic semiconductor wafer i. To form the optoelectronic semiconductor wafer of Figure 5, a metal layer (e.g., a titanium/start/gold layer sequence) is then applied and structured to form the electrical connection layer 8 and bond pads 9. Another embodiment of the optoelectronic semiconductor wafer 1 is shown in FIG. This optoelectronic semiconductor wafer 1 is formed substantially the same as the embodiment shown in FIG. 3, and the 'electrical connection layer 8 is not formed of the same material as the transparent contact layer 7, but is the same as the bonding pad 9. Material to form. A metal layer forms a bonding pad 9 next to the semiconductor layer sequence 2, which metal layer thus also extends over the side edge of the electrically insulating encapsulation layer 1 of the semiconductor wafer 1 to the radiation emitting surface 15 where the metal The layer is adjacent to the transparent contact layer 7 and the contact layer 7 is electrically connected to the bond pad 9. The invention is of course not limited to the description made in accordance with the various embodiments. Conversely, the present invention encompasses each new feature and each combination of features, particularly each of the various features of the various claims or different embodiments. The associated features or related combinations are not explicitly shown per se. In the various claims or embodiments, the invention is still within the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a first embodiment of an optoelectronic semiconductor wafer. 2A through 21 are diagrams showing respective intermediate steps of a method of fabricating an optoelectronic semiconductor wafer in accordance with a first embodiment. 3 is a top plan view of a second embodiment of an optoelectronic semiconductor wafer. 4 is a top plan view of a third embodiment of an optoelectronic semiconductor wafer. Figure 5 is a plan view of a fourth embodiment of an optoelectronic semiconductor wafer. - 21 - 201236195 Figs. 6A to 6E are diagrams showing respective intermediate steps of a method of manufacturing an optoelectronic semiconductor wafer in accordance with a fourth embodiment. Figure 7 is a plan view of a fifth embodiment of an optoelectronic semiconductor wafer. [Main component symbol description] 1 semiconductor wafer 2 semiconductor layer sequence 3 first semiconductor region 4 active region 5 second semiconductor region 6 mirror layer 7 contact layer 8 electrical connection layer 9 bonding layer 10 encapsulation layer 10a part of the encapsulation layer Area 11 Carrier substrate 12 Connection layer 13 Metal layer 14 Barrier layer 15 Radiation emitting surface 16 Side edge of mirror layer 17 Contact strip 18 Emissive structure 19 Ditch 20 Growth substrate-22- 201236195 21 Side layer of semiconductor layer sequence 22 Semiconductor layer sequence Part of the area 23 contact strip-23-

Claims (1)

201236195 七、申請專利範圍. 1. 一種光電半導體晶片〇)’包括: 載體基板(11) ’ 半導體層序列(2),其含有第一導電型之第一半導 體區(3)、第二導電型之第二半導體區(5)及配置在此 二個半導體區之間的活性層(4),其中該第一半導體區 (3)面向該載體基板(11)且該第二半導體區(5)面向該 半導體晶片(1)之輻射發出面(15), 配置在該載體基板(1 1)和該半導體層序列(2)之 間的鏡面層(6),其具有一種金屬或金屬合金, 電性絕緣之透明包封層(1 0),其覆蓋該鏡面層(6) 之側緣(1 6)及該半導體層序列(2)之側緣(2 1), 接合墊(9 ),其以在橫向上偏離該半導體層序列 (2)的方式配置, 接觸層(7)’其用來與該第二半導體區(5)形成電 I1生接觸且至少配置在该輪射發出面(1 5)之多個部分區 域上,及 ......7 J兴热按垧層(7) 導電!生連接,且在該透明包封層(1〇)上於該半導體層 序歹j (2)之上述側緣(2丨)上延伸至該接合墊(9)。 I I凊專利範圍第1項之光電半導體晶片,其中該鏡 (M所具有的橫向範圍小於該半導體層序列(2) 層戽扪〆透月包封層(1〇)之部分區域(1〇a)在該半導體 層序列(2)下方延伸。 守 3.如申請專利範圍第13戈2項之光電半導體晶片,其中 -24- 201236195 該透明包封層(10)是藉由原子層沈積而製成的層。 4·如申請專利範圍第…項中任一項之光電半導體晶 片,其中該透明包封層(10)含有氧化鋁、氧化鍅石' 氧化鈦、氧化铪或氧化石夕。 虫申。月專利範圍第1至4項中任一項之光電半導體晶 片,其中該透明包封層(1〇)具有丨微米或更小之厚度。 6. 如申請專利範圍第丨至5項中任一項之光電半導體晶 片’其中該接觸層(7)是透明者。 7. 如申請專利範圍第6項之光電半導體晶片,其中該接 觸層(7)具有透明之可導電氧化物。 8 ·如申凊專利範圍第1至7項中任一項之光電半導體晶 片’其中該半導體層序列之該輻射發出面(15)具有一 發射結構(1 8)或粗糙度以使輻射發射率獲得改良。 9.如申請專利範圍第1至8項中任一項之光電半導體晶 片’其中該接觸層(7)被結構化,使其只覆蓋該輻射發 出面(15)之部分區域。 1 〇 ·如申請專利範圍第1至9項中任一項之光電半導體晶 片’其令該接觸層(7)具有一個或多個在該輻射發出面 (15)上延伸之接觸條(17)。 1 1.如申請專利範圍第1〇項之光電半導體晶片,其中上 述接觸條(17)形成柵格結構。 12·如申請專利範圍第1至11項中任一項之光電半導體 晶片’其中該電性連接層(8)具有透明之可導電氧化 物。 1 3 ·如申請專利範圍第1至12項中任一項之光電半導體 -25- 201236195 晶片,其中該半導體層序列(2)具有300微米或更小的 橫向範圍。 14.如申請專利範圍第1至13項中任一項之光電半導體 晶片,其中該半導體層序列(2)具有多個相鄰地配置之 部分區域(22),該等部分區域(22)藉由至少一溝渠(19) 而互相隔開。 1 5 .如申請專利範 =一溝渠(19)中延伸著一條金屬接觸條(23),其 / 〇墊(9)與名電性連接層(8)形成導電性連接。 -26-201236195 VII. Patent application scope 1. An optoelectronic semiconductor wafer 〇)' includes: a carrier substrate (11) 'a semiconductor layer sequence (2) containing a first semiconductor region of a first conductivity type (3), a second conductivity type a second semiconductor region (5) and an active layer (4) disposed between the two semiconductor regions, wherein the first semiconductor region (3) faces the carrier substrate (11) and the second semiconductor region (5) a radiation emitting surface (15) facing the semiconductor wafer (1), a mirror layer (6) disposed between the carrier substrate (11) and the semiconductor layer sequence (2), having a metal or metal alloy, electricity a transparent insulating encapsulation layer (10) covering a side edge (16) of the mirror layer (6) and a side edge (2 1) of the semiconductor layer sequence (2), a bonding pad (9), Arranged in a laterally offset manner from the semiconductor layer sequence (2), the contact layer (7)' is intended to form an electrical contact with the second semiconductor region (5) and is disposed at least on the emission surface (1) 5) On some parts of the area, and ... 7 J Xing hot press layer (7) Conductive! The connection is made and extends to the bonding pad (9) on the side edge (2) of the semiconductor layer 歹j (2) on the transparent encapsulation layer (1). II. The optoelectronic semiconductor wafer of claim 1, wherein the mirror (M has a lateral extent smaller than a portion of the semiconductor layer sequence (2) layer permeable layer (1 〇) (1〇a) ) extending under the semiconductor layer sequence (2). 3. The optoelectronic semiconductor wafer of claim 13 of the patent application, wherein -24-201236195 the transparent encapsulation layer (10) is formed by atomic layer deposition An optoelectronic semiconductor wafer according to any one of the preceding claims, wherein the transparent encapsulating layer (10) comprises alumina, cerium oxide, titanium oxide, cerium oxide or oxidized stone. The optoelectronic semiconductor wafer of any one of items 1 to 4, wherein the transparent encapsulating layer (1 〇) has a thickness of 丨 micron or less. 6. In the scope of claims 5 to 5 The photo-semiconductor wafer of any one of which is transparent. 7. The optoelectronic semiconductor wafer of claim 6 wherein the contact layer (7) has a transparent electrically conductive oxide. Such as the light of any one of the claims 1 to 7 of the patent scope The semiconductor wafer 'where the radiation emitting surface (15) of the semiconductor layer sequence has an emission structure (18) or roughness to improve the radiation emissivity. 9. As claimed in any one of claims 1 to 8. An optoelectronic semiconductor wafer in which the contact layer (7) is structured such that it covers only a portion of the radiation emitting surface (15). 1 光电 An optoelectronic semiconductor according to any one of claims 1 to 9. The wafer 'has the contact layer (7) having one or more contact strips (17) extending over the radiation emitting surface (15). 1. An optoelectronic semiconductor wafer according to the first aspect of the invention, wherein The contact strip (17) forms a grid structure. The optoelectronic semiconductor wafer according to any one of claims 1 to 11, wherein the electrical connection layer (8) has a transparent conductive oxide. The photovoltaic semiconductor-25-201236195 wafer according to any one of claims 1 to 12, wherein the semiconductor layer sequence (2) has a lateral extent of 300 μm or less. 14. Patent Application Nos. 1 to 13 Light of any of the items A semiconductor wafer, wherein the semiconductor layer sequence (2) has a plurality of adjacently disposed partial regions (22) separated from each other by at least one trench (19). A metal contact strip (23) is extended in the patent vane = a ditch (19), and the / mat (9) is electrically connected to the electric connection layer (8).
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