201235811 六、發明說明： 【發明所屬之技術領域】 本發明係有關一種電壓調節器，特別是關於一 應用於充電器的電壓調節器的輸出電流偵測裝置 法。 力 【先前技術】 習知以電壓調節器提供一受調㈣電流時，例如 充電器，t用的輸出電流债測方式是將 =調節器的電感串聯’參照圖i，電壓調節器的輪出、 |二1〇流經偵測電阻Rsense ’例如美國6 ，利、LTC4001或SMB135，债測電阻以⑶％ ^ f J化與輸出電流1〇相關，且與該輸出電流1〇間= 具有1:1 #比例關係，偵測電阻Rsense上的電壓 =由誤差放大m差動輸人到控制器12做迴授控 制，以控制驅動器14切換功率電晶體。 -署方式係在電壓調節器的充電路徑上 ==測電阻R_e ’為了降低須測電阻Rs對輸 ^力率的損耗，巧電阻Rsense必須是低阻值的精密 電阻，但低阻值使得可偵測到的電壓 訊敏感，易受雜訊干擾。 士發明，出一種電壓調節器的輸出電 ，方法，將_電阻設置在充電路徑以外的地方，減 率的影響，精確偵測輸出端的變化供該電 壓凋卽器進行迴授控制。 【發明内容】201235811 VI. Description of the Invention: [Technical Field] The present invention relates to a voltage regulator, and more particularly to an output current detecting device method for a voltage regulator applied to a charger. Force [Prior Art] It is known that when a voltage regulator provides a regulated (four) current, such as a charger, the output current of t is measured by connecting the inductor of the regulator in series. [Refer to Figure i, the voltage regulator is turned out. , | 2 〇 flow through the detection resistor Rsense 'such as the United States 6, Li, LTC4001 or SMB135, the debt resistance is (3)% ^ f J is related to the output current 1〇, and the output current is 1〇 = 1 : 1 #proportional relationship, detecting the voltage on the resistor Rsense = by the error amplification m differential input to the controller 12 for feedback control to control the driver 14 to switch the power transistor. - The system is on the charging path of the voltage regulator == Measure the resistance R_e 'In order to reduce the loss of the resistance to the measured resistance Rs, the resistor Rsense must be a low resistance precision resistor, but the low resistance makes it possible The detected voltage is sensitive and susceptible to noise interference. Invented, a voltage regulator output power, method, the _ resistor is set outside the charging path, the effect of the deceleration, accurate detection of the change in the output for the voltage damper feedback control. [Summary of the Invention]
S 201235811 在於提出一種電壓調節器的 在於提出一種電壓調節器的 在於提出-種具輸出電流偵 本發明的目的之一 輸出電流偵測裝置。 本發明的目的之一 輸出電流偵測方法。 本發明的目的之一 測功能的電壓調節器。 根據本發明，一種電壓調節 置包括-感測電路’感測該電壓“測裝 及該下橋電晶體的電流，以產生體 電-加總電路加總該第—及第二電流：上 二定電阻連接該加總電路以偵測該總和； 机的支化，该设定電阻上的電壓變化 做迴授控制。 风於、口成徑制 變化地，感測該上橋電晶體的電流 模擬產生該總合電流。 偶揿€路 【實施方式】 圖2係本發明第一實施例，上橋電晶體％連接在 輸入電壓vi及切換節點sw之間，下橋電晶體28連接 在切換節點SW與接地電位GND之間，一電感連接切 換節點SW，上橋電晶體26及下橋電晶體28受驅動器 30控制切換，產生輸出電流1〇流經電感並在輸出端產 生輸出電壓Vo。上橋偵測電路20感測上橋電晶體26 的電流並據以產生電流Π，下橋偵測電路22感測下橋 電晶體28的電流以產生電流12，電流π及電流12經 加總電路24加總後’提供給設定電阻Rset。本實施例 中的電流II及12與輸出電流1〇間的比例關係不再固 定為1:1 ’且上下橋電流的比例亦可以做調整，例如以 4 201235811 K1和K2調整上下橋電流的比例關係，加總後流經設 定電阻Rset的電流以Ιο/Κ3表示，κι及Κ2可以依實 際上的需求調整，以達到消除偏移（〇汗set)或延遲(delay) 的目的。比較器34偵測節點a上的電壓變化，與參考 電壓Vref相比車父以&供給控制器32做迴授控制。由於 設定電阻Rset不在電壓調節器的充電路徑上，設定電 阻Rset的阻值可以提高，使節點a的電壓變化更為明 顯，因此可以避免使用精密電阻，降低成本，且更不 易被雜訊干擾。 電壓調節器應用於充電器時會設有一過電流保護 (over current protect; OCP)機制，或者是零電流偵測機 制，監視功率電晶體上的電流以在輸出電流過高或過 低時提供保護’本發明利用這些原本的偵測機制做為 上橋偵測電路20及下橋偵測電路22,據以監視輸出電 流1〇的變化做迴授控制。 圖3係圖2之加總電路24的一實施例，上橋偵測 電路20產生的電流Il(Psense輸出）波形斜率為vi/L， 下橋偵測電路22產生的電流I2(Nsense輸出）波形斜率 為（Vo-Vi)/L，經加總電路24加總成圖3下方所示之電 流Io/K，流經設定電阻Rset並在節點A產生一電壓。 圖4係本發明的第二實施例，在非同步的降壓式 電壓轉換器中設置本發明之電流偵測裝置。本實施例 不偵測二極體D上的電流，僅由感測電路42感測上橋 電晶體40上的電流，再透過電流模擬電路44模擬產 生如圖3下所示之電流波形提供給設定電阻Rset，監 控設定電阻Rset上的電壓變化做迴授控制（圖中未 示）。在其他實施例中，亦可以不經由模擬，直接偵測 流經二極體D的電流，與該上橋電晶體的電流加總後 201235811 提供給設定電阻Rset。 圖5係本發明的第三實施例，感測裝置56偵測升 壓式電壓轉換器的上橋電晶體54的電流，產生電流 II ’感測裝置58偵測升壓式電壓轉換器的下橋電晶體 52的電流’產生電流12，電流π和電流12經加總電 路60加總成感測電流is，並在節點b上產生一電麼供 比較器66與參考電壓Vref比較，以提供給控制器64 做迴授控制’使驅動器62產生驅動訊號給上橋及下橋 電晶體54和52。在本實施例中，電流η和12同樣可 以Κ4及Κ5做比例調整。 圖6係圖5之實施例的變化，將Κ5的倒數設計為 〇，換言之，僅感測上橋電晶體54的電流變化，據以 產生感測電流Is給設定電阻Rset，監視輸出電壓ν〇 的變化。 在其他實施例中，本發明之輸出電流偵測裝置亦 可應用於其他型式的電壓轉換器，如升降壓型、 型等等。S 201235811 is an output current detecting device which proposes a voltage regulator in which a voltage regulator is proposed in the present invention. One of the objects of the present invention is to output a current detecting method. One of the objects of the present invention is to measure the voltage regulator of the function. According to the present invention, a voltage regulating device includes a sensing circuit 'sense sensing the voltage "measuring the current of the lower bridge transistor to generate a body power-plus circuit summing the first and second currents: The constant resistance circuit is connected to the summing circuit to detect the sum; the branching of the machine, and the voltage change on the set resistor is feedback control. The wind is sensed by the air, and the current of the upper bridge transistor is sensed. The simulation generates the total current. [Embodiment] FIG. 2 is a first embodiment of the present invention, the upper bridge transistor is connected between the input voltage vi and the switching node sw, and the lower bridge transistor 28 is connected to the switching. Between the node SW and the ground potential GND, an inductor is connected to the switching node SW, and the upper bridge transistor 26 and the lower bridge transistor 28 are controlled to be switched by the driver 30 to generate an output current 1 〇 flowing through the inductor and generating an output voltage Vo at the output terminal. The upper bridge detecting circuit 20 senses the current of the upper bridge transistor 26 and generates a current 据. The lower bridge detecting circuit 22 senses the current of the lower bridge transistor 28 to generate a current 12, and the current π and the current 12 are summed. After the circuit 24 is added, it is supplied to the setting. Rset R. The ratio between the currents II and 12 and the output current 1〇 in this embodiment is no longer fixed to 1:1 ' and the ratio of the upper and lower bridge currents can also be adjusted. For example, the upper and lower bridges are adjusted by 4 201235811 K1 and K2. The proportional relationship of the currents, the current flowing through the set resistance Rset after summing is represented by Ιο/Κ3, and κι and Κ2 can be adjusted according to actual requirements to achieve the purpose of eliminating the offset (sweating set) or delay (delay). The comparator 34 detects the voltage change on the node a, and the master uses the feedback controller V to perform the feedback control as compared with the reference voltage Vref. Since the set resistor Rset is not in the charging path of the voltage regulator, the resistance of the resistor Rset is set. The value can be increased to make the voltage change of node a more obvious, so it can avoid the use of precision resistors, reduce the cost, and is less susceptible to noise interference. The voltage regulator is equipped with an overcurrent protection when applied to the charger (over current protect OCP) mechanism, or a zero current detection mechanism that monitors the current on the power transistor to provide protection when the output current is too high or too low'. The present invention utilizes these original detections. The system is used as the upper bridge detection circuit 20 and the lower bridge detection circuit 22, and the feedback control is performed according to the change of the output current 1〇. FIG. 3 is an embodiment of the total circuit 24 of FIG. The slope of the current I1 (Psense output) waveform generated by the circuit 20 is vi/L, and the slope of the current I2 (Nsense output) generated by the lower bridge detecting circuit 22 is (Vo-Vi)/L, and is added to the total circuit 24 by the summing circuit 24 The current Io/K shown at the bottom of Figure 3 flows through the set resistor Rset and generates a voltage at node A. Figure 4 is a second embodiment of the present invention in which the present invention is placed in a non-synchronous buck voltage converter Current detecting device. In this embodiment, the current on the diode D is not detected, and only the current on the upper bridge transistor 40 is sensed by the sensing circuit 42 and then generated by the current analog circuit 44 to generate a current waveform as shown in FIG. Set the resistance Rset and monitor the voltage change on the set resistor Rset for feedback control (not shown). In other embodiments, the current flowing through the diode D can be directly detected without an analog, and the current of the upper bridge transistor is summed to provide a set resistance Rset after 201235811. 5 is a third embodiment of the present invention. The sensing device 56 detects the current of the upper bridge transistor 54 of the boost voltage converter, and generates a current II' sensing device 58 to detect the boost voltage converter. The current of the bridge transistor 52 generates a current 12, and the current π and current 12 are summed by the summing circuit 60 to sense the current is, and an electric current is generated at the node b for comparison by the comparator 66 with the reference voltage Vref to provide The feedback control is applied to the controller 64 to cause the driver 62 to generate drive signals to the upper and lower bridge transistors 54 and 52. In the present embodiment, the currents η and 12 can also be scaled by Κ4 and Κ5. 6 is a variation of the embodiment of FIG. 5, the reciprocal of Κ5 is designed as 〇, in other words, only the current change of the upper bridge transistor 54 is sensed, accordingly, the sense current Is is generated for the set resistance Rset, and the output voltage ν〇 is monitored. The change. In other embodiments, the output current detecting device of the present invention can also be applied to other types of voltage converters, such as buck-boost type, type, and the like.
以上對於本發明之較佳實施例所作的敘述係為丨 明之目的，而無意限定本發明精確地為所揭露的3 式，基於以上的教導或從本發明的實施例學習而作Υ 改或，化是可能的，實施例係為解說本發明的原理上 及讓熟習該項技術者以各種實施例利用本發明在實R 2上而選擇及敘述’本發明的技術思想企圖由以」 的申請專利範圍及其均等來決定。 1 【圖式簡單說明】 圖1係習知電壓轉換器的示意圖； 圖2係本發明第一實施例的示意圖，· 6 201235811 以及 圖3係圖2之加總電路的示意圖； 圖4係本發明第二實施例的示意圖 圖5係本發明第三實施例的示意圖 圖6係圖5之實施例的變化。 【主要元件符號說明】 10 誤差放大器 12 .控制器 14 驅動器 20 上橋偵測電路 22 下橋偵測電路 24 加總電路 26 上橋電晶體 28 下橋電晶體 30 驅動器 32 控制器 34 比較器 40 上橋電晶體 42 感測電路 44 電流模擬電路 50 升壓式電壓轉換器 52 下橋電晶體 201235811 54 上橋電晶體 感測電路 56The above description of the preferred embodiments of the present invention is intended to be illustrative, and is not intended to limit the scope of the invention to the disclosed embodiments, and may be modified or learned based on the teachings of the invention. The embodiments are intended to illustrate the principles of the present invention and to enable those skilled in the art to use the present invention in various embodiments to select and describe the application of the technical idea of the present invention. The scope of the patent and its equality are determined. 1 is a schematic diagram of a conventional voltage converter; FIG. 2 is a schematic diagram of a first embodiment of the present invention, and 6 201235811 and FIG. 3 are schematic diagrams of the summing circuit of FIG. 2; BRIEF DESCRIPTION OF THE SECOND EMBODIMENT OF THE INVENTION Figure 5 is a schematic view of a third embodiment of the present invention. Figure 6 is a variation of the embodiment of Figure 5. [Main component symbol description] 10 Error amplifier 12. Controller 14 Driver 20 Upper bridge detection circuit 22 Lower bridge detection circuit 24 Addition circuit 26 Upper bridge transistor 28 Lower bridge transistor 30 Driver 32 Controller 34 Comparator 40 Upper bridge transistor 42 sensing circuit 44 current analog circuit 50 boost voltage converter 52 lower bridge transistor 201235811 54 upper bridge transistor sensing circuit 56