201230371 六、發明說明: 【發明所屬之技術領域】 本發明是有關於-種太陽能電池的製造方法,特別是 指一種晶矽太陽能電池的製造方法。 【先前技術】 ^當太陽能電池受到太陽光照射而吸收光子的能量 後,可透過其結構中的p型與_半導體接面使電子電201230371 SUMMARY OF THE INVENTION [Technical Field] The present invention relates to a method of manufacturing a solar cell, and more particularly to a method of manufacturing a wafer solar cell. [Prior Art] ^ When a solar cell is exposed to sunlight and absorbs the energy of a photon, it can be made electronically through a p-type and a semiconductor junction in its structure.
洞對移動,進而產生電能。太陽能電池的技術不斷地進 t,並發展出許多的種類,例如單晶發、多晶_、非晶石夕 薄膜到染料敏化太陽能電池等等,前述之型態各有其功效 及發展上的優缺點。 現今選擇性射極(selectiveEmitter)太陽能電池的製 方法係有夕種I中一類之步驟係包括:利用蝕刻溶液 來粗糙化矽晶片以增加光 尤I入射率及吸收表面積、在矽晶 片上沉積一層擴散阻障層、蝕刻該擴散阻障層產生一預定 電極形成區域、利用擴散製程產生不同深度(亦即不同摻 雜》辰度)的P_N接面、本p/v槭血〃也沿 去除擴散阻障層、並形成可提升光 吸收效率的抗反射層, 及於石夕日曰片正面之預定電極形成 區域與背面以網印方或制 式製作金屬電極’並將電極燒結,最 後進行電性驗證。 中矽曰曰片正面上的金屬電極主要有兩部分,即包 括數條均勻間隔,且官·疮& Λ I又較 '、,田的指狀電極(Finger bar),以 及兩條左右間隔地盥咭笙 ” 4 4心狀電極垂直正交,且寬度較粗 的匯流電極(Bus ,. _ )°心狀電極的設置主要用於收集傳輸 201230371 至晶片正面的電流,並將電流匯集至該等匯流電極處,再 經由該等匯流電極將電流導出。並且,上述選擇性射極製 程重點之-,在於金屬電極如何精準對位、網印於電池正 面之預定電極形成區域,因金屬電極若無準確印刷於高換 雜區域’反而是位於淺摻雜區域上時,將會增加串連電 阻’從而影響整體之光電轉換效率。 目刖現行的晶片對位機制主要有兩種:⑴邊緣對位 與⑺圖形對位。在邊緣對位技術中,電極印刷機透過搁取 晶片邊緣的影像以判別晶片的位置後,然後再將電極線路 印刷於晶片正面。另外’在圖形對位技術中一般會在晶 片上之預定位置形成特定的標記圖案,而對位時是經由辨 識該標記圖案來進行影像㈣取與辨別,藉此來定義晶片 的位置,然後才進行電極線路印刷。 在前述兩種技術中,圖形對位技術提供較佳的精準 度,不過因為需額外製作對位的標記圖案,造成製程上的 複雜度與成本增加。除此之外’前述兩種對位技術均採用 晶片上固定位置的邊緣處或標記圖案作為對位基準,此種 對位方式存在有以下缺點,以選擇性射極製程為例,若前 述之預定電極形成區域相對於電池正面之位置在製程中 產生歪斜,亦即未在原先預期的標準位置上,此時若仍以 晶片邊緣或標記圖案作為對位標準的話,可能造成後續印 刷時,電極線路並非精準地形成於該預定電極形成區域 上,從而影響到選擇性射極之太陽能電池應有之效率,因 此前述兩種技術在對位辨識上的精準度仍有改善的空間。 201230371 【發明内容】 因此,本發明之目的,即在提供一種當進行印刷電極 夺可提幵對位精準度的晶矽太陽能電池的製造方法。 於疋,本發明晶矽太陽能電池的製造方法,包含一基 # 化H -接面區塊成型步驟、—電極線路區域平坦 化步驟,及一對位網印步驟。 該基材粗化步驟將一矽基材表面粗糙化。 該接面區塊成型步驟在該粗糙化後之矽基材表面形 成複數個相間隔的接面區塊。 該電極線路區域平坦化步驟將未被該等接面區塊覆 蓋之矽基材表面平坦化,以提供較上述粗糙化之矽基材表 面為高之反射辨識度。 該對位網印步驟透過該反射辨識度較高之平坦化石夕 基材表面進行網印電極前之對位,並在對位完成後,將導 電材料網印於未被該等接面區塊覆蓋之其餘區域上。 本發明該電極線路區域平坦化步驟中,可透過蝕刻方 法將矽基材之粗糙表面平坦化,所述蝕刻方法可利用乾式 或濕式蝕刻技術。 另外’本發明進行對位網印步驟之對位時,使用預定 波長範圍的光照射石夕基材,並因石夕基材中同時具有粗糖化 與平坦化之區域,故可使該平坦化之區域相對於該粗棱之 區域形成高反射辨識度,進而可使粗糙化區域與平坦化區 域界面之邊緣清楚顯現,以獲得高對比性的圖形進行對 201230371 本發明之功效在於:透過該電極線路區域平坦化步 驟中:利用蝕刻方法將矽基材上預備塗佈形成電極線路之 區域平t化,如此,可獲得與其餘矽基材上粗糙化之區域 不同之表面微結構,當以預定光源照射矽基材時,便可因 表面微。構的差異,而顯現出高對比性之圖形以利於網印 步驟時的對位。另夕卜’本發明是在接面區塊成型步驟之後 的製程才形成供對位用之區域,因此可順應製程上可能的 接面區塊形成誤差而定出精確的對位。 【實施方式】 本發明所提出的製造方法可於單晶或多晶之矽晶片 上貫施,並可應用於選擇性射極(Selective 製程, 以下係以選擇性射極的製程流程來作說明。 有關本發明之前述及其他技術内容、特點與功效,在 以下請配合參考圖式之一個較佳實施例的詳細說明中將 可清楚的呈現。 參閱圖1、圖2、圖3,本發明晶矽太陽能電池的製造 方法之第一較佳實施例包含有下列步驟: 首先,選擇P型矽晶片作為一矽基材丨,而在基材粗 化步驟61中,可將該矽基材丨置入濕式蝕刻槽内,配合 預定濃度的酸性或鹼性溶液使該矽基材丨之一上表面工丄 形成一具凹凸不平態樣的粗糙面部12,該粗糙面部12使 矽基材1具備有較大受光表面積,並可降低入射光之反射 率 〇 接著,在接面區塊成型步驟62中,利用薄膜沉積技 6 201230371 術,在粗糙後之上表面u沉積形成一擴散阻障層2,該擴 散阻障層2可選用介電材料,例如:t化邦iNx:H)、二 氧化矽(Si〇2)或具有相同性質之材質。接續,可利用蝕刻 ^料(Etch paste)或雷射熔損(Laser ablati〇n)技術將擴散阻 P早層2上之預定區域去除,而使矽基材丨之粗糙面部p 顯露出來’如&,可形成複數個彼此相間隔且相對突出於 矽基材1上表面11的接面區塊3,該等接面區塊3概是以 矩陣方式排列(如圖3所示),當然,該等接面區塊3之材 質仍為前述之擴散轉層2之氮化⑦(SiNx:H)、二氧化石夕 (Si02)。要說明的是,上述未被該等接面區塊3覆蓋之預 之區域即是供匯流電極(Bus bar)與指狀電極之 電極線路舖設之用。 接著,在電極線路區域平坦化步驟63中,令該矽基 材1置入谷裝有預定濃度的驗性溶液的反應槽,所述驗性 /合液可選用氫氧化鉀(K〇H)或氫氧化鈉(Na〇H)等類似 物,且經過預定的反應時間後,可使未被該等接面區塊3 涵蓋之區域,即預定塗佈形成電極線路之粗糙面部12,在 接觸到驗性溶液後’向下钮刻而形成—交錯分佈的平坦面 部13,在本實施例中,蝕刻的深度介於2〜5微米。 一般,蝕刻的深度愈深 '蝕刻後的表面將愈平整。要注意 的是,平坦化的方式並不以前述濕式蝕刻方法為限,在本 實施例中,也可以利用雷射熔融方法、經由適當的製程控 制,直接將未被接面區塊3涵蓋之區域平坦化。 之後,進行選擇性射極之摻雜,譬如可配合高溫爐管 201230371 =利:熱擴散方法令5族雜質原子4例如磷原子,使 其朝向矽基材丨之上表面丨丨 使 ^ ^ E _ 向進仃N型摻雜步驟。當 =原子4向下擴散進人石夕基材1時,由於其局部之上表 :具有一定厚度的接面區塊3作為植入時的阻撐遮罩, 因此,接面區塊3下方的雜質濃度較低且所形成的 面深度較淺;料,料裸露切基材^上表面η區 域,雜質原子可不受阻隔地直接擴散進入,因此預定之電 :線路區域下方的雜質濃度較高,亦即形成的Ρ-Ν深度較 衣藉此以70成選擇性推雜之效果。對於選擇性射極製程 中如何形成不同雜質濃度的擴散技術已相當周^,擴散技 術中其餘相關之步驟便不再詳述,另彳,實施時也不應以 上述之熱擴散法為限。另外,並以澄式顧刻將該等接面區 塊3即氮切(SiNx:H)或二氧切(si〇2)去除使石夕基材i 之t表面11全部顯露出來,此時的上表面11中,原先接 面區塊3的下方為粗糙面部12’而預定形成電極線路之區 域為經姓刻後之平坦面部13。另外,並於擴散製程後對矽 基材1之邊緣進行乾/濕蝕刻以產生電性隔離效果,例如可 採用乾式之電漿蝕刻技術。 接著,在對位網印步驟64中,以薄膜沉積技術,例 了利用 PECVD(Plasma enhanced chemical vapor deposition)法或濺鍍等技術,在該矽基材1之上表面丨丨全 面卜生鍍上一層抗反射層5,在本實施例中,抗反射層5材 料可選自氛化石夕(SiNx:H)或二氧化矽(Si〇2)等具類似效果 之材質’並可均勻地形成厚度約為80奈米(nm)的抗反射層 201230371 接著,利用網印機台之光學系統將光源照射往石夕基板 1之上表面u’此時’粗縫面部12之微結構對於光線的昭 射具有較大的吸收度,而平坦面冑13會反射出較多的光 線’由此’來自石夕基材i表面結構之反射光量的不同,可 讓⑽影像系統擷取到對比性較大的影像,而依此較明顯 的對比圖形,可幫助網印機台對㈣進行f彡像位置的辨 識。另外要說明的是,前述抗反射層5的覆蓋並不會破壞 到粗糙面部12與平坦面部13兩區域間所展現的對比辨識 度。 在本實施例令,進行對位時,可在石夕基材k上表面 11鄰近晶片邊緣處的三個不同位置,例如:左下、右下, 以及右上處,分別選擇其中—移除後接面區塊3下方之粗 糙面部12區域與平坦面部13區域界面間兩垂直正交的邊 緣,分別進行X軸與γ軸圖形的辨識,並定義出一絕對座 ^,重2上述的步驟,定義出其他兩組絕對座標後便完成 曰曰片的定位。之後可進行第—次導電材料的印刷以形成匯 流與指狀電極線路7 ’另外,亦可在此步驟之前或後,進 行太陽能電池之背銀與背鋁之印刷(圖中未示)。在本實 施例中,I電材料可選自銀金屬,或|g金屬所組成的金屬 漿料。另吕之,上述步驟中’網印完金屬導電材料後之電 池需進行乾燥與燒結(Flring)之步驟,其中,此燒結之程序 可讓電極線路7燒穿該抗反射層5並電池電性連接,如此 即完成選擇性射極太陽能電池之製作。 201230371 S然,於上述選擇性射極之太陽能電池製程中,金屬 電極之對位與網印等技術係施作於電池之正面,但同樣之 對位技術之概念,亦可應用於電池背電極之網印或是背接 觸式(back contact)之太陽能電池上,從而令電池整體之 轉換效率達到最高。 綜上所述’在電極線路印刷前,令石夕基板U局部區 域表面結構平坦化’如此可與其他無額外姓刻的粗糙區域 產生辨識度上之差異,亦即透過兩者在微結構上呈現不同 的晶粒取向(Grai"rientatic)n),並在預定光源的照射下,籲 顯現出不同的光吸收或光反射特性,藉此可提供ccd影像 系統較高對比性之對位辨識圖形,進而達到能利用原有圖 形所具有之高對比性而來對位之目的。 承上述,可知本發明之對位技術可解決習用&術採用. 邊緣對位與圖形對位時,所產生之對位不精確而衍生之網 印誤差等問題,之,本發明之技術亦不用如習用技術 般需額外施作-標記圖案之步驟,故可有效降低製程成 本。除此之外,本發明之方法簡單、且易於實施,能在不φ 影響產能速度的前提下導入現有的生產流程,因此,對現 行太陽能產業有相當大的助^ ’故確實能達成本發明之目 的。 能 範 屬 惟以上所述者,僅為本發明之較佳實施例而已, 以此㈣本發明實施之範圍,即大凡依本發明申請 圍及發明說明内容所作之簡單的等效變化與修飾, 本發明專利涵蓋之範圍内。 10 201230371 【圖式簡單說明】 圖1是本發明晶矽太陽能電池的製造方法的 施例的製作流程圖; 、 圖2疋該較佳實施例的製作流程中,其結構的 意圖;及 八, 圖3是該較佳實施 面的變化示意圖。 作流程中,矽晶片之 較佳貧 變彳匕示 •—上表 201230371 【主要元件符號說明】 1 ..........矽基材 11 .........上表面 12 .........粗链面部 13 .........平坦面部 2 ..........擴散阻障層 3 ..........接面區塊 4 ..........雜質原子 5 ..........抗反射層 61〜64····步驟 7 ..........電極線路The holes move, which in turn generates electrical energy. The technology of solar cells continues to advance, and many types have been developed, such as single crystal, polycrystalline, amorphous slabs, dye-sensitized solar cells, etc., all of which have their efficacy and development. The pros and cons. Nowadays, the selective emitter emitter solar cell manufacturing method is one of the steps of the first embodiment: the etching solution is used to roughen the germanium wafer to increase the light incident rate and the absorption surface area, and deposit a layer on the germanium wafer. Diffusion barrier layer, etching the diffusion barrier layer to generate a predetermined electrode formation region, using a diffusion process to generate different depths (ie, different doping) of the P_N junction, the p/v maple blood scorpion is also removed along the diffusion The barrier layer and the anti-reflection layer capable of improving the light absorbing efficiency, and the metal electrode of the predetermined electrode forming region and the back surface of the front surface of the stone enamel sheet are fabricated by screen printing or standard method, and the electrode is sintered, and finally the electrical verification is performed. . The metal electrode on the front side of the middle piece has two parts, that is, including several even intervals, and the official sore & Λ I is more than ', the field's finger bar, and two left and right intervals The mantle” 4 4 heart-shaped electrodes are vertically orthogonal, and the width of the bus electrode (Bus, . _ ) ° heart-shaped electrode is mainly used to collect and transmit 201230371 to the front of the wafer, and the current is collected At the bus electrodes, the current is derived via the bus electrodes. And, the selective emitter process focuses on how precisely the metal electrodes are aligned, and the screen is printed on the front surface of the battery to form a predetermined electrode. If it is not accurately printed on the high-doped region, but it is located on the shallow doped region, it will increase the series resistance' and thus affect the overall photoelectric conversion efficiency. There are two main types of wafer alignment mechanisms: (1) edge The alignment is aligned with the (7) pattern. In the edge alignment technique, the electrode printer discriminates the position of the wafer by taking an image of the edge of the wafer, and then printing the electrode line on the front side of the wafer. In addition, in the graphic alignment technology, a specific mark pattern is generally formed at a predetermined position on the wafer, and in the case of alignment, the image is discriminated and discriminated by identifying the mark pattern, thereby defining the position of the wafer, and then defining the position of the wafer. Electrode line printing is performed. Among the above two technologies, the pattern alignment technology provides better precision, but the additional complexity of the process and the cost increase due to the need to additionally create the alignment mark pattern. Both alignment techniques use the edge of the fixed position on the wafer or the mark pattern as the alignment reference. This alignment method has the following disadvantages, taking the selective emitter process as an example, if the aforementioned predetermined electrode formation region is relative to The position of the front side of the battery is skewed during the process, that is, it is not in the original standard position. If the edge of the wafer or the mark pattern is still used as the alignment standard, the electrode line may not be accurately formed in the subsequent printing. The predetermined electrode is formed on the region, thereby affecting the efficiency of the solar cell of the selective emitter, so There is still room for improvement in the accuracy of the two techniques in the alignment identification. 201230371 SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a crystal solar energy that can perform alignment accuracy when printing electrodes are used. A method of manufacturing a battery. The method for manufacturing a wafer solar cell of the present invention comprises a substrate H-joining block forming step, an electrode line region flattening step, and a pair of screen printing steps. The material roughening step roughens the surface of the substrate. The junction block forming step forms a plurality of spaced apart junction blocks on the surface of the roughened substrate. The electrode line region planarization step will not The surface of the ruthenium substrate covered by the junction blocks is planarized to provide a higher degree of reflection recognition than the surface of the roughened ruthenium substrate. The aligning screen printing step passes through the flat fossil with high reflection recognition. The surface of the substrate is aligned with the front of the screen printing electrode, and after the alignment is completed, the conductive material is screen printed on the remaining areas not covered by the junction blocks. In the step of planarizing the electrode line region of the present invention, the rough surface of the tantalum substrate can be planarized by an etching method using dry or wet etching techniques. In addition, when the alignment of the para-screen printing step is performed, the light-emitting substrate is irradiated with light of a predetermined wavelength range, and the flattening can be achieved because the stone substrate has a region of coarse saccharification and flattening at the same time. The region forms a high degree of reflection with respect to the region of the thick rib, and the edge of the roughened region and the flattened region interface can be clearly displayed to obtain a high contrast pattern. The effect of the present invention is: through the electrode In the line region flattening step: the region on the tantalum substrate which is pre-coated to form the electrode line is flattened by an etching method, so that a surface microstructure different from the roughened region on the remaining tantalum substrate can be obtained, when predetermined When the light source is irradiated onto the substrate, the surface may be microscopic. The difference in structure, and the appearance of high contrast graphics to facilitate the alignment of the screen printing step. In addition, the present invention forms a region for alignment after the bonding block forming step, so that accurate alignment can be determined in accordance with possible joint block formation errors in the process. [Embodiment] The manufacturing method proposed by the present invention can be applied to a single crystal or polycrystalline germanium wafer, and can be applied to a selective emitter (Selective process, the following is a description of a selective emitter process flow) The above and other technical contents, features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments of the drawings. Referring to Figure 1, Figure 2, Figure 3, the present invention The first preferred embodiment of the method for fabricating a germanium solar cell comprises the following steps: First, a P-type germanium wafer is selected as a germanium substrate, and in the substrate roughening step 61, the germanium substrate can be Inserting into the wet etching tank, the upper surface of the crucible substrate is combined with a predetermined concentration of an acidic or alkaline solution to form a rough surface portion 12 having an uneven surface, the rough surface portion 12 is used to make the crucible substrate 1 It has a large light-receiving surface area and can reduce the reflectivity of the incident light. Then, in the junction block forming step 62, a thin film is deposited on the upper surface of the rough surface by a thin film deposition technique 6 201230371. Layer 2, the diffusion barrier layer 2 may be selected a dielectric material, for example: t of state iNx: H), two silicon oxide (Si〇2) or a material having the same properties. In the continuation, the predetermined area on the early layer 2 of the diffusion barrier P can be removed by using an Etch paste or a laser abla 〇 ) technique, and the rough surface p of the ruthenium substrate 显 is exposed. &, a plurality of junction blocks 3 spaced apart from each other and protruding from the upper surface 11 of the crucible substrate 1 are formed, and the junction blocks 3 are arranged in a matrix manner (as shown in FIG. 3), of course. The material of the junction block 3 is still the nitride 7 (SiNx:H) and the dioxide dioxide (SiO 2 ) of the diffusion layer 2 described above. It is to be noted that the above-mentioned pre-regions not covered by the junction blocks 3 are used for laying electrode lines of the bus bar and the finger electrodes. Next, in the electrode line region flattening step 63, the tantalum substrate 1 is placed in a reaction tank containing a predetermined concentration of an assay solution, and the test/liquid mixture can be selected from potassium hydroxide (K〇H). Or sodium hydroxide (Na〇H) or the like, and after a predetermined reaction time, the region not covered by the junction blocks 3, that is, the rough surface portion 12 which is intended to be coated to form an electrode line, may be contacted. After the test solution is formed, a downwardly-formed flat face 13 is formed, which in the embodiment is etched to a depth of 2 to 5 μm. In general, the deeper the etch, the more smooth the surface will be after etching. It should be noted that the manner of planarization is not limited to the above-described wet etching method. In the present embodiment, it is also possible to directly cover the unconnected block 3 by using a laser melting method and via appropriate process control. The area is flattened. After that, the doping of the selective emitter is performed, for example, the high temperature furnace tube 201230371 = heat diffusion method is used to cause the group 5 impurity atoms 4 such as phosphorus atoms to face the upper surface of the crucible substrate to make ^ ^ E _ N-type doping step. When the atom 4 diffuses downward into the human stone substrate 1, due to its partial top surface: the junction block 3 having a certain thickness acts as a barrier mask at the time of implantation, and therefore, below the junction block 3 The impurity concentration is low and the depth of the formed surface is shallow; the material is barely cut and the η region of the upper surface of the substrate is exposed, and the impurity atoms can be directly diffused without being blocked, so the predetermined electricity: the impurity concentration under the line region is high, That is to say, the formed Ρ-Ν depth is compared with the clothes to thereby make the effect of 70% selective. Diffusion techniques for how different impurity concentrations are formed in a selective emitter process are quite extensive, and the remaining steps in the diffusion technique are not described in detail, and should not be limited to the thermal diffusion method described above. In addition, the junction block 3, ie, nitrogen cut (SiNx:H) or dioxo (si〇2), is removed in a clear manner to expose all of the surface 11 of the stone substrate i. In the upper surface 11, the area below the original junction block 3 is the rough surface portion 12', and the area where the electrode line is predetermined to be formed is the flat surface portion 13 after the last name. In addition, the edge of the ruthenium substrate 1 is subjected to dry/wet etching after the diffusion process to produce an electrical isolation effect, for example, a dry plasma etching technique. Then, in the alignment screen printing step 64, a thin film deposition technique, for example, a PECVD (Plasma Enhanced Chemical Vapor Deposition) method or a sputtering technique is used to perform a full-scale plating on the surface of the tantalum substrate 1. a layer of anti-reflective layer 5, in this embodiment, the material of the anti-reflective layer 5 may be selected from a material having similar effects such as "Silicon Fossil (SiNx: H) or cerium (Si〇2)" and can be uniformly formed into a thickness An anti-reflection layer of about 80 nanometers (nm) 201230371 Next, the light source is irradiated to the upper surface of the stone substrate 1 by the optical system of the screen printing machine, and the microstructure of the rough surface portion 12 is illuminated for the light. The shot has a large absorption, and the flat surface 胄13 will reflect more light 'from this'. The difference in the amount of reflected light from the surface structure of the Shixi substrate i can make the (10) imaging system draw more contrast. The image, and the more obvious contrast pattern, can help the screen printing machine to identify the position of the image. It is to be noted that the coverage of the anti-reflection layer 5 does not impair the contrast recognition exhibited between the rough surface portion 12 and the flat surface portion 13. In this embodiment, when the alignment is performed, the upper surface 11 of the stone substrate k can be adjacent to three different positions at the edge of the wafer, for example, the lower left, the lower right, and the upper right, respectively, and then selected - removed The two orthogonal edges between the rough surface 12 area under the surface block 3 and the flat surface area 13 are respectively identified by the X-axis and the γ-axis pattern, and an absolute seat is defined, and the above steps are defined. The positioning of the sepals is completed after the other two sets of absolute coordinates. Printing of the first conductive material can then be performed to form the bus and finger electrode lines 7'. Alternatively, the back and back aluminum of the solar cell can be printed (not shown) before or after this step. In this embodiment, the I electrical material may be selected from the group consisting of silver metal, or a metal paste composed of |g metal. In addition, in the above step, the battery after the screen printing of the metal conductive material is subjected to a drying and sintering step, wherein the sintering process allows the electrode line 7 to burn through the anti-reflective layer 5 and the battery is electrically charged. Connection, thus completing the fabrication of the selective emitter solar cell. 201230371 S, in the above selective emitter solar cell process, the metal electrode alignment and screen printing technology is applied to the front of the battery, but the same concept of alignment technology can also be applied to the battery back electrode The screen printing or back contact solar cells, so that the overall conversion efficiency of the battery is the highest. In summary, 'before the electrode line is printed, the surface structure of the local area of the stone substrate U is flattened' so that the difference in the degree of recognition can be obtained from other rough areas without additional surnames, that is, through the two on the microstructure. Presenting different grain orientations (Grai&r; rientatic) n), and under the illumination of a predetermined light source, appealing to different light absorption or light reflection characteristics, thereby providing a higher contrast alignment identification pattern of the ccd image system In order to achieve the purpose of utilizing the high contrast of the original graphics. In view of the above, it can be seen that the alignment technology of the present invention can solve the problems of the screen printing error caused by the inaccurate alignment caused by the edge alignment and the pattern alignment, and the technique of the present invention is also It is not necessary to additionally apply the step of marking the pattern as in the conventional technology, so that the process cost can be effectively reduced. In addition, the method of the present invention is simple and easy to implement, and can be introduced into an existing production process without affecting the production speed. Therefore, it is quite helpful to the current solar industry. The purpose. The above is only the preferred embodiment of the present invention, and thus, the scope of the present invention, that is, the simple equivalent change and modification of the present invention and the description of the invention, The scope of the invention is covered. 10 201230371 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart showing the fabrication of a method for fabricating a germanium solar cell according to the present invention; FIG. 2 is a schematic view of the structure of the preferred embodiment; Figure 3 is a schematic illustration of the variation of the preferred embodiment. In the process, the best depletion of the 矽 wafer is shown.—上上201230371 [Main component symbol description] 1 ..........矽Substrate 11 ......... Surface 12 .... thick chain face 13 ... ... flat face 2 ..... diffusion barrier layer 3 ........ .. junction block 4 .......... impurity atom 5 .......... anti-reflection layer 61~64····Step 7 ........ ..electrode line
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