TW201230305A - Variable resistance memory element and fabrication methods - Google Patents

Variable resistance memory element and fabrication methods Download PDF

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TW201230305A
TW201230305A TW100129435A TW100129435A TW201230305A TW 201230305 A TW201230305 A TW 201230305A TW 100129435 A TW100129435 A TW 100129435A TW 100129435 A TW100129435 A TW 100129435A TW 201230305 A TW201230305 A TW 201230305A
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Taiwan
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amorphous carbon
carbon layer
gas
substrate
layer
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TW100129435A
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Chinese (zh)
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Siu F Cheng
Heung-Lak Park
Deenesh Padhi
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Applied Materials Inc
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B53/00Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/26Deposition of carbon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/021Formation of switching materials, e.g. deposition of layers
    • H10N70/023Formation of switching materials, e.g. deposition of layers by chemical vapor deposition, e.g. MOCVD, ALD
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/24Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/884Switching materials based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors
    • H10N70/8845Carbon or carbides

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Carbon And Carbon Compounds (AREA)

Abstract

An electronic device comprises a variable resistance memory element on a substrate. The variable resistance memory element comprises (i) an amorphous carbon layer comprising a hydrogen content of at least about 30 atomic percent, and a maximum leakage current of less than about 1 x 10<SP>-9</SP> amps, and (ii) a pair of electrodes about the amorphous carbon layer. Methods of fabricating this and other devices are also described.

Description

201230305 六、發明說明: 【發明所屬之技術領域】 本裝置之實施例係關於一 變電阻記憶體元件之相關製 元件經歷電阻性變化且用於 【先前技術】 種可變電P且記憶體元件及可 造方法’該可變電阻記憶體 電子電路中之記憶體應用。 電子電路(諸如’積體電路、顯示器及光電電池)使 用具有各種記憶體設備之基於微處理器之系統。記憶體 設備之類型取決於所需記憶體特徵且可包括—次可程式 匕(諸如反熔絲)、可重寫及揮發性或非揮發性記憶體 之結構。作為-個實例’電阻式隨機存取記憶體㈣istive ⑽d0m-access memory; RRAM)為相對較新型之半揮發性 β t揮發de* it體,該半揮發性或非揮發性記憶體係基 於可變電阻記憶體元件的電阻式切換。纟rram中,含 有&quot;電質之可變電阻記憶體元件通常為絕緣&amp;,但在施 足夠阿的電壓或電流後即可經由一或更多燈絲或導電 U行導電。導電路徑形成可由不同機制而產生,該 機制i括電阻式切換材料之接合結構的變化。一旦形 成導電燈絲’則可藉由施加適當電壓將導電燈絲重設為 。至較尚電阻狀態或將導電燈絲設定為較低電阻狀 態。作為另一個實例’可程式化之導體隨機存取記憶體 (programmable conductor random access memory; PCRAM) 單元及CMOS相容場可程式化閘陣列 201230305 (field-programmable gate arrays; FPGAs)亦使用具有電阻 式切換之可變電阻記憶體元件。 在操作中’藉由回應於施加至元件之預設電壓或電流 信號而改變δ己憶體元件上的電阻,記憶體單元儲存資 料,該記憶體單元包含可變電阻記憶體元件。例如,在 唯·讀記憶體單元t,可藉由向單元施加信號將第一值寫 入記憶體單元,而該信號具有預定電壓位準,從而在施 加k號之則相對於單元電阻而言改變貫穿記憶體單元之 電氣電阻。在可重寫單元中,可藉由向記憶體單元施加 第二信號將第二值(或預設值)寫入或復原於記憶體單 元中,以將通過記憶體單元之電阻變回為原始位準。第 -信號之電壓位準與第—信號之電壓位準方向相反,而 第-之電壓位準^ 笛_ /J- Dfe — 1早興第“唬之電壓位準的量值可能 相同或可能不相同。各一 φ )Λ〆a U母電阻狀態為穩定的,以使記憶 體單元能夠保留該等記憶體單元之儲存值,而不會頻繁 刷新。因此,藉由將可變電阻材料「程式化」或設定為 不同的電阻值來操作可變電阻材料,該電阻值可為可逆 、或不可逆的此外,可藉由施加讀取信號來讀取或「存 取」單元值,以使用雷懕旦 災用电座里值來決定該單元上的電阻位 J ^電壓里值低於改變單元之電阻所需的電壓量值。 斤偵测電阻位準大於參考位準’則將記憶體單元決定 為處於「關閉」狀態,或儲存若所偵測電阻位 準小於參考位準,則將記憶體單元決定為處於「開啟」 狀態’或儲存「^」值。然而,絕對電阻值或參考電阻值 201230305 以及電阻變化必須-致且穩定,以便可重現且可靠地操 乍CRAM單凡,該電阻變化受已知電壓之施加的影響。 材料已知用來藉由在層上施加電壓改變電阻,以 顯不具有至少兩種不同的電阻狀態之電阻式切換,且因 匕類材料為用於記憶體單元之可變電阻記憶體元件 的候選材料。-些開發中的材料包括金屬氧化物(諸如, 2〇3 Cu〇x、Hf〇2、Mo〇x、Nb2〇5、Ni〇x、Ta2〇5、Ti〇x、 及Zr〇2)層及無定形碳層。然而,通常發現無定形 奴層之電阻狀態在—個層與另一個層之間有變化,且因 此無定形碳層為不穩定的。在未局限於理論之情況下, 據仏無疋形碳層之電阻在施加設定電壓後即改變,因 $碳材料之接合結構自SP3結構變為sp2結構。進一步據 信’設定電壓加熱無㈣碳層,以引起接合結構之變化。 然而’尚未已知為什麼無定形碳層可在無定形碳層之兩 個或兩個以上電阻狀態的位準或設定電壓值方面有變 化’以纟一個碳層肖$ 一個碳層t間達成特定電阻狀 兩種已知電阻狀態間之可靠切換之該變化性已限制 了無定形碳層在記憶體元件及單元中之應用。 習知無定形碳層之另一個問題在於,在熱處理情況下 =知無定形碳層之熱不穩定性。已知,某些層在暴露於 问μ之則顯不出較好電阻性質,但在熱處理之後顯示出 降級的電阻位準。例如,儘管在處理之前,該等層之電 阻率量測為大於350歐姆-公分乃至大於綱歐姆公分, 但在熱處理之後’電阻率將下降為低上許多之值,為1〇〇 201230305 歐姆-公分至200歐姆-公分。更隹 刀旯進—步,習知無定形碳層 亦可在退火之後顯示出過度收缩 縮從而使層與基板分 層。因此’無定形碳層*能用於許多結構中,該等結構 包括必須於高溫下進行沈積之其他材料,諸如用於3D電 路之多層堆疊、陣列及其他物,從而進—步限制無定形 碳層在記憶體單元結構中之應用。 由於包括該等及其他缺陷之各種原因,儘管已開發且 有可變電阻記憶體元件之各種記憶體單元’且該等可變 電阻記憶體元件包含無定形碳層,但仍不斷探尋進一步 改良無定形碳層及無定形碳層之製造方法。 【發明内容】 本發明提供一種電子設備,該電子設備包含基板上之 可變電阻記憶體元件。該可變電阻記憶體元件包含:(工) 無定形碳層,該無定形碳層包含至少約3〇原子百分比之 氫含量及小於約1x1 〇_9安培之最大漏電流;以及(2)—對 電極’該對電極環繞該無定形碳層。 本發明提供一種電子設備,該電子設備包含無定形碳 層,該無定形碳層安置於基板上,該無定形碳層包含: 至少約30原子百分比之氫含量及小於約1 X 1 〇_9安培之最 大漏電流,並藉由一方法形成該無定形碳層,該方法包 含以下步驟·將該基板置放至處理區中;將該基板維持 在小於300°C之溫度下;將處理氣體引入至該處理區中, 該處理氣體包含稀釋氣體及含碳氣體;將該處理氣體維 201230305 持在約0.5托至约9Λ k r~ , 王、·々20托之壓力下;以及自該處理氣體形 成電漿。 本發明提供—種方法,該方法用於在基板上沈積無定 形奴層’該方法包含以下步驟:將該基板置放至處理區 中將該基板維持在小於3〇〇〇c之溫度下;將處理氣體引 入至該處理區中,該處理氣體包含稀釋氣體及含碳氣 乂及將°亥處理氣體維持在約〇·5托至約20托之壓力 下,以及藉由以第一頻率向環繞該處理區之電極施加第 F力率及以第二頻率向該基板施加第二功率自 ”玄處理氣體形成電漿,其中該第二頻率低於該第一頻率。 【實施方式】 在第1A圖中圖示記憶體單元1〇〇之示例性實施例,記 隐體單兀100包含基板11〇上之電阻切換元件1〇6。電阻 換兀件106顯不’定義電阻回應於刺激信號自至少第 p電阻率(或電阻)變為第二電阻率(或電阻刺激信 遽可為例如施加之雷法赤f厭 /電聖或者溫度變化。電阻切換 兀件106之兩個不同的電阻率或電阻(此時空中大小及 厚度保持怪&gt;〇狀g可用於儲存資訊資料或信號。具 有可變電阻切換元们06之記憶體單元ι〇〇可用於不同 的應用,該等應用包括電阻變化記憶體單元(RRAM)’可 變電阻切換元件1 〇 6可為-雜_+、 j為—維或三維結構,該等結構建 置於基板m上之層中。記憶體單元ι〇〇亦可為可重寫 的或一次可程式化的’諸如反炫絲單元。藉由自低電阻 201230305 率切換至高電阻率,記憶體單元i 00允許儲存二進位資 訊’或者反之亦然。 記憶體單元100形成於基板110上,基板11〇可為例 如半導體,諸如矽晶圓、鍺晶圓或矽鍺晶圓;化合物半 導體’諸如砷化鎵;或介電質,諸如玻璃面板或顯示器, 介電質可包括例如硼磷矽玻璃、磷矽酸鹽玻璃、硼矽玻 璃以及鱗矽酸鹽玻璃、聚合物及其他材料。在一個變型 中’基板11 0為矽晶圓,該矽晶圓包含一或更多大的矽 晶體。儘管爲了簡明起見’基板〗10之示例性實施例圖 示為單個平板狀結構,但應理解基板11〇可且通常的確 包括其他結構,諸如半導體結構、多晶矽記憶體單元、 CMOS結構或其他結構’該等結構形成於下層底層上, 該下層底層包含半導體、化合物半導體或介電材料。 藉由將導電材料層沈積於基板110上,在基板110上 形成第一電極112a。典型沈積製程包括物理氣相沈積 (physical vapor deposition; PVD)製程,諸如濺射;或者 化學氣相沈積(chemical vapor deposition; CVD)製程,諸 如電漿輔助CVD或熱輔助CVD。例如,在習知濺射製程 中’電毁滅射包含藏射材料之乾材,以將導體層沈積至 濺射腔室中之基板110上。可執行化學機械研磨(chemical mechanical polishing; CMP)步驟,以使導電材料平滑或 平坦。在一個實施例中,第一電極1丨2a由導電材料形成, 該導電材料包含元素金屬’諸如鋁(A1)、銅(Cu)、金(Au)、 錄(Ni)、始(Pt)、摻雜多晶石夕、銀(Ag)、鈦(Ti)、鶴(w)、 201230305 鋅(Zn)或上述混合物;或含導電金屬化合物,諸如硒化 錫(SnSe)、硒化銻(SbSe)或硒化銀(AgSe)、矽化鎢(wsi)。 在一個變型中,第一電極112a包含鎢,鎢的厚度為約2〇 埃至約1000埃’諸如約50埃至約5〇〇埃(例如,約1〇〇 埃)。 視情況,第一黏附層114a可形成於第一電極1123之 表面上。第一黏附層l14a促進上覆層與電極U2a之間 的接合,且第一黏附層U4a亦可用來電氣隔離記憶體單 元1〇〇與基板110。黏附層U4a可為例如氧化物或氮化 物化合物(諸如,金屬氧化物或氮化物)層,在一個變 型中使用與用於電極112a、112b之材料相同的金屬。例 如,當第一電極112a由鎢製成時,黏附層U4a包含氧 化鎢或氮化鎢或者氧化鎢與氮化鎢之混合物。黏附層 114a亦可包含氧或氮之吸附原子,以改變第一電極112a 表面處之原子與隨後沈積層之接合或化學親合力。在一 個貝例中,用含氧及/或含氮氣體處理第一電極I! h之表 面,以將氧原子及/或氮原子吸附至表面上,以供與電阻 式金屬氧化物層中之金屬原子接合,以形成單層,該單 層之厚度小於100埃乃至小於約1G埃。在另—個實施例 中第電極112a之處理表面在第一電極112a與無定 形反層120之間形成溶液邊界,從而藉由使碳層㈣之 原子與第一電極112a之原子在溶液邊界處混合,來提供 文良黏附。在沈積無定形碳層120之前,氮原子可吸附 第電極112a之表面上,以形成碳/金屬介面之溶液邊 201230305 界。在由Cheng等人申請於2〇〇9年9月μ曰,標題為201230305 VI. Description of the Invention: [Technical Field] The present embodiment relates to a related variable element of a variable resistance memory element undergoing a resistive change and is used in [Prior Art] variable electric P and memory element And a method of creating a memory application in the variable resistance memory electronic circuit. Electronic circuits, such as 'integrated circuits, displays, and photovoltaic cells, use microprocessor-based systems with a variety of memory devices. The type of memory device depends on the desired memory characteristics and can include structures such as -programmable (such as anti-fuse), rewritable, and volatile or non-volatile memory. As an example of 'resistive random access memory (4)istive (10)d0m-access memory; RRAM) is a relatively new type of semi-volatile β t volatile de* it, the semi-volatile or non-volatile memory system based on variable resistance Resistive switching of memory components. In 纟rram, a varistor memory element containing &quot;electrical is usually insulated &amp;amp; but after applying a sufficient voltage or current, it can conduct electricity via one or more filaments or conductive U lines. Conductive path formation can result from different mechanisms, including variations in the junction structure of the resistive switching material. Once the conductive filament is formed, the conductive filament can be reset by applying an appropriate voltage. Go to the more resistive state or set the conductive filament to a lower resistance state. As another example, a programmable conductor random access memory (PCRAM) unit and a CMOS compatible field programmable gate array (FPGAs) are also used. Switched variable resistance memory component. In operation, the memory unit stores information by responding to a predetermined voltage or current signal applied to the component, the memory cell storing information, the memory cell comprising a variable resistance memory component. For example, in the read-only memory unit t, the first value can be written to the memory unit by applying a signal to the unit, and the signal has a predetermined voltage level, so that the magnitude of the k is applied relative to the unit resistance. Change the electrical resistance through the memory unit. In the rewritable unit, the second value (or preset value) can be written or restored to the memory unit by applying a second signal to the memory unit to change the resistance through the memory unit back to the original Level. The voltage level of the first signal is opposite to the voltage level of the first signal, and the voltage level of the first signal is _ _ / J- Dfe — 1 Morning 第 “The voltage level of 唬 may be the same or possible Not the same. Each φ) Λ〆a U female resistance state is stable, so that the memory unit can retain the stored values of the memory cells without refreshing frequently. Therefore, by using the variable resistance material Stylized or set to a different resistance value to operate the variable resistance material, the resistance value can be reversible or irreversible. In addition, by reading the signal to read or "access" the unit value to use the mine The value of the disaster-causing electric square determines the resistance value of the unit. The value of the voltage in the J ^ voltage is lower than the voltage required to change the resistance of the unit. If the detection resistance level is greater than the reference level, the memory unit is determined to be in the "off" state, or if the detected resistance level is less than the reference level, the memory unit is determined to be in the "on" state. 'Or save the "^" value. However, the absolute or reference resistance value 201230305 and the resistance change must be stable and stable in order to reproduce and reliably operate the CRAM, which is affected by the application of a known voltage. Materials are known for resistive switching by exhibiting a voltage on a layer to exhibit at least two different resistance states, and because the germanium material is a variable resistive memory component for a memory cell. Candidate material. - Some of the materials under development include metal oxides (such as 2〇3 Cu〇x, Hf〇2, Mo〇x, Nb2〇5, Ni〇x, Ta2〇5, Ti〇x, and Zr〇2) layers. And an amorphous carbon layer. However, it has been generally found that the resistance state of the amorphous slave layer varies between one layer and the other, and thus the amorphous carbon layer is unstable. Without being bound by theory, the resistance of the 仏-free carbon layer changes after the application of the set voltage, since the bonded structure of the carbon material changes from the SP3 structure to the sp2 structure. It is further believed that the set voltage is used to heat the (four) carbon layer to cause a change in the joint structure. However, 'there is no known why the amorphous carbon layer can change in the level or set voltage value of two or more resistance states of the amorphous carbon layer' to achieve a specificity between a carbon layer and a carbon layer t. This variability in the reliable switching between two known resistance states of the resistive shape has limited the use of the amorphous carbon layer in memory components and cells. Another problem with the conventional amorphous carbon layer is that in the case of heat treatment, the thermal instability of the amorphous carbon layer is known. It is known that some layers exhibit better resistance properties when exposed to the same, but exhibit a degraded resistance level after heat treatment. For example, although the resistivity of the layers is measured to be greater than 350 ohm-cm or even greater than the ohm centimeters before processing, the resistivity will decrease to a much lower value after heat treatment, which is 1〇〇201230305 ohms- Centimeters to 200 ohm-cm. Further, the conventional amorphous carbon layer may also exhibit excessive shrinkage after annealing to separate the layer from the substrate. Thus 'amorphous carbon layer* can be used in many structures, including other materials that must be deposited at elevated temperatures, such as multilayer stacks, arrays, and others for 3D circuits, to further limit amorphous carbon. The application of layers in the structure of memory cells. Due to various reasons including these and other deficiencies, although various memory cells of variable resistance memory devices have been developed and these variable resistance memory devices contain an amorphous carbon layer, further improvements are continuously sought. A method of producing a shaped carbon layer and an amorphous carbon layer. SUMMARY OF THE INVENTION The present invention provides an electronic device including a variable resistance memory element on a substrate. The variable resistance memory device includes: an amorphous carbon layer comprising a hydrogen content of at least about 3 atomic percent and a maximum leakage current of less than about 1 x 1 〇 _9 amps; and (2)- The counter electrode 'the pair of electrodes surrounds the amorphous carbon layer. The present invention provides an electronic device comprising an amorphous carbon layer disposed on a substrate, the amorphous carbon layer comprising: a hydrogen content of at least about 30 atomic percent and less than about 1 X 1 〇 _9 Ampere's maximum leakage current, and forming the amorphous carbon layer by a method comprising the steps of: placing the substrate into a processing zone; maintaining the substrate at a temperature of less than 300 ° C; treating the gas Introduced into the treatment zone, the processing gas comprises a diluent gas and a carbon-containing gas; the treatment gas dimension 201230305 is held at a pressure of about 0.5 Torr to about 9 Λ kr~, and a pressure of 20 Torr, and the process gas Form a plasma. The present invention provides a method for depositing an amorphous slave layer on a substrate. The method comprises the steps of: placing the substrate in a processing zone to maintain the substrate at a temperature of less than 3 〇〇〇c; Introducing a process gas into the treatment zone, the process gas comprising a diluent gas and a carbon-containing gas and maintaining the gas processing gas at a pressure of about 〇 5 Torr to about 20 Torr, and by Applying a F-force rate around an electrode of the processing region and applying a second power to the substrate at a second frequency to form a plasma from the "Xuan processing gas, wherein the second frequency is lower than the first frequency. [Embodiment] 1A shows an exemplary embodiment of a memory cell 1A, the hidden body unit 100 includes a resistive switching element 1〇6 on the substrate 11. The resistor changing element 106 does not define a resistance in response to the stimulation signal. From at least the p-th resistivity (or resistance) to the second resistivity (or the resistive stimulus signal can be, for example, an applied thunder method, an electrical sacrificial or a temperature change. Two different resistors of the resistance switching element 106 Rate or resistance (this time empty The size and thickness of the singularity can be used to store information or signals. The memory unit ι with variable resistance switching elements can be used for different applications, including resistance change memory cells (RRAM) The variable resistance switching element 1 〇6 can be -hetero_+, j is a dimensional or three-dimensional structure, and the structures are built in layers on the substrate m. The memory unit ι can also be rewritable. Or a programmable 'such as anti-drawing unit. By switching from low resistance 201230305 rate to high resistivity, memory unit i 00 allows storing binary information' or vice versa. Memory unit 100 is formed on substrate 110 The substrate 11 can be, for example, a semiconductor such as a germanium wafer, a germanium wafer or a germanium wafer; a compound semiconductor such as gallium arsenide; or a dielectric such as a glass panel or display, and the dielectric can include, for example, boron Phosphorus glass, phosphonium glass, borosilicate glass, and sulphate glass, polymers, and other materials. In one variation, 'substrate 110 is a germanium wafer, which contains one or more large Helium crystal Although the exemplary embodiment of the 'substrate 10' is illustrated as a single planar structure for simplicity, it should be understood that the substrate 11 may, and generally does, include other structures, such as semiconductor structures, polysilicon memory cells, CMOS structures, or other structures. The structures are formed on a lower underlayer comprising a semiconductor, a compound semiconductor or a dielectric material. The first electrode 112a is formed on the substrate 110 by depositing a layer of conductive material on the substrate 110. Typical deposition processes include physics A vapor deposition (PVD) process, such as sputtering; or a chemical vapor deposition (CVD) process, such as plasma assisted CVD or heat assisted CVD. For example, in a conventional sputtering process, an electrically destroyed material comprising a deposited material is deposited to deposit a conductor layer onto a substrate 110 in a sputtering chamber. A chemical mechanical polishing (CMP) step may be performed to make the conductive material smooth or flat. In one embodiment, the first electrode 1丨2a is formed of a conductive material containing an elemental metal such as aluminum (A1), copper (Cu), gold (Au), Ni (Ni), and (Pt), Doped polysilicon, silver (Ag), titanium (Ti), crane (w), 201230305 zinc (Zn) or a mixture of the above; or conductive metal compounds such as tin selenide (SnSe), bismuth selenide (SbSe) ) or silver selenide (AgSe), tungsten telluride (wsi). In one variation, the first electrode 112a comprises tungsten having a thickness of from about 2 angstroms to about 1000 angstroms, such as from about 50 angstroms to about 5 angstroms (e.g., about 1 angstrom). The first adhesive layer 114a may be formed on the surface of the first electrode 1123 as appropriate. The first adhesive layer 14A promotes bonding between the upper cladding layer and the electrode U2a, and the first adhesive layer U4a can also be used to electrically isolate the memory cell 1 and the substrate 110. The adhesion layer U4a may be, for example, an oxide or nitride compound (such as a metal oxide or nitride) layer, and in one variation, the same metal as that used for the electrodes 112a, 112b is used. For example, when the first electrode 112a is made of tungsten, the adhesion layer U4a contains tungsten oxide or tungsten nitride or a mixture of tungsten oxide and tungsten nitride. Adhesion layer 114a may also contain oxygen or nitrogen adsorbing atoms to alter the bonding or chemical affinity of the atoms at the surface of first electrode 112a with subsequent deposited layers. In a shell example, the surface of the first electrode I!h is treated with an oxygen-containing and/or nitrogen-containing gas to adsorb oxygen atoms and/or nitrogen atoms onto the surface for use in the resistive metal oxide layer. The metal atoms are joined to form a single layer having a thickness of less than 100 angstroms or even less than about 1 G angstrom. In another embodiment, the treated surface of the first electrode 112a forms a solution boundary between the first electrode 112a and the amorphous counter layer 120, such that the atoms of the carbon layer (4) and the atoms of the first electrode 112a are at the solution boundary. Mix to provide a good adhesion. Before depositing the amorphous carbon layer 120, nitrogen atoms can be adsorbed on the surface of the first electrode 112a to form a solution side of the carbon/metal interface 201230305. Applied by Cheng et al. in September 29, 2009, titled

「GLUE LAYER TO IMPROVE AMORPHOUS CARBON TO METAL ADHESION」的共同讓渡之美國專利申請案 第12/5 66,948號中描述了合適的黏附層114&amp;、11413,該 案之全部内容以引用方式併入本文。 電阻切換元件106形成於第一電極丨丨2a或黏附層丨丨4a 上方或直接位於第一電極112a或黏附層U4a上。 在......上方J意^胃可存在一或更多介入層,而「直接 位於......上」意謂在下層之上並與下層直接實體接觸。 在該等變型中之任一變型中,可變電阻切換元件1〇6與 下層第一電極112 a電氣接觸。在一個示例性實施例中, 電阻切換元件106包含至少一種電阻切換材料118,在由 設定刺激信號(諸如,設定電流、設定或程式化電壓或 者設定或程式化脈衝)控制之設定轉變中,電阻切換材 料118能夠自較高電阻率狀態或電阻值轉變為較低電阻 率狀態或電阻值。自較低電阻率狀態至較高電阻率狀態 之反向轉變被稱作重設轉變,該重設轉變受重設電流、 重設電壓或重設脈衝的影響,重設電流、重設電壓或重 §又脈衝使電阻切換元件1 〇6處於未程式化狀態。 在一個示例性實施例中,電阻切換材料U8包含無定 形碳層120或基本上由無定形碳f 12〇組成。無定形碳 層120可含有無長程序化之無定料、微晶碳玻璃碳、 石墨烯,乃至碳奈米管,該等碳奈米管為單層壁奈米管、 多層壁奈米管或單層壁奈米管與多層壁奈米管之混合 10 201230305 物。無定形碳層120亦可4 了匕括其他兀素,諸如氫、氮或 氧。在一個變型中, …、疋形碳層120之厚度為約1 〇〇埃 至約1000埃,或乃曼的 飞》至、々100埃至約500埃(例如,約300 埃)°在另—個實施例中’對厚度為約2000埃之層而言, 無定形碳層120之薄層電阻(「〇/口」或「歐姆/平方」) 為約ΐχΐ〇7Ω/□至約1χ1〇8ω/□。儘管電阻切換元件1〇6 如圖所示包含電阻切拖Μ# 換材枓且電阻切換材料118為 無定形碳層12G,但電阻切換元件1()6亦可完全由其他材 料組成或包含其他材料或層之組合。例如,其他合適的 電阻切換材料可包括氧化鎮或碳氫材料,其他合適的電 阻切換材料可單獨使用,或與無定形碳層12〇結合使用。 又’電阻切換材料可包括其他元素,諸如矽、氮及氫, 其他元素通常存在於無定形碳材料中。 此外,視情況,第二黏附層U4b可形成於電阻切換材 料118之表面上。第二黏附層U4b促進電阻切換材料ιΐ8 與上覆層(諸如,第二電極112b)之間的接合,且第二 黏附層114b亦可用來電氣隔離記憶體單元1〇〇與基板 11〇。第二黏附層114b與第一黏附層U4a可具有相同材 料,例如金屬氮化物(諸如,氮化鈦)層。 藉由將導電材料層沈積於基板110上,在電阻切換材 料118上方形成第二電極112be第二電極U2b可由與第 一電極112a之導電材料相同的導電材料製成,且藉由相 同的沈積製程或不同的沈積製程來沈積第二電極U2b。 可執行化學機械研磨(CMP)步驟,以使導電材料平滑或平 201230305 固只施例中’第二電極112b亦由導電材料形成 該導電材料包含元素金屬,諸如铭、銅、敛或鶴:成 亦可使用其他材料,諸如矽化鎢或氮化鎢。 坦。在 在使用中’藉由可逆地將電阻切換材料i 18之電阻率 ,兩個或兩個以上電阻狀態之間切換,記憶體單元1〇〇 可操作為一次可程式化或可重寫記憶體元件。例如,在 製造後’電阻切換材料118可處於初始低電阻率狀態, 在施加第一預設電壓或電流後,該初始低電阻率狀熊切 換為高電阻率狀態’且在施加第二電壓或電流後,該高 電阻率狀態返回至低電阻率狀態。或者,在製造後,電 阻切換材肖118可處於初始高電阻狀態,在施加第二預 设電壓或電流後’該初始高電阻狀態可逆切換至低電阻 狀態。因此,在操作記憶體單元100期間,一個電阻狀 態可表示「關閉」狀態’諸如二進位「〇」,而另—個電 阻狀態可表示「開啟」狀態,諸如二進位「^」,然而可 使用大於兩種資料/電阻狀態。在一個變型中,在「開啟 狀態中,電阻切換材料118之電阻率小於10歐姆公分,·&quot; 例如,約0.001歐姆-公分至約10歐姆_公分;而在「關 閉j狀態中,電阻切換材料丨丨8之電阻率至少為3 歐 姆-公分,例如,約200歐姆-公分至約1〇〇〇歐姆公分 在第1B圖中圖示記憶體單元1〇〇之第二實施例。在該 實施例中,隔離層124沈積於基板11〇上,以電氣隔離 記憶體單元1 〇〇與基板1 1 〇 ^隔離層i 24亦可用作黏附 層,該黏附層促進上覆層與基板11〇之間的接合。隔離 12 201230305 層124可為例如絕緣體,諸如氧化矽、氮化矽、氧氮化 矽或其他絕緣材料。 導電位址線126用作記憶體單元1〇〇或複數個記憶體 單元之互連接線,該等記憶體單元形成記憶體陣列(未 圖示)。藉由將導電材料沈積至基板11〇上來製造導電位 址線126,導電材料諸如用於第一電極ma及第二電極 112b之上述材料,且藉由相同製程來沈積導電位址線 126。在一個變型中,位址線126包含鎢,鎢之厚度為約 200埃至約2000埃。 絕緣體層1 28位於位址線126上方,以阻止導電材料 之原子自位址線12 6或其他此類層擴散或遷移。例如, 絕緣體層128可為例如介電材料,諸如氮化石夕(si3N4); 低介電常數材料’諸如來自加利福尼亞州聖克拉拉之 Applied Materials 的 Black Diamond™ ;或絕緣玻璃,諸 如四乙氧基石夕烧(tetraethylorthosilicate; TEOS)沈積之氧 化石夕。可由習知CVD方法或PVD方法沈積此類層,且 將此類層佈局圖樣以使用微影法及蝕刻法形成穿孔13〇。 在該變型中,藉由在穿孔130及絕緣體層128上方形 成導電材料層,且隨後研磨或蝕刻掉沈積於穿孔丨3 〇之 外的過量導電材料,在絕緣體層128中之穿孔13〇内形 成第一電極112a。 在第一電極112a上方形成電阻切換元件1 〇6。例如, 可在第一電極112a上形成電阻切換元件1 〇6,以與第— 電極112a電氣接觸,如上所述,電阻切換元件106包含 13 201230305 無定形碳層120。無定形碳層120與上述變型具有相同的 性質,且使用與上述變型相同的方法沈積無定形碳層 120 ° 如上所述,在電阻切換元件106之無定形碳層12〇上 方形成第二電極112b。在操作中,據信,在施加調節電 壓後’金屬離子自第一電極l〗2a或第二電極ii2b擴散 至無疋形%1層120中,以在碳層120中形成傳導槽道。 例如,據信,在施加電壓後,金屬離子進入無定形碳層 1 20且向sp2雜化的碳原子之間的碳_碳雙鍵捐贈電子, 以使得sp2雜化的碳原子在sp3雜化的碳原子之間形成傳 導槽道。隨後施加的寫入電壓可使製程逆向以使無定形 碳層120程式化為較低電阻狀態,該隨後施加的寫入電 壓之能量比調節電壓之能量低。 在又一個實施例中,記憶體單元1〇〇包括控制元件 134,諸如電晶體或二極體,控制元件134與電阻切換元 件106—起操作。第lc圖圖示記憶體單元1〇〇,記憶體 單元100包含控制元件134,控制元件134為半導體二極 體136。半導體二極體136包括底部^型摻雜1 m、本 質區142及頂部p_型摻雜區144。本質區142可具有低 濃度之P-型或η-型摻雜劑,該等^型或n型摻雜劑可佈 植至該區域中或該等p_型或心型摻雜劑可分別自相鄰^ 型摻雜區140《p-型摻㈣144擴散至該區域中。亦可 使用替代或相反方向(例如,盥麻 L例如,、底部之P-型摻雜區相 比)。又,電阻切換元件1〇6可定位於二 14 201230305 下方’電阻切換元件丨〇6用作記憶體儲存元件。二極體 136可由習知半導體材料製成,該等習知半導體材料諸如 單晶或多晶形式之矽、鍺或矽-鍺合金。二極體136及電 阻切換元件106定位於第一電極112a與第二電極112b 之間’電阻切換元件丨〇6包含無定形碳層丨2〇。在電極 112a、112b上方或下方亦可包括黏附層及隔離層。藉由 一連串不同的順向電壓偏壓,可使記憶體單元1〇〇處於 不同的資料狀態。流經任何不同的資料狀態與任何其他 不同的寅料狀態之間的記憶體單元1 〇 〇之電流不同,以 使得可容易地偵測該等狀態之間的差異。 在一個實施例中,使用化學氣相沈積(CVD)製程,諸如 電漿辅助化學氣相沈積(plasma_enhanced chemiCal vapor deposition; PECVD)製程來沈積無定形碳層12〇。然而, 將對一般技術者顯而易見,可由其他沈積製程形成無定 形碳層120。例如,亦可藉由(包括但不限於)來自靶材 之PVD濺射沈積、熱CVD製程及其他方法來沈積無定 形碳層120。 如第2圖中所示,合適的電漿辅助化學氣相沈積 (PECVD)腔至40包含圍壁48,圍壁48包括頂板52、側 壁54及底壁56,圍壁48包圍處理區42。腔室40亦可 包含襯裡(未圖示),該襯裡作為環繞處理區42之圍壁 48中之至少一部分之襯裡。針對處理3〇〇爪爪矽晶圓, 腔室40之體積通常為約2〇,〇〇〇 cm3至約3〇,〇〇〇 cm3,且 更通常為約24,0〇〇 cm3。在一個變型中,腔室4〇為來自 15 201230305 加利福尼亞州聖克拉拉之Applied Materials的pr〇ducer® SE型腔室。 在處理期間,降低基板支撐件58,且基板輸送件64(諸 如,機械臂)使基板11〇穿過入口埠62且置放於支樓件 58上。基板支撐件58可在用來裝卸之較低位置與用來處 理基板110之可調整的較高位置之間移動。基板支撐件 58可包括封閉的處理電極44b,以自處理氣體產生電漿, 該處理氣體經引入至腔室40中。基板支撐件58可由加 熱器68加熱,加熱器68可為電氣電阻式加熱元件(如 圖所示)' 加熱燈(未圖示)或電漿自身。通常,基板支 撐件58包含陶瓷結構,該陶瓷結構具有接收表面以接收 基板no,且該陶瓷結構保護處理電極44b及加熱器68 免文腔室環境影響。在使用中,向處理電極4仆施加射 頻(radio freqUency; RF)電壓,而向加熱器68施加直流 (direct current; DC)電壓。基板支撐件58中之處理電極 44b亦可用於靜電性地夹持基板11〇與支撐件Μ。基板 支撐件58亦可包含一或更多環(未圖示),該一或更多 環至少部分地環繞支撐件58上之基板11〇之周邊。 在將基板11G裝載至支樓件58上之後,將支樓件58 升至處理位置,該處理位置較接近於氣體分佈器72,以 在基板110與氣體分佈器72之間提供所要的間隔間隙距 離ds。合適的間隔距離為約200密耳至約1000密耳(或 約0.5 cm至約2.5 cm)。氣體分佈器72定位於處理區42 上方,以橫跨基i 1()均勻地分散處理氣體。氣體分佈 201230305 器72可將第一處理氣體及第二處理氣體之兩個獨立流分 別傳送至處理區42,而不在將第一處理氣體流及第二處 理氣體流引入至處理區42中之前混合氣體流,或者氣體 分佈器72可在向處王里㊣42揭^供預混合處理氣體之前預 混合處理氣體。氣體分佈器72包含面板74,面板74具 有孔76,孔76允許處理氣體穿過其中。通常,面板74 由金屬製成,以允許在面板γ4上施加電壓或電位,藉此 用作腔至40十之處理電極44a。合適的面板74可由具有 陽極化塗層之鋁製成。 基板處理室40亦包含第一氣體供應器80a及第二氣體 供應器80b,以向氣體分佈器72傳送第一處理氣體及第 一處理氣體’氣體供應器8〇a、8〇b各自包含氣源82a、 82b、一或更多氣體導管84&amp;、8朴及一或更多氣閥“a、 86b。例如,在一個變型中,第一氣體供應器包含第 一氣體導官84a及第一氣閥86a,以將第一處理氣體自第 一軋源82a傳送至氣體分佈器72之第一入口 78a ;而第 一氣體供應器80b包含第二氣體導管84b及第二氣閥 86b,以將第二處理氣體自第二氣源8孔傳送至氣體分佈 器72之第二入口 78b。 可错由將電磁能(例如,高頻電壓能量)耦合至處理 氣體來供給處理氣體能量,以自處理氣體形成電漿。為 供給第一處理氣體能量,在(1)第一處理電極4物與(2)支 芽件58中之第一處理電極斗朴之間施加電壓,第一處理 電極44a可為氣體分佈器72、頂板52或側壁μ。施加 17 201230305 在該對處理電極44a、44b上的電壓將能量電容輕人γ 理區4”之處理氣體。通常’向處理電極…、:4= 加之電壓為交流電壓,該交流電壓以射頻振盪。通常, 射頻覆蓋約3 kHz至約300 GHz之範圍。為達成本申請 案之目的,低射頻為小於約1 MHz之彼等射頻,且更= 為約100 KHz至1 MHz之射頻,諸如約3〇〇 KHz之頻率。 另外,為達成本申請案之目的,高射頻為約3 MHz至約 6〇MHz之彼等射頻,且更佳為約13 56 MHz之射頻。以 約㈣至約1000 W之功率位準向處理電極…施加選 定射頻電Μ ’而處理電極44b⑨常接地。然❿,所使用 之特定射頻範圍及所施加電壓之功率位準取決於待沈積 之材料類型。 腔室40亦包含排氣裝置9〇’以自腔室4〇移除廢棄的 處理氣體及副產物且在處理區42中維持處理氣體之預定 壓力。在-個變型中,排氣裝4 9〇包括系送槽道%,栗 j槽道92自處理區42接收廢棄的處理氣體,·排氣口从 即抓閥96,及-或更多排氣系%,以控制腔室中之 處理氣體的壓力。排氣泵98可包括洞輪分子系、低溫泵、 粗抽栗及組合功能以之—或更多者,組合功能栗具有 大於-個功能。腔室40亦可包含貫穿腔室4〇之底壁% (未圖示)’以將淨化氣體傳送至腔室 4〇:。通常,淨化氣體自入口埠向上流過基板支撐件以 =環形栗送槽道。在處理期間,淨化氣體用以保護 土沒件58及其他腔室部件之表面免受不當的沈積。 18 201230305 淨化氣體亦可用以影響處理氣體以合意的方式流動。 亦乂供控制器102來控制腔室4〇之操作及操作參數。 控制器102可为冬私„ — 處理器及記憶體。處理器執行腔 軟體’諸如儲存於記憶體中之電腦程式。記憶體 可為硬磁碟驅動機、唯讀記憶體、快閃記憶體或其他類 型之記憶體。枯岳丨丨哭】Μ 士 制1§ 102亦可包含其他部件,諸如軟式 磁碟驅動機及插卡框架。插卡框架可含有單板電腦、類 比及數位輸入/輸出板、介面板及步進馬達控制器板。腔 室控制軟體包括指令集,該等指令集指定特定製程之時 序、氣體混合物、腔宮·愿六 Μ — 一 胫至Μ力、腔室溫度、微波功率位準、 高頻功率位準、支撐位置及其他參數。 腔室40亦包含電源供應器1〇4,以將功率傳送至各種 腔至4件’諸如腔室中之第_處理電⑬仏及基板支樓 件58中之第二處理電極44b。為將功率傳送至處理電極 44a 44b,電源供應器1〇4包含射頻電壓源,該射頻電 壓源提供電麼,言玄電麼具有選定射頻及所I的可選功率 位準。電源供應器1 〇4可包括單個射頻電壓源或多個電 壓源,該等電壓源提供高射頻與低射頻兩者。電源供應 器104亦可包括RF匹配電路。電源供應器1〇4可進一步 包含靜電充電源,以向電極44a、44b提供靜電電荷,該 靜電充電源通常為基板支撐件58中之靜電夾盤。當在基 板支撐件58内使用加熱器68時,電源供應器1〇4亦包 括加熱器功率源,該加熱器功率源向加熱器6 8提供適當 的可控電壓。當將向氣體分佈器72或基板支撐件58施 19 201230305 加DC偏壓時,電源供應器104亦包括DC偏壓源,該 DC偏壓源連接至氣體分佈器72之面板74之導電金屬部 分。電源供應器1 04亦可包括用於其他腔室40部件(例 如,腔室之馬達及機器人)之功率源。 在沈積製程期間,基板110之溫度可在1 〇(TC、200它 及300°C之間變化。使用溫度感測器(未圖示)量測溫度, 以偵測腔室40内之基板支撐件58之溫度,溫度感測器 諸如熱電偶或干涉儀。溫度感測器能夠將溫度感測器之 資料中繼至腔室控制器1 〇2,隨後,腔室控制器1 〇2可使 用溫度資料’例如藉由控制基板支撐件58中之電阻式加 熱元件來控制處理腔室40之溫度。 現將描述示例性沈積製程及/或一系列沈積製程。在該 等製程中,將基板110置放於腔室40之處理區42中, 基板110具有已沈積的第一電極112a。如上所述,可藉 由習知PVD製程或CVD製程,在該腔室或其他裝置中 沈積第一電極U2a。最初且視情況,處理第一電極u2a 之表面,以形成黏附層丨丨4,以使無定形碳層1 2〇可沈積 於第電極U2a上方。在一個變型中,黏附層114包含 單層或更多層之氧及’或氮原子,該單層或更多層之氧及 。或氮原子形成於無定形碳層丄2〇之上。例如,黏附層丄丄4 :為最夕約5單層厚度之連續或不連續層,該連續或不 \、·· β可_有小於約丨〇埃之厚度。具有黏附促進材料之 門银層U2a表面之平均飽和度可在約5〇%與約1〇〇%之 間變化’諸如在約75%與約麵之㈤(例如,約鄉或 20 201230305 大於約98%)。在—個變型中,將氮添加至電極u2a之 金屬表面,以藉由將基板110暴露於含氮氣體而形成富 氮表面。可藉由將電感式或電容式電場耦合至處理區42 中,使含氮氣體在腔室40中游離化。可藉由對基板11〇 施加偏壓,促進藉此形成的含氮離子沈積於第一電極 U2a之表面上或對第一電極U2a之表面撞擊。含氮離子 佔據第-電極112&amp;表面上之吸附點,而—些含氮離子嵌 入或佈植於第-電極112a表面中,此取決於基板ιι〇之 偏壓能量。弱偏壓(諸如,在小於約5〇〇瓦特之功率位 準下,均方根值介於約100V與約5〇〇v之間的rf偏壓) 可用於使用含氮離子之淺表面處理。在―些實施例中, 含氮離子可沈積於第—電極仙之表面上,達到小於約 5單層之平均深度。在其他實施例中,含氮離子可沈積達 到小於約1 〇埃之平均深度。 在一個實施例中,藉由將表面暴露於含氮的電漿,可 氮添力至第電極112a之表面。含氮氣體混合物經由 氣體分佈器72提供至處理腔室4〇,且基板11〇安置於處 理區42内之基板支撐件58上。基板切件58、氣體分 =72或基板切件58及氣體分佈器72兩者難至電 月匕源,該電能源可為經由阻抗匹配電路提供之、脈衝 DC或RF能量。電能使含氮氣體混合物游離化成電衆, 該電漿與第一電極&quot;2a之表面互動。含氮氣體混合物可 包含氮氣(n2)、氨⑽3)、氧化亞氮⑽2)或聯氨⑻叫, 且該含氮氣體混合物可進-步包括含碳氣體,諸如甲烷 21 201230305 (ch4)、乙烷(c2h6)、乙烯(c2h4)或乙炔(c2h2)。含氮氣體 混合物中包括碳可能對電阻層包含無定形碳或摻雜無定 形碳之實施例有利。通常,以約1 0 seem與約1 〇,〇〇〇 sccm 之間’諸如約500 seem與約8,500 seem之間(例如,約 7,500 sccm 與約 8,500 sccm 之間),或者約 3 5〇〇 sccm 與 約 4,500 seem 之間、約 l,5〇〇 seem 與約 2,500 seem 之間, 或者約500 seem與約1,5〇〇 sccm之間的流速向處理腔室 提供含氮氣體混合物。可藉由暴露時間,或藉由含氮物 質與不含氮物質或含氮物質與總氣體混合物之容積比來 控制黏附,該暴露時間可影響含氮第一電極丨丨2a層之表 面飽和度。 在一個實施例中,藉由暴露於氣體混合物來處理含鎢 的電極112a ’該氣體混合物包含氮氣及乙炔(匸出2), 其中N2/C2H2之容積比為約1:1與約40:1之間,諸如約 1.1與約20:1之間,或約2〇:1與約4〇:1之間,或約u 與約5:1之間,或約5:1與約1〇:1之間,或約10:1與約 2〇:1之間’或,約2〇:1與$㈣之間。電浆產生功率提供 為約1,〇〇〇瓦特與約5,_瓦特之間,諸如約⑽瓦特 與約3,〇〇〇瓦特之間。暴露於此類狀態之時間為約1〇秒 與約500秒之間,諸如約5()秒與約謂秒之間(例如, 、’勺100㈣約2GG秒之間),從而改良含碳層與鶴表面之 曰附在個實把例中,以8,〇〇〇 之流速向腔室 提供氮氣且以2〇0 _之流速提供乙炔氣體,並且在400 C之溫度下且在毫托之壓力下一瓦特施加電 22 201230305 漿功率長達40秒,以產生處理後的鎢表面,該處理後的 鎢表面可與碳電阻層較好地黏附。 然後’無定形碳層120在沈積可選的黏附層114之後 沈積於基板110上或直接沈積於第一電極112&amp;上,或者 無定形碳層120沈積於其他介入層上方。在第3圖中圖 示用於沈積無定形碳層120之製程的示例性實施例。藉 由控制引入至處理區42中之處理氣體之壓力,將腔室40 之處理區42維持於真空下。將基板11〇置放於處理區42 中之基板支撐件58上,且將基板支撐件58加熱至所要 的沈積溫度。合適的沈積溫度範圍為約100°C至約400〇c » 在將基板110置放於處理區42中之前或在將基板110 置放於處理區42中之後,將處理氣體引入至腔室40中, 該處理氣體包含稀釋氣體及含碳氣體。含碳氣體為待沈 積之無定形碳層120提供碳。含碳氣體可包括(但不限 於)一或更多含碳氣體,諸如CxHy,其中X為1至1〇 且y為2至3 0。例如’含碳氣體可包括(但不限於)氣 體’諸如 CH4、C2H2、c2h4、C2H6、C3H4、C3H6、C3H8、 C4H10或上述混合物。含碳氣體亦可為三乙胺,乃至 CxHyNz ’其中X為1至i〇,y為2至30且z為1至10。 在另一個實施例中,處理氣體包括含碳氣體,該含碳氣 體缺少氧以避免氧化環境,該氧化環境會燒毀沈積後的 碳層120。在一個變型十,以約2〇〇 seem至約3000 seem 乃至約200 seem至約1000 sccrn之容積流速提供含碳氣 體。 23 201230305 處理氣體進一步包含稀釋氣體,該稀釋氣體為沈積後 的無定形碳層120提供橫跨基板110之更好的薄膜厚度 均勻性。例如,經由增加氣體分子之碰撞或藉由橫跨腔 室40輸送含碳氣體分子,稀釋氣體可提供大量經過供給 能量之氣體離子。合適的稀釋氣體包括(但不限於)氯、 氦、氫或氮或上述混合物中之一或更多者。在—個變型 中,以約 100 seem 至約 1〇,〇〇〇 Sccm,乃至約 2〇〇 sccm 至約5000 seem ’乃至約300 seem至約3000 sccm之、.宁 速,提供稀釋氣體。 在該等變型中之任何變型中,藉由向環繞處理區Ο之 處理電極44a、44b施加RF (或射頻)能量之電壓或電 流,對處理區42中之處理氣體供給能量。處理電極々々a、 料可間隔開約c 離。在一個變型中,在約5〇瓦特至約2〇〇〇瓦特之功 位準下,以第—頻率向處理電極44a、44b施加第_ ] 功率。第-RF功率可為例如約13 5 MHz之頻率。藉 將電功率施加至支標餘11G之基板切件π,將^ 犯功率直接施加至基板u〇e可以第二頻率施加第二】 功率,第二頻率低於第一頻率;例如,第二頻率可小於 MHz。在一個變型中’第二RF功率為約100瓦特至 Π瓦特之功率位準。藉由組合不同…力4率 J衆供:能量1而可控制薄膜密度及調執 足性之硬度。 联…' 在沈積製程期間 將處理區42維持_ 於約50°C至約650 24 201230305 °C乃至100°C至約30(TC之溫度下。據發現,處理溫度升 高且控制沈積薄膜中之碟與氫之原子百分比比率β例 如,在550°C之溫度下形成無定形碳層丨2〇會提供小於 20%之氫含量。 使用該等沈積製程來沈積之無定形碳層12〇,可取決於 應用來形成該無定形碳層120的厚度。在一個實施例中, 無定形碳層120沈積達到約50埃至約1000埃乃至約5〇 埃至約3 00埃之厚度。 實例 以下說明性實例證明瞭本文所述之記憶體單元ι〇〇及 沈積製程的有效性及優點。參閱該等說明性實例,將可 以更好地理解本文所述之記憶體單元1〇〇及方法。然而 應理解,纟文所述之每—特徵結構彳單獨使用或彼此結 合使用,而不是僅如特定實例中所述。 根據處理條件,量測沈積後的 質。在表1中所示處理條件下 在該等說明性實例中, 無定形碳層120之各種性 處理該等樣品。 表1Suitable adhesive layers 114 &amp; 11414 are described in commonly assigned U.S. Patent Application Serial No. 12/61,948, the entire disclosure of which is incorporated herein by reference. The resistance switching element 106 is formed over the first electrode 丨丨 2a or the adhesion layer 丨丨 4a or directly on the first electrode 112a or the adhesion layer U4a. Above the J, there may be one or more intervening layers, and "directly on" means above the lower layer and in direct physical contact with the lower layer. In any of these variations, the variable resistance switching element 1〇6 is in electrical contact with the lower first electrode 112a. In an exemplary embodiment, the resistance switching element 106 includes at least one resistance switching material 118 that is in a set transition controlled by a set stimulation signal (such as a set current, a set or programmed voltage, or a set or programmed pulse). The switching material 118 can transition from a higher resistivity state or a resistance value to a lower resistivity state or resistance value. The reverse transition from the lower resistivity state to the higher resistivity state is referred to as the reset transition, which is affected by the reset current, the reset voltage, or the reset pulse, resetting the current, resetting the voltage, or The repetition of the pulse causes the resistance switching element 1 〇6 to be in an unprogrammed state. In an exemplary embodiment, the resistance switching material U8 comprises or consists essentially of an amorphous carbon layer 120. The amorphous carbon layer 120 may contain a non-lengthed amorphous material, microcrystalline carbon glassy carbon, graphene, or even carbon nanotubes, and the carbon nanotubes are single-walled nanotubes and multi-layered nanotubes. Or a mixture of single-walled nanotubes and multi-layered wall nanotubes 10 201230305. The amorphous carbon layer 120 may also include other halogens such as hydrogen, nitrogen or oxygen. In one variation, the thickness of the 疋-shaped carbon layer 120 is from about 1 〇〇 to about 1000 Å, or from 曼 》 to 々 100 Å to about 500 Å (for example, about 300 Å) ° in another In one embodiment, the layer resistance ("〇/口" or "ohm/square") of the amorphous carbon layer 120 is about Ω7 Ω/□ to about 1 χ1 for a layer having a thickness of about 2000 angstroms. 8ω/□. Although the resistance switching element 1 〇 6 includes a resistor cut Μ # 换 枓 and the resistance switching material 118 is an amorphous carbon layer 12G as shown, the resistance switching element 1 () 6 may be entirely composed of other materials or include other A combination of materials or layers. For example, other suitable resistance switching materials may include oxidized town or hydrocarbon materials, and other suitable resistive switching materials may be used alone or in combination with the amorphous carbon layer 12A. Further, the resistance switching material may include other elements such as helium, nitrogen and hydrogen, and other elements are usually present in the amorphous carbon material. Further, as the case may be, the second adhesive layer U4b may be formed on the surface of the resistance switching material 118. The second adhesion layer U4b facilitates bonding between the resistance switching material ι8 and the overlying layer (such as the second electrode 112b), and the second adhesion layer 114b can also be used to electrically isolate the memory cell 1 and the substrate 11A. The second adhesive layer 114b and the first adhesive layer U4a may have the same material, such as a metal nitride (such as titanium nitride) layer. By depositing a layer of conductive material on the substrate 110, forming a second electrode 112be over the resistance switching material 118, the second electrode U2b may be made of the same conductive material as the conductive material of the first electrode 112a, and by the same deposition process Or a different deposition process to deposit the second electrode U2b. A chemical mechanical polishing (CMP) step may be performed to smooth or flatten the conductive material. The second electrode 112b is also formed of a conductive material. The conductive material comprises elemental metal, such as Ming, Tong, or Crane: Other materials such as tungsten telluride or tungsten nitride may also be used. Tan. In use, by reversibly switching the resistivity of the resistance switching material i 18, switching between two or more resistance states, the memory cell 1 can be operated as a programmable or rewritable memory. element. For example, after fabrication, the resistive switching material 118 can be in an initial low resistivity state, after the first predetermined voltage or current is applied, the initial low resistivity bear switches to a high resistivity state and is applying a second voltage or After the current, the high resistivity state returns to the low resistivity state. Alternatively, after fabrication, the resistive switching material shawl 118 may be in an initial high resistance state, and the initial high resistance state may be reversibly switched to a low resistance state after application of the second predetermined voltage or current. Therefore, during the operation of the memory unit 100, one resistance state may indicate a "off" state such as a binary "〇", and another resistance state may indicate an "on" state, such as a binary "^", but may be used Greater than two data/resistance states. In a variation, in the "on state", the resistivity switching material 118 has a resistivity of less than 10 ohm centimeters, and is, for example, about 0.001 ohm-cm to about 10 ohm-cm; and in the "closed j state, the resistance is switched. The material 丨丨8 has a resistivity of at least 3 ohm-cm, for example, about 200 ohm-cm to about 1 ohm ohm. The second embodiment of the memory cell 1 图示 is illustrated in FIG. 1B. In an embodiment, the isolation layer 124 is deposited on the substrate 11 to electrically isolate the memory cell 1 and the substrate 1 1 . The isolation layer i 24 can also be used as an adhesion layer, and the adhesion layer promotes the upper cladding layer and the substrate 11 . Bonding between turns. Isolation 12 201230305 Layer 124 can be, for example, an insulator such as tantalum oxide, tantalum nitride, hafnium oxynitride or other insulating material. Conductive address line 126 is used as a memory cell 1 or a plurality of memories The interconnecting wires of the body cells form a memory array (not shown). The conductive address lines 126 are fabricated by depositing a conductive material onto the substrate 11 , the conductive material such as for the first electrode ma and Second electrode 112b The above materials, and the conductive address lines 126 are deposited by the same process. In one variation, the address lines 126 comprise tungsten having a thickness of from about 200 angstroms to about 2000 angstroms. The insulator layer 1 28 is above the address lines 126. To prevent atoms of the conductive material from diffusing or migrating from the address line 12 6 or other such layers. For example, the insulator layer 128 can be, for example, a dielectric material such as nitridant (si3N4); a low dielectric constant material such as from Black DiamondTM of Applied Materials in Santa Clara, Calif.; or insulating glass, such as tetraethoxyorthosilicate (TEOS) deposited oxidized stone. Such layers can be deposited by conventional CVD methods or PVD methods, and will Such a layer layout pattern is formed by using a lithography method and an etching method. In this modification, a layer of a conductive material is formed over the via 130 and the insulator layer 128, and then ground or etched away to be deposited on the via 丨3 〇 In addition to the excess conductive material, a first electrode 112a is formed in the via 13 中 in the insulator layer 128. A resistance switching element 1 〇6 is formed over the first electrode 112a. A resistance switching element 1 〇6 may be formed on the first electrode 112a to be in electrical contact with the first electrode 112a. As described above, the resistance switching element 106 includes 13 201230305 amorphous carbon layer 120. The amorphous carbon layer 120 and the above modification Having the same properties, and depositing the amorphous carbon layer 120° using the same method as the above-described modification 120° As described above, the second electrode 112b is formed over the amorphous carbon layer 12A of the resistance switching element 106. In operation, it is believed that After the adjustment voltage is applied, the metal ions are diffused from the first electrode 1 2a or the second electrode ii 2b into the non-疋1% layer 120 to form a conduction channel in the carbon layer 120. For example, it is believed that upon application of a voltage, metal ions enter the amorphous carbon layer 120 and donate electrons to the carbon-carbon double bond between the sp2 hybridized carbon atoms, such that the sp2 hybridized carbon atoms are sp3 hybridized. A conductive channel is formed between the carbon atoms. Subsequent application of the write voltage reverses the process to program the amorphous carbon layer 120 into a lower resistance state, the energy of the subsequently applied write voltage being lower than the energy of the regulated voltage. In yet another embodiment, the memory unit 1 includes a control element 134, such as a transistor or a diode, and the control element 134 operates in conjunction with the resistance switching element 106. The first lc diagram illustrates the memory unit 1A, the memory unit 100 includes a control element 134, and the control element 134 is a semiconductor diode 136. The semiconductor diode 136 includes a bottom-doped 1 m, a native region 142, and a top p-type doped region 144. The intrinsic region 142 can have a low concentration of P-type or n-type dopants that can be implanted into the region or the p-type or cardioid dopants can be separately The p-type doped (tetra) 144 is diffused into the region from the adjacent ^-doped region 140. Alternative or opposite directions may also be used (e.g., castor L, for example, P-type doped region ratio at the bottom). Further, the resistance switching element 1〇6 can be positioned below the second 201230305. The resistance switching element 丨〇6 is used as a memory storage element. The diode 136 can be made of conventional semiconductor materials such as tantalum, niobium or tantalum-niobium alloys in single crystal or polycrystalline form. The diode 136 and the resistance switching element 106 are positioned between the first electrode 112a and the second electrode 112b. The resistance switching element 丨〇6 includes an amorphous carbon layer 丨2〇. An adhesion layer and an isolation layer may also be included above or below the electrodes 112a, 112b. The memory cell 1 is in a different data state by a series of different forward voltage biases. The current flowing through any of the different data states is different from the memory cell 1 〇 任何 between any other different data states so that the difference between the states can be easily detected. In one embodiment, a chemical vapor deposition (CVD) process, such as a plasma-enhanced chemiCal vapor deposition (PECVD) process, is used to deposit the amorphous carbon layer. However, it will be apparent to those skilled in the art that the amorphous carbon layer 120 can be formed by other deposition processes. For example, the amorphous carbon layer 120 can also be deposited by, for example, but not limited to, PVD sputter deposition from a target, a thermal CVD process, and other methods. As shown in FIG. 2, a suitable plasma assisted chemical vapor deposition (PECVD) chamber 40 includes a surrounding wall 48 that includes a top plate 52, a side wall 54 and a bottom wall 56 that surrounds the processing zone 42. The chamber 40 can also include a liner (not shown) that serves as a liner surrounding at least a portion of the perimeter wall 48 of the treatment zone 42. The volume of chamber 40 is typically about 2 Torr, 〇〇〇 cm3 to about 3 〇, 〇〇〇 cm3, and more typically about 24,0 〇〇 cm3, for processing 3 〇〇 claw 矽 wafers. In one variation, the chamber 4 is a pr〇ducer® SE chamber from Applied Materials, Santa Clara, Calif., 2012. During processing, the substrate support 58 is lowered and the substrate transport member 64 (e.g., robotic arm) causes the substrate 11 to pass through the inlet port 62 and rest on the branch member 58. The substrate support 58 is movable between a lower position for handling and an adjustable higher position for handling the substrate 110. The substrate support 58 can include a closed process electrode 44b to produce a plasma from the process gas that is introduced into the chamber 40. Substrate support 58 may be heated by heater 68, which may be an electrically resistive heating element (as shown) 'heating lamp (not shown) or plasma itself. Typically, the substrate support 58 comprises a ceramic structure having a receiving surface to receive the substrate no, and the ceramic structure protects the processing electrode 44b and the heater 68 from the effects of the chamber environment. In use, a radio frequency (RF) voltage is applied to the processing electrode 4, and a direct current (DC) voltage is applied to the heater 68. The processing electrode 44b in the substrate support 58 can also be used to electrostatically sandwich the substrate 11 and the support member. The substrate support 58 can also include one or more rings (not shown) that at least partially surround the perimeter of the substrate 11 on the support member 58. After loading the substrate 11G onto the fulcrum member 58, the fulcrum member 58 is raised to a processing position that is closer to the gas distributor 72 to provide the desired spacing between the substrate 110 and the gas distributor 72. Distance ds. Suitable spacing distances are from about 200 mils to about 1000 mils (or from about 0.5 cm to about 2.5 cm). A gas distributor 72 is positioned above the processing zone 42 to evenly distribute the process gas across the base i1(). The gas distribution 201230305 can deliver two separate streams of the first process gas and the second process gas to the processing zone 42, respectively, without mixing prior to introducing the first process gas stream and the second process gas stream into the process zone 42. The gas stream, or gas distributor 72, may premix the process gas before it is pre-mixed with the process gas. Gas distributor 72 includes a face plate 74 having a bore 76 that allows process gas to pass therethrough. Typically, the faceplate 74 is made of metal to allow a voltage or potential to be applied across the faceplate γ4, thereby acting as a cavity to 40 of the process electrode 44a. A suitable panel 74 can be made of aluminum having an anodized coating. The substrate processing chamber 40 also includes a first gas supply 80a and a second gas supply 80b for conveying the first process gas and the first process gas 'gas supply 8a, 8b' to the gas distributor 72. Sources 82a, 82b, one or more gas conduits 84&amp;, 8 and one or more gas valves "a, 86b. For example, in one variation, the first gas supply includes first gas director 84a and first a gas valve 86a to transfer the first process gas from the first mill source 82a to the first inlet 78a of the gas distributor 72; and the first gas supply 80b includes a second gas conduit 84b and a second gas valve 86b to The second process gas is transferred from the second gas source 8 to the second inlet 78b of the gas distributor 72. The electromagnetic energy (eg, high frequency voltage energy) can be coupled to the process gas to supply the process gas energy for self-treatment. The gas forms a plasma. To supply the first process gas energy, a voltage is applied between (1) the first processing electrode 4 and (2) the first processing electrode in the branching member 58. The first processing electrode 44a may Apply 1 to the gas distributor 72, the top plate 52 or the side wall μ. 7 201230305 The voltage on the pair of processing electrodes 44a, 44b will be the processing gas of the energy capacitor lighter. Usually, the 'process electrode...,: 4 = voltage is an alternating voltage, and the alternating voltage oscillates at a radio frequency. Typically, RF coverage ranges from about 3 kHz to about 300 GHz. For the purposes of this application, low radio frequencies are less than about 1 MHz of their radio frequencies, and more = radio frequencies of about 100 KHz to 1 MHz, such as frequencies of about 3 〇〇 KHz. In addition, for the purposes of this application, high radio frequencies are from about 3 MHz to about 6 〇 MHz, and more preferably about 13 56 MHz. The selected RF electrode is applied to the processing electrode ... at a power level of about (4) to about 1000 W, and the processing electrode 44b9 is often grounded. The particular RF range used and the power level of the applied voltage will then depend on the type of material being deposited. The chamber 40 also includes an exhaust device 9' to remove waste process gases and by-products from the chamber 4 and maintain a predetermined pressure of the process gas in the treatment zone 42. In one variation, the venting port 49 includes a wicking channel %, the pumping channel 92 receives the spent process gas from the processing zone 42, the venting port is from the grab valve 96, and/or more rows The gas system is % to control the pressure of the process gas in the chamber. The exhaust pump 98 may include a cave wheel molecular system, a cryopump, a coarse pumping, and a combined function - or more, the combined function having a function greater than -. The chamber 40 may also include a bottom wall % (not shown) through the chamber 4 to deliver purge gas to the chamber 4:. Typically, the purge gas flows upwardly from the inlet port through the substrate support to the = ring channel. The purge gas is used to protect the surfaces of the soil components 58 and other chamber components from improper deposition during processing. 18 201230305 Purified gases can also be used to influence the processing gas to flow in a desirable manner. The controller 102 is also used to control the operation and operating parameters of the chamber 4. The controller 102 can be a winter computer - a processor and a memory. The processor executes a cavity software such as a computer program stored in a memory. The memory can be a hard disk drive, a read only memory, or a flash memory. Or other types of memory. 枯岳丨丨哭】Μ士1§ 102 can also contain other components, such as floppy disk drive and card frame. Card frame can contain single board computer, analog and digital input / Output board, interface panel and stepper motor controller board. The chamber control software includes a set of instructions that specify the timing of the specific process, the gas mixture, the cavity, and the chamber temperature. , microwave power level, high frequency power level, support position and other parameters. The chamber 40 also includes a power supply 1 〇 4 to transfer power to various chambers to 4 pieces, such as the first processing power in the chamber 13仏 and the second processing electrode 44b of the substrate support member 58. In order to transmit power to the processing electrode 44a 44b, the power supply device 〇4 includes a radio frequency voltage source, and the radio frequency voltage source provides electricity, Selected radio frequency The optional power level of I. The power supply 1 〇 4 may include a single RF voltage source or a plurality of voltage sources that provide both high RF and low RF. The power supply 104 may also include an RF matching circuit. The power supply 1 4 may further include an electrostatic charging source to provide an electrostatic charge to the electrodes 44a, 44b, which is typically an electrostatic chuck in the substrate support 58. When a heater is used within the substrate support 58 At 68 o'clock, the power supply 1 4 also includes a heater power source that provides a suitable controllable voltage to the heater 68. When the gas distributor 72 or the substrate support 58 is applied 19 201230305 plus DC When biased, the power supply 104 also includes a DC bias source coupled to the conductive metal portion of the panel 74 of the gas distributor 72. The power supply 104 can also include components for other chambers 40 ( For example, the power source of the motor and the robot of the chamber. During the deposition process, the temperature of the substrate 110 can vary between 1 〇 (TC, 200 and 300 ° C. Using a temperature sensor (not shown) Measure temperature to detect The temperature of the substrate support 58 in the chamber 40, a temperature sensor such as a thermocouple or an interferometer. The temperature sensor can relay the data of the temperature sensor to the chamber controller 1 〇 2, and then the chamber The controller 1 〇 2 can control the temperature of the processing chamber 40 using temperature data 'e.g., by controlling the resistive heating elements in the substrate support 58. An exemplary deposition process and/or a series of deposition processes will now be described. In the process, the substrate 110 is placed in the processing region 42 of the chamber 40, and the substrate 110 has the deposited first electrode 112a. As described above, the PVD process or the CVD process can be used in the chamber or The first electrode U2a is deposited in other devices. Initially and optionally, the surface of the first electrode u2a is treated to form an adhesion layer 丨丨4 such that the amorphous carbon layer 12 2 〇 can be deposited over the first electrode U2a. In one variation, the adhesion layer 114 comprises a single or more layers of oxygen and &apos; or a nitrogen atom, the single or more layers of oxygen and . Or a nitrogen atom is formed on the amorphous carbon layer 丄2〇. For example, the adhesion layer 丄丄4 is a continuous or discontinuous layer having a thickness of about 5 single layers, which may have a thickness of less than about 丨〇. The average saturation of the surface of the silver layer U2a having the adhesion promoting material may vary between about 5% and about 1%, such as at about 75% and about (5) (eg, about township or 20 201230305 is greater than about 98%). In a variation, nitrogen is added to the metal surface of the electrode u2a to form a nitrogen-rich surface by exposing the substrate 110 to a nitrogen-containing gas. The nitrogen-containing gas can be freed in the chamber 40 by coupling an inductive or capacitive electric field into the processing zone 42. The nitrogen-containing ions thus formed can be promoted to deposit on the surface of the first electrode U2a or to strike the surface of the first electrode U2a by applying a bias voltage to the substrate 11?. The nitrogen-containing ions occupy the adsorption sites on the surface of the first electrode 112 &amp; and some nitrogen-containing ions are embedded or implanted in the surface of the first electrode 112a depending on the bias energy of the substrate. Weak bias (such as rf bias with a rms value between about 100V and about 5〇〇v at power levels less than about 5 watts) can be used for shallow surface treatment with nitrogen-containing ions . In some embodiments, nitrogen-containing ions may be deposited on the surface of the first electrode to an average depth of less than about 5 monolayers. In other embodiments, the nitrogen containing ions can be deposited to an average depth of less than about 1 〇. In one embodiment, nitrogen is added to the surface of the first electrode 112a by exposing the surface to a nitrogen-containing plasma. The nitrogen-containing gas mixture is supplied to the processing chamber 4 via the gas distributor 72, and the substrate 11 is placed on the substrate support 58 in the processing zone 42. The substrate cut-off 58, gas fraction = 72 or substrate cut-off 58 and gas distributor 72 are difficult to source, and the electrical energy source can be pulsed DC or RF energy provided via an impedance matching circuit. The electricity is capable of dissociating the nitrogen-containing gas mixture into electricity, and the plasma interacts with the surface of the first electrode &quot;2a. The nitrogen-containing gas mixture may comprise nitrogen (n2), ammonia (10) 3), nitrous oxide (10) 2) or hydrazine (8), and the nitrogen-containing gas mixture may further comprise a carbon-containing gas such as methane 21 201230305 (ch4), Alkane (c2h6), ethylene (c2h4) or acetylene (c2h2). The inclusion of carbon in the nitrogen-containing gas mixture may be advantageous for embodiments in which the resistive layer comprises amorphous carbon or doped amorphous carbon. Typically, between about 10 seem and about 1 〇, 〇〇〇sccm 'such as between about 500 seem and about 8,500 seem (eg, between about 7,500 sccm and about 8,500 sccm), or about 35 〇〇sccm A nitrogen-containing gas mixture is supplied to the processing chamber at a flow rate between about 4,500 seem, about 1,5 〇〇 seem and about 2,500 seem, or between about 500 seem and about 1,5 〇〇 sccm. Adhesion can be controlled by exposure time, or by the volume ratio of nitrogen-containing material to nitrogen-free or nitrogen-containing material to total gas mixture, which can affect the surface saturation of the nitrogen-containing first electrode 丨丨2a layer . In one embodiment, the tungsten-containing electrode 112a is treated by exposure to a gas mixture. The gas mixture comprises nitrogen and acetylene (2), wherein the volume ratio of N2/C2H2 is about 1:1 and about 40:1. Between, for example, between about 1.1 and about 20:1, or between about 2:1 and about 4:1, or between about 5 and about 5:1, or about 5:1 and about 1〇: Between 1 or between about 10:1 and about 2〇:1 'or, between about 2:1 and $(four). The plasma generating power is provided between about 1, watts and about 5, watts, such as between about (10) watts and about 3, watts. The time of exposure to such a state is between about 1 second and about 500 seconds, such as between about 5 () seconds and about seconds (eg, 'spoon 100 (four) between about 2 GG seconds), thereby improving the carbonaceous layer Attached to the surface of the crane is attached to a real example, supplying nitrogen gas to the chamber at a flow rate of 8, and supplying acetylene gas at a flow rate of 2 〇0 _, and at a temperature of 400 C and at the millitorr The next watt of applied electricity 22 201230305 pulp power for up to 40 seconds to produce a treated tungsten surface, the treated tungsten surface can adhere well to the carbon resistive layer. The amorphous carbon layer 120 is then deposited on the substrate 110 after deposition of the optional adhesion layer 114 or deposited directly onto the first electrode 112&amp; or the amorphous carbon layer 120 is deposited over the other intervening layers. An exemplary embodiment of a process for depositing an amorphous carbon layer 120 is illustrated in FIG. The processing zone 42 of the chamber 40 is maintained under vacuum by controlling the pressure of the process gas introduced into the processing zone 42. The substrate 11 is placed on the substrate support 58 in the processing zone 42 and the substrate support 58 is heated to the desired deposition temperature. A suitable deposition temperature ranges from about 100 ° C to about 400 ° C. » The processing gas is introduced into the chamber 40 before the substrate 110 is placed in the processing zone 42 or after the substrate 110 is placed in the processing zone 42. The processing gas contains a diluent gas and a carbon-containing gas. The carbonaceous gas provides carbon to the amorphous carbon layer 120 to be deposited. The carbonaceous gas may include, but is not limited to, one or more carbonaceous gases, such as CxHy, where X is from 1 to 1 Torr and y is from 2 to 30. For example, the carbon-containing gas may include, but is not limited to, a gas such as CH4, C2H2, c2h4, C2H6, C3H4, C3H6, C3H8, C4H10 or a mixture of the above. The carbonaceous gas may also be triethylamine, or even CxHyNz' wherein X is 1 to i 〇, y is 2 to 30 and z is 1 to 10. In another embodiment, the process gas comprises a carbon-containing gas that lacks oxygen to avoid an oxidizing environment that burns the deposited carbon layer 120. In a variant ten, a carbonaceous gas is supplied at a volumetric flow rate of from about 2 〇〇 seem to about 3000 seem or even from about 200 seem to about 1000 sccrn. 23 201230305 The process gas further includes a diluent gas that provides a better film thickness uniformity across the substrate 110 for the deposited amorphous carbon layer 120. For example, the diluent gas can provide a large amount of gas ions that are supplied with energy by increasing the collision of gas molecules or by transporting carbon-containing gas molecules across the chamber 40. Suitable diluent gases include, but are not limited to, chlorine, hydrazine, hydrogen or nitrogen or one or more of the foregoing. In a variation, a dilution gas is provided at a rate of from about 100 seem to about 1 Torr, 〇〇〇 Sccm, or even about 2 〇〇 sccm to about 5000 seem' or even about 300 seem to about 3000 sccm. In any of these variations, the processing gas in the processing zone 42 is energized by applying a voltage or current of RF (or radio frequency) energy to the processing electrodes 44a, 44b surrounding the processing zone. The electrode 々々a and the material may be separated by about c. In one variation, the first power is applied to the processing electrodes 44a, 44b at a first frequency at a work level of from about 5 watts to about 2 watts. The first-RF power can be, for example, a frequency of about 13 5 MHz. By applying electric power to the substrate cutting member π of the remaining 11G, the power is directly applied to the substrate u〇e, and the second frequency can be applied to the second frequency; the second frequency is lower than the first frequency; for example, the second frequency Can be less than MHz. In a variant, the second RF power is a power level of about 100 watts to watts. By combining different...force 4 rate J public supply: energy 1 can control the film density and adjust the hardness of the foot. The treatment zone 42 is maintained during the deposition process from about 50 ° C to about 650 24 201230305 ° C or even 100 ° C to about 30 ° C. It has been found that the treatment temperature is elevated and the deposited film is controlled. The atomic percentage ratio of the disk to hydrogen, for example, forming an amorphous carbon layer at a temperature of 550 ° C, provides a hydrogen content of less than 20%. The amorphous carbon layer 12 沉积 is deposited using the deposition process, The thickness of the amorphous carbon layer 120 can be formed depending on the application. In one embodiment, the amorphous carbon layer 120 is deposited to a thickness of from about 50 angstroms to about 1000 angstroms to about 5 angstroms to about 300 angstroms. The illustrative examples demonstrate the effectiveness and advantages of the memory cell ι〇〇 and deposition processes described herein. Referring to the illustrative examples, the memory cells and methods described herein will be better understood. It should be understood, however, that each of the features described in the text is used alone or in combination with each other, and not as described in the specific examples. The deposited material is measured according to the processing conditions. The processing conditions shown in Table 1. Descriptive In the example, the various properties of the amorphous carbon layer 120 treat the samples. Table 1

25 201230305 iCl 200 600 400 13800 0 1400 0 250 3.5 iC2 200 1500 400 13800 2000 1000 0 250 3.5 iC3 200 1500 400 13800 2000 700 300 250 3.5 表2 低沈_速率薄膜之處理條件25 201230305 iCl 200 600 400 13800 0 1400 0 250 3.5 iC2 200 1500 400 13800 2000 1000 0 250 3.5 iC3 200 1500 400 13800 2000 700 300 250 3.5 Table 2 Treatment conditions for low-temperature films

選定樣品之薄膜性質經量測為如表2中 26 201230305 薄膜丨生質包括密度、應力、消光係數值(k633)、沈積速率 (埃/分鐘)及在氮中在650°C下退火一個小時之後的後 退火厚度百分比變化及電阻率性質。據發現,在退火之 後密度為無定形碳層1 2 0之穩定性之較好指示。具體 而言,至少約1.4乃至至少約1.45之密度對達成熱穩定 的薄膜而言為理想的。在一個實例中,無定形碳層12〇 之平均密度值為約1.40 g/cc至約1.55 g/cc。合適的應力 值範圍為約-100 MPa至約-400 MPa。同時,理想的溫度 穩定無定形碳層120之第一電阻率位準大於4〇〇歐姆-公 刀且無定形碳層120之薄層電阻大於ΐχΐ〇8歐姆/平方。 表3 _ 1中沈積後之選定無定形碳層之性質 薄膜 密度 應力 n63 3 k633 DR( A/mi η) ‘·丨土貝 在1小時 後在650 °C下退 火厚度 變化(%) 後退 火電 阻 率 效能 AC-2 1.187 -883.9 1.708 0.003 347 -57.82 基線 退火 iCl 1.600 -529.5 2.042 0.132 423 1 2.30 比 得 上 基 線 iC2 1.507 -282.4 1.915 0.067 7121 -2.80 對 昭 ”、、 基 線 27 201230305 改良 10佐 iC3 1.507 -216.6 1.902 0.064 5488 -5.83 對 -----— 照 基 線 改 良 10 倍 參閱表1及第4圖,第4圖圖示以條狀圖形式之收縮, 沈積後的無定形碳層120中待達成之理想性質中之—個 理想性質為低熱收縮。具有低熱收縮之層丨2〇為所希望 的,以在無定形碳沈積製程期間或在其他後沈積製程期 間,阻止無定形碳層12〇與下層基板11〇分層或剝離。 當在超過5 00 C之溫度乃至超過6〇〇〇c之溫度下,對基板 110上之該層或其他層執行隨後處理時,熱收縮問題尤其 明顯’基板110上之該層或其他層可包括介電層、互連 層、離子佈植結構及其他層。 據發現,在N2氣體中在65〇〇c下退火i小時後,基線 樣品(AC-2退火)具有約57%之非常高的熱收縮。相比 之下’樣u。IC1、IC2及IC3顯示出小於約1〇%乃至小於 5%之低熱收縮。該等樣品中之_些樣品具有極理想的小 於3%之熱收縮。在沈積後之無㈣碳層12()之密度與後 退火熱收縮百分比之間亦在A τ n。 间刀存在顯而易見的相關性。據決 定,無定形碳層120且右去认,, 八百大於1.45之密度對產生小於約 5%之熱收縮而言為理相的。£ α主心的。另外’用於樣品IC1至樣品 IC3之沈積處理條件相對於其妗接σ 了足暴線樣品而言具有大於4000 28 201230305 埃/分鐘之實質較高沈積速率’該基線樣品具有約350埃 /分鐘之沈積速率。此舉表示沈積速率十倍地增加。 在第5圖中圖示數個不同無定形碳層m之薄層電阻 =電阻率’在不同的處理條件下處理該等不同無定形碳 層120。在該等實例中 Ψ在了購自加利福尼亞州米爾皮塔 斯的KLA-Tencor 〇mniMApTM上量測薄層電阻。四點、「Β」 型探針用於量測,其中量_圍至多為歐姆/平方 &amp; ’近似為35()歐姆公分)。使用薄膜厚 度t自薄層電阻計算電阻率,其中之公式為^(薄層電 阻’歐姆/平方)層=t广厘存 層t (厚度,公分)χρ (電阻率,歐 公分)。 據發現’無定形碳層120之電阻率近似與消光係數成 反比,在633奈米下量測該消光係數。消光係數與材料 :吸附之光量相關。在光學特性中,在折射率⑻之複雜 &gt;達式中出現消光係數(k)。在表達式中,fi、η及k中之 母一者均為入射輻射之頻率的函數,複雜的折射率為: n(f)=n(f) + ik(f) 、可比電阻率稍微更容易地量測消光係數,因為可在不 使薄膜與電乳端子實體接觸之情況下量測消光係數, 且消光係數更取決於薄膜組合物而非量測t之薄膜塊之 尺:。例如’可藉由將已知波長及強度之光束照射至已 厚又之材料上,且量測入射光之百分比,來量測消光 =數該人射歧射自介質且透射穿過介f。反射光及 射先之量測百分比可用以計算被介質所吸附之光的 29 201230305 量’且該等量測百分比可用以計算消光係數。消光係數 為表徵沈積後之無定形碳薄膜提供了替代手段。消光係 數理想地為較低數值,例如’在用633 nm光進行量測之 情況下’無定形碳層之消光係數理想地小於約0.4,乃至 小於約0.3 5,乃至小於約〇. 1 ’諸如約〇 〇 3至約〇. 1 » 參看第5圖’無定形碳層樣品AC1顯示為,薄層電阻 為約2xl〇5歐姆/平方且電阻率為約ι2〇歐姆公分。該等 電阻值對層而言過低而不可接受。AC1-退火樣品與在氮 氣氛中在6 5 0 C下退火層1 5分鐘之後所量測之AC丨樣品 相同。電阻值下降得更低,其中薄層電阻為約5 5χ1〇4 歐姆/平方且電阻率為55歐姆-公分。因此,AC1樣品亦 不耐熱退火。 樣品AC2顯示出電阻及電阻率,該電阻在測量尺度範 圍之外,亦即,大於lxl〇8歐姆/平方,該電阻率大於4〇〇 歐姆-公分,該電阻及該電阻率皆為理想的電阻性質。 AC2-退火與AC2為相同樣品,但是在氣中在&amp;吖下退 火層1小時之後。AC2-退火維持高電阻及電阻率,該電 阻在測量尺度範圍之外’亦即,大於ΐχΐ〇8歐姆/平方, 該電阻率大於彻歐姆-公分,該電阻及該電阻率皆為理 想的性質'“ ’鮮退火樣品亦顯示,在如表”斤示 退二之:不可接受的高厚度收縮值,其中厚度變化大於 5 0/〇,亦即,約 57〇/〇。 =^《無定形碳層顯示出㈣電阻值及電 該專電阻值在測量尺度範圍之外,亦即,大於㈣8歐 30 201230305 姆/平方,該電阻率大於400歐姆-公分。然而,ici-退火 樣品顯示電阻值過低,該IC1-退火樣品在氮中在65〇t 下退火一個小時,雖然厚度收縮值可接受地小於5%,亦 即,2.3%,如表2所示。退火之後的低電阻值使IC夏層 不可接受。 無定形碳層IC2及IC3皆顯示較高且可接受的電阻值 及電阻率,亦即,電阻值大於1x1 08歐姆/平方,電阻率 大於400歐姆-公分,即使在氮中在650°C下退火該等樣 品一個小時之後,如IC2_退火及IC3退火所示。此外, 厚度收縮值亦較好,小於1〇%,亦即,2 8%及5 8%,如 表2所示在退火之後,該等兩個無定形碳層120具有 大於1X108歐姆/平方之薄層電阻及大於400歐姆公分之 電P率且在退火之後,該等兩個無定形碳層12〇亦具 有小於10%乃至小於5%之低熱收縮。 1C樣品層之電氣性質為1〇:樣品層之氫含量之函數,如 第6圖中所示。據發現,無定形碳層120之氫含量為影 響無定形碳層120之擊穿場強度及漏電流之重要因素。 更具體而言,且有俞高急p 、令〜虱3罝之無定形碳層120具有愈 低漏電流。此外,據決定,對 訂席生(as-grown)無定形碳層 120 (不進行任何退火)而言,理想的為氫原子百分比含 量為至少30%,以獲得無定形碳層12(),該減形碳層 12〇具有至少約lxl〇_9安 女培之漏電流及大於約_2 5 MV/cm之擊穿場強度。 12 0具有大於 據信,設.定沈積條件以使得無定形碳層 31 201230305 30°/◦之氫含量’會提供擊穿場強度及漏電流之理想的性 質。進一步據信’理想的無定形碳層12〇具有無定形結 構或非結晶結構’且理想的無定形碳層12 〇含有碳,該 碳皆與sp2雜化的碳鍵及sp3雜化的碳鍵接合。sp2雜化 碳與sp3雜化碳之比率自一個無定形碳層12〇變化至另一 個無定形碳層120’取決於沈積製程條件。然而,無定形 碳層120中之氫原子數目增加可改變碳層中之接合結 構,以提供sp雜化碳相對於Sp2雜化碳之較大比率。隨 sp含量增加,接合網路變得更強大,這是歸因於原子之 間增大的配位作用。此外,較低量之sp2雜化碳亦提供較 高薄層電阻及電阻率以及由pi_接合減少而引起之較高 擊穿場強度,該較低量之sp2雜化碳由層中之較高氫含量 表示。更進一步,無定形碳層120能夠耐受較高溫度(例 如,大於650°c ),長達至少15分鐘,乃至30分鐘,乃 至60分鐘之時段’其中熱收縮小於丨〇%,乃至小於5%。 據進一步發現,可藉由降低沈積製程之溫度,增加沈 積後之無定形碳層120之擊穿電壓。第7圖圖示不同無 定形碳層120之擊穿電壓,該等無定形碳層12〇各自沈 積於不同溫度下’並保持其餘沈積參數恆定。亦可見, 不同碳層120之擊穿電壓自高於6〇伏特(在1〇〇t之沈 積溫度下)降低為約25伏特(在3〇〇t下)。該圖表圖示 沈積溫度與擊穿電壓之間的非線性回應。此外,此舉表 不了思外結果,即藉由降低沈積溫度2〇(rc而引起的擊穿 電壓降低超過兩倍。因&amp;,據決定,希望將沈積製程溫 32 201230305 度維持於小於11(TC,以沈積無定形碳層120,該無定形 碳層120具有至少約6〇伏特之介電擊穿電壓。 再參看第6圖’無定形碳層12〇亦同時顯示高擊穿電 壓以及低漏電流,此舉為罕見且意外的。因此,在一個 理想的變型中’可變電阻記憶體元件包含無定形碳層 120 ’該無定形碳層120包含至少約3〇原子百分比之氫 含置及小於約1 X10·9安培之最大漏電流。據信,該等理 想性質(至少約60伏特之介電擊穿電壓以及小於約 1x10女培之最大漏電流)源於無定形碳層12〇中增加的 氯含量。具體而言’據決定,在層120中氫含量為至少 約30原子百分比之情況下,可獲得無定形碳層12〇之此 類性質。在氮中在650°C下退火i小時之後,無定形碳層 120亦具有小於5%之體積各向同性收縮,以提供低熱收 縮以及理想的電阻變化性質。 儘管圖示且描述了本發明之示例性實施例,但一般技 術者可設計其他實施例,該等其他實施例併入本發明且 亦屬於本發明之範疇内。此外,根據圖式中之示例性實 施例圖示了術語在……下方、在……上方、底部、頂部、 向上、向Τ'、茗一及彦二以及其他相關或位置術語且 該等術語為可互換的。因此,所附申請專利範圍不應限 於用於說明本發明之本文所述之較佳變型、材料或空間 佈置的描述。 【圖式簡單說明】 33 201230305 理描述:所附申請專利範圍及附圖將更透徹地 明之該等特徵結構、態樣及優點,以下描述、 所附申請專利範圍及附圖說明本發明之實例。•然而,應 理解’每-特徵結構通常可用於本發明中(而不僅僅在 特定圖式之情況下)’且本發明包括該等特徵結構之任何 組合’在圖式中: -第1Α圖為記憶體單元之實施例之示意圖,該記憶體單 π包含一對電極之間的電阻切換元件; 第二圖為記憶體單元之另一個實施例之示意圖,該記 憶體單元包含一對電極之間的電阻切換元件; 第1c圖為可程式化單元(或反㈣單it)之示意圖, 該可程式化單it包含—對電極之間的電阻切換元件; 第2圖為電漿輔助化學氣相沈積裝置之示意性剖視側 視圖’該電漿辅助化學氣相沈積裝置用於沈積無定形碳 層; 第3圖為沈積製程之實施例之流程圖,該沈積製程用 於沈積無定形碳層; 第4圖為無定形碳層之正規化收縮之條狀圖,使用不 同的沈積製程來沈積該等無定形碳層; 第5圖為無定形碳層之薄層電阻及電阻率之圖表使 用不同的沈積製程來沈積該等無定形碳層; 第6圖為無定形碳層之擊穿場強度及漏電流之圖表, 該等無定形碳層具有不同的氫含量;以及 第7圖為無定形碳層之擊穿電壓之圖表,使用不同的 34 201230305 沈積溫度來沈積該等無定形碳層。 【主要元件符號說明】 40 腔室 42 處理區 44a 第一處理電極 44b 第二處理電極 48 圍壁 52 頂板 54 側壁 56 底壁 58 基板支撐件 62 入口槔 64 基板輸送件 68 加熱器 72 氣體分佈器 74 面板 76 孔 78a 第一入口 78b 第二入口 80a 第一氣體供應器 80b 第二氣體供應器 82a 第一氣源 82b 第二氣源 84a 第一氣體導管 84b 第二氣體導管 86a 第一氣閥 86b 第二氣閥 90 排氣裝置 92 泵送槽道 94 排氣口 96 節流閥 98 排氣泵 100 記憶體單元 102 控制器 104 電源供應器 106 電阻切換元件 110 基板 112a 第一電極 112b 第二電極 114 黏附層 114a 第一黏附層 114b 第二黏附層 118 電阻切換材料 120 無定形碳層 124 隔離層 126 位址線 128 絕緣體層 130 穿孔 134 控制元件 136 二極體 140 底部η-型摻雜區 142 本質區 144 頂部Ρ _型推雜區 35The film properties of the selected samples were measured as in Table 2, 26 201230305. The film matte includes density, stress, extinction coefficient (k633), deposition rate (A/min), and annealing at 650 ° C for one hour in nitrogen. Post-annealing thickness percent change and resistivity properties. It has been found that the density after annealing is a good indication of the stability of the amorphous carbon layer 120. In particular, a density of at least about 1.4 or even at least about 1.45 is desirable for achieving a thermally stable film. In one example, the amorphous carbon layer 12 has an average density value of from about 1.40 g/cc to about 1.55 g/cc. Suitable stress values range from about -100 MPa to about -400 MPa. At the same time, the ideal temperature-stabilized amorphous carbon layer 120 has a first resistivity level greater than 4 ohm-ohms and the amorphous carbon layer 120 has a sheet resistance greater than ΐχΐ〇8 ohms/square. Table 3 _ 1 Properties of selected amorphous carbon layer after deposition Thin film density stress n63 3 k633 DR( A/mi η) '·After annealed at 650 °C after 1 hour thickness change (%) post-annealing Resistivity performance AC-2 1.187 -883.9 1.708 0.003 347 -57.82 Baseline annealing iCl 1.600 -529.5 2.042 0.132 423 1 2.30 Comparing the baseline iC2 1.507 -282.4 1.915 0.067 7121 -2.80 Pair Zhao,, Baseline 27 201230305 Improvement 10 Zuo iC3 1.507 -216.6 1.902 0.064 5488 -5.83 Pair------ 10 times improvement according to the baseline Refer to Table 1 and Figure 4, Figure 4 shows the shrinkage in the form of a bar graph, deposited in the amorphous carbon layer 120 One of the desirable properties to be achieved is a low heat shrinkage. Layers having a low heat shrinkage are desirable to prevent the amorphous carbon layer during the amorphous carbon deposition process or during other post deposition processes. 〇 layering or peeling off the underlying substrate 11 当 when at a temperature of more than 500 C or even more than 6 〇〇〇 c, the layer on the substrate 110 or The heat shrinkage problem is particularly pronounced when the layer performs subsequent processing. The layer or other layer on the substrate 110 may include a dielectric layer, an interconnect layer, an ion implant structure, and other layers. It has been found that in the N2 gas at 65 〇〇. After an hour of annealing at c, the baseline sample (AC-2 annealing) had a very high heat shrinkage of about 57%. In contrast, IC1, IC2, and IC3 showed less than about 1% or even less than 5%. Low heat shrinkage. Some of the samples in these samples have an ideal thermal shrinkage of less than 3%. The density of the (4) carbon layer 12() after deposition and the percentage of post-annealing heat shrinkage are also between A τ n. There is an obvious correlation between the knives. It is decided that the amorphous carbon layer 120 and right-handed, the density of eight hundred greater than 1.45 is phased to produce a heat shrinkage of less than about 5%. 'The deposition process conditions for sample IC1 to sample IC3 have a substantially higher deposition rate greater than 4000 28 201230305 angstroms per minute relative to their splicing σ. The baseline sample has about 350 angstroms per minute. Deposition rate. This means that the deposition rate increases tenfold. It illustrates a plurality of sheet resistivity = resistivity of the amorphous carbon layer m in FIG. 5 of different 'treatment of such an amorphous carbon layer 120 is different under different processing conditions. In these examples, the sheet resistance was measured on a KLA-Tencor® mniMApTM purchased from Milpitas, California. A four-point, "Β" type probe is used for the measurement, where the amount _ is at most ohms/square &amp; 'approx. 35 () ohm centimeters). The resistivity is calculated from the sheet resistance using the film thickness t, where the formula is ^ (thin layer resistance 'ohms/square) layer = t wide layer t (thickness, cm) χ ρ (resistivity, euro centimeters). It has been found that the resistivity of the amorphous carbon layer 120 is approximately inversely proportional to the extinction coefficient, and the extinction coefficient is measured at 633 nm. The extinction coefficient is related to the amount of light absorbed by the material. Among the optical characteristics, the extinction coefficient (k) appears in the complex &gt; equation of the refractive index (8). In the expression, the mother of fi, η, and k is a function of the frequency of the incident radiation. The complex refractive index is: n(f)=n(f) + ik(f) , which is slightly more than the resistivity The extinction coefficient is easily measured because the extinction coefficient can be measured without physically contacting the film with the electric milk terminal, and the extinction coefficient is more dependent on the film composition than the film block of the measurement t: For example, extinction can be measured by illuminating a beam of known wavelength and intensity onto a thick material and measuring the percentage of incident light. The person is incident from the medium and transmitted through the medium f. The measured percentage of reflected light and the first shot can be used to calculate the amount of light absorbed by the medium 29 201230305' and the measured percentages can be used to calculate the extinction coefficient. The extinction coefficient provides an alternative means of characterizing the amorphous carbon film after deposition. The extinction coefficient is desirably a lower value, such as 'in the case of measurement with 633 nm light, the extinction coefficient of the amorphous carbon layer is desirably less than about 0.4, or even less than about 0.35, or even less than about 〇. 1 'such as约约3至约〇. 1 » Referring to Figure 5, the amorphous carbon layer sample AC1 is shown to have a sheet resistance of about 2 x 1 〇 5 ohms/square and a resistivity of about ι 2 〇 ohm centimeters. These resistance values are too low for the layer to be acceptable. The AC1-annealed sample was identical to the AC丨 sample measured after annealing the layer at 65 ° C for 15 minutes in a nitrogen atmosphere. The resistance value drops even lower, with a sheet resistance of about 5 5 χ 1 〇 4 ohms/square and a resistivity of 55 ohm-cm. Therefore, the AC1 sample is also not heat resistant. Sample AC2 exhibits electrical resistance and electrical resistivity outside the measurement scale, i.e., greater than lxl 〇 8 ohms/square, which is greater than 4 ohm ohm-cm, both the resistance and the resistivity are ideal. Resistance properties. The AC2-anneal was the same as AC2, but after 1 hour in the gas under the &amp; AC2-anneal maintains high resistance and resistivity, which is outside the measurement scale's, ie, greater than ΐχΐ〇8 ohms/square, which is greater than ohm-cm, which is an ideal property. ''The fresh annealed sample also shows that in the table, the weight is unacceptable: the unacceptable high-thickness shrinkage value, where the thickness variation is greater than 50/〇, that is, about 57〇/〇. =^ "Amorphous carbon layer shows (four) resistance value and electricity The specific resistance value is outside the measurement scale range, that is, greater than (4) 8 ohms 30 201230305 m / square, the resistivity is greater than 400 ohm-cm. However, the ici-annealed sample showed that the resistance value was too low, and the IC1-annealed sample was annealed in nitrogen at 65 〇t for one hour, although the thickness shrinkage value was acceptably less than 5%, that is, 2.3%, as shown in Table 2. Show. The low resistance value after annealing makes the IC summer layer unacceptable. Both amorphous carbon layers IC2 and IC3 exhibit high and acceptable resistance and resistivity, ie, resistance values greater than 1x1 08 ohms/square, and resistivities greater than 400 ohm-cm, even at 650 ° C in nitrogen One hour after annealing the samples, as indicated by IC2_annealing and IC3 annealing. In addition, the thickness shrinkage value is also better, less than 1%, that is, 2 8% and 5 8%. As shown in Table 2, after annealing, the two amorphous carbon layers 120 have a diameter greater than 1×108 ohms/square. The sheet resistance and the electrical P rate greater than 400 ohms and after annealing, the two amorphous carbon layers 12 〇 also have a low heat shrinkage of less than 10% or even less than 5%. The electrical property of the 1C sample layer is 1 〇: a function of the hydrogen content of the sample layer, as shown in Figure 6. It has been found that the hydrogen content of the amorphous carbon layer 120 is an important factor affecting the breakdown field strength and leakage current of the amorphous carbon layer 120. More specifically, the amorphous carbon layer 120 having a high frequency and a low leakage current has a lower leakage current. Furthermore, it is decided that for an as-grown amorphous carbon layer 120 (without any annealing), it is desirable to have a hydrogen atomic percentage of at least 30% to obtain an amorphous carbon layer 12(), The reduced carbon layer 12A has a leakage current of at least about 1 x 10 〇 -9 amps and a breakdown field strength of greater than about _2 5 MV/cm. 12 0 has a greater than the belief that the deposition conditions are such that the amorphous carbon layer 31 201230305 30 ° / 氢 hydrogen content 'will provide the desired properties of breakdown field strength and leakage current. It is further believed that 'ideal amorphous carbon layer 12 〇 has an amorphous structure or an amorphous structure' and the ideal amorphous carbon layer 12 〇 contains carbon, both of which are mixed with sp2 carbon bonds and sp3 hybridized carbon bonds. Engage. The ratio of sp2 hybridized carbon to sp3 hybridized carbon varies from one amorphous carbon layer 12〇 to another amorphous carbon layer 120' depending on the deposition process conditions. However, an increase in the number of hydrogen atoms in the amorphous carbon layer 120 can alter the bonding structure in the carbon layer to provide a greater ratio of sp hybrid carbon to sp2 hybrid carbon. As the sp content increases, the bonding network becomes more powerful due to the increased coordination between the atoms. In addition, the lower amount of sp2 hybrid carbon also provides higher sheet resistance and resistivity as well as higher breakdown field strength due to reduced pi_bonding, which is higher in the layer of sp2 hybrid carbon. High hydrogen content is indicated. Further, the amorphous carbon layer 120 can withstand higher temperatures (for example, greater than 650 ° C) for at least 15 minutes, or even 30 minutes, or even 60 minutes, where the heat shrinkage is less than 丨〇%, or even less than 5%. It has further been found that the breakdown voltage of the deposited amorphous carbon layer 120 can be increased by lowering the temperature of the deposition process. Figure 7 illustrates the breakdown voltage of the different amorphous carbon layers 120, each of which is deposited at a different temperature&apos; and keeping the remaining deposition parameters constant. It can also be seen that the breakdown voltage of the different carbon layers 120 is reduced from about 6 volts (at a deposition temperature of 1 Torr) to about 25 volts (at 3 Torr). This chart illustrates the nonlinear response between the deposition temperature and the breakdown voltage. In addition, this shows no extraordinary results, that is, the breakdown voltage caused by lowering the deposition temperature of 2 〇 (rc) is more than doubled. Because &amp;, it is decided that the deposition process temperature of 32 201230305 is maintained at less than 11 (TC) to deposit an amorphous carbon layer 120 having a dielectric breakdown voltage of at least about 6 volts. Referring again to Figure 6, the amorphous carbon layer 12 〇 also exhibits a high breakdown voltage and Low leakage current, which is rare and unexpected. Therefore, in a desirable variant, the 'variable-resistance memory element comprises an amorphous carbon layer 120'. The amorphous carbon layer 120 comprises at least about 3 atomic percent of hydrogen. The maximum leakage current is less than about 1 X 10.9 amps. It is believed that these desirable properties (dielectric breakdown voltage of at least about 60 volts and maximum leakage current of less than about 1 x 10 psi) are derived from the amorphous carbon layer 12 The increased chlorine content in the crucible. Specifically, it is determined that in the case where the hydrogen content in layer 120 is at least about 30 atomic percent, such properties of the amorphous carbon layer 12〇 can be obtained. In nitrogen at 650 ° C After annealing for an hour, it is not fixed Carbon layer 120 also has a volumetric isotropic shrinkage of less than 5% to provide low heat shrinkage and desirable resistance change properties. While exemplary embodiments of the invention have been illustrated and described, other embodiments may be The other embodiments are incorporated in the present invention and are also within the scope of the present invention. Further, the terms are illustrated below, above, at the bottom, at the top, at the top, according to the exemplary embodiments in the drawings. Τ', 茗一和彦二, and other related or positional terms, and the terms are interchangeable. Therefore, the scope of the appended claims should not be limited to the preferred variations, materials or spaces described herein for illustrating the invention. BRIEF DESCRIPTION OF THE DRAWINGS [Brief Description of the Drawings] 33 201230305 Description: The following description, the appended claims, and the accompanying drawings will be more fully understood. Examples of the invention. However, it should be understood that 'every-feature structure is generally usable in the present invention (and not only in the case of a particular figure)' and the present invention includes Any combination of features, etc. 'In the drawings: - Figure 1 is a schematic diagram of an embodiment of a memory cell comprising a resistive switching element between a pair of electrodes; the second figure is a memory cell In another embodiment, the memory unit includes a resistance switching element between a pair of electrodes; FIG. 1c is a schematic diagram of a programmable unit (or an inverse (four) single it), the programmable single unit includes a counter electrode Figure 2 is a schematic cross-sectional side view of a plasma-assisted chemical vapor deposition apparatus for depositing an amorphous carbon layer; Figure 3 is a deposition process A flow chart of an embodiment for depositing an amorphous carbon layer; FIG. 4 is a strip diagram of normalized shrinkage of an amorphous carbon layer, using different deposition processes to deposit the amorphous carbon layers; Figure 5 is a graph of sheet resistance and resistivity of an amorphous carbon layer using different deposition processes to deposit the amorphous carbon layers; Figure 6 is a graph of breakdown field strength and leakage current of an amorphous carbon layer. Wait Amorphous carbon layer having a different hydrogen content; 7 graph and chart breakdown of the amorphous carbon layer of the voltage, using different deposition temperature 34201230305 those deposited amorphous carbon layer. [Main component symbol description] 40 chamber 42 processing region 44a first processing electrode 44b second processing electrode 48 surrounding wall 52 top plate 54 side wall 56 bottom wall 58 substrate support 62 inlet port 64 substrate conveying member 68 heater 72 gas distributor 74 panel 76 hole 78a first inlet 78b second inlet 80a first gas supply 80b second gas supply 82a first gas source 82b second gas source 84a first gas conduit 84b second gas conduit 86a first gas valve 86b Second air valve 90 exhaust device 92 pumping channel 94 exhaust port 96 throttle valve 98 exhaust pump 100 memory unit 102 controller 104 power supply 106 resistance switching element 110 substrate 112a first electrode 112b second electrode 114 Adhesion layer 114a First adhesion layer 114b Second adhesion layer 118 Resistance switching material 120 Amorphous carbon layer 124 Isolation layer 126 Address line 128 Insulator layer 130 Perforation 134 Control element 136 Diode 140 Bottom η-type doped region 142 Essential area 144 top Ρ _ type tampering zone 35

Claims (1)

201230305 七、申請專利範圍: 1· 一種電子設備,該電子設備包含: (a) —基板; (b) —可變電阻記憶體元件,該可變電阻記憶體元件位於該 基板上,該可變電阻記憶體元件包含: (i)一無定形碳層,該無定形碳層包含. (1) 一氫含量’該氫含量至少為約30原子百分比;以 及 (2) 一最大漏電流,該最大漏電流小於約1 x 10-9安培; 以及 (i i) 一對電極,該對電極環繞該無定形碳層。 2. 如請求項1所述之電子設備,其中該無定形碳層包含一 體積各向同性收縮,在一氮氣氛中在650°C下退火1小 時之後該體積各向同性收縮小於5 %。 3. 如請求項述之電子設備,其中該無定形碳層包含一 消光係數,在633奈米之一波長下該消光係數為約〇 〇3 至約0.1。 (如請求項!所述之電子設備,其中該無定形碳層包含一 第一電阻率位準,該第-電阻率位準大於歐姆_公 分0 36 201230305 5.如請求$ !所述之電子設備,其中該無㈣碳層包含一 =層電随’該薄層電阻大於歐姆/平方,該無定形 破層之〜厚度為約2000埃。 6·如凊求項”斤述之電子設備,其中該無定形碳層包含一 薄層電隍,該薄層電阻為約lxl〇7歐姆/平方至約ΐχΐ〇8 歐姆/平方,該無定形碳層之一厚度為約2〇〇〇埃。 7.如请求項1所述之電子設備,其中該無定形碳層包含一 厚度’該厚度為約100埃至約1000埃。 8·如凊求項1所述之電子設備,其中該無定形碳層包含一 密度’該密度為約1.40 g/cc至約Κ55 g/cc。 9.如凊求項丨所述之電子設備,其中該無定形碳層包含一 應力位準,該應力位準為約-100 MPa至約_4〇〇 Mpa。 10·如請求項i所述之電子設備,其中該等電極適合於在該 無定形碳層上施加一設定電壓,以將該無定形碳層之電 阻率自一第一電阻率位準變為一第二電阻率位準。 11·如請求項i所述之電子設備,其中該對電極各自具有一 厚度’該厚度為約20埃至約1〇〇〇埃。 37 201230305 12. 如請求項1所述之電子設備,其中該對電極包含鶴。 13. 如請求項1所述之電子設備’其中該電子設備包括一記 憶體。 14. 如請求項13所述之電子設備,其中該記憶體處於一已 封裝積體電路中。 15. —種電子設備,該電子設備包含一無定形碳層,該無定 形碳層安置於一基板上,該無定形碳層包含至少約3〇 原子百分比之一氫含量及小於約1 X 1 〇·9安培之一最大漏 電流,藉由一方法形成該無定形碳層,該方法包含以下 步驟: (a) 將該基板置放至一處理區中; (b) 將該基板維持在小於30(TC之一溫度下; (c) 將一處理氣體引入至該處理區中該處理氣體包含一含 碳氣體及一稀釋氣體; (d) 將該處理氣體維持在約〇 5托至約托之一壓力下;以 及 (e) 自該處理氣體形成—電漿。 16. — 用 jfe — ^ 、一暴板上沈積一無定形碳層的方法,該方法 包含以下步驟: 38 201230305 (a)將該基板置放至一處理區中; ()將該基板維持在小於3 0 0 °C之一溫度下; (0將一處理氣體引入至該處理區中該處理氣體包含—含 碳氣體及一稀釋氣體;以及將該處理氣體維持在約〇S5 托至約20粍之一壓力下;以及 (d)藉由以—第一頻率向環繞該處理區之電極施加—第一 RF功率及以一第二頻率向該基板施加一第二RF功率, 自Λ處理氣體形成一電毁,其中該第二頻率低於該第一 頻率。 1 7·如凊求項丨6所述之方法,其中處理條件經設定以沈積 一無定形碳層,該無定形碳層包含至少約3〇原子百分比 之一氫含量及小於約1 X丨〇-9安培之一最大漏電流。 18. 如請求項16所述之方法,其中該第一頻率為約Η」 ΜΗζ ’且該第二頻率小於1 MHz。 19. 如請求項18所述之方法,其中該方法進一步包括以下 步驟.以約200密耳至約1000密耳之一間隔距離來間隔 該等電極。 20. 如請求項丨6所述之方法,該方法包含以下步驟:以約 100瓦特至約2000瓦特之功率位準施加該第一 RF功率 及該第二RF功率中之母一者。 39 201230305 21. 如請求項16所述之方法,其中該含碳氣體包含CxHy, 其中X為1至10且y為2至30,或此類氣體之混合物。 22. 如請求項16所述之方法,其中該含碳氣體包含 CxHyNz,其中X為1至10,y為2至30且z為1至10, 或此類氣體之混合物。 23. 如請求項16所述之方法,其中該含碳氣體包含三乙胺。 24. 如請求項16所述之方法,其中該稀釋氣體包含氬、氦、 氣或氮。 40201230305 VII. Patent application scope: 1. An electronic device comprising: (a) a substrate; (b) a variable resistance memory component, the variable resistance memory component being located on the substrate, the variable The resistive memory element comprises: (i) an amorphous carbon layer comprising: (1) a hydrogen content 'the hydrogen content of at least about 30 atomic percent; and (2) a maximum leakage current, the maximum The leakage current is less than about 1 x 10-9 amps; and (ii) a pair of electrodes that surround the amorphous carbon layer. 2. The electronic device according to claim 1, wherein the amorphous carbon layer comprises a volumetric isotropic shrinkage, and the volume isotropically shrinks by less than 5% after annealing at 650 ° C for 1 hour in a nitrogen atmosphere. . 3. The electronic device of claim 1, wherein the amorphous carbon layer comprises an extinction coefficient, the extinction coefficient being about 〇 〇 3 to about 0.1 at a wavelength of 633 nm. (The electronic device of claim 1 , wherein the amorphous carbon layer comprises a first resistivity level, the first resistivity level is greater than ohms - cm 0 36 201230305 5. If the request is $! The device, wherein the (four) carbon layer comprises a layer of electricity, and the sheet resistance is greater than ohms/square, and the thickness of the amorphous layer is about 2000 angstroms. Wherein the amorphous carbon layer comprises a thin layer of electricity having a sheet resistance of from about 1 x 1 〇 7 ohms/square to about ΐχΐ〇 8 ohms/square, and one of the amorphous carbon layers having a thickness of about 2 angstroms. 7. The electronic device of claim 1, wherein the amorphous carbon layer comprises a thickness of from about 100 angstroms to about 1000 angstroms. The electronic device of claim 1, wherein the amorphous device The carbon layer comprises a density of from about 1.40 g/cc to about 55 g/cc. 9. The electronic device of claim 3, wherein the amorphous carbon layer comprises a stress level, the stress level The electronic device of claim i, wherein the electrodes are suitable for use in the range of about -100 MPa to about _4 〇〇 Mpa. And applying a set voltage on the amorphous carbon layer to change the resistivity of the amorphous carbon layer from a first resistivity level to a second resistivity level. 11 · As claimed in claim i The electronic device, wherein the pair of electrodes each have a thickness of from about 20 angstroms to about 1 angstrom. The apparatus of claim 1, wherein the pair of electrodes comprises a crane. The electronic device of claim 1, wherein the electronic device comprises a memory. 14. The electronic device of claim 13, wherein the memory is in an encapsulated integrated circuit. The electronic device includes an amorphous carbon layer disposed on a substrate, the amorphous carbon layer comprising a hydrogen content of at least about 3 atomic percent and one of less than about 1 X 1 〇·9 amps The maximum leakage current is formed by a method for forming the amorphous carbon layer. The method comprises the steps of: (a) placing the substrate in a processing zone; (b) maintaining the substrate at a temperature of less than 30 (TC) (c) introducing a process gas to The process gas in the treatment zone comprises a carbonaceous gas and a diluent gas; (d) maintaining the process gas at a pressure of from about 5 Torr to about 1 Torr; and (e) forming a plasma from the process gas. 16. — A method of depositing an amorphous carbon layer on a slab using jfe — ^, the method comprising the steps of: 38 201230305 (a) placing the substrate in a processing zone; () maintaining the substrate in At a temperature less than 300 ° C; (0 introducing a process gas into the treatment zone, the process gas comprises - a carbonaceous gas and a diluent gas; and maintaining the process gas at about 〇S5 Torr to about 20 And (d) self-twisting the process gas by applying a first RF power to the electrode surrounding the processing region at a first frequency and applying a second RF power to the substrate at a second frequency An electrical stagnation is formed, wherein the second frequency is lower than the first frequency. The method of claim 6, wherein the processing condition is set to deposit an amorphous carbon layer comprising at least about 3 atomic percent of hydrogen and less than about 1 X 丨〇 One of the maximum leakage currents of -9 amps. 18. The method of claim 16, wherein the first frequency is about Η" ΜΗζ ' and the second frequency is less than 1 MHz. 19. The method of claim 18, wherein the method further comprises the step of spacing the electrodes at a separation distance of from about 200 mils to about 1000 mils. 20. The method of claim 6, wherein the method comprises the step of applying one of the first RF power and the second RF power at a power level of about 100 watts to about 2000 watts. The method of claim 16, wherein the carbon-containing gas comprises CxHy, wherein X is from 1 to 10 and y is from 2 to 30, or a mixture of such gases. 22. The method of claim 16, wherein the carbon-containing gas comprises CxHyNz, wherein X is from 1 to 10, y is from 2 to 30, and z is from 1 to 10, or a mixture of such gases. 23. The method of claim 16, wherein the carbon-containing gas comprises triethylamine. 24. The method of claim 16, wherein the diluent gas comprises argon, helium, gas or nitrogen. 40
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KR20140026320A (en) 2014-03-05

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