TW201220837A - Sensing pixel arrays and sensing devices using the same - Google Patents
Sensing pixel arrays and sensing devices using the same Download PDFInfo
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- 238000003491 array Methods 0.000 title 1
- 238000005070 sampling Methods 0.000 claims abstract description 36
- 238000009792 diffusion process Methods 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 4
- 230000003071 parasitic effect Effects 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 claims description 2
- 230000006870 function Effects 0.000 claims description 2
- 229910052732 germanium Inorganic materials 0.000 claims 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims 1
- 239000000872 buffer Substances 0.000 description 5
- 229910052736 halogen Inorganic materials 0.000 description 4
- 150000002367 halogens Chemical class 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 230000000875 corresponding effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000006386 memory function Effects 0.000 description 2
- 241000282320 Panthera leo Species 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000035807 sensation Effects 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
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Abstract
Description
201220837 六、發明說明: 【發明所屬之技術領域】 本發明係有關於一種感測晝素陣列,特別是有關於一 種感測裝置,其中的感測晝素陣列具有感測功能與記憶功 能。 【先前技術】 一般而言,CMOS影像感測器(CMOS image sensor, CIS)比起CCD影像感測器具有較高的整合度。因此,CIS 可與影像感測處理器一起埋置在一晶片上,以執行較佳的 影像處理。影像品質一般是取決於線緩衝器的數量。因此, 具有較高影像品質的CIS需要較多數量的線緩衝器。然 而,大量的線緩衝器導致CIS具有較高的成本並在CIS中 佔有較大的面積。 因此,期望提供一種感測裝置,其感測晝素陣列具有 感測與記憶功能,以減少感測裝置中線缓衝器的數量。 【發明内容】 本發明提供一種感測晝素陣列,其包括複數晝素。該 些晝素配置在一陣列中。每一晝素在一曝光期間與一讀出 期間中操作並產生一讀出信號。每一晝素包括一感測單元 以及一取樣單元。感測單元在曝光期間内感測光線以產生 一感測信號。取樣單元在讀出期間内取樣感測信號以產生 感測輸出信號來作為讀出信號。在曝光期間中,取樣單元 作為一記憶單元,以儲存一輸入信號並輸出一存取輸出信 號來作為讀出信號。 201220837 本發明提供一種感測裝置,其包括複數畫素、一 :碼電路、以及一第二解碼電路。該些晝素:置在:陣; 「晝素在一曝光期間與一讀出期間中操作並產生-讀出“號。每一畫素包括一感測單元以及一取 ,:在曝光期間内感測光線以產生—感測信號;二 3=間:測信號以產生—感測輸出信號來作 為讀出#號。在曝光期間巾,取樣單元 …201220837 VI. Description of the Invention: [Technical Field] The present invention relates to a sensing pixel array, and more particularly to a sensing device in which a sensing pixel array has a sensing function and a memory function. [Prior Art] In general, a CMOS image sensor (CIS) has a higher degree of integration than a CCD image sensor. Therefore, the CIS can be embedded on a wafer together with the image sensing processor to perform better image processing. Image quality generally depends on the number of line buffers. Therefore, CIS with higher image quality requires a larger number of line buffers. However, a large number of line buffers result in higher cost of CIS and a larger area in CIS. Accordingly, it is desirable to provide a sensing device that senses a pixel array having sensing and memory functions to reduce the number of line buffers in the sensing device. SUMMARY OF THE INVENTION The present invention provides a sensing pixel array comprising a plurality of halogens. The elements are arranged in an array. Each element operates during an exposure period and during a read period and produces a read signal. Each element includes a sensing unit and a sampling unit. The sensing unit senses light during the exposure to produce a sensing signal. The sampling unit samples the sensing signal during the readout period to produce a sensed output signal as the readout signal. During the exposure period, the sampling unit acts as a memory unit for storing an input signal and outputting an access output signal as a readout signal. 201220837 The present invention provides a sensing device including a plurality of pixels, a code circuit, and a second decoding circuit. The elements are: placed in: array; "the element is operated during a period of exposure and during a readout period and is generated - read out". Each pixel includes a sensing unit and a pickup: sensing light during the exposure period to generate a sensing signal; and 2 3: measuring the signal to generate a sensing output signal as the reading # number. During the exposure period, the sampling unit ...
Π-輸入信號並輸出一存取輸出信號來;為:二 ^第—解碼電路在讀出顧中控制取樣單元,以使㈣ 早凡取樣該感測信號且產生感測輸出信號 ===樣單元,—存:二 續山t—些實施例中’感測裝置更包括—讀出電路,用以 讀出來自取樣單元之讀出信號並處理讀出作號。 【實施方式】 : 〇儿 下令ϋ本發明之上述目的、特徵和優點能更明顯易懂, 、舉-較佳實施例,並配合所附圖式,作詳細說 下0 第、1圖係表示根據本發明實施例之感測裝置。參閱第1 感劂裝置1包括感測晝素陣列10、列解碼電路丨1與 紅:讀出電路13、以及切換電路14。感測晝素陣列10包 晝素(顯示於第2圖中),這些畫素配置在一陣列 期列與硬數行上。每—畫素可操作在曝域間與讀出 4,並產生一讀出信號SR。解碼電路n及12用來控制 201220837 感測晝素陣列10之該些晝素以產生複數讀出信號SR。讀 出電路13用來讀取來自感測晝素陣列10之該些讀出信號 SR。切換電路14耦接複數電壓源。在此實施例中,以五 個電壓源VS1〜VS5為例來說明。電壓源VS1〜VS5分別提 供電壓 AVDD、AVDD*3/4、AVDD*2/4、AVDD*l/4、以 及AGND (接地)。切換電路14用來選擇信到將電壓源 VS1〜VS5中一者的電壓提供至感測晝素陣列10。 第2圖係表示根據本發明實施例,感測晝素陣列10中 每一晝素。在第2圖中,以感測晝素陣列10中一個晝素做 為例子來說明,其他的晝素則具有與第2圖相同之架構。 為了清楚說明,第2圖也表示切換電路14。切換電路14 包括開關14a〜14e,分別耦接電壓源VS1〜VS5與晝素2之 間。參閱第2圖,晝素2包括感測單元20與取樣單元21。 感測單元20在曝光期間感測光線以產生一感測信號SS。 Λ 在此實施例中,感測單元20包括光二極體PD,其陰極耦 接節點Ν20,且其陽極耦接接地(例如電壓源VS5)。在 曝光期間,光二極體PD感測光線以產生感測信號SS。在 讀出期間,取樣單元21用來取樣該感測信號SS以產生一 感測輸出信號,作為讀出信號SR。在曝光期間,取樣單元 21的操作就如同一記憶體單元,用以儲存一輸入信號且輸 出一存取輸出信號作為讀出信號SR。 參閱第2圖,取樣單元21包括轉移元件21a、重置元 件21b、以及源極隨耦器21c。在此實施例中,轉移元件 21a包括電晶體T20,其控制端接收一控制信號SC,其輸 入端搞接感測單元20於節點N20,且其輸出端搞接浮動擴 201220837Π-input signal and output an access output signal; for: the second-first decoding circuit controls the sampling unit in the readout to enable (4) to sample the sensing signal early and generate a sensing output signal === Unit, storage: two consecutive mountains t - in some embodiments, the 'sensing device further includes a readout circuit for reading the readout signal from the sampling unit and processing the readout number. [Embodiment] The above-mentioned objects, features, and advantages of the present invention will be more apparent and understood, and the preferred embodiments and the accompanying drawings are described in detail. A sensing device in accordance with an embodiment of the present invention. Referring to the first sensing device 1, the sensing pixel array 10, the column decoding circuit 丨1 and red: the readout circuit 13, and the switching circuit 14 are included. The sensitized array of pixels 10 is shown in Figure 2 (shown in Figure 2) and these pixels are arranged on an array of columns and hard lines. Each pixel can be operated between the exposure fields and the readout 4, and a read signal SR is generated. Decoding circuits n and 12 are used to control the pixels of the 201220837 sensing pixel array 10 to produce a complex readout signal SR. The readout circuit 13 is used to read the readout signals SR from the sensed pixel array 10. The switching circuit 14 is coupled to a plurality of voltage sources. In this embodiment, five voltage sources VS1 to VS5 are taken as an example for explanation. Voltage sources VS1 to VS5 provide voltages AVDD, AVDD*3/4, AVDD*2/4, AVDD*l/4, and AGND (ground), respectively. Switching circuit 14 is operative to select to provide a voltage to one of voltage sources VS1 through VS5 to sense pixel array 10. Figure 2 is a diagram showing the sensing of each element in the halogen array 10 in accordance with an embodiment of the present invention. In Fig. 2, one of the elements in the sensing pixel array 10 is taken as an example, and the other elements have the same structure as in the second figure. For the sake of clarity, FIG. 2 also shows the switching circuit 14. The switching circuit 14 includes switches 14a to 14e coupled between the voltage sources VS1 VSVS5 and the pixel 2, respectively. Referring to FIG. 2, the halogen 2 includes a sensing unit 20 and a sampling unit 21. The sensing unit 20 senses light during exposure to generate a sensing signal SS. In this embodiment, the sensing unit 20 includes a photodiode PD having a cathode coupled to the node Ν20 and an anode coupled to ground (e.g., voltage source VS5). During exposure, the photodiode PD senses light to produce a sensed signal SS. During readout, sampling unit 21 is used to sample the sensed signal SS to produce a sensed output signal as read signal SR. During the exposure, the sampling unit 21 operates as the same memory unit for storing an input signal and outputting an access output signal as the read signal SR. Referring to Fig. 2, the sampling unit 21 includes a transfer element 21a, a reset element 21b, and a source follower 21c. In this embodiment, the transfer component 21a includes a transistor T20, and the control terminal receives a control signal SC, the input terminal of which is connected to the sensing unit 20 at the node N20, and the output terminal thereof is connected to the floating expansion 201220837
散節點FN。重置元件21 b包括電晶體Τ21,其控制端接收 一重置信號SRE,其輸入端耦接切換電路14,且其輸出端 耦接浮動擴散節點FN。源極隨耦器21c包括電晶體Τ22。 電晶體Τ22之控制端耦接浮動擴散節點fn’其輪入端搞接 電壓源vsi(avdd),且其輸出端耦接讀出節點NRe在 此實施例中,浮動擴散節點FN可以儲存電荷。在其他實 知例中,具有一儲存元件耦接於浮動擴散節點FN與接地 之間,且該儲存元件取代浮動擴散節點FN來儲存^荷。 該儲存元件可以是實質上的電容器或是源極隨耦器32c中 電晶體T22的寄生電容。 第3圖係表示在第2圖中控制信號sc與重置信號SRE 之時序圖。在下文中,畫素2之操作將參閱第丨至^圖來 說月曝光期間ΡΕχρ開始於時間點T1並結束於時間點T2, 而讀出期間PRED開始於時間點Τ2並結束於時間點τ3。在 曝光期間pESP之前,切換電路14之開關14a〜14c中一者導 、例如開關14d導通,且對應的電麗AVDD* 1/4被提供 2晶體T21之輸出端。同時’解碼單元η致能(挪州) =信號SRE以導通電晶體Τ2卜也致能控制信號%以 、電晶體T2G。藉此,電晶體T21將接收之電壓ν〇〇*ι/4 寻送至其輸出端以重置浮動擴散節點FN之位準。因此, 散節點FN在讀出期間%中的接續操作中係處於 之降f位準。此外,由於電晶體T20導通,光二極體PD 陰極上的電荷被刷新(讀esh)。 號=時間點T1 ’解碼單元11反致能(de—rt)重置信 '以襲電晶體T21,解碼單元11也反致能控制信號 201220837 SC以關閉電晶體T20。在曝光期間ρΕχρ,光二極徵 測光線並根據所感測之光線強度在其陰極累積電# 感 二極體PD之陰極上的電壓則稱為感測信號ss ^ °在光 在一實施例中’假使要求晝素2作為一記憶跑 執行以下操作。在曝光期間Pexp ’解碼電路12抑將 路I4之複數開關14a〜14c中一者導通,例如開關\ =換電 且對應之電壓AVDD*3/4被提供至電晶體T21之 導通’ 作為輸入信號。同時,解碼電路12致能重置#號端以 導通電晶體T21。電晶體T21將此輸入信號傳送至复^ 端(即浮動擴散節點FN),以將輸人信號之電壓儲=出 動擴散節點FN。因此,畫素2作為—記憶胞以記,^輪= 信號。此外,源極隨耦器21c之電晶體T22根據輸入^ 之電壓(即在浮動擴散節點FN上之電壓)而導通或關 藉此,存取輸φ信號根據電晶體Τ22之導通或關閉狀態而 產生於輸出節點NR,以作為讀出信號SR。需注意,在讀 出期間Pred之則,讀出電路13必須讀取來自取樣單元21 之讀出節點NR上的讀出信號SR,並處理該讀出信號SR。 接者,將敘述在讀出期間PRED的操作。在時間點T2, 解碣單元11再次致能重置信號SRE以導通電晶體T21,且 電晶體T21再次將接收的電壓ACDD*1/4傳送至其輸出端 以重置浮動擴散卽點FN之位準。接著,解码單元11在時 間點T2 a上反致能重置信號SRE以關閉電晶體τ2丨。在時 2 τπ ’解碼單元u致能控制信號sc以導通電晶體 因此’電晶體T2G將產生於曝光期間PEW的感測信 ,s轉移至#動擴散節點FN。換句話說,感測信號% 201220837 被取樣單元21來取樣。减 散節點FN。在時間·點貝之電壓儲存在浮動擴 ςΓ P, pa Φ a ^ ” e,解碼單元11反致能控制信號 SC以關閉電晶體T20。 感測信號SS之電壓(即^21e之電晶體Τ22根據 通或關閉。藉此,感;列:出動擴散節點町之電壓)而導 時的讀出信號以作為讀出信號队,此 在時間㈣,讀出電所糊^ 讀出節點上的讀出=取/取樣來自取樣單元21之 出k唬SR,並處理該讀出信號SR。 或者作為一;=例’晝素2可作為-感測胞以感測光線, 二者:為e憶胞以儲存輪入信號,其 曝光顧pEXP,tV物參考f訊或校正f訊。在 晶體T2G關閉,因此浮動擴散節點 曝光期ρΓρ ’ _點獅上的感測信號SS所影響。因此,在 曝元期間PPYD,書去0从1 · ^ 至浮動擴散節謂、,—,憶胞以傳送上述輸入信號 Pl” 做儲存’晝素2並根據該輸入信號來 鞠出存取輸出信號以作為讀出信號SR。感測裝置丨則需要 較少的線緩衝器,藉此降低感測裝置1的成本並減少其面 積。 如第2圖所示,每一畫素之源極隨耦器2ic包括一電 晶體T22。在一些實施例中,配置在相同行之複數晝素的 源極知·耦r器21 c共用一個電流源且該電流源輕接於配置 在相同行之該些畫素的各自讀出節點NR與接地之間。 在第3圖之實施例中’在讀出期間PRED,讀出電路j 4 讀取一次來自取樣單元21c之讀出節點NR上的讀出信號 201220837 SR。即是,讀出單元14在時間點T2d上讀取來自取樣單 元21c之讀出節點NR上的讀出信號SR。然而,在其他實 施例中,相關雙重取樣(correction double sampling,CDS ) 操作可在讀出期間PRED内執行。在此情況下,讀出電路14 在介於時間點T2a與T2b之間的一時間點上讀取或取樣來 自取樣單元21c之讀出節點NR上的讀出信號SR,已獲得 一讀出電壓,然後讀出電路14在時間點T2d上取樣讀出信 號SR以獲得另一讀出電壓。接著,讀出電路14計算此兩 讀出電壓之間的差,而該電壓差則表示由光二極體PD所 感測之光線強度。 本發明雖以較佳實施例揭露如上,然其並非用以限定 本發明的範圍,任何所屬技術領域中具有通常知識者,在 不脫離本發明之精神和範圍内,當可做些許的更動與潤 飾,因此本發明之保護範圍當視後附之申請專利範圍所界 定者為準。 201220837 【圖式簡單說明】 第1圖表示根據本發明實施例之感測裝置; 第2圖表示根據本發明實施例之晝素;以及 第3圖表示在第2圖中控制信號與重置信號的時序圖。 【主要元件符號說明】 第1圖: 1〜感測裝置; 11〜列解碼電路; 13〜讀出電路; SR〜讀出信號;The scattered node FN. The reset element 21b includes an transistor Τ21, and its control terminal receives a reset signal SRE, its input terminal is coupled to the switching circuit 14, and its output terminal is coupled to the floating diffusion node FN. The source follower 21c includes an transistor 22. The control terminal of the transistor 22 is coupled to the floating diffusion node fn', and its turn-in terminal is coupled to the voltage source vsi (avdd), and its output terminal is coupled to the sense node NRe. In this embodiment, the floating diffusion node FN can store charge. In other embodiments, a storage element is coupled between the floating diffusion node FN and the ground, and the storage element replaces the floating diffusion node FN to store the load. The storage element can be a substantially capacitor or a parasitic capacitance of the transistor T22 in the source follower 32c. Fig. 3 is a timing chart showing the control signal sc and the reset signal SRE in Fig. 2. In the following, the operation of the pixel 2 will be described with reference to the second to fourth graphs. The monthly exposure period ΡΕχρ starts at the time point T1 and ends at the time point T2, and the readout period PRED starts at the time point Τ2 and ends at the time point τ3. Prior to pESP during the exposure period, one of the switches 14a-14c of the switching circuit 14 is turned on, for example, the switch 14d is turned on, and the corresponding transistor AVDD* 1/4 is supplied to the output terminal of the crystal T21. At the same time, the decoding unit η enables (Norway) = the signal SRE to conduct the transistor Τ2, and also enables the control signal % to the transistor T2G. Thereby, the transistor T21 traces the received voltage ν〇〇*ι/4 to its output to reset the level of the floating diffusion node FN. Therefore, the scattered node FN is at the falling f level during the subsequent operation in the readout period %. Further, since the transistor T20 is turned on, the charge on the cathode of the photodiode PD is refreshed (read esh). No. = time point T1 ' The decoding unit 11 reverses the de-rt reset signal 'to the transistor T21, and the decoding unit 11 also reverses the control signal 201220837 SC to turn off the transistor T20. During the exposure period ρΕχρ, the photodiode illuminates the light and accumulates the voltage on the cathode of the cathodic diode PD at its cathode according to the sensed light intensity. This is called the sensing signal ss ^ ° in the light of an embodiment. If you want the Alien 2 to run as a memory, do the following. During the exposure period Pexp 'the decoding circuit 12 turns on one of the plurality of switches 14a to 14c of the path I4, for example, the switch \ = is switched on and the corresponding voltage AVDD*3/4 is supplied to the conduction of the transistor T21 as an input signal. . At the same time, the decoding circuit 12 is enabled to reset the # terminal to conduct the transistor T21. The transistor T21 transmits this input signal to the complex terminal (i.e., the floating diffusion node FN) to store the voltage of the input signal = the output diffusion node FN. Therefore, pixel 2 acts as a memory cell, and a ^ wheel = signal. In addition, the transistor T22 of the source follower 21c is turned on or off according to the voltage of the input voltage (ie, the voltage on the floating diffusion node FN), and the access φ signal is turned on or off according to the transistor Τ22. It is generated at the output node NR as the readout signal SR. It is to be noted that, in the read period Pred, the read circuit 13 must read the read signal SR from the sense node NR of the sampling unit 21 and process the read signal SR. Next, the operation of PRED during reading will be described. At time point T2, the decoupling unit 11 again enables the reset signal SRE to conduct the transistor T21, and the transistor T21 again transmits the received voltage ACDD*1/4 to its output to reset the floating diffusion defect FN. Level. Next, the decoding unit 11 reverses the enable signal SRE at the time point T2a to turn off the transistor τ2 丨. At time 2 τπ ' the decoding unit u enables the control signal sc to conduct the crystal. Therefore, the transistor T2G transfers the sensing signal generated during the exposure period PE, s to the #-diffusion node FN. In other words, the sensing signal % 201220837 is sampled by the sampling unit 21. The node FN is reduced. The voltage at time and point is stored in the floating expansion P, pa Φ a ^ ” e, and the decoding unit 11 reverses the control signal SC to turn off the transistor T20. The voltage of the sensing signal SS (ie, the transistor 22 of ^21e) According to the pass or close. By this, the sense; column: the voltage of the diffusion node, and the readout signal is used as the readout signal team. At the time (4), the reading of the readout node is read. Output = fetch / sample from the sampling unit 21 out k 唬 SR, and process the read signal SR. Or as a; = example '昼素 2 can be used as - sensing cells to sense light, both: for e memory The cell is stored in the round signal, its exposure is pEXP, the tV object is referenced to f or corrected, and the crystal T2G is turned off, so the floating diffusion node exposure period ρΓρ ' _ the sensation signal SS on the lion is affected. Therefore, During the exposure period PPYD, the book goes from 0 to 1 · ^ to the floating diffusion section, and the memory is transmitted to transmit the above input signal P1" to store the memory 2 and according to the input signal, the access output signal is extracted as The signal SR is read. The sensing device 需要 requires fewer line buffers, thereby reducing the cost of the sensing device 1 and reducing its area. As shown in Fig. 2, the source follower 2ic of each pixel includes a transistor T22. In some embodiments, the source knower coupler 21 c configured in the same row of the plurality of cells share a current source and the current source is lightly connected to the respective sense nodes NR of the pixels arranged in the same row. Between ground and ground. In the embodiment of Fig. 3, during the readout period PRED, the readout circuit j 4 reads the readout signal 201220837 SR from the sense node NR of the sampling unit 21c. That is, the reading unit 14 reads the readout signal SR from the read node NR of the sampling unit 21c at the time point T2d. However, in other embodiments, a correlated double sampling (CDS) operation can be performed during the readout period PRED. In this case, the readout circuit 14 reads or samples the readout signal SR from the sense node NR of the sampling unit 21c at a point in time between the time points T2a and T2b, and has obtained a readout voltage. Then, the readout circuit 14 samples the readout signal SR at the time point T2d to obtain another readout voltage. Next, the read circuit 14 calculates the difference between the two read voltages, and the voltage difference indicates the intensity of the light sensed by the photodiode PD. The present invention has been disclosed in the above preferred embodiments, and is not intended to limit the scope of the present invention. Any one of ordinary skill in the art can make a few changes without departing from the spirit and scope of the invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims. 201220837 [Simplified Schematic] FIG. 1 shows a sensing device according to an embodiment of the present invention; FIG. 2 shows a pixel according to an embodiment of the present invention; and FIG. 3 shows a control signal and a reset signal in FIG. Timing diagram. [Description of main component symbols] Fig. 1: 1~ sensing device; 11~ column decoding circuit; 13~ readout circuit; SR~ readout signal;
10〜感測畫素陣列;; 11、12〜列解碼電路; 14〜切換電路; VS1...VS5〜電壓源;10~ sensing pixel array;; 11, 12~ column decoding circuit; 14~ switching circuit; VS1...VS5~ voltage source;
AVDD、AVDD*3/4、AVDD*2/4、AVDD*l/4、AGND 〜電壓;AVDD, AVDD*3/4, AVDD*2/4, AVDD*l/4, AGND~ voltage;
第2圖: 2〜晝素; 20〜感測單元; 21a〜轉移元件; 21c〜源極隨耦器; N20〜節點; PD〜光二極體; SRE〜重置信號; 14a〜14e〜開關; 21〜取樣單元; 21b〜重置元件; FN〜浮動擴散節點; NR〜讀出節點; SC〜控制信號; SS〜感測信號; T20、T21、T22〜電晶體; 第3圖: 201220837Figure 2: 2 ~ halogen; 20 ~ sensing unit; 21a ~ transfer element; 21c ~ source follower; N20 ~ node; PD ~ light diode; SRE ~ reset signal; 14a ~ 14e ~ switch; 21~sampling unit; 21b~reset element; FN~floating diffusion node; NR~reading node; SC~control signal; SS~ sensing signal; T20, T21, T22~ transistor; Fig. 3: 201220837
Pexp ΤΙ、 〜曝光期間; Pr_ED〜讀出期間; T2、T2a、T2b、T2c、T2d〜時間點 °Pexp ΤΙ, ~ exposure period; Pr_ED ~ readout period; T2, T2a, T2b, T2c, T2d ~ time point °
1212
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