TW201219760A - Circuits, methods, sub-systems and systems including adaptive analog subtraction for light sensing - Google Patents

Abstract

Circuits, methods, sub-systems and systems including adaptive analog subtraction for light sensing are described herein. In an embodiment, an analog circuit including a current mirror is configured to replicate a first current to produce a replicated version of the first current, and to subtract the replicated version of the first current from a second current to produce a third current. A mismatch correction circuit is configured to produce an adjustment signal, indicative of a mismatch error associated with the analog circuit, based on a digital version of the third current. This adjustment signal is used to reduce the mismatch error associated with the analog circuit.

Description

201219760 VI. Description of the Invention: [Technical Field of the Invention] Embodiments of the present invention generally relate to circuits, methods, subsystems and systems for optical sensing that include adaptive analog subtraction. These embodiments are particularly advantageous for reducing and better eliminating mismatch errors associated with analog circuits such as current shovel used to perform analog subtraction. && [Prior Art] The illuminator can be used as an ambient light sensor (ALS), for example, as an energy-saving light sensor for displays, for controlling mobile devices such as mobile phones and laptops: The back of the '' and for many other types of brightness measurement and management. As a more specific example, an ambient light sensor can be used as a device for controlling the display and/or keypad backlight to reduce the total power consumption of the display system and extend the liquid crystal display by detecting bright and ambient light conditions. UCD) life expectancy. Without an ambient light sensor, the LCD display; the first control is usually done manually, whereby the ambient temperature becomes brighter and the LCD's intensity is increased. In the case of an environmental money detector, the brightness of the LCD can be adjusted to their preference, and the brightness of the display can be adjusted with the week to make the display look at the same-perceived brightness level, resulting in extended battery life, the user's eyes. Reduce fatigue and extend life. Similarly, in the absence of ambient light sensors, the control of the keyboard backlight is very dependent on the user and the software. For example, the keypad backlight can be turned on by a trigger or timer for H) seconds, where the trigger = press the keypad trigger. By using ambient light sensor = when the surrounding environment is dim, it will be turned on, which will result in more m

4 S 201219760 For better ambient light sensing, the ambient light sensor has better spectral response of the human eye response, and the 1-8 has close to r & /, with excellent infrared noise suppression. BRIEF DESCRIPTION OF THE DRAWINGS In the following detailed description, reference to the claims The figure of the knife and the fine example. It should be understood that other embodiments may be utilized and that mechanical and electronic changes may be made. The following detailed description should not be construed in a limiting sense. In the following description, the same reference numerals will be used throughout the drawings. In addition, the first digit of the component symbolizes the first occurrence of the drawing. Figure 1A shows an exemplary spectral response of a bare photodetector (i.e., without any light: response shaping). The spectral response has a range of about 3 〇〇 nm to about 11 〇〇·, and its peak response is about 65 〇 nm. . Figure ib shows the blood type spectral response of the human eye. The spectral response has an approximate range of about 7 〇〇 nm: a peak response of about 55 〇 nm. As can be seen from the figures [A and 1B, the problem of using the 7F exemplary optical debt detector (pD) as an ambient light sensor (ALS) is that the exemplary pD detects both visible light and Detect. Invisible light such as infrared light from about the beginning is detected. Conversely, it can be noted from Figure ib that the human eye does not detect light above about 7 〇〇 nm and therefore does not detect infrared light. Therefore, the response of the PD is significantly different from the response of the human eye, especially when light is generated by an incandescent lamp that generates a large amount of infrared light. If the PD is used as an ALS to, for example, adjust the backlight, etc., it will provide an adjustment that is significantly lower than the optimal adjustment. Another problem with using PD as an ALS is that the PD produces a relatively small current even when no light is incident on the 201219760 PD. This current, often referred to as dark current or leakage current, is caused by the random heat generation of electrons and holes in the depletion region of the device that is subsequently scanned by the large electric field. When there is very low brightness light, the leakage current or dark current will also adversely affect the PE output. 2 illustrates an example circuit that can be used to attempt to generate a current having a spectral response similar to the typical human eye spectral response shown in FIG. 2, see FIG. 2, a first photodetector (PD1) and a second photodetector. The detector (PD2) is illustrated as receiving ambient light that is scattered, assuming it is ambient light that includes both ambient and ambient infrared light. PD 1 is configured (e.g., by covering it with a red light filter) to produce a first current indicative of ambient infrared light. Thus, η can also be expressed as Iir, where Iir is the current indicative of ambient infrared light. PD2 is configured (e.g., by overlaying it with a green light illuminator) to produce a second current 12 indicative of both ambient visible and ambient infrared light. Thus, 12 can also be expressed as ivis + , where Ivis is the current indicative of ambient visible light and Iir is the current indicative of ambient infrared light. In the figures, each photodetector PD 1, PD 2 is generally illustrated and described as a single PD. However, each PD can actually be implemented as a PD array. In other words, PD 1 may include one or more photodetectors, and PD2 may include one or more additional photodetectors. Current mirror 202 replicates current 11 to subtract from current 12 at the subtraction node (Nsub). A replicated version of 11 to produce a current 13 that primarily indicates ambient visible light. Preferably, the current mirror 202 has a gain of 1 (i.e., equal to 丨), so the current mirror 2 0 2 accurately replicates the current Π. However, due to the mismatch of the transistors in the current mirror (for example, the mismatch of the transistors Μ1 and M2 due to manufacturing variations), the gain of the current mirror 202 is 1 + Δ, which causes the complex 201219760 current generated by the current mirror 202. Is II *(1 + Δ) > where Δ (also referred to as "Delta") is the mismatch error of the current mirror 202. In other words, 13 = 12 — π*(1+ /\) = (Ivis + Iir) - Iir*(l + Δ ) = Ivis + Iir - Iir + Iir* Δ = Ivis + Iir* △. Since it is desirable to make 13 := lvis, it is desirable to make Δ = 〇. The analog current 13 or its digital version produced by analog to digital converter (ADC) 212 can be used to adjust the parameters or functions of the system or subsystem. For example, the analog current 13 or its digital version can be used to adjust the brightness of the display. However, as can be understood from the foregoing description, the mismatch error Δ adversely affects the accuracy of the current 13 and thus adversely affects the efficacy and usefulness of these adjustments. One way to attempt to remove the mismatch error Δ is Use a current mirror including a chopper circuit as will be described with reference to 3. Referring to circuit 300' in Fig. 3a, a current mirror including chopper circuit 3Q4 is shown. The chopper circuit 3〇4 receiving the chopping (CH〇p) signal having the chopping frequency (fCH0P) modulates the current mismatch Δ to the chopping frequency and makes the current mirror gain Δ, as can be seen from FIG. 3B and Figure 3C understands. More specifically, Fig. 3b is a diagram of the frequency content of the current II' and Fig. 3C is a diagram of the frequency content of the replica current generated by the current mirror 3〇2. The frequency content of the current 13 as explained with reference to Figures 5A and 5B is also similar to Figure 3C. ... '1 q? six not ίβ as the CH0P signal of the square wave alternating between the values +. Although other chopping signals can be used as described below, unless otherwise stated, it is assumed that the CH〇p signal shown in Fig. 3D is used for simplicity. The current mirror plus the replica current Π is used to subtract the replicated version of π from the current 12 7 201219760 at the subtraction node (4) to produce a current 13 that primarily indicates ambient visible light. As mentioned earlier, due to the chopper circuit 304, the replica current generated by the current mirror 3〇2 is Ι"(1±Δ)' where Δ (also referred to as "Delta") is a mismatch of the current mirror 3〇2 Error. Another way of expressing the replica current generated by current mirror 302 is Ι1+Π*Δ*(-1)λΝ, where...w. The replica current is subtracted from current 12 at the subtraction node (Nsub) to Generate current i3 = 12 - Il*(l +/- A) = Ivis-fIir - Iir+/- Πγ*Δ = Ivis + /- Iir* △. Another expression of current 13 is I3 = I2 _ + △ * (_1)ΛΝ) ' where N=〇,l,2,3 ...〇〇. Since I2 = ivis + Iir and ^ = Iir, 13 can be expressed as I3 = (Ivis + Iir) _ + △ ό'ν) =1仏+ 1^^*(_1), its center 〇,1,2,3..,.assuming two-phase CHOP signals alternating between +1 and -1, in these equations, Ν Each cycle of the CH〇p signal is incremented twice, and N is incremented once for each phase of the two-phase CH〇p signal. Referring again to Figure 3A, current 13 is shown as being supplied to ADC 212, which uses the analog current of ADC 212 The signal 13 is converted into a digital signal. However, due to the undesirable current mirror 03 The mismatch error Δ, the dynamic range of the ADC 2丨2 is reduced 'by thereby reducing the sensitivity of the optical subsystem containing the circuit 3〇〇. Figure 3E is generated by one or more photodetectors (PD2) An exemplary timing diagram of the third signal 13 of FIG. 3A resulting from the replicated version of the first current produced by the current mirror of FIG. 3A is subtracted from the second current 12. In other words, FIG. An example of the current ivis ± Iir* △, which can also be expressed as Ivis + Iir* △ ♦ (•◦λν. The timing diagram of Figure 3E shows how the mismatch error Δ of the current mirror 302 limits the dynamics of the adC 212 range,

S 201219760 The dynamic range depends on the reference current supplied to the ADC 212 ((iv). The average value of the picture π 丁 l 1 (AVG) is equal to the current Ivis, mvis is the current of interest indicating the visible light of the environment. The signal shown in Figure 3E The peak-to-peak vibrating field 疋 2 Δ *Ilr. As can be understood from Figure 3E, by making Δ = the number shown in Figure 3E will be equal to the current ivis, and the dynamic range of the ADC 212 will be maximized. As described now with reference to item 4, embodiments of the present invention use a mismatch correction circuit to compensate for the mismatch error Δ of the current mirror. More specifically, embodiments of the present invention can be used to reduce and better substantially The mismatch error Δ of the current mirror is eliminated. [Embodiment] Referring to FIG. 4, the subsystem 400 includes a mismatch correction circuit 42 用来 for adjusting the gain of the adjustable gain current mirror 4 〇 2 to borrow This reduces and preferably substantially eliminates the mismatch error Δ of the current mirror 4〇 2. The mismatch correction circuit 420 is illustrated as including an amplitude demodulator 422 and a digital filter 424. The digital output of the ADC 212, also referred to as data Signal, is provided to The demodulator 422. The amplitude demodulator that also receives the CHOP signal (or the copied or recovered version of the CHOP signal) can be implemented as a single multiplier, or as an envelope detector 'but not limited to this. The amplitude demodulator 422 In essence, amplitude demodulation is performed to translate the pitch at the chopping frequency down to DC by a value proportional to the mismatch error Δ. In this embodiment, the CHOP signal is available and thus available to the demodulator Alternatively, the CHOP signal may be reproduced or restored from the third current 13 using a phase locked loop (PLL), a csstas loop, or some other carrier signal recovery circuit, but is not limited to 201219760. The data signal rotated by ADC 2 12 is a digitized version of the third current π - one including the digital sample value (for each sampling period of ADC 212), which is an indication of ambient visible light. However, these digits The sample value changes up and down at the chopping frequency due to the mismatch error Δ. This occurs due to 13 = Ivis +/- Iir * Δ as before. The amplitude demodulator 422 receives the digital samples output by the ADC 212. Receiving a CH〇p signal (or a reproduced or restored version of the CHOP signal) and outputting a demodulated digital sample value that varies upward and downward around the baseband due to a mismatch error Δ, the average of the demodulated digital sample values Indicating the magnitude of the mismatch error Δ. In other words, the output of the demodulator 422 is a digit (four) containing a digital sample value proportional to the current Ivis (@ Δ. These digital samples are provided to the digital filter 424, The digital filter 424 can be implemented as a digital low pass filter (LPF) or a digital integrator, but is not limited thereto. The digital filter 424 filters out the current Ivis (@ fCH 〇 p) e. These digital filters can use, for example, an up-down counter. Or a digital adder to implement, but not limited to this. The signal output by the digital filter is proportional to the magnitude of the mismatch error Δ, and according to an embodiment of the invention, the signal output by the digital filter 424 is used to adjust the gain of the current mirror 402 to cause a mismatch error Δ. The angstrom difference Δ is reduced and preferably substantially eliminated. Therefore, the output of the digital filter 424 can be referred to as an adjustment (ADj) signal. The CHOP No. 4 used in Fig. 4 can be the same as the CHOP signal described in connection with Fig. 3d. However, since the chopping frequency (fCH0P) of the CH〇p signal shown in Fig. 3D is constant, if a noise source is in the vicinity of the circuit With a similar 10 s 201219760 frequency, the output of the mismatch error Δ can be adversely affected using embodiments of the present invention. To overcome this potential problem, the average of the quasi-random chopping frequency 'only #CHOP signal can be used to be substantially constant over a period of time (e.g., substantially zero). In order to avoid aliasing, in the process of performing correction by the mismatch correction circuit 々Μ, fCH 〇p is preferably smaller than the sampling rate frequency fs ° of ADC 2 1 2, for example, 'fCH0P may be equal to 込/2, but is not limited thereto. Advantageously, the mismatch correction circuit can perform its function even if the ADC 212 is overloaded. For example, if circuit Iir (indicating infrared light) is above the ADc full scale, ADC 212 may be overloaded. More specifically, when 2*Δ*Ir+bu. &gt; ADC 2 12 may experience an overload when the ADC is full scale. Advantageously, since the mismatch correction circuit 420 calculates the mismatch error in the frequency domain, it is not affected by the ADC overload. Depending on the implementation, the digital adjustment signal (ADJdigital) output by the digital filter 424 can be used to adjust the gain of the current mirror 402, or the ADjdigitai signal can first be converted to an analog adjustment signal by an optional digital to analog converter (DAC) 426. (ADJanal()g), and ADJanalQg can be used to adjust the gain of current mirror 402. The ADJ signal at a high level, whether digital or analog, is used to reduce and better substantially eliminate the mismatch error Δ by adjusting the gain of the current mirror 4〇2. In some embodiments, the adj signal can be used to substantially adjust the size of one or both of the transistors M1, M2 of the current mirror 402. This can be accomplished by selectively connecting and/or disconnecting (i.e., turning "on" and/or off) one or more of the transistors in the current mirror circuit, as explained in more detail with respect to FIG. In other embodiments, the ADJ signal can be used to adjust one or more electrical 201219760 voltages in the current mirror that affect the current mirror gain. Other variations are also possible and are within the scope of the invention. For simplicity, the current mirror 402 is illustrated as a simple current mirror comprising transistors M1 and M2'. The sources of the transistors M1 and M2 are connected to a high voltage mains, and the gates of the transistors M1 and M2 are connected. It is to be noted that at least one of the transistors M1 and M2 can be realized as a plurality of transistors which are selectively connected in parallel, as can be understood from FIG. 7 given below. Additionally, current mirror 402 may differ from and be more complex than the ones shown in the art and still fall within the scope of the present invention. For example, the current mirror can include a negative feedback resistor between the source of the transistors M丨 and M2 and the voltage rail. Alternatively, the current mirror can be implemented as a Widlar current mirror. Other changes are also possible. Further, although in the drawings, the transistors in the current mirror 402 are illustrated as PM〇s transistors, they may also be PNP bipolar junction (BJT) transistors. Alternatively, the transistor in the current mirror can be an NMOS or NPN transistor, in which case the current mirror can be connected to a low voltage rail such as a ground (rather than a high voltage rail) and the illuminator can be connected high. Between the voltage rail and the current mirror. In FIGS. 3 and 4, the chopper circuit 304 is used to selectively connect one of the transistors M1 and M2 in a diode manner (ie, connect the drain and the gate together), and the other transistor. Not connected in a diode. The diodes and gates of the transistors (Μ 1 or M2) connected in a diode are connected by a chopper circuit; 304 is connected to the anode of PD1, and the transistors are connected in a non-dipolar manner ( The drain of M2 or M1) is connected to the anode of PD2 by a chopper circuit 3〇4. In these figures, chopper circuit 304 is illustrated as a simple chopper circuit that includes four switches, but may be different and well known as / 12 201219760 or more complex, while still Within the scope of the invention. In Fig. 4 and other figures, the subtraction node (Nsub) is illustrated as being located outside the boundary of the current mirror 402 # dashed line, but it may also be 4 pieces of current mirror vision. The current mirror and the subtraction node may collectively be considered as an example of an analog circuit, the analog circuit being configured to replicate the first current to form the first, regardless of whether the subtraction node (Nsub) map # is within the current mirror. The current, work-replicated version 'Asia subtracts the replicated version of the first current from the second current to form a third current. The currents (respectively produced by pDi and generated) are performed according to the aforementioned embodiment of the present invention! Analogy subtraction of 1 and 12. Alternatively, the subtraction can be performed digitally and digitally on the current πίσ i2 (in parallel or sequentially). However, for various reasons, 'analog subtraction is superior to digital subtraction, analog subtraction is faster than digital subtraction and requires fewer circuits. Since the subtraction is not affected by quantization noise, the quantization noise will produce digital subtraction. The effect, and the dynamic range of ad_ such as 2 that digitizes the current (eg, 13) that produces the self-referred subtraction need not have as large a dynamic range as one or more ADCs used to perform digital subtraction. 'However, better than the mismatch error Δ of the current mirror, the possibility of performing analog subtraction using a current mirror may cause problems. Embodiments of the invention described herein are capable of reducing and better substantially eliminating the mismatch error Δ. (d) See the ® 4' mismatch correction circuit-like component as part of the feedback loop that reduces and better eliminates the mismatch error Δ associated with _ 4〇2. 212 can also be regarded as the _ part of the feedback loop. This way adjusts the gain of the current mirror so that the mismatch at the chopping frequency is small and well eliminated. In order to maximize the performance of the feedback loop, the digital transit 424 has a limited j) C gain. Fig. 5A is an exemplary graph showing the frequency content of the current 13 shown in Fig. 4 before the mismatch error of the current mirror is eliminated. Fig. 5B is an exemplary graph showing the frequency content of the two currents 13 shown in Fig. 4 after the mismatch error of the current mirror is eliminated by the mismatch correction circuit 420. Note that in Figure 5b, the magnitude of the current at the chopping frequency = is eliminated compared to Figure 5A. Fig. 6A is an exemplary graph showing how the adjustment (ADJ) signal converges to a constant level once the mismatch error Δ of the current mirror is cancelled at time q. Fig. 6B is an exemplary graph showing how PM 1 converges to zero at the same time. In other words (4) 6 and 6B show the mismatch error Λ in time. Close (and better equal to) zero. As previously mentioned, the gain of the current mirror 4〇2 can be adjusted by selectively connecting and/or disconnecting (i.e., turning on and/or cutting off) one or more transistors in the current mirror circuit. An example of how this can be done is shown in Figure 7, Figure: Out-Adjustable Gain Current Mirror 702 'The Adjustable Gain Current Mirror 7 〇 2 is an example of a current mirror 420 of the month 'J 5 hai Realize the moxibustion brother. Referring to Fig. 7, the transistor m2 is implemented as a parallel transistor M2l_M2n row, at least some of which are selectively connected to and disconnected from the circuit, and the valve U essentially adjusts the size of the transistor M2. Adjust the gain of current mirroring. The transistor called the mother can = equal weighted 'binary weighted or weighted in some other way. The ADJ signal is used to selectively open and close the switch, which selectively connects and disconnects the transistor in parallel with the transistor M2. Alternatively or additionally, the transistor M1 can be similarly implemented as a row of 14 δ 201219760. Parallel electric sun urchins can also have a row of optional transistors, each of which can be selectively connected in parallel according to an adjustment (ADJ) signal. At mi or M2, the gain of the current mirror is corrected by S. It will be appreciated by those skilled in the art from this disclosure that other examples are also possible and are within the scope of the invention. As mentioned earlier, an adjustment (ADJ) signal can be used to adjust one or more voltages in the current mirror that affect the current mirror gain. An example of how to accomplish this is not shown in Fig. 8, which shows an adjustable gain current mirror 8〇2, which is another of the current mirrors 4〇2 as before. The example is only present. Referring to Figure 8, the transistors Μ9 and Μ丨丨 operate in a triode mode (also called ohmic mode)&apos; and thus act as a tunable resistor. Therefore, the voltage at the source of the transistors Μ1, Μ2 of the current mirror 8〇2 can be adjusted using the electric crystal Μ9 and/or Mil to adjust the gain of the current mirror 802. The current mirror 8〇4 and the transistors Μ7, Μ8a and 闸8 are at the gate of the transistor Μ9, and thereby the resistance value of the transistor M9 is set, thus setting the voltage at the source of the transistor M1. The current source 806 and the transistors M10, M12 set the voltage at the gate of the transistor Mn, and thereby set the resistance of the transistor ,11, thus setting the voltage at the source of the transistor M2. Current source 806 is illustrated as being adjustable by an adjustment (ADJ) signal, thereby adjusting the gain of current mirror 8〇2. Alternatively or additionally, current source 804 can be adjusted by the delta-round (ADJ) # number. Other variations are also possible and are within the scope of the invention. Referring back briefly to Figure 4, according to one embodiment, an adjustable gain current mirror 4〇2 (with or without ADC 212) can be implemented as an integrated circuit (1C), also referred to as a wafer. The wafer also includes pins or other connectors for connecting to the photodetectors of PD1 and PD2 (if pm and pD2 are on wafer 15 201219760). Alternatively, the optical detectors of PD1 and PD2 can also be included on the same wafer as the adjustable gain current mirror 402. According to one embodiment, mismatch correction circuit 420 is external to the wafer, which includes adjustable gain current mirror 402 and is used during wafer fabrication and post-manufacture testing to calibrate adjustable gain current mirror 402. In this embodiment, once the gain of the current mirror 402 is set to substantially eliminate the mismatch error Δ, the fuse or equivalent can be permanently set. Alternatively, the mismatch correction circuit 420 can be implemented on the same wafer or wafer set as the adjustable gain current mirror 420 ' and can use the mismatch correction circuit 420 continuously or selectively to update the adjustment (ADJ) from time to time. The signal thereby compensates for circuit variations due to temperature variations and aging of the transistors and/or other components within the current mirror 402. For example, assuming that current mirror 402 and mismatch correction circuit 420 are part of a subsystem for a larger system, mismatch correction circuit 420 can be used to periodically periodically before system operation (eg, during system or subsystem power up) Or adjust the gain of the current mirror as needed. In the event that the mismatch correction circuit 42 is used periodically or on demand, the mismatch correction circuit 42 interrupts some other functions of the system, can also be run in the background, or when the system is in the sleep or standby mode. The mismatch correction circuit 420 is, but not limited to, this. Figure 9 illustrates an exemplary system 9 for selective (e.g., power up) calibration of current mirrors 4〇2, in accordance with one embodiment of the present invention. Referring to Figure 9, when the calibration (CAL) <° is low, the inverse calibration (0ΧΕ) signal is high, the transistors M3 and Μ 4 are cut off, and the factory is &lt; the electric day, the bodies M5 and M6 are turned on, And the circuit of Fig. 9 operates in the same manner as the circuit of Fig. 4 -V τ , . However, when the calibration (CAL) signal is set to high

16 S 201219760 _, the inverse calibration (61) signal is low, transistors M3 and ]VI4 are turned on, and transistors M5 and M6 are turned off, which causes pd 1 and PD2 to be disconnected from the rest of the circuit, and current sources 904, 906 (They produce ICAL1 and ical2, respectively) are connected to the location where pD1 and PD2 are located. Advantageously, the calibration of the current mirror 420 occurs when the current sources 904, 906 are used in place of PD 1 and PD 2 'even when no light is incident on pj) 1 and PD2. System 900 can operate as follows: 1. Set the frequency of the CHOP signal (i.e., fCH 〇p) to half or less the sampling rate (fs) of adc 212; 2. set CAL to high; 3 - enable calibration current ICAI And iCAL2; 4. Set CHOP=l and measure the data sampling at the output of ADC 212; 5. Set CHOP=-1 and measure the data sampling at the output of ADC 212; 6. Set the adjustment (ADJ) signal to reduce when cHOP= l and the difference between the data samples measured at the ADC output when CJ〇P = one; 7. Repeat steps 4-6 until the data samples at CH〇P=l and CH0P=-1 are the same; Setting CAL low; and, the normal state 9_ sets the frequency of the CHOP signal (ie, fcH〇p) back to normal to be higher than the sampling rate (fs) of the ADC 212.

Convert and store ADC 212

The sample is initially held high and the ADC is sampled by the data at the output of the digital 212, for example, stored in the register CHOP丨5 and kept at the second adC C 212 output. For example, 篓 17 201219760 The subtraction circuit compares the stored results of two conversions. When the data output of (1) is independent of (i.e., equivalent to * tube) the state of the (10) p signal, the mismatch error Δ is eliminated. Figure 10 is a high level flow chart for summarizing the method in accordance with some embodiments of the present invention. Referring to circle 10, the first current n and the second current 12 are received at step 1 〇〇 2 ', for example by current mirroring in FIG. At the step of the purchase, an analog circuit is used to replicate the first current n to thereby generate a replicated version of the first current (II+/_Δ) and subtract the copied version of the first current from the second current 12 to thereby generate a third Current 13. At step 〇〇6, an adjustment (na) signal is generated based on the digital version of the third current η, wherein the adjustment signal indicates a mismatch error Δ associated with the analog circuit. In step 1-8, the adjustment signal is used to reduce the mismatch error Δ associated with the analog circuit. As previously mentioned, the analog circuit can include a current mirror and can be used in step 1008 to adjust the gain of the current mirror, thereby reducing the mismatch error Δ associated with the analog circuit. As described, in accordance with an embodiment of the present invention, step 1006 is performed using a digital circuit, more specifically using the mismatch correction circuit 42A of FIG. More specifically, step 1006 can include amplitude demodulating a digital version of the third current to thereby generate a digitally demodulated signal and digitally filtering the digitally demodulated signal to thereby generate an adjustment signal. According to a particular embodiment, the first current Π is an indication of ambient infrared light, the second current 12 is an indication of ambient visible light and ambient infrared light, and the third current is ambient visible light and a portion of ambient infrared light proportional to the mismatch error Instructions. Once the mismatch error is eliminated using the adjustment signal, the third current is an indication of ambient visible light. Figure 11 illustrates an example system in which embodiments of the present invention may be implemented. According to this

18 S 201219760 Invented · ^ 施 施 , έΑ 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 The circuit circuit) just includes the mismatch correction path 42〇. The target circuit ιι 6 (e.g., another integrated circuit) is located on the circuit board 1108 and shank to the circuit 11A4. In one aspect, the circuit 1106 includes a current mirror circuit 402, an ADC 212, and/or a DAC 426. Specifically, the target circuit 11〇6 is tested by the ATE 1102. The mismatch correction circuit 420 can detect the mismatch error and generate an adjustment (ADJ) signal based on the digital output signal, and the adjustment (adj) signal can be used to calibrate the gain of the current mirror circuit 4G2 in the target circuit 1106 and remove the loss from the output signal. With error. Implementing the mismatch correction circuit 42() on the ATE 1102 can reduce the hardware on the target circuit 1106 and thus reduce complexity and cost. See Figure 12&apos; in Figure 2, which shows a block diagram of a User Equipment (UE) 1200, which includes a mismatch correction circuit 420, in accordance with one embodiment of the present invention. The UE 1200 can be any common consumer electronic device used by the user, such as, for example, a mobile phone, a personal digital assistant (PDA), a laptop, a personal computer, a media player, a game console, a media recorder, a tablet. , TV, etc. UE 1 may include a processor 12〇2 for controlling all onboard operations and processes. The memory 12〇4 can be coupled to the processor 12〇2 to store data and one or more applications 1206 executed by the processor 12〇2. Communication component 12A8 can be coupled to processor 12A2 for facilitating wired/wireless communication with external systems. The UE 12A may also include a power source 1226 in the form of a battery, which is further coupled to the external power system or charge δ via the power component 1228. In addition, [/〇 interface 丨2丨2 is set to communicate with processor 1202 to facilitate serial communication, such as via hardwired connections (e.g., 19 201219760 and/or IEEE 13 124). In addition, audio capabilities are provided via speaker/microphone component 1214. In addition, the UE 1200 can include a slot interface 1216 for receiving the subscriber identity module (8) (4) (2) 8. A workstation 122 is also provided to store boot and/or operational data and provide it to the processor m2e. In one aspect, the display may include a display 121G' for downloading content and/or display and operating and using device features. Associated text information. In one example, display mo can be a touch screen. The UE 12A may also include an image couching component 1222, such as a camera and/or video decoder for decoding the encoded multimedia content. In an example, image capture component 1222 can include PD1 and PD2 that produce n and 12, where n is an indication of ambient infrared light and i2 is an indication of ambient visible light and ambient infrared light. Additionally, the UE 1200 can include gain adjustable current mirror circuits 〇2, adc 2 12, and mismatch correction circuit 42A, which can include a number of functions as described more fully above. According to one embodiment, ALS control component 1224 can receive a signal indicative of ambient visible light incident on UE 12 and, based on the signal, control various elements in UE 12A. For example, the als control component 1224 can adjust the settings of the display 1212 or backlight (eg, brightness control, contrast, etc.), turn off the power 1226, and correct parameters of the image capture component 1222 (eg, focal length, aperture setting, aperture value, exposure time, etc.) . Referring again to FIG. 4 and the other figures previously described, pDi can be configured to generate a current that primarily indicates ambient infrared light incident on PD1 and PD2, while PD2 can be configured to generate an ambient infrared that primarily indicates incident on ΡΕΠ and Pd2. Light and ambient visible current 12 . To this end, pdi and PD2 can be adapted

20 S 201219760 The color filter is covered, for example with red and green filters, respectively. The red filter is an infrared absorption filter, and the green filter provides a first approximation of the standard human eye spectral response, as green dominates the human horizon. However, additional and/or other color filters can be used. It is also possible to laminate the filter layers to each other. For example, the photodetection constituting pD2 may be covered by a green filter', and the photodetector constituting PD1 may be covered by a green filter and a red filter which are stacked one on another. For example, U.S. Patent No. 7,96, entitled "Amblent Light Detectors Using Conventional CMOS Image Sensor Process", which is incorporated herein by reference. 〇, as described in the art, the light (4) constituting the PD1 can be covered by the green light illuminator, and the first subset of the light dampers that are formed by the cut can be covered by both the green and red choppers, and the optical debt measurement of the PD2 is formed. The second subset of the devices may be covered by both green and black choppers. In addition, alternative and/or other types of illuminators may be used, such as reflective filters, such as dielectric reflective optical coating filters. Each of the fillers described herein can be placed on a commercially available photodetector or on the same wafer as the photodetector. For another example, the photodetector described in U.S. Patent No. 5, entitled "Light Sensors with Infrared SU: P::SSi〇n", can be described by i7. The active light detector region is covered with one or more layers inherent to CMOS technology (eg, a lithiated layer and/or a polysilicon layer) to produce an electrical &quot;IL that primarily indicates infrared light. As described in the '117 patent Oxide layers and/or oxide wells may be incorporated into the photodetector during fabrication of the photodetector, wherein the layers and/or wells are designed to selectively absorb infrared light or visible light or pass 21 201219760. Other variations are also possible and within the scope of the invention. Certain embodiments of the invention are also directed to methods of generating a current that primarily indicates a target wavelength of light, such as the wavelength of visible light. In other words, implementation of the present invention Examples are also directed to methods of providing a sensor subsystem having a target spectral response (e.g., a response similar to that of a human eye). Additionally, embodiments of the present invention are also directed to methods of using the aforementioned sensor subsystems. In an example, the target response is often expressed as a response to a typical human eye that observes scattered light. However, this is not necessarily the case. For example, other target responses may be directed to the generated current (13), which indicates light of a particular color, For example, red, green or blue. These sensor subsystems can be used, for example, in digital cameras, color scanners, color photocopiers, etc. Multiple instances of the previously described embodiments can be used, for example, simultaneously (e.g., in parallel) for inclusion. A strictly defined spectrally responsive spectrometer. Embodiments of the invention may also be used to calibrate or otherwise control illuminating elements (e.g., laser diodes or light emitting diodes) that may be used in optical storage subsystems, Within the proximity detection subsystem, etc. In the foregoing embodiments, PD1 is often described as being configured to generate a current II indicative of ambient infrared light, while PD2 is often described as being configured to generate a current 12 indicative of ambient infrared light as well as ambient visible light. Subtracting the replicated version of η from 12, the resulting current 13 indicates ambient visible light, and thus, the resulting sensor subsystem has A typical human eye has a similar spectral response. In these embodiments, ambient visible light is referred to as desired light, while ambient infrared light is referred to as undesirable light. Other embodiments in these embodiments and in the alternative target spectral response therein In the current, the current 12 can be regarded as indicating the expectation from the species.

22 S 201219760 ' and the current 11 can be regarded as an indication from the species

The first order elimination of the dark current associated with PD2. The current of light and undesired light, the current of the light. By way of example, various embodiments of the invention have been described above, but they are intended to be given by way of example and not limitation. Various changes in form and detail may be made in the present invention without departing from the spirit and scope of the invention. Any one to limit the effect to limit. The breadth and scope of the present invention should not be taken from the above-described exemplary embodiments, but only in accordance with the scope of the accompanying claims, and the like. FIG. 1A shows an example of a photodetector without any spectral response shaping. Sexual spectral response. Figure 1B shows a typical spectral response of the human eye. 2 illustrates a circuit in which a current mirror is used to replicate a first current generated by one or more photodetectors and subtract the copied current from a second current generated by one or more other photodetectors. A third current that can be used as a 彳§ indicating ambient light is generated. 3A illustrates an analog circuit in which a current mirror (including a chopper circuit) is used to replicate a first current generated by one or more photodetectors and from a second generated by one or more other photodetectors The current is subtracted from the current to produce a third current that can be used as a signal indicative of ambient light. 23 201219760 FIG. 3B is an exemplary graph showing the frequency content of the first current π generated by one or more money detectors (PD1) before being copied by the current mirror of FIG. 3A. Is an exemplary graph showing the first-current (four) (four) capacitance produced by one or more other optical detectors after being copied by the current mirror including the chopper circuit of FIG. Figure D shows an exemplary chopping signal that can be used to drive the chopper circuit of Figure 3A. a shows an example of the second signal 13 in FIG. 3A, which is subtracted from the second current 12 generated by one or more photodetectors (PD2) by the current mirror of FIG. Generated by the generated copy of the first current ^. The circuit of one embodiment of the present invention is illustrated, such as a sensor subsystem </ RTI> which can be used to reduce the mismatch error of the analog circuit described in Figure 3A. Figure A shows an example plot of the frequency content of the current η shown in Figure 4 before the current mirror mismatch error is removed. Figure B is a graph showing an example of the frequency content of the current η shown in Figure 4 after eliminating the current mirror mismatch error. Fig. 6A is an exemplary graph showing how the adjustment (ADJ) signal converges to a constant level by eliminating the mismatch error of the current mirror. Figure 6B shows an exemplary graph of how a portion of the current caused by the mismatch error converges to zero when the mismatch error of the current mirror is removed. Figure 7 illustrates an implementation of the adjustable gain current mirror illustrated in Figure 4, in accordance with one embodiment of the present invention.

S 201219760 FIG. 8 illustrates an implementation of the gain current mirror of FIG. 4 in accordance with another embodiment of the present invention. Figure 9 illustrates an alternative calibration system for a current mirror in accordance with the present invention. Figure 10A is a high level diagram for summarizing a method in accordance with an embodiment of the present invention. Figure 11 illustrates an exemplary system in which embodiments of the present invention may be implemented. Figure 12 illustrates how an embodiment of the present invention can be applied to provide accurate ambient light sensing for a variety of types of consumer devices. [Main component symbol description] 200 300 400 Circuit 202 204 Current mirror 212 Analog to digital converter (ADC) 302 Current mirror with chopper circuit 304 Chopper circuit 402, 702, 802 Adjustable gain current mirror with chopper circuit 420 Mismatch Correction Circuit 422 Amplitude Demodulator 424 Digital Filter 426 Digital to Analog Converter (DAC) 804, 806, 904, 906 Current Source 1002, 1004, 1006, 1008 Method Step 1100 System 1102 Automatic Test Equipment (ATE) 1104 Circuit Adjustable Quasi-current 25 201219760 1106 Target Circuit 1108 Circuit Board 1200 User Equipment (UE) 1202 Processor 1204 Memory 1206 Application 1208 Communication Element 1210 Display 1212 Serial Input/Output (I/O) Interface 1214 Speaker / Microphone Element 1216 Slot Interface 1218 User Identification Module 1220 Firmware 1222 Image Capture Element 1224 Ambient Light Sense (ALS) Control 1226 Power Supply 1228 Power Input/Output (I/O) Component ADJ Adjustment Signal CHOP (C) 斩Wave signal fcHOP chopping signal frequency 11, 12, 13 current IcAL1, ICAL2 calibration current Iir indicating ambient infrared light Current Iref Reference Current 26 201219760

Ivis indicates Ml to M12 electro-crystal Nsub subtraction PD1, PD2 optical detection ambient visible current body node detector 27

Claims (1)

201219760 VII. Patent application scope: 1. A subsystem comprising: an analog circuit configured to replicate a first current to generate a replicated version of the first current, and subtracting the copy of the first current from the second current a version to provide a third current; and a mismatch correction circuit configured to generate an adjustment signal based on the digital version of the third current, the adjustment signal indicating a mismatch error associated with the analog circuit; wherein the adjustment is used The signal is used to reduce the mismatch error associated with the analog circuit. 2. The subsystem of claim 1, wherein: the analog circuit comprises a current mirror configured to replicate a first current to produce a replicated version of the first current; and the mismatch correction circuit includes a current mirror configured to adjust The gain of the circuit to thereby reduce the mismatch error associated with the analog circuit. 3. The subsystem of claim 2, wherein the mismatch correction circuit is configured to selectively adjust the current mirror by selectively connecting and/or disconnecting one or more transistors in the current mirror circuit Gain. 4. The subsystem of claim 2, wherein the mismatch correction circuit is configured to adjust a gain of the current mirror by adjusting one or more voltages within the current mirror. 5) The subsystem of claim 2, wherein: the current mirror comprises a chopper circuit driven by a chopping signal; and the mismatch correction circuit comprises: 28 S 201219760 digital amplitude demodulator, the digital amplitude solution The modulator is configured to demodulate the digital version of the third current using a reproduced or recovered version of the chopped or chopped signal to thereby generate a digitally demodulated output; and a digital filter configured to be paired The digital demodulation output is filtered to thereby generate an adjustment signal. 6. The subsystem of claim 5, the method comprising: analog to digital converter (ADC), the analog to digital converter configured to receive a third current and output a digital version of the third current, the A digital sample of three currents is provided to the digital amplitude demodulator. 7_ The subsystem of claim 5, wherein the digital amplitude solution includes a multiplier 'Shaw multiplier configured to multiply the digital version of the third current by a recovery of the chopping signal or the chopping signal or The version is reproduced, thereby generating a digitally demodulated output filtered by the digital filter to produce an adjustment signal. 8. The subsystem of claim 2, wherein: the first current comprises a current generated by one or more photodetectors; the second current comprises one or more other photodetectors a generated current; a first current is applied to the current mirror; and the current mirror produces a replicated version of the first current. 9. The subsystem of claim 8 wherein: the subsystem includes an ambient light sensor (ALS) subsystem; the first current indicates ambient infrared light; and the second current indicates ambient visible light and ambient infrared Light; the second current indicates ambient visible light and a 29 201219760% infrared light proportional to the mismatch error. 10. The subsystem of claim 8 wherein the first current indicates undesired light; the light is undesired; and the second current indicative of the mismatch error indicates the desired light and the third The current indicates the desired light and the undesired light. Such as the scope of application for patents! The subsystem of the item, its part-part' and which causes the mismatch correction circuit to be applied according to one less choice: 5 during the power-on of the system or subsystem; before the system is operated; during the operation of the system In the background of the system; during the product testing of the system or subsystem; periodically; or as needed. 12. A method of reducing a mismatch error associated with an analog circuit, comprising: (a) receiving a first current and a second current; (b) replicating the first current using an analog circuit to produce a replicated version of the first current And subtracting a replica version of the _ current from the second current to thereby generate a third current; (c) generating an adjustment signal based on the digital version of the second current, wherein the adjustment signal indicates a mismatch associated with the analog circuit Error; and (d) use the adjustment signal to reduce the mismatch error associated with the analog circuit. 30 S 201219760 Difference 0 13. As in the patent application, the current mirror is included and the gain of the step flow mirror is thereby reduced 14. Perform step (c) as in the scope of the patent application. The method of item 12, wherein the analog circuit package (d) includes using the adjustment signal to adjust a mismatch error associated with the electrical analog circuit. The method of item 12, wherein the digital circuit is used. The method of claim 12, wherein the step (4) comprises: (c-1) the third electric household &amp;#&gt; π 士仏1丄一4 motor The digital version is amplitude demodulated to thereby produce a digitally demodulated signal; and i (C.2) digitally filters the digitally demodulated signal to thereby generate a squaring signal. The method of claim 12, wherein: the first current indicates undesired light; the second current indicates desired light and undesired light; and the third current indicates desired light and mismatch error A proportion of the light is not expected. 17 • The method of claim i6, wherein the method further comprises: ▲ (e) adjusting the parameter or function according to the digital version of the third current or the third current. 1 8. A system comprising: a first subsystem comprising: an analog circuit configured to replicate a first current to generate a replicated version of the first current and subtract the first current from the second current Copying the version to generate a third current; 31 201219760 analog to digital converter (ADC), the analog to digital converter configured to generate a digital version of the third current; and a mismatch correction circuit based on the third The digital version of the current is configured to generate an adjustment signal indicative of a mismatch error associated with the analog circuit; wherein the adjustment signal is used to reduce a mismatch error associated with the analog circuit; and the second subsystem 'the second sub The system is configured to adjust based on the digital version of the third or third current. 19. The system of claim 18, wherein: the first subsystem comprises an ambient light sensor (gossip) subsystem; and the first subsystem comprises a display, the display being configured to be based on the third current Or a digital version of the second current to adjust its brightness. 20. The system of claim 18, wherein the system comprising the first and second subsystems comprises at least one of: a mobile phone; a personal data assistant; a tablet; Laptop; media player; media recorder; TV; and game module. 32 S