201205972 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種記憶體模組（memory module)，且特別是有 關於—種記憶體模組的週邊電路區（peripheral circuit region)結 構及其製作方法。 【先前技術】201205972 VI. Description of the Invention: [Technical Field] The present invention relates to a memory module, and more particularly to a peripheral circuit region structure of a memory module and Its production method. [Prior Art]
隨著科技的發展，諸如動態隨機存取記憶體（dynamic random access memory，SDRAM)與快閃記憶體（fiash memory)等記憶體模 組已越來越普及。而如何能提升記憶體模組的生產良率一直都是記憶 體模組製造商所不斷追求的課題之一。 般來S兒，記憶體模組通常會包括一記憶單元區以及位於記憶單 元區外圍的-週邊電路區。其中，週邊電路區内具有複數個支樓件以 及被這些支撐件間隔開來的複數個電性連接塾，並且記憶單元區可透 過這些m連絲連接於其他電子裝置Q在目前f見的記憶體模 組中，支撐件的高度通常僅會略高於雜連接㈣高度。因此，以輸 送帶（C_yer)輸送記憶體模組時，電性連接墊可能會因為支撐件 的，度不足而容易被輸送帶或滚輪㈤⑻麟，_降低了記憶 納nr是’目是由直接形成於基板上的防銲層來作為 支撐件、、'而’電性連接墊之間的空間極 較窄’因此目前支_剛性⑽袖）術較 容易達成 ，、以增加防輝層厚度的方式來加高支撐件的高度，二^上:不要 201205972 【發明内容】 拔κ ί 了解決上述問題’本發明提供一種記憶體模組的週邊電路區結 一製作方法，其支撐件的高度明顯高於電性連接墊的高度。 本發明提供-種記憶體模組的週邊電路區結構，包括一基板、複 3電性連接墊叹與這些連交錯配㈣基板上的複數個支 牙午。各支撐件包括-_物以及—_層，其中間隙物配置於基板 於雷層覆蓋間隙物，以使支樓件凸出於基板表面的高度會高 二塾凸出於基板表面的高度’其中間隙物的剛性大於防銲層 的剛性。 本發明更提供_種記憶體模組的週邊電路 及一防鲜層。圖案化金屬層配置於基板上二 =個電性連接塾以及與這些電性連接塾呈交錯配置的複數個金屬間 2。防銲層覆蓋這些金屬間隙物，以形成複數個支標件，進而使支 =凸出於練表_高度會高於紐連接墊凸出板表面的高 本發蚊提供-種製作記憶難_週邊電㈣結構的方法，包 首先’在一基板上形成一圖案化金屬層，其中圖案化金 個電性連接塾以及與這些電性連接塾呈交錯配置的複數 :=物，广反上形成一防輝層，其中防鲜層覆蓋這些 供去㈣场紐數個讀件，並且暴露出這些m連接墊，以 一=件凸出於基板表面的高度會高於電性連接塾凸出於基板表面的 南度。 月的實施例中’上述的各間隙物是由複數個凸起物所組 二個電性連難之間呈—直線排列，並且其凸出於 ^板表面的高度大致上等於電性連接塾凸出於基板表面的高度。其 中’這些凸起物可為金屬凸起物。 ' 在本發明的-實施例中，上述的記憶體模組的週邊電路區結構更 201205972 包括覆蓋紐連接墊的金屬鍍膜。其巾，金屬賴可域金錢膜。 為讓本發_上轉徵和優絲更_驗，下文郷多個實施 例，並配合所附圖式，作詳細說明如下。 【實施方式】 圖1繪不出本發明-實施例中—種記髓模組的結構示意圖。圖2 繪示出圖1中沿A—A線的剖視圖。請先參考圖1所示，於此實施例中， 記憶體模組1GG可以是祕隨機存取記紐、快閃記髓或是其他記 憶體权組’其可具有一記憶單元區腿以及位於記憶單元區1〇〇a外 圍的-週邊電路區難。記憶單元區1〇〇a内可包括有複數個記憶單 元，其例如疋由穿隧氧化層（tunnel 〇xide)、浮置閘極（fl⑽ gate)、介電層（dielectric layer)與控制閘極（contr〇i gate)所 組成的堆疊閘極結構（stacked gate strueture)。為簡化圖示圖1 中省略了記憶單元區100a内的詳細結構。 接著，請參考圖1與圖2所示，週邊電路區l〇〇b内的結構包括有 一基板11〇、複數個電性連接墊12〇以及複數個支撐件13〇，其中電性 連接墊120電性連接於記憶單元區1〇〇a内的記憶單元，並且與支撐件 130交錯配置於基板上。也就是說，記憶單元區100a内的記憶單 兀可透過由讀件⑽間Μ來的電性連触12G電性連接於其他電 子裝置（未繪示）。 再者，各支撐件130包括一間隙物132以及一防銲層134，其中間 隙物132配置於基板11〇上，並且防銲層134覆蓋住間隙物132，以使 支撐件13〇凸出於基板110表面的高度會明顯高於電性連接墊120凸 出於基板110表面的高度。如此一來，即可改善先前技術中記憶體模 組被輸送帶或滚輪刮傷的現象。值得注意的是，在本實施例中，由於 間隙物132的剛性會大於防銲層134的剛性，因此將支樓件130的整 體冋度增加至明顯高於電性連接墊120時，支撐件130較不容易產生With the development of technology, memory modules such as dynamic random access memory (SDRAM) and flash memory have become more and more popular. How to improve the production yield of memory modules has always been one of the topics that memory module manufacturers are constantly pursuing. As a general rule, a memory module usually includes a memory cell area and a peripheral circuit area located at the periphery of the memory cell area. Wherein, the peripheral circuit area has a plurality of branch building members and a plurality of electrical connecting ports spaced apart by the supporting members, and the memory unit region can be connected to the other electronic devices through the m-connecting wires. In the body module, the height of the support is usually only slightly higher than the height of the miscellaneous connection (four). Therefore, when the memory module is transported by the conveyor belt (C_yer), the electrical connection pad may be easily conveyed by the conveyor belt or the roller (5) (8) because of the insufficient degree of the support member, and the memory is n' The solder resist layer formed on the substrate serves as a support member, and the space between the electrical connection pads is extremely narrow. Therefore, the current support (rigid (10) sleeve) is easier to achieve, and the thickness of the anti-glare layer is increased. The method is to increase the height of the support member, and the above-mentioned problem is solved by the invention. The present invention provides a method for manufacturing a peripheral circuit region of a memory module, and the height of the support member is obvious. Higher than the height of the electrical connection pad. The present invention provides a peripheral circuit area structure of a memory module, comprising a substrate, a plurality of electrical connection pads, and a plurality of teeth on the interdigitated (four) substrate. Each of the support members includes a layer of -_ and a layer, wherein the spacer is disposed on the substrate to cover the spacer in the layer of lightning, so that the height of the branch member protruding from the surface of the substrate is higher than the height of the surface of the substrate. The rigidity of the object is greater than the rigidity of the solder resist layer. The invention further provides a peripheral circuit of the memory module and a anti-fresh layer. The patterned metal layer is disposed on the substrate with two electrical connections and a plurality of metal spaces 2 interlaced with the electrical connections. The solder mask covers the metal spacers to form a plurality of support members, so that the support = convex is higher than the height of the new connection pad protruding from the surface of the new connection pad. (4) a method of structure, the package firstly forming a patterned metal layer on a substrate, wherein the patterned gold electrical connections and the complex numbers of the electrical connections are arranged in a staggered manner: a layer of glazing, wherein the anti-frying layer covers the readings of the four (4) fields, and the m-connecting pads are exposed, so that the height of the surface of the substrate is higher than the electrical connection and protrudes from the surface of the substrate. South degree. In the embodiment of the month, the above-mentioned spacers are arranged in a straight line by two electrical connections between the plurality of protrusions, and the height of the protrusions from the surface of the board is substantially equal to the electrical connection. The height of the surface of the substrate. Among them, these protrusions may be metal protrusions. In the embodiment of the present invention, the peripheral circuit area structure of the above memory module further includes a metal coating covering the new connection pads. Its towel, metal Lai domain money film. In order to make the present invention more detailed, the following is a detailed description of the following embodiments, together with the accompanying drawings. [Embodiment] FIG. 1 is a schematic view showing the structure of a seed card module in the present invention. Figure 2 is a cross-sectional view taken along line A-A of Figure 1. Please refer to FIG. 1 first. In this embodiment, the memory module 1GG may be a secret random access memory, a flash memory, or another memory weight group, which may have a memory unit leg and be located in the memory. The peripheral circuit area around the cell area 1〇〇a is difficult. The memory cell region 1a may include a plurality of memory cells, such as a tunnel oxide layer, a floating gate (fl(10) gate), a dielectric layer, and a control gate. (strcedi gate) A stacked gate strueture. The detailed structure in the memory cell region 100a is omitted in Fig. 1 for simplification of the illustration. Next, referring to FIG. 1 and FIG. 2, the structure in the peripheral circuit area 10b includes a substrate 11A, a plurality of electrical connection pads 12A, and a plurality of support members 13A, wherein the electrical connection pads 120 The memory unit is electrically connected to the memory unit 1a and is arranged on the substrate in a staggered manner with the support member 130. That is to say, the memory unit in the memory unit area 100a can be electrically connected to other electronic devices (not shown) through the electrical contact 12G from the reading unit (10). Moreover, each support member 130 includes a spacer 132 and a solder resist layer 134, wherein the spacer 132 is disposed on the substrate 11 , and the solder resist layer 134 covers the spacer 132 to protrude the support 13 The height of the surface of the substrate 110 may be significantly higher than the height of the electrical connection pads 120 protruding from the surface of the substrate 110. As a result, the phenomenon that the memory module is scratched by the conveyor belt or the roller in the prior art can be improved. It should be noted that, in this embodiment, since the rigidity of the spacer 132 is greater than the rigidity of the solder resist layer 134, the overall twist of the branch member 130 is increased to be significantly higher than that of the electrical connection pad 120. 130 is less prone to
Γ SI 201205972 先前技術中強度不足的現象。 於此實施例中’在對形成於基板11G上的金屬層（未緣示）進行 圖案化以形成電性連接墊120時，可一併在電性連接塾⑽⑶ 間隙物132，其中間隙物132可由複數個凸起物所組成，並且可在二個 電性連接塾120之間呈-直線排列。換句賴，連接塾12〇 隙物132可為相同的金屬材質，並且二者凸出於基板11〇表面的^ 亦可為相同。但在其他實施例中，間隙物132亦可以其他材質製成二 並且其凸出於基板i10表面的高度亦可略高或略低於電性連接塾⑽ 凸出於基板110表面的高度。 另外’週邊電路區l〇〇b更可包括一金屬麵14〇，其覆蓋住電性 連接塾120，並且其厚度明顯小於防鲜層134的厚度，以使支撐件⑽ 凸出於基板110表面的高度仍會明顯高於電性連接塾12〇凸出於基板 no表面的高度。其中，金屬鑛膜140可為錄金鑛膜，用 ς 接塾120氧化。 ^ 圖3、曰示出本發明一貫施例中一種記憶體模組的週邊電路區結構 $作方法的流程圖。請參考圖3所示，首先，在一基板上形成一金 屬層，贿對金屬層進行贿化，以形成—圖魏金屬層，其中圖案 匕金屬層包括有複數個電性連接塾以及與這些電性連接墊呈交錯配^ =複數個金屬間隙物⑽G)。此時，間隙物凸出於基板表面的高度备 2上等於電性連接整凸出於基板表面的高度。其中，各間隙物可由 稷數個凸起物所喊，並且這些凸起物红個紐 線排列。 1 後’在基板上形成—防銲層，以覆蓋住這些金制隙物，並且 ===;。此時，這些覆蓋有防薛層的纖即形成凸 :於基板表面的支撐件，且其凸出於基板的高度會高於電性連接塾凸 3基^面的高度(s_。之後，更可撼板上形成—金屬鑛膜， 電性連接整，用以避免電性連接塾氧化。其中，金屬鐘膜可 201205972 為錄金触，並且其厚度刊·於 使支樓件㈣於基域_高度轉日糊度。減—來，仍可 表面的高度。 0於電性連接塾凸出於基板 物，铁後防:在基板上與任二個電性連接件之間形成間隙 ^板^ ，蝴彳。_支撐件凸出 因 此ΐ==明顯高於電性連接塾凸出於基板表面的高度， 3 體模組被輸送帶或滚輪顺的現象。而且，Γ SI 201205972 Insufficient strength in the prior art. In this embodiment, when the metal layer (not shown) formed on the substrate 11G is patterned to form the electrical connection pad 120, the spacers 132 can be electrically connected to the 塾(10)(3), wherein the spacers 132 It may be composed of a plurality of protrusions and may be arranged in a straight line between the two electrical connections 120. In other words, the gaps 132 may be the same metal material, and the two may protrude from the surface of the substrate 11 to be the same. However, in other embodiments, the spacers 132 may be made of other materials and the height of the surface of the substrate i10 may be slightly higher or slightly lower than the height of the electrical connection 塾 (10) protruding from the surface of the substrate 110. In addition, the peripheral circuit region lb may further include a metal surface 14〇 covering the electrical connection port 120, and the thickness thereof is significantly smaller than the thickness of the anti-fresh layer 134, so that the support member (10) protrudes from the surface of the substrate 110. The height will still be significantly higher than the height of the surface of the substrate no. The metal ore film 140 may be a gold ore film and oxidized by the crucible 120. FIG. 3 is a flow chart showing a method for constructing a peripheral circuit area of a memory module in accordance with a consistent embodiment of the present invention. Referring to FIG. 3, first, a metal layer is formed on a substrate, and the metal layer is bribed to form a metal layer, wherein the patterned metal layer includes a plurality of electrical connections and The electrical connection pads are staggered with a plurality of metal spacers (10) G). At this time, the height of the spacer protruding from the surface of the substrate is equal to the height of the electrical connection integrally protruding from the surface of the substrate. Wherein, each of the spacers can be shouted by a plurality of protrusions, and the protrusions are arranged in a red line. 1 after the formation of a solder mask on the substrate to cover the gold gaps, and ===; At this time, the fibers covered with the anti-snow layer form a convex: a support member on the surface of the substrate, and the height of the substrate protruding from the substrate is higher than the height of the electrical connection of the convex surface 3 (s_. The metal ore film can be formed on the enamel plate, and the electrical connection is integrated to avoid the electrical connection 塾 oxidation. Among them, the metal clock film can be recorded in 201205972, and its thickness is published in the base field. _ Height to day paste. Reduced - can still be the height of the surface. 0 in the electrical connection 塾 protruding from the substrate, iron back: on the substrate and any two electrical connectors between the gap ^ , 彳 彳 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
=剛性大於防鋅層的剛性，因此提高支樓件的整 體间度時，支撐件較不容易產生先前技射 开1生連=與Γ隙物可ί對形成於基板上的金屬層3圖H併 時並不需要術，財㈣賴作綠製傾邊電路區 本毛明已以實施例揭露如上，然其並非用以限定本發明，任 ^，春支術7員域中具有通常知識者，在不脫離本發明的精神和範圍= rigidity is greater than the rigidity of the anti-zinc layer, so when the overall inter-level of the branch member is increased, the support member is less prone to the prior art shot opening 1 and the gap material can be formed on the metal layer 3 formed on the substrate. H does not need surgery at the same time, and the financial (4) relies on the green tilting circuit area. Ben Maoming has disclosed the above examples by way of example, but it is not intended to limit the invention, and the general knowledge of the 7-member field in the spring branch is Without departing from the spirit and scope of the present invention
rsi 8 201205972 【圖式fs 纟单說明】 圖1繪示出本發明一實施例中一種記憶體模組的結構示意圖。 圖2繪示出圖1中沿A-A線的剖視圖。 圖3繪示出本發明一實施例中一種記憶體模組的週邊電路區結構的 製作方法的流程圖。 【主要元件符號說明】 φ 100 :記憶體模組 100a :記憶單元區 100b .週邊電路區 110 :基板 120 :電性連接墊 130 :支撐件 132 :間隙物 • 134 :防銲層 140 :金屬鍍膜 S100、S200 :步驟Rsi 8 201205972 [FIG. fs] Description FIG. 1 is a block diagram showing the structure of a memory module according to an embodiment of the present invention. Figure 2 is a cross-sectional view taken along line A-A of Figure 1. FIG. 3 is a flow chart showing a method of fabricating a peripheral circuit area structure of a memory module according to an embodiment of the invention. [Description of main component symbols] φ 100 : Memory module 100a : Memory cell region 100b . Peripheral circuit region 110 : Substrate 120 : Electrical connection pad 130 : Support member 132 : Interstance • 134 : Solder mask 140 : Metallization S100, S200: steps