201205429 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及多媒體設備，特別涉及一種可偵測顯示裝置 連接狀態的多媒體設備。 【先前技#ί】 [0002] 在移動多媒體設備中（如筆記型電腦、移動電視等）， 因移動多媒體設備本身尺寸的限制，通常顯示幕都是小 尺寸的。為了讓使用者得到充分的視覺享受，移動多媒 體設備保留視訊介面電路，來連接外部大螢幕的顯示裝201205429 VI. Description of the Invention: [Technical Field] The present invention relates to a multimedia device, and more particularly to a multimedia device capable of detecting a connection state of a display device. [Previous technology #ί] [0002] In mobile multimedia devices (such as notebook computers, mobile TVs, etc.), the display screens are usually small in size due to the limitations of the size of the mobile multimedia device itself. In order to provide users with full visual enjoyment, the mobile multimedia device retains the video interface circuit to connect to the display of the external large screen.
I fj 置（如顯示器、電視或投影儀等）。由於無法偵測視訊 介面電路是否連接有外部顯示裝置，在外部顯示裝置進 行顯示時，移動多媒體設備本身的顯示幕顯示同樣的資 料，造成功耗浪費。 【發明内容】 [0003] 有鑑於此，需提供一種多媒體設備，能偵測是否與外部 顯示裝置連接。 [0004] 一種多媒體設備，包括顯示電路，該多媒體設備用於輸 出視訊訊號至該顯示電路及外部顯示裝置。該多媒體設 備還包括中央處理單元、視訊輸出電路、顯示電路及負 載偵測電路。中央處理單元用於產生該視訊訊號，該視 訊訊號包括行同步訊號。視訊輸出電路用於輸出該視訊 訊號。負載偵測電路連接該視訊輸出電路及中央處理單 元，用於偵測該視訊輸出電路與外部顯示裝置的連接狀 態，包括隔離緩衝電路、箝位電路、放大電路、積分電 路及電壓比較電路。隔離緩衝電路用於隔離緩衝該視訊 099125071 表單編號 A0101 第 4 頁/共 19 頁 0992044076-0 201205429 [0005] Ο [0006] [0007] G [0008] 輸出電路與該負載偵測電路。箝位電路用於取得該視訊 訊號中的行同步訊號。放大電路用於放大該行同步訊號 。積分電路用於對該放大後的行同步訊號積分，並輸出 直流訊號。電壓比較電路用於比較該直流訊號與設定電 壓’並輸出控制訊號至該中央處理單元。其中，該中央 處理單元還用於根據該控制訊號，在該視訊輸出電路連 接該外部顯示裝置時關閉該顯示電路。 優選地’該隔離緩衝電路包括開關元件，該開關元件包 括控制極、第一電極及第二電極，該控制極接收該視訊 訊號，該第一電極經由第一電阻連接參考電壓並輪出該 視訊訊號’該第二電極接地。 優選地’該開關元件為PNP型的三極管，該控制極為基極 ’該第一電極為射極，該第二電極為汲極。 優選地’該箝位電路包括兩個順向串聯的二極體，第一 二極體的陽極經由第二電阻從該隔離緩衝_路接收該視 訊訊號並輸出該行同步訊號，筹二二極體的陰極接地。 優選地，該放大電路包括運算放大器，包括正輪入端、 負輸入端及輸出端，其中，該正輸人端從該箝位電路接 收該行同步訊號’該負輸人端經由第三電阻接地，該輸 出端輸出該放大後的行同步訊號，並通過並聯的第四電 阻與第一電容連接至該負輸入端。 優選地，該積分電路包括相互並聯的第五電阻與第二電 容’該第五電阻與該第二電容均一端連接該放大電路與 該電壓比較電路’另一端接地。 099125071 表單蹁號A0101 第5頁/共19頁 0992044076-0 [0009] 201205429 [0010] 優選地，該電壓比較電路包括比較器，包括正輸入端、 負輸入端及輸出端，該正輸入端接收該直流訊號，該負 輸入端經由第六電阻接地並經由第七電阻連接參考電壓 ，該輸出端經由第八與第九電阻接地，並從該第八與第 九電阻的連接點輸出該控制訊號。 [0011] 一種多媒體設備，包括顯示電路，該多媒體設備用於輸 出視訊訊號至該顯示電路及外部顯示裝置。該多媒體設 備還包括中央處理單元、視訊輸出電路、顯示電路及負 載偵測電路。中央處理單元用於產生該視訊訊號，該視 訊訊號包括行同步訊號。視訊輸出電路用於輸出該視訊 訊號。負載偵測電路連接該視訊輸出電路及中央處理單 元，用於偵測該視訊輸出電路與外部顯示裝置的連接狀 態，包括隔離緩衝電路、箝位電路、放大電路、積分電 路及電壓比較電路。隔離缓衝電路用於隔離缓衝該視訊 輸出電路與該負載偵測電路。箝位電路用於取得該視訊 訊號中的行同步訊號。放大電路用於放大該行同步訊號 。積分電路用於對該放大後的行同步訊號積分，並輸出 直流訊號。電壓比較電路用於比較該直流訊號與設定電 壓，並輸出控制訊號至該中央處理單元。其中，該中央 處理單元還用於根據該控制訊號，在該視訊輸出電路連 接該外部顯示裝置時控制該顯示電路。 [0012] 優選地，該中央處理單元根據該控制訊號，在該視訊輸 出電路連接該外部顯示裝置時關閉該顯示電路。 [0013] 優選地，該中央處理單元根據該控制訊號，在該視訊輸 出電路連接該外部顯示裝置時控制該顯示電路顯示另一 099125071 表單編號A0101 第6頁/共19頁 0992044076-0 201205429 [0014] [0015] Ο ο 視訊訊號。 上述多媒體設備利用負載偵測電路偵測多媒體設備是否 連接外部顯示裝置，使中央處理單元控制顯示電路關閉 或播放另一視訊訊號，降低了功耗，拓展了多媒體設備 的用途。 【實施方式】 圖1為本發明提出的多媒體設備10 —種實施方式的示意圖 。在本實施方式中，多媒體設備10可為筆記型電腦、移 動電視等，其本身帶有顯示模組，但也可連接外部顯示 裝置進行顯示視訊訊號。如圖1所示，多媒體設備10包括 中央處理單元100、視訊輸出電路110、顯示電路120及 負載偵測電路130。其中，中央處理單元100用於產生視 訊訊號，在本實施方式中，該視訊訊號為類比視訊訊號 。中央處理單元100包括視訊轉碼器（digital video encoder)及數模轉換器（digital to analog converter) 。 視訊轉碼器根據視訊資料產生數位視訊訊號並 輸出至數模轉換器。數模轉換器將接收到的數位視訊訊 號轉換為類比視訊訊號，並輸出至視訊輸出電路110。在 本實施方式中，中央處理單元100輸出的類比視訊訊號包 括行同步訊號、色同步訊號及亮度訊號，其中，行同步 訊號為一個預定週期的負脈衝訊號，例如，其電壓值為 負0. 3伏。 視訊輸出電路110用於接收中央處理單元100輸出的視訊 訊號，以輸出至顯示電路120及外部顯示裝置進行顯示。 在本實施方式中，視訊輸出電路110包括濾波電路及匹配 099125071 表單編號A0101 第7頁/共19頁 0992044076-0 [0016] 201205429 電路。其中，濾波電路用於接收中央處理單元100輸出的 視訊訊號，並濾除該視訊訊號中的雜訊。匹配電路用於 實現視訊輸出電路110與顯示電路120及外部顯示裝置的 阻抗匹配。在本實施方式中，顯示電路1 2 0與外部顯示裝 置的負載阻值均約為75歐姆，匹配電路的阻值與其相匹 配，由阻值約為75歐姆的電阻構成。 [0017] 在本實施方式中，當視訊輸出電路110與外部顯示裝置連 接時，視訊輸出電路110輸出端的行同步訊號的電壓值為 負0. 3伏。當視訊輸出電路110未與外部顯示裝置連接時 ，視訊輸出電路110輸出端的行同步訊號的電壓值為負 0· 6伏。 [0018] 負載偵測電路130連接視訊輸出電路110及中央處理單元 100，用於偵測視訊輸出電路110與外部顯示裝置的連接 狀態。如圖2所示，負載偵測電路130包括隔離緩衝電路 131、箝位電路132、放大電路133、積分電路134及電壓 比較電路135。隔離緩衝電路131與視訊輸出電路110相 連，用於隔離緩衝視訊輸岀電路110與負載偵測電路130 。在本實施方式中，隔離缓衝電路131輸入電阻很高，輸 出電阻很低，以避免負載偵測電路130影響視訊輸出電路 110輸出的視訊訊號。箝位電路132用於濾除視訊訊號中 的色同步訊號及亮度訊號，取得視訊訊號中的行同步訊 號，避免不同的亮度訊號造成電壓比較電路135輸出不穩 定，影響負載偵測電路130偵測的準確度。 [0019] 放大電路133用於放大箝位電路132所取得的行同步訊號 ，以增大連接與未連接外部顯示裝置時電壓的差異，便 099125071 表單編號A0101 第8頁/共19頁 0992044076-0 201205429 於辨識。積分電路134用於對放大電路133放大後的行同 步訊號積分，並輸出直流訊號。因行同步訊號為分散的 脈衝訊號，其會使電壓比較電路135輸出不穩定，因而， 利用積分電路134將放大後的行同步訊號轉換為緩慢變化 的直流訊號，便於比較。 [0020] Ο 電壓比較電路135用於比較積分電路134輸出的直流訊號 與”又定電壓’並輸出控制訊號至中央處理單元⑽。在本 實施方式巾’控制訊號為邏輯高低電平訊號，例如，“^ ”為邏輯高電平訊號為邏輯低電平訊號。在本實 施方式中，當視訊輸出電路11〇與外部顯示裝置連接時， 電廢比較電路m輸出邏輯高電平訊號至中央處理單元 1〇〇，當視訊輸出電路ι10未與外部顯示裝置連接時，電 壓比較電路135輸出邏輯低電平訊號至巾央處理單元1〇〇 。在本發明的其它實施方式中，當視訊輪出電路110與外 部顯示裝置連接時’電壓比較電路135也可輸出邏輯低電 平號至中央處理單元〗00 ’當視訊輸出電路11()未與外 ο [0021] 部顯示裂置連接時，電壓比較電路135也可輸出邏輯高電 平訊號至中央處理單元100。 、： 中央處理單元1闕用於根據該控制減控制顯示電路 120。在本發明的-實施方式中，當負載偵測電路13〇判 斷視訊輸出電路110連接外部顯示裝置時，巾央處理單元 100根據控制訊號關閉顯示電路丨2〇，以減少功耗。在本 發明的另-實施方式巾核理單元⑽根據控制訊號 控制顯示電路12G顯示另1訊訊號，該另—視訊訊號不 同於視訊輸*電路110輸出至外部顯示裝置的視訊訊號。 099125071 表單編號A0101 1 0992044076-0 201205429 [0022] [0023] [0024] [0025] 099125071 本發明的負載偵測電路130偵測多媒體設備1〇是否連接外 部顯示裝置’使中央處理單元100控制本機的顯示電路 120關閉或播放另一視訊訊號’降低了功耗，拓展了多女竿 體設備10的用途。 圖3所示為本發明一實施方式中負載偵測電路丨3〇的電路 圖。隔離緩衝電路131包括開關元件Q1，開關元件…包括 控制極、第一電極及第二電極。該控制極從視訊輸出電 路11 0接收視訊訊號，該第一電極經由第一電阻r 1連接參 考電壓Vcc並經由第二電阻R2輸出視訊訊號，該第二電極 接地。在本實施方式中，開關元件Q1為射極跟隨器，即 為PNP型的三極管，控制極為基極，第一電極為射極，第 二電極為汲極，其可使輸入的視訊訊號無損耗的從射極 輸出。在其它實施方式中，開關元件Q1也可為金屬氧化 物半導體場效應電晶體或二極體等開關元件，可單嚮導 通’使視訊訊號傳輸到後面的箝伞電路132及放大電路 133等’而又避免箝位電路132及放大電路133等傳輸訊 號到視訊輸出電路11〇 ’保證了視訊輸出電路11〇的視訊 'f Λ號0P貝。在本實施方式中，參考電壓Vcc為5V。 柑位電路132包括兩個順向串聯的二極體Μ、D2，第一二 極體D1的陽極經由第二電阻^從隔離緩衝電路131，即開 關元件Q1的第一電極’接收該視訊訊號第二二極體D2 的陰極接地。第一二極體D1及第二二極體D2濾除視訊訊 號中的色同步訊號及亮度訊號，取得視訊訊號中的行同 步訊號，並從第一二極體D1的陽極輸出。 放大電路133包括運算放大器133〇，包括正輸入端、負輸 表單編號A0101 第10頁/共19頁 0992044076-0 201205429 [0026] [0027]❹ [0028] ❹ 099125071 入端及輸出端。其中’該正輸入端從箝位電路132接收該 行同步訊號’該負輸入端經由第三電阻R3接地，該輸出 端輪出該放大後的行同步訊號，並通過並聯的第四電阻 與第一電容C1連接至該負輸入端，形成負反饋。 積分電路134包括相互並聯的第五電阻R5與第二電容C2， 第五電阻R5與第二電容C2均一端連接放大電路133的輸出 端與電壓比較電路135，另一端接地。 電壓比較電路135包括比較器1350，包括正輸入端、負輸 入端及輸出端。該正輸入端接收該直流訊號，該負輸入 端經由第六電阻R6接地並經由第七電阻連接參考電壓 Vcc，該輸出端經由第八與第九電阻㈣、R9接地，並從第 八電阻R8與第九電阻R9的連接點輸出控制訊號。 在本實施方式中，視訊輸出電路11()輸出視訊訊號至隔離 緩衝電路131的開關元件qi，開關元件以的第一電極連接 5V的參考電壓Vcc，使得開關元件Q1 —直導通，開關元件 Q1的第一電極輸出視訊訊號至箝位電路132。經濾波箝位 後，箝位電路132從第一二極體di的陽極輸出行同步訊號 至運算放大器1330的正輸入端，並從運算放大器1.330的 輸出端輸出放大後的行同步訊號。積分電路134將放大後 的行同步訊號轉換為恒定的直流訊號，並傳給比較器 1 350的正輸入端進行比較。因視訊輪出電路11()連接與未 連接外部顯示裝置時，視訊訊號的行同步訊號的電壓值 不同，分別為-0. 3V與-〇. 6V，因而最終轉換後的直流訊 號幅值，使得比較器1 350輸出的控制訊號不同。從而， 中央處理單元100根據比較器1350輪出的控制訊號控制顯 表單編號A0101 第11頁/共19頁 0992044076-0 201205429 示電路1 2 0。 [0029] 本發明的負載偵測電路130利用一個運算放大器1 330、一 個比較器1 3 5 0、一個三極管Q1及幾個電阻與電容實現， 電路簡單，成本便宜。 [0030] 綜上所述，本發明符合發明專利要件，爰依法提出專利 申請。惟，以上所述者僅為本發明之較佳實施例，舉凡 熟悉本案技藝之人士，在爰依本案發明精神所作之等效 修飾或變化，皆應包含於以下之申請專利範圍内。 【圖式簡單說明】 [0031] 圖1為本發明提出的多媒體設備一種實施方式的示意圖； [0032] 圖2為本發明提出的多媒體設備的負載偵測電路的一種實 施方式的示意圖；及 [0033] 圖3為本發明提出的多媒體設備的負載偵測電路的一種實 施方式的電路圖。 【主要元件符號說明】 [0034] 多媒體設備：10 [0035] 中央處理單元：100 [0036] 視訊輸出電路：110 [0037] 顯示電路：120 [0038] 負載偵測電路：1 3 0 [0039] 隔離緩衝電路：131 [0040] 箝位電路：132 099125071 表單編號Α0101 第12頁/共19頁 0992044076-0 201205429 [0041] [0042] [0043] [0044] [0045] [0046] [0047] Ο [0048] [0049] [0050] 放大電路：133 積分電路：134 電壓比較電路：13 5 開關元件：Q1 電阻：R1〜R9 二極體：Dl、D2 運算放大器：1330 比較器：1350 電容：Cl、C2 參考電壓：Vcc Ο 099125071 表單編號A0101 第13頁/共19頁 0992044076-0I fj (such as monitors, TVs, projectors, etc.). Since it is impossible to detect whether the video interface circuit is connected with an external display device, when the external display device performs display, the display screen of the mobile multimedia device itself displays the same information, resulting in waste of power consumption. SUMMARY OF THE INVENTION [0003] In view of the above, it is desirable to provide a multimedia device capable of detecting whether or not to connect with an external display device. A multimedia device includes a display device for outputting a video signal to the display circuit and an external display device. The multimedia device also includes a central processing unit, a video output circuit, a display circuit, and a load detection circuit. The central processing unit is configured to generate the video signal, and the video signal includes a line synchronization signal. The video output circuit is used to output the video signal. The load detection circuit is connected to the video output circuit and the central processing unit for detecting the connection state of the video output circuit and the external display device, including an isolation buffer circuit, a clamp circuit, an amplification circuit, an integration circuit, and a voltage comparison circuit. Isolation buffer circuit is used to isolate buffering the video. 099125071 Form No. A0101 Page 4 of 19 0992044076-0 201205429 [0005] 0006 [0006] [0007] G [0008] Output circuit and the load detection circuit. The clamp circuit is used to obtain a line sync signal in the video signal. The amplifying circuit is used to amplify the line sync signal. The integration circuit is used to integrate the amplified line synchronization signal and output a DC signal. The voltage comparison circuit is for comparing the DC signal with the set voltage ' and outputting a control signal to the central processing unit. The central processing unit is further configured to turn off the display circuit when the video output circuit is connected to the external display device according to the control signal. Preferably, the isolation buffer circuit includes a switching element including a control electrode, a first electrode and a second electrode, the control electrode receives the video signal, and the first electrode connects the reference voltage via the first resistor and rotates the video Signal 'The second electrode is grounded. Preferably, the switching element is a PNP type transistor, the control being extremely base. The first electrode is an emitter and the second electrode is a drain. Preferably, the clamping circuit includes two diodes connected in series in series, and the anode of the first diode receives the video signal from the isolation buffer via a second resistor and outputs the line synchronization signal. The cathode of the body is grounded. Preferably, the amplifying circuit comprises an operational amplifier comprising a positive wheel terminal, a negative input terminal and an output terminal, wherein the positive input terminal receives the line synchronization signal from the clamp circuit. The negative input terminal is connected to the third resistor. Grounding, the output terminal outputs the amplified line sync signal, and is connected to the negative input terminal through a fourth resistor connected in parallel with the first capacitor. Preferably, the integrating circuit includes a fifth resistor and a second capacitor connected in parallel with each other. The fifth resistor and the second capacitor are both connected to one end of the amplifying circuit and the other end of the voltage comparing circuit. 099125071 Form nickname A0101 Page 5 / Total 19 page 0992044076-0 [0009] 201205429 [0010] Preferably, the voltage comparison circuit comprises a comparator comprising a positive input terminal, a negative input terminal and an output terminal, the positive input terminal receiving The DC signal is grounded via a sixth resistor and connected to the reference voltage via a seventh resistor, the output terminal is grounded via the eighth and ninth resistors, and the control signal is output from the connection point of the eighth and ninth resistors . [0011] A multimedia device includes a display device for outputting video signals to the display circuit and an external display device. The multimedia device also includes a central processing unit, a video output circuit, a display circuit, and a load detection circuit. The central processing unit is configured to generate the video signal, and the video signal includes a line synchronization signal. The video output circuit is used to output the video signal. The load detection circuit is connected to the video output circuit and the central processing unit for detecting the connection state of the video output circuit and the external display device, including an isolation buffer circuit, a clamp circuit, an amplification circuit, an integration circuit, and a voltage comparison circuit. An isolation buffer circuit is used to isolate and buffer the video output circuit and the load detection circuit. The clamp circuit is used to obtain a line sync signal in the video signal. The amplifying circuit is used to amplify the line sync signal. The integration circuit is used to integrate the amplified line synchronization signal and output a DC signal. The voltage comparison circuit is configured to compare the DC signal with the set voltage and output a control signal to the central processing unit. The central processing unit is further configured to control the display circuit when the video output circuit is connected to the external display device according to the control signal. [0012] Preferably, the central processing unit turns off the display circuit when the video output circuit is connected to the external display device according to the control signal. [0013] Preferably, the central processing unit controls the display circuit to display another 099125071 form number A0101 according to the control signal when the video output circuit is connected to the external display device. Page 6 / 19 pages 0992044076-0 201205429 [0014 [0015] Ο ο Video signal. The multimedia device uses the load detection circuit to detect whether the multimedia device is connected to the external display device, so that the central processing unit controls the display circuit to turn off or play another video signal, thereby reducing power consumption and expanding the use of the multimedia device. [Embodiment] FIG. 1 is a schematic diagram of an embodiment of a multimedia device 10 according to the present invention. In the present embodiment, the multimedia device 10 can be a notebook computer, a mobile TV, etc., and has a display module itself, but can also be connected to an external display device for displaying video signals. As shown in FIG. 1, the multimedia device 10 includes a central processing unit 100, a video output circuit 110, a display circuit 120, and a load detection circuit 130. The central processing unit 100 is configured to generate a video signal. In this embodiment, the video signal is an analog video signal. The central processing unit 100 includes a digital video encoder and a digital to analog converter. The video transcoder generates a digital video signal based on the video data and outputs it to the digital to analog converter. The digital-to-analog converter converts the received digital video signal into an analog video signal and outputs it to the video output circuit 110. In the present embodiment, the analog video signal output by the central processing unit 100 includes a line sync signal, a color burst signal, and a luminance signal, wherein the line sync signal is a negative pulse signal of a predetermined period, for example, the voltage value is negative 0. 3 volts. The video output circuit 110 is configured to receive the video signal output by the central processing unit 100 for output to the display circuit 120 and an external display device for display. In the present embodiment, the video output circuit 110 includes a filter circuit and a matching 099125071 Form No. A0101 Page 7 of 19 0992044076-0 [0016] 201205429 circuit. The filter circuit is configured to receive the video signal output by the central processing unit 100 and filter out noise in the video signal. The matching circuit is used to achieve impedance matching between the video output circuit 110 and the display circuit 120 and the external display device. In the present embodiment, the load resistance of the display circuit 120 and the external display device are both about 75 ohms, and the resistance of the matching circuit is matched with it, and is composed of a resistor having a resistance of about 75 ohms. [0017] In the present embodiment, when the video output circuit 110 is connected to the external display device, the voltage value of the line sync signal at the output of the video output circuit 110 is minus 0.3 volts. When the video output circuit 110 is not connected to the external display device, the voltage value of the line sync signal at the output of the video output circuit 110 is minus 0.6 volt. [0018] The load detection circuit 130 is connected to the video output circuit 110 and the central processing unit 100 for detecting the connection state of the video output circuit 110 and the external display device. As shown in FIG. 2, the load detection circuit 130 includes an isolation buffer circuit 131, a clamp circuit 132, an amplification circuit 133, an integration circuit 134, and a voltage comparison circuit 135. The isolation buffer circuit 131 is connected to the video output circuit 110 for isolating the buffered video input circuit 110 and the load detection circuit 130. In the present embodiment, the isolation buffer circuit 131 has a high input resistance and a low output resistance to prevent the load detection circuit 130 from affecting the video signal output by the video output circuit 110. The clamp circuit 132 is configured to filter the color burst signal and the brightness signal in the video signal, and obtain the line sync signal in the video signal, so as to prevent the output of the voltage comparison circuit 135 from being unstable due to different brightness signals, affecting the load detection circuit 130 detecting Accuracy. [0019] The amplifying circuit 133 is configured to amplify the line synchronizing signal obtained by the clamp circuit 132 to increase the voltage difference between the connected and unconnected external display device. 099125071 Form No. A0101 Page 8 / 19 pages 0992044076-0 201205429 for identification. The integrating circuit 134 is used to integrate the amplified line synchronization signal of the amplifying circuit 133 and output a direct current signal. Since the line sync signal is a scattered pulse signal, the output of the voltage comparison circuit 135 is unstable. Therefore, the integrated line circuit 134 converts the amplified line sync signal into a slowly varying DC signal for comparison. [0020] 电压 voltage comparison circuit 135 is used to compare the DC signal outputted by the integration circuit 134 with the "constant voltage" and output a control signal to the central processing unit (10). In the present embodiment, the control signal is a logic high and low level signal, for example "^" is a logic high level signal is a logic low level signal. In the embodiment, when the video output circuit 11 is connected to the external display device, the electric waste comparison circuit m outputs a logic high level signal to the central processing. Unit 1A, when the video output circuit ι10 is not connected to the external display device, the voltage comparison circuit 135 outputs a logic low level signal to the towel processing unit 1A. In other embodiments of the present invention, when the video is turned out When the circuit 110 is connected to the external display device, the voltage comparison circuit 135 can also output a logic low level number to the central processing unit 00 00 'When the video output circuit 11 () is not connected to the outer portion [0021], the voltage is connected. The comparison circuit 135 can also output a logic high level signal to the central processing unit 100. The central processing unit 1 is configured to control the display circuit 120 according to the control. In the embodiment of the present invention, when the load detecting circuit 13 determines that the video output circuit 110 is connected to the external display device, the towel processing unit 100 turns off the display circuit 根据2〇 according to the control signal to reduce power consumption. The other embodiment of the towel management unit (10) displays another signal according to the control signal control display circuit 12G, and the other video signal is different from the video signal output from the video output circuit 110 to the external display device. 099125071 Form No. A0101 1 0992044076 [0025] [0025] [0025] 099125071 The load detection circuit 130 of the present invention detects whether the multimedia device 1 is connected to an external display device 'to cause the central processing unit 100 to control the display circuit 120 of the local device to be turned off or Playing another video signal 'reduces power consumption and expands the use of the multi-female device 10. Figure 3 is a circuit diagram of a load detecting circuit 丨3〇 according to an embodiment of the present invention. The isolation buffer circuit 131 includes a switching element. Q1, the switching element includes a control electrode, a first electrode, and a second electrode. The control electrode receives a video signal from the video output circuit 110. An electrode is connected to the reference voltage Vcc via the first resistor r 1 and outputs a video signal via the second resistor R2, and the second electrode is grounded. In the embodiment, the switching element Q1 is an emitter follower, that is, a PNP type transistor. The control electrode is extremely base, the first electrode is an emitter, and the second electrode is a drain, which can output the input video signal without loss from the emitter. In other embodiments, the switching element Q1 can also be a metal oxide semiconductor. A switching element such as a field effect transistor or a diode can be unidirectionally transmitted to transmit the video signal to the rear clamp circuit 132 and the amplifying circuit 133, etc., and the clamp circuit 132 and the amplifying circuit 133 are prevented from transmitting signals to the video. The output circuit 11'' guarantees the video 'f Λ 0P' of the video output circuit 11〇. In the present embodiment, the reference voltage Vcc is 5V. The cipher circuit 132 includes two diodes 顺, D2 connected in series, and the anode of the first diode D1 receives the video signal from the isolation buffer circuit 131, that is, the first electrode ' of the switching element Q1 via the second resistor. The cathode of the second diode D2 is grounded. The first diode D1 and the second diode D2 filter out the color burst signal and the brightness signal in the video signal, obtain the line sync signal in the video signal, and output from the anode of the first diode D1. The amplifying circuit 133 includes an operational amplifier 133, including a positive input terminal, a negative input form number A0101, page 10/19 pages, 0992044076-0 201205429 [0026] [0027] ❹ [0028] ❹ 099125071 Incoming and output. Wherein the positive input terminal receives the line sync signal from the clamp circuit 132. The negative input terminal is grounded via a third resistor R3, and the output terminal rotates the amplified line sync signal and passes through the fourth resistor and the parallel A capacitor C1 is coupled to the negative input to form a negative feedback. The integrating circuit 134 includes a fifth resistor R5 and a second capacitor C2 connected in parallel with each other, and the fifth resistor R5 and the second capacitor C2 are both connected to the output terminal of the amplifying circuit 133 and the voltage comparing circuit 135, and the other end is grounded. The voltage comparison circuit 135 includes a comparator 1350 including a positive input terminal, a negative input terminal, and an output terminal. The positive input terminal receives the DC signal, and the negative input terminal is grounded via the sixth resistor R6 and connected to the reference voltage Vcc via the seventh resistor, the output terminal is grounded via the eighth and ninth resistors (4), R9, and the eighth resistor R8 The connection point with the ninth resistor R9 outputs a control signal. In the present embodiment, the video output circuit 11() outputs the video signal to the switching element qi of the isolation buffer circuit 131, and the first electrode of the switching element is connected to the reference voltage Vcc of 5V, so that the switching element Q1 is directly turned on, and the switching element Q1 The first electrode outputs a video signal to the clamp circuit 132. After being clamped by the clamp, the clamp circuit 132 outputs a line sync signal from the anode of the first diode di to the positive input of the operational amplifier 1330, and outputs the amplified line sync signal from the output of the operational amplifier 1.330. The integrating circuit 134 converts the amplified line sync signal into a constant DC signal and transmits it to the positive input of the comparator 1 350 for comparison. When the video output circuit 11 () is connected and not connected to the external display device, the voltage value of the line sync signal of the video signal is different, respectively -0.3 V and - 〇 6 V, thus the final converted DC signal amplitude, The control signals output by the comparator 1 350 are made different. Thus, the central processing unit 100 controls the display form number A0101, page 11 of 19, 0992044076-0 201205429, according to the control signal rotated by the comparator 1350. [0029] The load detection circuit 130 of the present invention utilizes an operational amplifier 1 330, a comparator 1 330, a transistor Q1, and several resistors and capacitors. The circuit is simple and inexpensive. [0030] In summary, the present invention complies with the requirements of the invention patent, and submits a patent application according to law. The above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art will be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0031] FIG. 1 is a schematic diagram of an embodiment of a multimedia device according to the present invention; [0032] FIG. 2 is a schematic diagram of an embodiment of a load detection circuit of a multimedia device according to the present invention; FIG. 3 is a circuit diagram of an embodiment of a load detection circuit of a multimedia device according to the present invention. [Main component symbol description] [0034] Multimedia device: 10 [0035] Central processing unit: 100 [0036] Video output circuit: 110 [0037] Display circuit: 120 [0038] Load detection circuit: 1 3 0 [0039] Isolation buffer circuit: 131 [0040] Clamp circuit: 132 099125071 Form number Α 0101 Page 12 / 19 pages 0992044076-0 201205429 [0041] [0044] [0044] [0046] [0047] [0050] [0050] Amplifying circuit: 133 Integral circuit: 134 Voltage comparison circuit: 13 5 Switching element: Q1 Resistor: R1~R9 Diode: Dl, D2 Operational amplifier: 1330 Comparator: 1350 Capacitance: Cl , C2 Reference Voltage: Vcc Ο 099125071 Form No. A0101 Page 13 / Total 19 Page 0992044076-0