TW201204818A - Polishing agent for semiconductor substrate and fabricating method of semiconductor wafer - Google Patents

Polishing agent for semiconductor substrate and fabricating method of semiconductor wafer Download PDF

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TW201204818A
TW201204818A TW100120948A TW100120948A TW201204818A TW 201204818 A TW201204818 A TW 201204818A TW 100120948 A TW100120948 A TW 100120948A TW 100120948 A TW100120948 A TW 100120948A TW 201204818 A TW201204818 A TW 201204818A
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semiconductor substrate
polishing
mass
polishing liquid
semiconductor
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TW100120948A
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Chinese (zh)
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Yutaka Nomura
Hiroshi Nakagawa
Masahiro Sakashita
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Hitachi Chemical Co Ltd
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Publication of TW201204818A publication Critical patent/TW201204818A/en

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    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09KMATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K3/00Materials not provided for elsewhere
    • C09K3/14Anti-slip materials; Abrasives
    • C09K3/1454Abrasive powders, suspensions and pastes for polishing
    • C09K3/1463Aqueous liquid suspensions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09GPOLISHING COMPOSITIONS; SKI WAXES
    • C09G1/00Polishing compositions
    • C09G1/02Polishing compositions containing abrasives or grinding agents
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09KMATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K3/00Materials not provided for elsewhere
    • C09K3/14Anti-slip materials; Abrasives
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate

Abstract

A polishing agent for semiconductor substrate includes: modified silica particles modified by aluminate, water soluble polymers and water, wherein a content of water soluble polymers is over 0 mass % to 1.00 mass% based on a total mass of the polishing agent for semiconductor substrate, pH is 5.0 to 9.0. The fabricating method of semiconductor wafer includes: a polishing step for polishing a surface of the semiconductor substrate by the polishing agent for semiconductor substrate to obtain the semiconductor wafer.

Description

201204818、 -----pn 六、發明說明: 【發明所屬之技術領域】 本發明涉及一種半導體基板用研磨液、及半導體晶圓 的製造方法。 【先前技術】 •以矽基板為代表的半導體基板的研磨步驟通常有:用 以消除藉由切片而產生的表面的凹凸及使基板的厚度均一 化的磨削步驟;用以精加工至目標表面精度的拋光步驟(研 磨步驟)。拋光步驟進一步區分為:被稱為粗研磨的丨次拋 光步驟、以及被稱為精研磨的最終拋光步驟。 粗研磨或精研磨根據情況可進一步分成研磨墊(研磨 布)的硬度或研磨負載不同的多個拋光步驟。藉由將拋光 步驟为成多個位準,而達成加工時間的縮短化、效率化及 高品質化,各拋光步驟的目的並不相同。 粗研磨的階段目的是為了消除在磨削步驟等中所產生 2相對較大的凹凸、或去除受損的半導體基板的表層部 分。另一方面,在精研磨的階段,較為宏大的目標是為了 降低半導體基板的缺陷以及實現表面的高度平滑化。 . 對於用於精研磨的半導體基板用研磨液,與對半導體 基板的較高的研磨速度相比,更加強烈要求:不產生結晶 缺,使基板上殘存的異物(研磨粒子、由研磨塾的磨損 而產生的鱗等)不易殘留;消除基板上所存在的凹凸而 形成平滑的鏡面(平滑度)等。 上述結晶缺陷的代表例可列舉COP ( Crystal 201204818 .[Technical Field] The present invention relates to a polishing liquid for a semiconductor substrate and a method for producing a semiconductor wafer. [Prior Art] The polishing step of the semiconductor substrate typified by the ruthenium substrate generally includes a grinding step for eliminating unevenness of the surface generated by slicing and uniformizing the thickness of the substrate; for finishing to the target surface Precision polishing step (grinding step). The polishing step is further distinguished by a step of polishing, referred to as coarse grinding, and a final polishing step, referred to as fine grinding. The coarse grinding or the fine grinding may be further divided into a plurality of polishing steps in which the hardness of the polishing pad (abrasive cloth) or the grinding load is different, depending on the case. By setting the polishing step to a plurality of levels, the processing time is shortened, the efficiency is improved, and the quality is improved. The purpose of each polishing step is not the same. The purpose of the rough grinding stage is to eliminate the occurrence of relatively large irregularities in the grinding step or the like, or to remove the surface portion of the damaged semiconductor substrate. On the other hand, in the stage of fine polishing, a relatively large object is to reduce defects of the semiconductor substrate and achieve high smoothness of the surface. The polishing liquid for semiconductor substrates used for fine polishing is more strongly required than the higher polishing rate for semiconductor substrates: foreign matter remaining on the substrate (abrasive particles, abrasion by polishing burrs) The resulting scales and the like are not easily left; the irregularities existing on the substrate are eliminated to form a smooth mirror surface (smoothness). A representative example of the above crystal defects is COP ( Crystal 201204818 .

Originated Particle,結晶起因之微粒)。c〇P是結晶成長時 所導入的結晶缺陷之一,在研磨時或研磨後的清洗時會以 COP為核而在基板表面形成坑。 另外,半導體基板表面的平滑度多數情況是藉由 HAZE (霧度)來判斷。HAZE是粗糙度的指標,粗糙度小 表示平滑性高。HAZE通常使用晶圓表面缺陷檢測裝置等 來測定。 然而,先前用以對作為形成半導體基板的代表性物質 的矽(Si)進行研磨的研磨液,提出了各種研磨液。例如 下述專利文獻1中記載,膠體二氧化矽及矽膠可有效用作 在半導體裝置的製造中最頻繁使⑽半導體結晶表面的研 磨液。並且下述專利文獻1記載,所使用的溶膠的膠體二 氧化矽及矽膠的一次粒子的粒徑為4nm〜2〇〇nm。 下述專利文獻2中揭示,藉由將一次粒子的粒徑為* nm〜200 nm (較佳為4 nm〜刚騰)的膠體形態的二氧 化石夕或謂的任-種與水溶性胺組合而成的組成物用作研 磨液,而可有效地對半導體基板(特別是妙半導體基板) 的表面進行研磨。關於二氧化魏膠或凝膠中所存在的二 氧化石夕的賴量宜為0.5質量%〜5.Q f量%,較佳為ι 〇 質量%〜5.0質量%,最佳為2.〇質量%〜4 · 下述專利文獻3中記載,藉由使用添加了 Qi質量^ f量%〜4,g質量%)的水溶性15 級錢鹽或四級銨鹽基的水性二氧切組成物,而可改 晶圓的研磨速度。 4 201204818t 示,將石夕或鍺半導體材料研磨成 面精加工狀態的方法。下述專利文獻4中所 =中,使用具有經改質處理的膠體狀矽膠,二氧化: ”約2質里%〜約5〇質量% ’ PH值為11〜12·5的研 =。並且,經改質處理的膠體狀砂膠是以化學鍵結的= 原,番以相對於未被覆粒子表面上的每励辦原子而表 ^覆約i 4固〜約^健原子的方式,來被覆比表面積為 膜。〜^ Α的二氧切粒子的表面的膠體狀石夕 ^ * p值為11以上的區域,作為研磨粒子的二氧 生解聚ΐ而成為鹼性矽酸鹽,而使PH值降低,相 ,下文獻4中記载,不發生解聚合而在PH 值為11以上的區域能迅速地研磨。 :述專利文獻5中揭示,包含料(pipemzine)或在 ίί::級ΓΛΓ代基的派嗪、以及水性膠體二氧切溶 f或凝膠,且相對於溶膠的Si〇2含量而含有〇 a f量%〜5 的旅嗪的研磨液。另外,下述專利文獻5中揭示石夕 :圓及,圓相同的材料的研磨方法。根據下述專利文 研Ϊ液中含有料時,與使用胺基乙基乙醇胺的 目t广以》量膠體二氧切獲得同等的研磨速度。 ,敏專歡獻5巾^載’_性射、柄系統能使 調整pH值所必需的苛性驗的添加量為少量。 述ί敎獻6巾揭示—種研_組成物,其特徵在 於包3研雜料、姻及其衍生_至少任意—種、以及 水。而且’在Τ述專利文獻6中記載,藉由將唾類及其衍 201204818 . 2添加至研磨用組成物中,而會提高研磨用組成物的研 1月匕力。其理由是雜五員環的氮原子的非共用電子對直接 作用於研磨對象物,具體可揭示應用咪唾的實例。 另外’下述專利文獻7中揭示,在石夕半導體晶圓的鏡 面研磨中,不降低HAZE位準而能降低附著在晶圓表面的 ,粒的吩半導體晶圓用研磨用組成物。研磨用組成物的特 徵在於,包含二氧切、水、水雜高分子化合物、驗性 化合物、具有1個〜10個醇性羥基的化合物、及具有1個 〜10個醇性羥基的含氮鹼性化合物。 八 另外,下述專利文獻8中揭示,能進一步改善haze 位準的研磨用組成物及使用此研磨用組成物㈣晶圓的研 磨方法、以及洗滌用組成物及使用此洗滌用組成物的矽晶 圓的洗滌方法。研磨用組成物以如下方式構成:其包含羥 基乙基纖維素、超過0.005質量%且小於〇 5質量&的聚環 氧乙烷、鹼性化合物、水及二氧化矽;並且在分多個階段 對矽晶圓表面實施研磨時,在為改善矽晶圓表面的haze 位準而進行的研磨步驟中使用。洗滌用組成物以如下方式 構成:其包含羥基乙基纖維素、超過〇 〇〇5質量%且小於 0‘5質量%的聚環氧乙烷、鹼性化合物、及水,並且在對上 述研磨步驟後的石夕晶圓表面所實施的洗條中使用。 另外,下述專利文獻9中揭示,能提高對矽晶圓的研 磨速度並改善COP及HAZE位準的研磨用組成物。研磨 用組成物的特徵在於,包含選自嵌段型聚喊、二氧化石夕、 鹼性化合物、羥基乙基纖維素及聚乙烯醇的至少一種、以 6 201204818 、 —pit 及水的各成分。 [先前技術文獻] [專利文獻] 文獻丨]美國專利第3170273號說明書 1文獻2]美國專利苐4169337號說明書 利文獻3]美國專利第撕训8號說明書 利文獻4]日本專利特公昭57·〇58775號公報 利文獻5]日本專利特開昭號公報 [利文獻6]日本專利特開2006-080302號公報 [專利文獻7]日本專利触平11-1刪2號公報 [專利文獻8]日本翻特開π,28,號公報 [專利文獻9]日本專利特開雇5_Q85858號公報 如上所述,在半導體基板的拋光步驟中所使用的研磨 ,是將研錄子與驗劑作為基本的含有成分,而且為了提 间研磨速度、或者降低研練子殘留、或者降低結晶缺陷, 而添加鹽或水>谷性〶分子等。並且,任—種研磨液均可用 於強驗性區域(PH值為強驗性的區域、特別是pH值超過 9.0的區域)。其原因是藉由鹼劑的化學作用而進行研磨。 另一方面存在以下問題,如上所述的研磨液由於為強 鹼性區域,因此COP會因鹼劑的蝕刻作用而擴大或增加。 【發明内容】 本發明的目的是提供一種在半導體基板的研磨中能降 低基板表面的缺陷或異物並且能提高基板表面的平滑性的 半導體基板用研磨液、及使用此半導體基板用研磨液的半 201204818 導體晶圓的製造方法。 本發明者等人發現,藉由在ΡΗ值為5.0以上9.0以下 的區域使用包含表面經鋁酸鹽改質的改質二氧化矽粒子、 特定量的水溶性高分子、以及水的研磨液,而可降低於強 鹼性區域中因鹼劑的蝕刻而產生的基板表面的缺陷並且 可達成基板表面的異物的降低及平滑性的提高,而可形成 優異的研磨表面,從而完成了本發明。 即,本發明的半導體基板用研磨液包含表面經鋁酸鹽 改質的改質二氧化石夕粒子、水溶性高分子以及水;以半導 體基板用研磨液的總質量為基準,水溶性高分子的含量為 超過〇質量%且為1.00質量%以下;pH值為5.0以上9.0 以下。根據此種半導體基板用研磨液,可在半導體基板的 研磨中降低基板表面的缺陷或異物,並且能提高基板表面 的平滑性,可形成優異的研磨表面。另外,平滑性可藉由 HAZE來評價》 較佳為’本發明的半導體基板用研磨液的pH值為6.〇 以上8.0以下。 較佳為’以半導體基板用研磨液的總質量為基準,改 質二氧化矽粒子的含量為0.01質量%以上1.50質量%以 下。此時,可進一步降低基板表面的缺陷或異物,並且能 進一步提高基板表面的平滑性。 較佳為,以半導體基板用研磨液的總質量為基準,水 溶性高分子的含量為0.001質量%以上1.00質量%以下。 此時,可進一步降低基板表面的缺陷或異物,並且能進一 8 201204818 . 步提高基板表面的平滑性。 較佳為,水溶性高分子為非離子性高分子。此時’可 進一步降低基板表面的異物。另外較佳為,水溶性高分子 是由包含乙烯吡咯烷酮的聚合性單體而得的聚合物’更佳 為聚乙烯吡咯烷酮。此時,可進一步降低基板表面的異物。 本發明的半導體基板用研磨液可進一步包含1,2,4-三 唑。此時,可進一步提高基板表面的平滑性。 較佳為,以半導體基板用研磨液的總質量為基準, 1,2,4-三唑的含量為0.05質量。/〇以上0.70質量%以下。此 時,可進一步降低基板表面的缺陷或異物,並且能進一步 提南基板表面的平滑性。 本發明的半導體基板用研磨液可較佳地用於此研磨液 的研磨對象為半導體基板的表面,且此表面包含石夕的情形。 本發明的半導體晶圓的製造方法包括研磨步驟:使用 上述半導體基板用研磨液對半導體基板的表面進行研磨。 根據此種製造方法’在半導體基板的研磨中,可降低基板 表面的缺陷或異物,並且能提高基板表面的平滑性,可形 成優異的研磨表面。 本發明的半導體晶圓的製造方法可進一步包括:在研 磨步驟之前,對包含半導體材料的板狀構件進行研光 (lapping)或磨削(grinding)而獲得粗晶圓的步驟 晶圓進行研磨而獲得半導體基板的步驟。或者本發 導體晶圓的製造方法可進-步包括:在、 包含半導體材料的板狀構件進行濕式_而獲得粗^圓^Originated Particle, the particle of crystallization). c〇P is one of crystal defects introduced during crystal growth, and pits are formed on the surface of the substrate by COP as a core during polishing or cleaning after polishing. In addition, the smoothness of the surface of the semiconductor substrate is often judged by HAZE (haze). HAZE is an indicator of roughness, and a small roughness indicates high smoothness. HAZE is usually measured using a wafer surface defect detecting device or the like. However, various polishing liquids have been proposed for polishing a polishing liquid which is used for polishing cerium (Si) which is a representative material for forming a semiconductor substrate. For example, the following Patent Document 1 discloses that colloidal cerium oxide and tannin extract can be effectively used as a polishing liquid for (10) the surface of a semiconductor crystal which is most frequently used in the manufacture of a semiconductor device. Further, in Patent Document 1 listed below, the particle diameter of the primary particles of colloidal cerium oxide and cerium of the sol to be used is 4 nm to 2 〇〇 nm. In the following Patent Document 2, a colloidal form of a rare earth oxide or a water-soluble amine having a particle diameter of primary particles of * nm to 200 nm (preferably 4 nm to enthalpy) is disclosed. The combined composition is used as a polishing liquid to effectively polish the surface of a semiconductor substrate (particularly, a semiconductor substrate). The amount of the dioxide present in the dithizone or the gel is preferably 0.5% by mass to 5.5% by weight, preferably 1% by mass to 5.0% by mass, most preferably 2. Mass % to 4 · According to the following Patent Document 3, an aqueous dioxygen composition consisting of a water-soluble 15-grade salt or a quaternary ammonium salt group to which a Qi mass % to 4, g% by mass is added is used. Material, and can change the polishing speed of the wafer. 4 201204818t shows the method of grinding the stone or enamel semiconductor material into a surface finish state. In the following Patent Document 4, a colloidal silicone having a modified treatment is used, and the oxidation: "about 2% by mass to about 5% by mass%" PH value is 11 to 12·5. The modified colloidal sand glue is chemically bonded to the original, and is coated with respect to the atoms of the uncoated particles on the surface of the uncoated particles. The specific surface area is a film. The surface of the dioxo-cut particles of ^ Α 的 * * * * * * * * * * * * * * * * * * * * * * * p p p p p p p p p p p p p The PH value is lowered, and the phase is as described in the following Document 4, and it is possible to rapidly polish in a region having a pH of 11 or more without depolymerization. As disclosed in Patent Document 5, a pipemzine or a ίί:: class is disclosed. The polishing liquid of the carbazine of the hydrazine group, and the water-based colloidal dioxin-dissolving or gel, and the content of the 〇af amount % to 5 of the sol. It is disclosed in the method of grinding the same materials of round and round. According to the following patent, the material contained in the sputum is contained. The use of aminoethylethanolamine to obtain the same grinding speed by the amount of colloidal dioxo. The sensitive special 5 towel ^ load '_ sexual shot, the handle system can make the pH necessary to adjust the pH test The addition amount is a small amount. The 敎 敎 6 6 towel reveals a variety of _ composition, which is characterized by a package 3, a singularity, a singularity, and a derivative thereof, at least any species, and water, and 'discussed in Patent Document 6 It is described that by adding saliva and its derivative 201204818. 2 to the polishing composition, the polishing composition is improved in January. The reason is that the non-shared electron pair of the nitrogen atom of the heterocyclic ring Directly acting on the object to be polished, in particular, an example of the application of the saliva can be disclosed. In addition, the following Patent Document 7 discloses that in the mirror polishing of the Shixi semiconductor wafer, the adhesion to the wafer surface can be reduced without lowering the HAZE level. A polishing composition for a granular phenocrylic semiconductor wafer, the polishing composition comprising a dioxo, a water, a water-hybrid polymer compound, an inspective compound, and a compound having one to ten alcoholic hydroxyl groups. And having 1 to 10 alcoholic hydroxyl groups In addition, as disclosed in Patent Document 8 below, a polishing composition capable of further improving the haze level, a polishing method using the polishing composition (4) wafer, and a composition for washing and use thereof are disclosed. A method for washing a ruthenium wafer of the composition for cleaning. The composition for polishing is composed of hydroxyethylcellulose, polyethylene oxide and alkali which are more than 0.005 mass% and less than 〇5 mass & a compound, water, and cerium oxide; and when polishing the surface of the ruthenium wafer in multiple stages, it is used in a polishing step for improving the haze level of the surface of the ruthenium wafer. The composition for washing is constructed as follows : comprising hydroxyethyl cellulose, more than 5% by mass and less than 0'5% by mass of polyethylene oxide, a basic compound, and water, and after the above-mentioned grinding step, the surface of the wafer Used in the implementation of the wash strip. Further, Patent Document 9 listed below discloses a polishing composition which can improve the polishing rate of the tantalum wafer and improve the COP and HAZE levels. The polishing composition is characterized by comprising at least one selected from the group consisting of block type screaming, sulphur dioxide, basic compound, hydroxyethyl cellulose, and polyvinyl alcohol, and components of 6 201204818, —pit, and water. . [Prior Art Document] [Patent Literature] Document 丨] US Patent No. 3170273 Specification 1 Document 2] US Patent No. 4169337 Specification Lib Document 3] U.S. Patent No. 8 Disclosure Specification Lili Document 4] Japanese Patent Special Prozhao 57· Japanese Patent Laid-Open Publication No. Hei. No. Hei. No. Hei. No. 2006-080302 (Patent Document 7) Japanese Patent Laid-Open No. Hei 11-1, No. 2 Publication No. [Patent Document 8] As described above, in the polishing step of the semiconductor substrate, the polishing and the test are used as the basics, as disclosed in Japanese Laid-Open Patent Publication No. Hei. No. Hei. The component is contained, and a salt or water > glutinous ruthenium molecule is added for the purpose of raising the polishing rate, or reducing the residue of the drill, or reducing the crystal defects. Also, any of the polishing liquids can be used in a strong area (a region where the pH is a strong area, particularly a region having a pH exceeding 9.0). The reason for this is that the polishing is carried out by the chemical action of the alkali agent. On the other hand, there is a problem in that the polishing liquid as described above is a strongly alkaline region, and thus the COP is enlarged or increased by the etching action of the alkali agent. SUMMARY OF THE INVENTION An object of the present invention is to provide a polishing liquid for a semiconductor substrate which can reduce defects or foreign matters on a surface of a substrate and improve smoothness of a surface of the substrate, and a half of a polishing liquid using the semiconductor substrate 201204818 Method of manufacturing conductor wafers. The present inventors have found that a polishing liquid containing modified alumina particles modified with an aluminate, a specific amount of a water-soluble polymer, and water is used in a region having a ΡΗ value of 5.0 or more and 9.0 or less. On the other hand, the present invention can be completed by reducing the defects on the surface of the substrate caused by the etching of the alkali agent in the strongly alkaline region and achieving the reduction of the foreign matter on the surface of the substrate and the improvement of the smoothness, thereby forming an excellent polishing surface. In other words, the polishing liquid for a semiconductor substrate of the present invention contains modified silica dioxide particles whose surface is modified with an aluminate, a water-soluble polymer, and water; and a water-soluble polymer based on the total mass of the polishing liquid for a semiconductor substrate. The content is more than 〇% by mass and 1.00% by mass or less; and the pH is 5.0 or more and 9.0 or less. According to such a polishing liquid for a semiconductor substrate, defects or foreign matters on the surface of the substrate can be reduced during polishing of the semiconductor substrate, and smoothness of the surface of the substrate can be improved, and an excellent polishing surface can be formed. Further, the smoothness can be evaluated by HAZE. Preferably, the pH of the polishing liquid for a semiconductor substrate of the present invention is 6. 〇 or more and 8.0 or less. The content of the modified cerium oxide particles is preferably 0.01% by mass or more and 1.50% by mass or less based on the total mass of the polishing liquid for a semiconductor substrate. At this time, defects or foreign matter on the surface of the substrate can be further reduced, and the smoothness of the surface of the substrate can be further improved. The content of the water-soluble polymer is preferably 0.001% by mass or more and 1.00% by mass or less based on the total mass of the polishing liquid for a semiconductor substrate. At this time, defects or foreign matter on the surface of the substrate can be further reduced, and the smoothness of the surface of the substrate can be improved by step. Preferably, the water-soluble polymer is a nonionic polymer. At this time, foreign matter on the surface of the substrate can be further reduced. Further, it is preferable that the water-soluble polymer is a polymer obtained from a polymerizable monomer containing vinylpyrrolidone, and more preferably polyvinylpyrrolidone. At this time, foreign matter on the surface of the substrate can be further reduced. The polishing liquid for a semiconductor substrate of the present invention may further contain 1,2,4-triazole. At this time, the smoothness of the surface of the substrate can be further improved. Preferably, the content of 1,2,4-triazole is 0.05 mass based on the total mass of the polishing liquid for a semiconductor substrate. /〇 is 0.70% by mass or less. At this time, defects or foreign matter on the surface of the substrate can be further reduced, and the smoothness of the surface of the south substrate can be further improved. The polishing liquid for a semiconductor substrate of the present invention can be preferably used in the case where the polishing target of the polishing liquid is the surface of the semiconductor substrate, and the surface contains the case of Shi Xi. A method of manufacturing a semiconductor wafer according to the present invention includes a polishing step of polishing a surface of a semiconductor substrate using the polishing liquid for a semiconductor substrate. According to such a manufacturing method, in the polishing of the semiconductor substrate, defects or foreign matters on the surface of the substrate can be reduced, and the smoothness of the surface of the substrate can be improved, and an excellent polishing surface can be formed. The method for fabricating a semiconductor wafer of the present invention may further include: stepping or grinding a plate member including a semiconductor material to obtain a rough wafer before the polishing step, and polishing the wafer The step of obtaining a semiconductor substrate. Or the method for manufacturing the conductive wafer of the present invention may further include: performing a wet method on the plate member including the semiconductor material to obtain a thick ^^

201204818 . W JL 步驟;對粗晶圓進行研磨而獲得半導體基板的步驟。 [發明的效果] 根據本發明,可提供一種在半導體基板的研磨中,可 降低基板表面的缺陷或異物,並且能提高基板表面的平滑 性,可形成優異研磨表面的半導體基板用研磨液及使用此 半導體基板用研磨液的半導體晶圓的製造方法。此種本發 明適合於半導體基板的表面加工。另外,本發明中,在半 導體基板的精加工研磨(最終拋光)中,可降低基板表面 的缺陷或異物’並且能提高基板表面的平滑性,可形成優 異的研磨表面。 【實施方式】 以下’對本發明之一實施方式的半導體基板用研磨液 及使用此研磨液的半導體晶圓的製造方法進行詳細說明。 另外,本說明書中提及研磨液中的各成分的量時,相當於 各成分的物質在研磨液中存在多種時,只要無特別說明, 是指研磨液中所存在的此多種物質的合計量。 &lt;半導體基板用研磨液&gt; 本實施方式的半導體基板用研磨液包含表面經鋁酸鹽 改質的改質二氧化矽粒子(研磨粒子)、水溶性高分子以及 水;以半導體基板用研磨液的總質量為基準,水溶性高分 子的含量為超過〇質量%且為1.00質量%以下;上述研磨 液的pH值為5.0以上9.0以下。 本實施方式中,由於研磨液的pH值為5.0以上9.0以 下,因此可抑制在強鹼性區域中因鹼劑的蝕刻而產生缺 201204818 w &lt;w a ^ w X X. 陷。另外,藉由併用表面經鋁酸鹽改質的改質二氧化矽粒 子、以及水溶性高分子,而且水溶性高分子的含量為特定 範圍,而可提高基板表面的平滑性並且能抑制異物的増 加,可形成優異的研磨表面。 (pH 值) 本實施方式中’為了降低因鹼劑的蝕刻引起的缺陷, 半導體基板用研磨液的pH值為9_〇以下。就可進一步降低 缺陷的方面而言,較佳為半導體基板用研磨液的pH值為 8.0以下。另一方面,關於異物(特別是研磨粒子)的附 著,由於pH值變得越低則半導體基板的電位會變得越小, 因此難以獲得降低因靜電排斥所引起的異物的附著的效 果。就充分獲得降低異物附著的效果的方面而言,半導體 基板用研磨液的pH值宜為5·〇以上,較佳為5 5以上,更 佳為6.0以上。 半導體基板用研磨液的pH值例如可藉由酸性化合物 及/或鹼性化合物的含量調整。另外,半導體基板用研磨液 的pH值可藉由pH計(例如橫河電機股份有限公司製造、 Model pH81 )來測定。 上述酸性化合物例如可列舉:蘋果酸等有機酸,甘胺 酸等胺基酸,硝酸、硫酸等無機酸等。上述鹼性化合物就 低臭氣的方面而言,較佳為選自氨、氫氧化銨及氫氧化四 甲基叙的至少1種含氣驗性化合物,或選自氬氧化鉀及氫 氧化鈉的至少1種無機鹼性化合物。這些化合物可單獨使 用1種或者將2種以上加以組合而使用。 201204818, (研磨粒子) 本實施方式的半導體基板用研磨液的研磨粒子是表面 經銘酸鹽改質的改質二氧化絲子(以τ視情況簡稱為「改 質二氧化矽粒子」),較佳為表面經鋁酸鹽改質的改質膠體 二氧化矽粒子。本實施方式中,改質二氧化矽粒子發揮出 作為主要研磨材料的作用。另—方面,亦可藉由未改質的 二氧化雜子進行研磨,但單職絲改#的二氧化石夕粒 子,亦無法充分降低缺陷或者充分提高平滑性。 藉由鋁ι鹽的一氧化矽粒子表面的改質例如可使用鋁 酸卸[(α1〇(οη)2Κ]等紹化合物來進行。二氧化石夕粒子表 面的改質例如在二氧化石夕粒子的分散液中添加紹酸奸,在 60°C以上進行⑽,由此使二氧化雜子表_魏醇基 成為更易離子化的-Si-〇-Al(〇H)2基。 改質二氧化石夕粒子視需要可併用其他的研磨粒子。可 與改質二氧化雜子個的其他研餘子具體而言,例如 括氧化鋁、二氧化鈽、二氧化鈦、氧化锆或有 機^^物等的研練。亦可將改質二氧化雜子與未改質 的-氧化碎粒子併用。 声2 Ξ:t化矽粒子的一次粒徑就可獲得實用的研磨速 =方面而P較佳為5 nm以上,更佳為7腿以上,尤 二Ϊ上。另外’改f二氧化雜子的一次粒徑就 更谷易抑制產生傷痕等研磨缺_方面而言,較佳為2〇〇 Γ二下更佳為100 nm以下,尤佳為50舰以下,特佳 n、下將改質—氧化⑦粒子的—次粒徑設為上述 12 201204818 ^ 11 磨的進行而進-步提高平滑性,並且 ^抑制因粒子引起的缺陷的增加。 τ柄^實施方式巾’「改質二氧化⑪粒子的—次粒獲」是指 ^據财比表面積V算出的平均直徑,可根據藉^ 而::法所侍的吸附比表面積(以下縣「βετ比表面積」) 度ρ (單:夂’粒5的一次粒徑D (單位:m)、粒子的密 i ·Λ 及腿比表_ V (單位:m2/g) 具有下述式(1)的關係。 D = 6/ (pxy) ⑴ 將膠體二氧化⑪粒子的密度P設為p = 22GG (kg/m3) 時,式(1)可表示為下述式(2)。 D = 2.727xl〇-6/y (m) =2727/V (nm) (2) 、藉由在式(2)中代入BET比表面積v(m2/g),而可 求出,子的一次粒徑D。BET比表面積具體可藉由以下方 式測,。首先,藉由真空冷凍乾燥機將研磨粒乾燥,將此 殘留邛为用研钵(磁性、100 ml)細細研碎而獲得測定用 式料接著使用Yuasa I〇nics股份有限公司製造的Be丁 比表面積測定裝置(製品名AutGS〇rb6),對峡用試料的 BET比表面積v進行測定。 至於改質二氧化矽粒子的含量,以半導體基板用研磨 13 201204818 , Vf V/ ▲〆 jjll 液的總質量為基準,較佳為⑽丨質量 質量%以上,尤佳為⑽質量%以上。若^更:=5 子的含量為001質詈 《質一氧化石夕粒 磨液㈣的效果降低。以半導體基板用研 150曾:。/為基準’改質二氧化錄子的含量較佳為 ^/2 / ’更佳為質量%以下,尤佳為〇.5〇質 下。目丨—。右改質二氧化矽粒子的含量為1.50質量°/〇以 ’二谷2充分獲得與含量相符之缺陷或平滑性的改善效 、’且谷易抑制產生分散性降低等問題。 (水溶性高分子) t實施方式的半導縣板騎舰巾的水雜高分子 =巧列舉:海紐、果膠酸、縣甲基纖維素、壤脂、 =膠、^聚糠、甲基二醇殼聚糖、甲基纖維素、乙基纖 纖維去羥基丙基纖維素、羥基丙基甲基纖維素、羥基乙基 酸、平、卡德蘭多糖及普魯蘭多糖等多糖類;聚天冬醯胺 、聚麩胺酸、聚離胺酸、聚蘋果酸、聚曱基丙烯酸、聚 苯=酸、聚順谓二酸、聚衣康酸、聚反丁婦二酸、聚(對 =乙,甲酸)、聚乙烯硫酸、聚丙烯酸、聚丙烯酸、聚醯胺 含t聚^醛酸等聚羧酸及其鹽;聚乙烯亞胺及其鹽;使包 ^ ,醇、乙烯吡咯烷酮、丙烯醛或丙烯醯胺等的聚合性 :聚合而得的聚合物;聚乙二醇、聚丙二醇、聚丁二醇 ^畔-丙二醇嵌段共聚物等。聚羧酸的鹽、及聚乙烯亞 胺的鹽可列舉銨鹽等。 使包含乙烯醇、乙烯吡咯烷酮、丙烯醛或丙烯醯胺等 201204818 的聚S性單體聚合而得的聚合物例如較佳為:聚乙婦醇、 聚乙烯吡咯烷酮、聚丙烯醛、聚丙烯醯胺等高分子(均聚 物)’以及乙烯醇、乙烯吡咯烷酮、丙烯醯胺、丙烯醛等聚 合性單體與其他聚合性單體的共聚物。上述其他聚合性單 體例如可列舉乙酸乙_旨、丙烯酸甲g旨、丙稀酸等,可用 作共聚物的單體。 上述水溶性高分子中,較佳為非離子性高分子,非離 ,性高分子例如可列舉:羧基甲基纖維素、瓊脂、三仙膠、 殼聚糖、甲基二醇殼聚糖、曱基纖維素、乙基纖維素、羥 基丙基纖維素、羥基丙基曱基纖維素、羥基乙基纖維素、 卡德蘭多糖及普魯蘭多糖等多糖類;聚乙烯亞胺;使包含 乙烯醇、乙烯吡咯院酮、丙烯醛或丙烯醯胺等的聚合性單 體聚合而得的聚合物;聚乙二醇、聚丙二醇、聚丁二醇及 i二醇_丙二醇嵌段共聚物等。非離子性高分子較佳為使包 含乙烯吡咯烷酮的聚合性單體聚合而得的聚合物,更佳為 聚乙烯吼咯烷酮(乙烯吡咯烷酮的均聚物)。 另外,上述水溶性高分子可單獨使用i種或者將2種 以上加以組合而使用。另外,將上述水溶性高分子中的多 種间分子加以混合而使用時,其混合物的水溶性高分子的 至少一種可為使包含乙烯吡咯烷酮的聚合性單體聚合而得 的聚合物。 一般認為水溶性高分子具有防止研磨粒子或研磨塾屑 等異物固著於基板表面(晶圓表面)的作用、或清洗時容 易去除附著的研磨粒子或研磨墊屑等異物的作用。一般認 15 201204818,,, 為這些作用是藉由水溶性高分子附著在半導體基板的表面 而獲得。即,藉由水溶性高分子附著在基板上,而可在清 洗時將附著於水溶性高分子上的異物與水溶性高分子一起 自基板去除。並且認為,直接附著於半導體基板表面的異 物藉由以水溶性高分子被覆而防止乾燥固著,同樣藉由清 洗與水溶性高分子一起自半導體基板去除。另一方面,在 包含改質二氧化石夕粒子及水而不包含水溶性高分子的研磨 液中,推測上述作用並不充分,無法充分降低基板表面的 異物,並且無法獲得實用的平滑性。 在本貫施方式的半導體基板用研磨液的pH值為5.〇 以上9.0以下的環境中,有半導體基板的表面電位為負值 的傾向。另外,未產生自然氧化膜等的半導體基板的表面 表現出較強的疏水性。一般認為此種半導體基板與水溶性 高分子的相互作用主要是靜電作用及疏水相互作用發揮作 用。在相互作用過強時,水溶性高分子會阻礙研磨,並且 難以藉由清洗去除水溶性高分子。另一方面,在相互作用 過弱時,水溶性高分子無法充分被覆半導體基板表面,而 難以獲得清洗效果。本實施方式中,為了獲得上述效果, 半導體基板與水溶性高分子的相互作用較佳為疏水性相互 作用,較佳為陰離子性官能基所引起的離子相互作用。這 些相互作用可單獨發生或者多種同時發生。 以半導體基板用研磨液的總質量為基準,水溶性高分 子的含量為1.00質量%以下,較佳為0.50質量%以下,更 佳為0.30質量%以下,尤佳為0.10質量%以下,特佳為〇 〇5 201204818 . a 11 質量%以下。若水溶性高分子的含量為1.00質量%以下, 發生高黏度化岐流動性降低、或者研磨粒子凝 &quot;β碭,並且可充分去除附著於基板表面的異物。以半 導體基板料磨㈣總#量為鮮,水溶性高分子的含量 2超過0質量%,較佳為咖質量%以上更佳為讀5 以上’尤佳為請質量%以上。若水溶性高分子的 3f超過G質量%,則可充分獲得防止異物固著於基板表 面的效果,並且可抑制降低凹凸的效果降低而難以提高平 滑性。 (1,2,4-二口坐) 本實施方式的半導體基板用研磨液可含有丨,24-三 嗤。藉由=磨液含有i,2,4_三。圭,而可進一步提高平滑性·; 與改質二氡化雜子及水雜冑分子併㈣添加物,可列 U’2,4·二唾或咪嗤,藉由使用⑶·三嗤’可顯著提高平 曰以半導體基板用研磨液的總質量為基準,丨又冬三唑的 含3:較佳為0.05質量%以上,更佳為〇1〇質量%以上。另 外,就容易防止研磨粒子的凝聚等問題的方面而言,以半 導體基板用研磨液的總f量為基準,u,4_三销含量較佳 為〇·7〇質量%以下,更佳為〇5〇質量%以下。另外,不能 一概而論研磨粒子的凝聚是僅由1,2,4_三旬含量引起 的亦會因研磨粒子的粒徑或含量、及水溶性高分子的種 類或含量而引起研磨粒子的凝聚。 (其他成分) 17 201204818 ^ 11 本實施方式的半導體基板用研磨液包含水。另外,本 方式中除了上述成分外’在不損及上述研磨液的作 用,果的範圍内,可在半導體基板用研磨液中添加水以外 的/合劑、防餘劑、氧化劑等通常添加於研磨液的成分。 (保存形態) 、本實施方式的半導體基板用研磨液能以預先提高其成 t濃度的濃縮形態而保存。在研磨液的使用時,將處於濃 '缩形態的研磨液用水等稀釋至原本的成分濃度為止而使用 即可。而且’亦能以將半導體基板用研磨液的成分分成幾 個部分的分液形態而保存,在使用時將這些分液混合而使 用。 〈半導體晶圓的製造方法&gt; 本實施方式的半導體晶圓的製造方法(半導體基板的 研磨方法)包括研磨步驟:使用本實施方式的半導體基板 用研磨液對半導體基板的表面進行研磨而獲得半導體晶 圓°本實施方式的半導體基板用研磨液在將基板構成包含 石夕的半導體基板作為研磨對象時,會表現出特別優異的研 磨特性’例如在研磨對象為半導體基板的表面,且此表面 包含石夕時’會表現出優異的研磨特性。基板構成包含矽的 基板例如可列舉:矽基板或碳化矽基板。研磨對象的半導 體基板例如可使用:砷化鎵基板、或氮化鎵基板。 本實施方式的半導體基板用研磨液可應用於由半導體 材料的單晶獲得半導體晶圓的半導體晶圓的製造方法中的 精加工研磨。半導體晶圓(例如矽晶圓)通常藉由粗研磨 201204818 a 步驟、精加工研磨(最終研磨)步驟而獲得。在 Ξ ,,慢地消除半導體基板表面的凹凸及ί 二不太注重對半導體材料(例如 著的研Jr不產生新缺陷,去除粗研磨時附 貫施方式的半導體基板用研磨液盘提古 例如…的研磨速度相比,更注重5 導體基板表面不易產生缺陷、使半導體 ,牛 =、(3二因:磨整的磨損所產“酬)不1 圓的製造步财胁半導體晶 包括即,本實財式㈣1方案料導如_製造方法 二 而獲得粗晶圓; 主面)進饤研械磨削(研削) (2) 粗研磨步驟,對粗晶圓的表 研磨而獲得半導縣板(例如絲板); 面)進订 (3) 精加工研磨步驟,使用本實施方式 ::進對,步驟後的半導體基板的表面 面)進仃進-步研磨而獲得半導體晶 材料::匕rn繼料的晶圓例如可二 可二 ==切編獲得。準備靖, 201204818 · 另外,本實201204818 . W JL Step; a step of grinding a rough wafer to obtain a semiconductor substrate. [Effects of the Invention] According to the present invention, it is possible to provide a polishing liquid for a semiconductor substrate which can reduce defects or foreign matter on the surface of the substrate, improve the smoothness of the surface of the substrate, and form an excellent polishing surface. A method of manufacturing a semiconductor wafer of a polishing liquid for a semiconductor substrate. This invention is suitable for surface processing of a semiconductor substrate. Further, in the present invention, in the finishing polishing (final polishing) of the semiconductor substrate, defects or foreign matter on the surface of the substrate can be reduced and the smoothness of the surface of the substrate can be improved, and an excellent polishing surface can be formed. [Embodiment] Hereinafter, a polishing liquid for a semiconductor substrate according to an embodiment of the present invention and a method for producing a semiconductor wafer using the polishing liquid will be described in detail. In addition, when the amount of each component in the polishing liquid is referred to in the present specification, when a plurality of substances corresponding to the respective components are present in the polishing liquid, unless otherwise specified, the total amount of the plurality of substances present in the polishing liquid is referred to. . &lt; polishing liquid for semiconductor substrate&gt; The polishing liquid for semiconductor substrate of the present embodiment includes modified cerium oxide particles (abrasive particles) whose surface is modified with aluminate, water-soluble polymer and water, and polishing for semiconductor substrate The content of the water-soluble polymer is more than 〇% by mass and is 1.00% by mass or less based on the total mass of the liquid; and the pH of the polishing liquid is 5.0 or more and 9.0 or less. In the present embodiment, since the pH of the polishing liquid is 5.0 or more and 9.0 or less, it is possible to suppress the occurrence of defects in the strong alkaline region due to the etching of the alkali agent, 201204818 w &lt; w a ^ w X X. In addition, by using a modified cerium oxide particle whose surface is modified with an aluminate, and a water-soluble polymer, and the content of the water-soluble polymer is in a specific range, the smoothness of the surface of the substrate can be improved and the foreign matter can be suppressed. It can form an excellent abrasive surface. (pH value) In the present embodiment, the pH of the polishing liquid for a semiconductor substrate is 9 〇 or less in order to reduce defects caused by etching of an alkali agent. In view of further reducing defects, the polishing liquid for a semiconductor substrate preferably has a pH of 8.0 or less. On the other hand, regarding the adhesion of the foreign matter (especially the abrasive particles), the lower the pH becomes, the smaller the potential of the semiconductor substrate becomes, so that it is difficult to obtain the effect of reducing the adhesion of foreign matter due to electrostatic repulsion. The pH of the polishing liquid for a semiconductor substrate is preferably 5 Å or more, preferably 5 5 or more, and more preferably 6.0 or more, in terms of the effect of reducing the adhesion of the foreign matter. The pH of the polishing liquid for a semiconductor substrate can be adjusted, for example, by the content of an acidic compound and/or a basic compound. Further, the pH of the polishing liquid for a semiconductor substrate can be measured by a pH meter (for example, manufactured by Yokogawa Electric Co., Ltd., Model pH 81). Examples of the acidic compound include organic acids such as malic acid, amino acids such as glycine, and inorganic acids such as nitric acid and sulfuric acid. The above basic compound is preferably at least one gas-containing compound selected from the group consisting of ammonia, ammonium hydroxide, and tetramethyl hydride, or selected from the group consisting of argon oxynitride and sodium hydroxide, in terms of low odor. At least one inorganic basic compound. These compounds may be used alone or in combination of two or more. 201204818, (polishing particles) The polishing particles of the polishing liquid for a semiconductor substrate of the present embodiment are modified dioxide wires whose surface is modified with a salt acid salt (referred to as "modified cerium oxide particles" in the case of τ, for example). Preferred are modified colloidal cerium oxide particles whose surface is modified with aluminate. In the present embodiment, the modified cerium oxide particles function as a main abrasive. On the other hand, it is also possible to carry out the grinding by the unmodified dioxins, but the single-core silk-changing #2 of the oxidized particles can not sufficiently reduce the defects or sufficiently improve the smoothness. The modification of the surface of the cerium oxide particles by the aluminum salt can be carried out, for example, by using an aluminoic acid unloading compound such as [α1〇(οη)2Κ]. The surface of the cerium oxide particles is modified, for example, in the sulphur dioxide eve. The addition of sulphuric acid to the dispersion of the particles is carried out at 60 ° C or higher (10), whereby the oxidized heterophile _-vinyl alcohol group becomes a more ionizable -Si-〇-Al(〇H) 2 group. The other particles of the oxidized particles may be used in combination with other particles of the oxidized dioxins, such as alumina, ceria, titania, zirconia or organic compounds. Such as the training. The modified dioxins can also be used together with the unmodified oxidized granules. Acoustic 2 Ξ: The primary particle size of the bismuth bismuth particles can obtain a practical polishing rate = P It is 5 nm or more, more preferably 7 or more legs, especially on the second layer. In addition, the primary particle size of the modified dioxodioxide is more likely to inhibit the occurrence of scratches such as scratches, and is preferably 2〇〇. It is better to be below 100 nm, especially for less than 50 ships. It is better to change the quality of the 7-particles. The above-mentioned 12 201204818 ^ 11 is carried out to improve the smoothness, and to suppress the increase of defects caused by the particles. The τ 柄 ^ implementation of the towel ""modified oxidized 11 particles - the second granule" means ^ According to the average surface diameter calculated from the surface area V, the adsorption specific surface area (hereinafter "βετ specific surface area") of the method can be used according to the method: (the following is the primary particle diameter D of the 夂' grain 5 (unit: m), the density of the particles i · Λ and the leg ratio table _ V (unit: m2 / g) has the relationship of the following formula (1) D = 6 / (pxy) (1) The density P of the colloidal dioxide 11 particles is set When p = 22GG (kg/m3), the formula (1) can be expressed as the following formula (2): D = 2.727xl〇-6/y (m) = 2727/V (nm) (2) By substituting the BET specific surface area v (m2/g) in the formula (2), the primary particle diameter D of the sub-particle can be determined. The BET specific surface area can be specifically measured by the following method. First, by a vacuum freeze dryer The abrasive grains were dried, and the residue was pulverized by a mortar (magnetic, 100 ml) to obtain a measurement material, followed by a Bead specific surface area measuring device manufactured by Yuasa I〇nics Co., Ltd. The product name AutGS〇rb6) is used to measure the BET specific surface area v of the gorge sample. The content of the modified cerium oxide particles is based on the total mass of the semiconductor substrate polishing 13 201204818, Vf V/ ▲〆jjll liquid. Jia Wei (10) 丨 quality by mass or more, especially preferably (10) mass% or more. If ^ more: = 5 sub-content is 001 詈 "The effect of the mass of the oxidized stone granule grinding fluid (4) is reduced. Once:. The content of the modified &lt;RTI ID=0.0&gt;&gt;&gt;&gt;&gt; Seeing. The content of the right-modified cerium oxide particles is 1.50 mass%/〇, and the effect of improving the defects or smoothness in accordance with the content is sufficiently obtained by the 'two grains 2', and the problem that the dispersibility is lowered is suppressed. (Water-soluble polymer) t The water-hybrid polymer of the semi-guided plate riding boat of the embodiment = smart list: Haixin, pectic acid, county methyl cellulose, loam, = glue, ^ poly, A Polyglycols such as chitosan, methyl cellulose, ethyl cellulose fiber dehydroxypropyl cellulose, hydroxypropyl methyl cellulose, hydroxyethyl acid, ping, cadmium and pullulan Polyasparagine, polyglutamic acid, polylysine, polymalic acid, polyacrylic acid, polyphenyl = acid, poly-succinic acid, polyitaconic acid, poly-butyric acid, poly (pair = B, formic acid), polyvinyl sulfuric acid, polyacrylic acid, polyacrylic acid, polyamine, polycarboxylic acid such as t polyoxyacid and its salt; polyethyleneimine and its salt; make ^, alcohol, ethylene Polymerizability of pyrrolidone, acrolein or acrylamide: polymer obtained by polymerization; polyethylene glycol, polypropylene glycol, polybutylene glycol, propylene glycol block copolymer, and the like. Examples of the salt of the polycarboxylic acid and the salt of the polyethyleneimine include an ammonium salt and the like. A polymer obtained by polymerizing a polys-based monomer of 201204818, such as vinyl alcohol, vinyl pyrrolidone, acrolein or acrylamide, is preferably, for example, polyethlycol, polyvinylpyrrolidone, polyacrylaldehyde or polyacrylamide. A copolymer of a polymer (homopolymer) and a polymerizable monomer such as vinyl alcohol, vinyl pyrrolidone, acrylamide or acrolein and another polymerizable monomer. The other polymerizable monomer may, for example, be acetic acid, or acrylic acid, or acrylic acid, and may be used as a monomer of the copolymer. Among the water-soluble polymers, a nonionic polymer is preferred, and examples of the non-ionizable polymer include carboxymethylcellulose, agar, trisin, chitosan, and methyl glycol chitosan. Polysaccharides such as mercapto cellulose, ethyl cellulose, hydroxypropyl cellulose, hydroxypropyl decyl cellulose, hydroxyethyl cellulose, cadmium polysaccharide, and pullulan; polyethyleneimine; a polymer obtained by polymerizing a polymerizable monomer such as vinyl alcohol, vinyl pyrrolidone, acrolein or acrylamide; polyethylene glycol, polypropylene glycol, polytetramethylene glycol, and idiol-propylene glycol block copolymer . The nonionic polymer is preferably a polymer obtained by polymerizing a vinylpyrrolidone-containing polymerizable monomer, more preferably polyvinylpyrrolidone (a homopolymer of vinylpyrrolidone). In addition, the water-soluble polymer may be used singly or in combination of two or more kinds. In addition, when a plurality of kinds of molecules in the water-soluble polymer are used in combination, at least one of the water-soluble polymers of the mixture may be a polymer obtained by polymerizing a polymerizable monomer containing vinylpyrrolidone. It is considered that the water-soluble polymer has a function of preventing foreign matter such as abrasive particles or abrasive chips from adhering to the surface of the substrate (the surface of the wafer), or a foreign matter such as polishing particles or polishing pad which is easily removed during cleaning. In general, 15 201204818,, these effects are obtained by attaching a water-soluble polymer to the surface of a semiconductor substrate. In other words, the water-soluble polymer adheres to the substrate, and the foreign matter adhering to the water-soluble polymer can be removed from the substrate together with the water-soluble polymer during the cleaning. Further, it is considered that the foreign matter directly attached to the surface of the semiconductor substrate is prevented from drying and fixing by being coated with the water-soluble polymer, and is also removed from the semiconductor substrate by the cleaning together with the water-soluble polymer. On the other hand, in the polishing liquid containing modified quartz dioxide particles and water without containing a water-soluble polymer, it is presumed that the above effects are not sufficient, and foreign matter on the surface of the substrate cannot be sufficiently lowered, and practical smoothness cannot be obtained. In the environment where the pH of the polishing liquid for a semiconductor substrate of the present embodiment is 5. 〇 or more and 9.0 or less, the surface potential of the semiconductor substrate tends to be a negative value. Further, the surface of the semiconductor substrate on which no natural oxide film or the like is generated exhibits strong hydrophobicity. It is considered that the interaction between such a semiconductor substrate and a water-soluble polymer mainly serves as an electrostatic interaction and a hydrophobic interaction. When the interaction is too strong, the water-soluble polymer hinders the grinding, and it is difficult to remove the water-soluble polymer by washing. On the other hand, when the interaction is too weak, the water-soluble polymer cannot sufficiently cover the surface of the semiconductor substrate, and it is difficult to obtain a cleaning effect. In the present embodiment, in order to obtain the above effects, the interaction between the semiconductor substrate and the water-soluble polymer is preferably hydrophobic interaction, and is preferably an ionic interaction caused by an anionic functional group. These interactions can occur individually or multiple simultaneously. The content of the water-soluble polymer is 1.00% by mass or less, preferably 0.50% by mass or less, more preferably 0.30% by mass or less, and particularly preferably 0.10% by mass or less, based on the total mass of the polishing liquid for a semiconductor substrate. 〇〇5 201204818 . a 11% by mass or less. When the content of the water-soluble polymer is 1.00% by mass or less, the high-viscosity hydrazine fluidity is lowered, or the abrasive particles are condensed, and the foreign matter adhering to the surface of the substrate can be sufficiently removed. The amount of the water-soluble polymer is more than 0% by mass, preferably 5% by mass or more, more preferably 5 or more, and more preferably % by mass or more. When 3f of the water-soluble polymer exceeds G% by mass, the effect of preventing foreign matter from adhering to the surface of the substrate can be sufficiently obtained, and the effect of suppressing the unevenness can be suppressed from being lowered, and it is difficult to improve the smoothness. (1, 2, and 4) The polishing liquid for a semiconductor substrate of the present embodiment may contain ruthenium or ruthenium. By = grinding liquid contains i, 2, 4_ three.圭, and can further improve the smoothness; and with the modified diterpenoids and hydrazine molecules and (4) additives, can be listed U'2,4 · di-saliva or sputum, by using (3) · three 嗤 ' It is possible to remarkably increase the content of bismuth and winter triazole based on the total mass of the polishing liquid for a semiconductor substrate, preferably 0.05% by mass or more, more preferably 〇1% by mass or more. In addition, in terms of the problem of the aggregation of the polishing particles, it is preferable that the content of the u, 4_three pins is 〇·7 〇 mass% or less based on the total amount of the polishing liquid for the semiconductor substrate, and more preferably 〇5〇 mass% or less. Further, it is not possible to generalize that the aggregation of the abrasive particles is caused only by the 1, 2, 4 - 30-degree content, and the aggregation of the abrasive particles is caused by the particle size or content of the abrasive particles and the type or content of the water-soluble polymer. (Other components) 17 201204818 ^ 11 The polishing liquid for a semiconductor substrate of the present embodiment contains water. In addition, in the present embodiment, in addition to the above-described components, it is possible to add a mixture other than water, a lubricant, an oxidizing agent, etc. to the polishing liquid for a semiconductor substrate, in addition to the above-described effects of the above-mentioned polishing liquid. The composition of the liquid. (Storage form) The polishing liquid for a semiconductor substrate of the present embodiment can be stored in a concentrated form in which the concentration of t is increased in advance. In the use of the polishing liquid, the polishing liquid in a concentrated form may be used by diluting it to the original component concentration with water or the like. Further, it can be stored in a liquid separation form in which the components of the polishing liquid for a semiconductor substrate are divided into several parts, and these liquid separations are mixed and used at the time of use. <Method of Manufacturing Semiconductor Wafer> The method of manufacturing a semiconductor wafer (the method of polishing a semiconductor substrate) of the present embodiment includes a polishing step of polishing a surface of a semiconductor substrate using the polishing liquid for a semiconductor substrate of the present embodiment to obtain a semiconductor In the polishing liquid for a semiconductor substrate of the present embodiment, when a semiconductor substrate including a substrate is used as a polishing target, particularly excellent polishing characteristics are exhibited, for example, the surface to be polished is a surface of a semiconductor substrate, and the surface includes Shi Xishi' will show excellent grinding characteristics. The substrate may be a germanium substrate or a tantalum carbide substrate. For the semiconductor substrate to be polished, for example, a gallium arsenide substrate or a gallium nitride substrate can be used. The polishing liquid for a semiconductor substrate of the present embodiment can be applied to finish polishing in a method of manufacturing a semiconductor wafer in which a semiconductor wafer is obtained from a single crystal of a semiconductor material. Semiconductor wafers (e.g., germanium wafers) are typically obtained by a coarse grinding 201204818 a step, a finishing grinding (final grinding) step. In Ξ, the unevenness of the surface of the semiconductor substrate is slowly eliminated, and the semiconductor material is not paid much attention to (for example, the research does not cause new defects, and the polishing liquid disk for the semiconductor substrate is removed when the coarse polishing is removed, for example. Compared with the grinding speed of the ..., it is more important to make the surface of the 5-conductor substrate less prone to defects, so that the semiconductor, the cow =, (3: the cause of the wear and tear of the wear and tear) is not a circle. This solid financial formula (4) 1 program material guide _ manufacturing method 2 to obtain the rough wafer; main surface) 饤 research and mechanical grinding (grinding) (2) rough grinding step, the coarse wafer surface grinding to obtain the semi-conductor county Plate (for example, silk plate); face) binding (3) finishing polishing step, using the present embodiment:: pairing, the surface surface of the semiconductor substrate after the step) is subjected to --step grinding to obtain a semiconductor crystal material: The wafers that 继rn are relayed can be obtained, for example, by two == cut and edited. Prepare Jing, 201204818 · In addition, this

肢日日圓叫馒得的半導體晶圓的製造方 以下,對再生晶圓的製造方法進行說 為了 ㈣晶11製造半導體裝置的各要素步驟中, 試曰而使用大量的晶圓作為測試晶圓。此種測 ^曰膜的日ϊ _在平坦⑽基板上形成絕緣膜或金屬膜等 各種膜的aa®。製造這些測試晶圓的目的是分布在如下多 τ況·調查用以切基板上形成各顧的最佳條件;調 一在夕基板上塗佈光阻膜並曝光時的最佳條件;定期對上 述各最佳條件進行監控;評價研磨液對形成神基板上的 各種膜的研磨特性等。 為了將這些測試晶圓再次用作測試晶圓,而進行再生 處理。再生處理通常是藉由濕式蝕刻等去除上述各種臈等 附著物,經過粗研磨步驟及精加工研磨步驟而再次獲得平 坦的晶圓。另外,上述測試晶圓存在以下情況:被送至再 生步驟前帶有較大的傷痕;或者在評價時形成凹凸。這些 情況下,通常藉由研削加工去除傷痕或凹凸,並進行粗研 磨步驟及精加工研磨,藉此再次獲得平坦的晶圓。 本實施方式的半導體基板用研磨液可較佳地用於對此 種再生晶圓進行精加工研磨。本實施方式的第2方案的半 導體晶圓的製造方法是用以進行再利用的半導體晶圓的製 造方法;包括 (1)準備步驟’將附著物(例如各種膜)附著於表面 201204818 構件)的表面進^ 3 ί導體材料(例如石夕)的晶圓(板狀 ⑺粗研磨刻而獲得粗晶圓; 研磨而獲得半導^ 晶圓的表面(例如主面)進行 (3)_體基板(例如矽基板); 用研磨液^’使用本實施方式的半導體基板 面)進行it-步驟後的半導體絲的表面(例如主 另外在r研磨而獲得半導體晶圓(例如矽晶圓)。 佳為在粗研磨晶=面有凹凸或傷痕時,較 ί實施方式的半導縣板料磨液亦可應用於 e ^ S (through silicon via, TSV) 此面實於3的製造方法中,在最終階段對半導體基板的 加工研磨。被稱為TSV的結構是將形成於半導 面的裝置與半導體晶κ的背面連接的電極以貫 通+導,晶_部的方式而形成的結構。 亡Tct實%方式的第3方案的半導體晶81的製造方法是具 有TSV的半導體晶@的製造方法;包括 ⑴準備步驟,準備具有形成了僅在表面( 一個主面) 開口的中空部的基板本體、與配置於中空部内的應成為貫 通電極的介層窗(導電構件)的晶圓; (2) 背面研磨步驟’自背面側(另—個主面側)研磨 基板本體; (3) 研磨步驟(精加工研磨步驟),使用本實施方式 201204818,; 的半導體基板用研磨液’自背面側研磨基板本體而使介層 窗於背面露出而形成貫通電極結構。 θ 在準備步驟中,例如準備半導體基板1〇〇,其包括: 形成了僅在表面la開口的申空部3a的基板本體1、配置 於表面la上的元件2、以追隨中空部3a的形狀的方式形 成於中空部3a内的絕緣層(例如氧化矽膜或氮化矽膜)5、 配置於中空部3a内應成為貫通電極的介層窗7 (參照圖1 (a))。 “、、 在背面研磨步驟中,藉由研磨機自背面lb側研削基板 本體1使基板本體1薄層化直至臨近絕緣層5露出為止, 而獲得半導體基板200 (參照圖1 (b))。 在研磨步驟中,使用本實施方式的半導體基板用研磨 液自背面lb側研磨基板本體1。藉此去除背面lb側的基 板本體1的表層部及絕緣層5,而於基板本體1形成貫通 孔3b並且介層窗7於背面lb露出而形成TsV7a (參照圖 1 (Ο))。藉此獲得具有自表面la至背面lb於厚度方向貫 通基板本體1的TSV7a的半導體晶圓300。 根據以上的本實施方式’提供半導體基板用研磨液的 用於半導體基板的精加工研磨用途的用途。另外,根據本 實施方式’提供半導體基板用研磨液的用於半導體晶圓的 製造中的半導體基板的精加工研磨用途的用途。根據本實 施方式的上述第1方案’提供半導體基板用研磨液的用於 由半導體材料的單晶製造半導體晶圓的用途。根據本實施 方式的上述第2方案’提供半導體基板用研磨液的用於製 22 201204818,,· 造再生晶圓的用途。根據本實施方式的上述第3方案,提 供半導體基板用研磨液_於形成Tsv的用途、及用於製 造具有TSV的半導體晶圓的用途。 在本實施方式的製造方法中的精加工研磨步驟中,較 佳為-邊在研朗盤的研料上供給半導縣板用研磨 液,-邊⑽半導體基㈣表_研雜的狀態,使 研磨壓盤與半導體基板㈣運動而將半導體基板的表面研 磨。使用此種研磨方法時’本實财式的半導體基板用研 磨液的研磨特性會變得顯著。 貫施方式的製造方法中的精加工研磨步發 中’與對半導體材料(例如⑦)的研磨速度相比,更為了 降低半導體f板(例如减板)上的缺陷並消除表面的德 獲#〶度的鏡面’因而研磨純佳為有某種程茂 二5例如較佳為藉由ASKER橡膠硬度計c型測突 、石广(ASKER C)值小於60的研磨墊。另外,「燃扭 [實例] 」^於測定如橡膠般軟質的研磨塾的硬度時常用的硬肩 计’由日本橡勝協會標準規格(sris)規 Γ杳Λ*」, 〜 明:定==本發明進行更詳細地說明,但本發 ^導體基板用研磨液的製備(實例1〜實例9)] 所的二7,序’以表1所示的含量調配表面經銘酸鹽改 雜子、水溶性高分子、視情況調配… - 1備實例1〜實例9的各持體基板㈣磨液。 23 201204818 各研磨液的製備時,使用κ值不同的聚乙烯吡咯烷酮 (PVP-K15、PVP-K30)作為水溶性高分子。κ值是與分 子量相關的黏性特性值,是藉由毛細管黏度計測定的2yc 下的相對黏度值。 各研磨液的製備中,首先在相當於研磨液總量的5〇 質量%的純水中,溶解表丨所示含量的聚乙烯吡咯烷酮 (PVP)、或聚乙稀。比b各燒酮(pvp)及ι,2,4_三峻。在pH 值非為所需的範圍時,藉由添加酸性化合物或驗性化合物 來調整pH值。接著,分散0.3質量%的一次粒徑為17nm、 表面經鋁酸鹽改質的改質二氧化矽粒子後,用純水調整成 计95質1%。接著,添加驗性化合物至達到所需的pH值, 其餘部分用純水調整成計1〇〇質量%。另外,在調整 值至鹼性側時,使用氨水,調整pH值至酸性側時使用硫 酸。' [半導體基板用研磨液的製備(比較例1〜比較例7)] 按以下順序’以表2所示的含量調配表面經鋁酸鹽改 ^的改質二氧化矽粒子、水溶性高分子、視情況調配1,2,4_ 二唾’而製備比較例1〜比較例7的各半導體基板用研磨 液。各研磨液的製備時,使用聚乙烯吡咯烷酮(;pvp_K15) 作為水溶性高分子。 各研磨液的製備中,首先在相當於研磨液總量的50 質量%的純水中’溶解表2所示含量的聚乙烯吡咯烷酮 Uvp)、或聚乙烯吡洛烧酮(PVP)及丨又冬三唑^在ρΗ 值非為所需的範圍時,藉由添加酸性化合物或鹼性化合物 24 201204818、 ju· 來魏$值。接者’分散表2所示的含量的—次粒徑為 nm、表面經織鹽改質的改質二氧化雜子、或膠體 二氧化魏子後,用純水調整成計95 f量%。接著,添加 酸性化合物或鹼性化合物至達到所需的 用純水調整成計⑽質量%。另外,在調整阳^= 側時,使用氨水,在調整pH值至酸性側時,使用硫酸。 [半導體基板用研磨液的pH值測定] 使用pH計(橫河電機股份有限公司製造、M〇dd PH81)測定實例1〜實例9及比較例丨〜比較例7的半導 體基板用研磨液的pH值。 [粗研磨半導體基板的調整] 按下述條件研磨直徑300 mm的石夕晶圓,調整表面粗 糙(粗研磨狀態)的矽晶圓。 (粗研磨條件) 研磨晶圓:300 mm石夕晶圓 研磨機:Reflexion (應用材料(Applied Materials)公 司製造) 研磨壓盤轉速:123 rpm 固定器轉速:117rpm 研磨壓力:13.7kPa 研磨液供給量:250 ml/分鐘 研磨墊:SUBA600 (NittaHaas 製造 研磨液:含有二氧化梦研磨粒(一次粒徑17 nm) 0.5 質量%及氫氧化四甲基銨的研磨液、pH值為10.5 25 201204818 研磨時間:90秒 [半導體基板的研磨] 在研磨壓盤的研磨墊上,一邊供給剛調配後的實例1 的半導體基板用研磨液,一邊以將半導體基板(矽晶圓) 的表面按壓於研磨墊的狀態,使研磨壓盤相對於半導體基 板相對旋轉,藉此對半導體基板的表面進行研磨。另外, 以與實例1相同的方法,使用剛調配後的實例2〜實例9 及比較例1〜比較例7的各研磨液,對半導體基板的表面 進行研磨。研磨條件的詳細内容如以下所述。 (研磨條件) 研磨晶圓:上述所製作的粗研磨後的300 mm石夕晶圓 研磨機:Reflexion (應用材料公司製造) 研磨壓盤轉速:123ipm 固定器轉速:117 rpm 研磨壓力:9.7kPa 研磨液供給量:250 ml/分鐘 研磨墊:Supreme RN-H Pad 30.5&quot;D PJ ; CX01 (Nitta Haas製造 研磨時間:5分鐘 [清洗] 按下述條件清洗上述研磨後的晶圓。 清洗機:MESA (應用材料公司製造) 清洗液:氫氧化銨〇.〇6體積% +過酸化氫0.12體積0/〇 刷洗時間:60秒 26 201204818、 αι 對於上述清洗後的晶圓’使用下述裝置測定缺陷數、 以及表示為HAZE值的值。另外,「缺陷數」是基板表面 的結晶缺陷、及附著的異物的總數的指標,數量越少則表 示缺陷的總數(結晶缺陷及附著的異物的總數)越少。另 外,「HAZE值」是基板表面的平滑性的指標,值越小則表 示平滑性越高。 缺陷檢測裝置:LS6700 (日立電子工程(Japan Electronics Engineering )製造)The manufacturer of the semiconductor wafer is called the semiconductor wafer. The following is a description of the method for manufacturing the regenerated wafer. In order to manufacture the semiconductor device in the step of manufacturing the semiconductor device, a large number of wafers are used as the test wafer. The measurement of the tantalum film is performed on a flat (10) substrate to form aa® of various films such as an insulating film or a metal film. The purpose of manufacturing these test wafers is to distribute the following conditions: investigate the optimal conditions for forming the respective substrates on the substrate; adjust the optimum conditions for coating the photoresist film on the substrate and expose it; Each of the above-described optimum conditions is monitored; the polishing properties of the polishing liquid on various films formed on the god substrate are evaluated. In order to reuse these test wafers as test wafers, regeneration processing is performed. The regenerating treatment usually removes the above-mentioned various deposits such as ruthenium by wet etching or the like, and obtains a flat wafer again by the rough grinding step and the finishing grinding step. In addition, the above test wafers have the following conditions: they are sent to a large scratch before the reproduction step; or irregularities are formed during the evaluation. In these cases, scratches or irregularities are usually removed by grinding, and a rough grinding step and finishing polishing are performed, thereby obtaining a flat wafer again. The polishing liquid for a semiconductor substrate of the present embodiment can be preferably used for finishing polishing of such a regenerated wafer. A method of manufacturing a semiconductor wafer according to a second aspect of the present embodiment is a method of manufacturing a semiconductor wafer for reuse, and includes (1) a preparation step of "attaching an attached material (for example, various films) to a surface of a layer 201204818) The surface is filled with a wafer of a conductive material (for example, Shi Xi) (a plate-like shape is obtained by rough etching of a plate (7); a surface of the wafer (for example, a main surface) is obtained by grinding to obtain a (3) _ body substrate. (for example, a germanium substrate); using the polishing liquid to "use the semiconductor substrate surface of the present embodiment" to perform the surface of the semiconductor filament after the it-step (for example, the main semiconductor wafer is obtained by r polishing to obtain a semiconductor wafer (for example, a germanium wafer). In order to have irregularities or scratches on the surface of the coarse grinding crystal, the semi-conductor plate grinding liquid of the embodiment can also be applied to the manufacturing method of e ^ S (through silicon via, TSV). In the final stage, the semiconductor substrate is processed and polished. The structure called TSV is a structure in which an electrode connected to the back surface of the semiconductor crystal κ is formed by a device formed on the semiconducting surface so as to penetrate the + lead and the crystal portion. % way The method for producing the semiconductor crystal 81 of the third aspect is a method for manufacturing a semiconductor crystal @ having a TSV, and includes (1) a preparation step of preparing a substrate body having a hollow portion formed only on the surface (one main surface), and being disposed in the hollow (1) Back grinding step 'grinding the substrate body from the back side (the other main surface side); (3) Grinding step (finishing grinding step) The polishing liquid for semiconductor substrate of the present embodiment is used to polish the substrate body from the back side, and the via window is exposed on the back surface to form a through electrode structure. θ In the preparation step, for example, the semiconductor substrate 1 is prepared. It includes: a substrate body 1 having a hollow portion 3a opened only on the surface la, an element 2 disposed on the surface 1a, and an insulating layer (for example, oxidized) formed in the hollow portion 3a so as to follow the shape of the hollow portion 3a. The tantalum film or the tantalum nitride film 5 is disposed in the hollow portion 3a as a via window 7 which is a through electrode (see FIG. 1(a)). ", in the back grinding step, by grinding The substrate body 1 is ground from the back surface 1b to thin the substrate body 1 until the insulating layer 5 is exposed, thereby obtaining the semiconductor substrate 200 (see FIG. 1(b)). In the polishing step, the semiconductor substrate of the present embodiment is used. The substrate body 1 is polished from the back surface 1b by a polishing liquid. The surface layer portion and the insulating layer 5 of the substrate body 1 on the back surface 1b side are removed, and the through hole 3b is formed in the substrate body 1 and the via window 7 is exposed on the back surface 1b. TsV7a (see Fig. 1 (Ο)). The semiconductor wafer 300 having the TSV 7a penetrating through the substrate body 1 in the thickness direction from the surface la to the back surface 1b is obtained. The present embodiment provides the semiconductor substrate polishing liquid. Use for finishing polishing applications of semiconductor substrates. Further, according to the present embodiment, the use of the polishing liquid for a semiconductor substrate for the finishing polishing use of the semiconductor substrate in the production of the semiconductor wafer is provided. According to the first aspect of the present invention, the use of the polishing liquid for a semiconductor substrate for producing a semiconductor wafer from a single crystal of a semiconductor material is provided. According to the second aspect of the present embodiment, the polishing liquid for a semiconductor substrate is provided for use in the production of a wafer. According to the third aspect of the present invention, the polishing liquid for a semiconductor substrate is used for the purpose of forming Tsv and for manufacturing a semiconductor wafer having TSV. In the finishing polishing step in the production method of the present embodiment, it is preferable to supply the polishing liquid for the semi-conducting plate on the grinding material of the slab, and the side (10) semiconductor substrate (four) is in a state of being mixed. The polishing platen and the semiconductor substrate (4) are moved to polish the surface of the semiconductor substrate. When such a polishing method is used, the polishing property of the polishing liquid for a semiconductor substrate of the present invention is remarkable. In the finishing grinding method in the manufacturing method of the continuous method, the defect on the semiconductor f-plate (for example, the reduction plate) is reduced and the surface is eliminated compared with the polishing rate of the semiconductor material (for example, 7). The mirror surface of the twist is thus preferably purely a polishing pad having a certain type of Cheng Mao 2, for example, preferably by the ASKER rubber hardness tester c-type test, and the Asker C value is less than 60. In addition, the "burning torque [example]" ^ is a hard shoulder gauge commonly used to determine the hardness of a rubber-like abrasive crucible. 'The Japanese Rubber Association's standard specifications (sris) regulations*", ~ Ming: 定 = The present invention will be described in more detail, but the preparation of the polishing liquid for the conductor substrate (Examples 1 to 9)] is based on the content shown in Table 1 and the surface is modified by the acid salt. Substrate, water-soluble polymer, as appropriate. - 1 Prepare each of the holder substrates (4) of Examples 1 to 9 to grind. 23 201204818 In the preparation of each polishing liquid, polyvinylpyrrolidone (PVP-K15, PVP-K30) having a different kappa value was used as the water-soluble polymer. The κ value is the viscous property value associated with the molecular weight and is the relative viscosity value at 2 yc as measured by a capillary viscometer. In the preparation of each polishing liquid, first, polyvinylpyrrolidone (PVP) or polyethylene having a content shown by the surface is dissolved in pure water of 5 〇 mass% corresponding to the total amount of the polishing liquid. More than b each burning ketone (pvp) and ι, 2, 4_ three. When the pH is not within the desired range, the pH is adjusted by adding an acidic compound or an organic compound. Subsequently, 0.3 mass% of modified cerium oxide particles having a primary particle diameter of 17 nm and having a surface modified by aluminate were dispersed, and then adjusted to a purity of 95% by mass with pure water. Next, the test compound was added until the desired pH value was reached, and the remainder was adjusted to 1% by mass with pure water. In addition, when adjusting the value to the alkaline side, ammonia water is used, and sulfuric acid is used when the pH is adjusted to the acidic side. [Preparation of polishing liquid for semiconductor substrate (Comparative Example 1 to Comparative Example 7)] The modified cerium oxide particles and the water-soluble polymer whose surface was changed with aluminate were blended in the following order. A polishing liquid for each of the semiconductor substrates of Comparative Examples 1 to 7 was prepared by disposing 1, 2, 4 - disa. In the preparation of each polishing liquid, polyvinylpyrrolidone (;pvp_K15) was used as the water-soluble polymer. In the preparation of each polishing liquid, first, the amount of polyvinylpyrrolidone Uvp, or polyvinylpyrrolidone (PVP) shown in Table 2 is dissolved in pure water corresponding to 50% by mass of the total amount of the polishing liquid. Winter triazole ^ When the value of ρ 非 is not the desired range, by adding an acidic compound or a basic compound 24 201204818, ju · to the value of Wei. The receiver 'distributed the content shown in Table 2 - the secondary particle diameter is nm, the surface is modified by the woven salt, the modified dioxins, or the colloidal oxidized weizi, and the pure water is adjusted to 95% by volume. . Next, an acidic compound or a basic compound is added to achieve the desired (10) mass% adjusted with pure water. Further, when the positive side is adjusted, ammonia water is used, and when the pH is adjusted to the acidic side, sulfuric acid is used. [Measurement of the pH of the polishing liquid for the semiconductor substrate] The pH of the polishing liquid for the semiconductor substrate of Examples 1 to 9 and Comparative Example 丨 to Comparative Example 7 was measured using a pH meter (manufactured by Yokogawa Electric Co., Ltd., M〇dd PH81). value. [Adjustment of Rough Grinding Semiconductor Substrate] A 夕 wafer having a diameter of 300 mm was polished under the following conditions, and a ruthenium wafer having a rough surface (roughly polished state) was adjusted. (Rough grinding conditions) Grinding wafer: 300 mm Shiyue Wafer Grinder: Reflexion (Applied Materials) Grinding platen speed: 123 rpm Fixing speed: 117 rpm Grinding pressure: 13.7 kPa Supply of slurry : 250 ml/min polishing pad: SUBA600 (NittaHaas manufacturing slurry: grinding solution containing oxidized dream abrasive particles (primary particle size 17 nm) 0.5% by mass and tetramethylammonium hydroxide, pH value 10.5 25 201204818 grinding time 90 seconds [polishing of the semiconductor substrate] The surface of the semiconductor substrate (the wafer) is pressed against the polishing pad while the polishing liquid for the semiconductor substrate of Example 1 immediately after the preparation is applied to the polishing pad of the polishing platen. The surface of the semiconductor substrate was ground by relatively rotating the polishing platen with respect to the semiconductor substrate. Further, in the same manner as in Example 1, the immediately-adjusted Examples 2 to 9 and Comparative Examples 1 to 7 were used. The polishing liquid is polished on the surface of the semiconductor substrate. The details of the polishing conditions are as follows. (Polishing conditions) Grinding wafer: Upper The roughly ground 300 mm Shihwa wafer grinder was produced: Reflexion (manufactured by Applied Materials). Grinding platen speed: 123ipm Retainer speed: 117 rpm Grinding pressure: 9.7kPa Grinding liquid supply: 250 ml/min Grinding Pad: Supreme RN-H Pad 30.5&quot;D PJ ; CX01 (Nitta Haas manufacturing grinding time: 5 minutes [Cleaning] The above-mentioned ground wafer is cleaned under the following conditions. Washing machine: MESA (manufactured by Applied Materials) Cleaning liquid : ammonium hydroxide 〇. 〇 6 vol% + hydrogen peroxide 0.12 vol. 0 / 〇 brushing time: 60 sec 26 201204818, αι For the above-mentioned cleaned wafer 'the following device was used to measure the number of defects and the HAZE value In addition, the "number of defects" is an index of the total number of defects in the surface of the substrate and the amount of foreign matter adhering to the substrate. The smaller the number, the smaller the total number of defects (the total number of crystal defects and foreign matter to be attached). "It is an index of the smoothness of the surface of the substrate. The smaller the value, the higher the smoothness. Defect detection device: LS6700 (manufactured by Japan Electronics Engineering)

步驟條件文件(測定方法):VEM10L 缺陷測定範圍.〇. 1 μηι-3.0 μιη 投光條件:垂直 將實例1〜實例9的研磨液的含有成分、ρίΙ值及評價 結果示於表1。將比較例1〜比較例7的研磨液的含有成 分、pH值及評價結果示於表2。另外,表1、表2中,「ACS」 表示表面經铭酸鹽改質的改質二氧化石夕,「CS」表示表面 未經改質的膠體二氧化矽。 另外,將實例7中的基板面内的缺陷分布的測定結果 示於圖2,將基板面内的haze值分布的測定姑果示於圖 3。並且,將比較例1中的基板面内的缺陷分;的測定結果 示於圖4,將基板面内的HAZE值分布的測定結果示於圖 27 201204818Step condition file (measurement method): VEM10L Defect measurement range: 〇. 1 μηι-3.0 μη Projection conditions: vertical The contents of the polishing liquids of Examples 1 to 9 and the evaluation results are shown in Table 1. The content, pH, and evaluation results of the polishing liquids of Comparative Examples 1 to 7 are shown in Table 2. In addition, in Tables 1 and 2, "ACS" indicates a modified sulphur dioxide whose surface has been modified with a succinic acid salt, and "CS" indicates a colloidal cerium oxide whose surface has not been modified. Further, the measurement results of the defect distribution in the substrate surface in Example 7 are shown in Fig. 2, and the measurement results of the haze value distribution in the substrate surface are shown in Fig. 3. Further, the measurement results of the defects in the surface of the substrate in Comparative Example 1 are shown in Fig. 4, and the measurement results of the HAZE value distribution in the substrate surface are shown in Fig. 27 201204818

Ja6looooe 【Id 〇\ ACS I 卜 0.30 PVP-K30 I 0.025 1 〇 卜^ 1 4665 I ON 00 ACS 卜 | 0.30 I 1 PVP-K15 I 0.025 0.50 〇 丨 5115 I 卜 ACS 卜 0.30 1 PVP-K15 I 1 0.05 I 0.20 〇 5097 cs CN v〇 ACS 卜 0.30 PVP-K15 0.05 1 00 4107 寸 ACS 卜 0.30 PVP-K15 0.05 1 〇 \〇 4732 寸 ACS 卜 0.30 PVP-K15 0.10 1 〇 4321 | ACS I 卜 0.30 | PVP-K15 1 0.05 1 〇 | 4533 I o (N | ACS 1 0.30 | PVP-K15 1 0.025 1 P 4589 寸 「ACS 1 卜 0.30 PVP-K15 0.005 1 〇 6852 T-H 粒子種 一次粒徑(nm) 含量(質量%) 聚合物種 含量(質量%) 1,2,4-三唑含量(質量%) 研磨液pH值 缺陷數(個) HAZE 值 研磨粒子 水溶性高分子 鬥ίΝ&lt;】 卜 ACS 卜 030 PVP-K15 0.05 1 in — 測定極限以上 測定極限以上 v〇 ACS 卜 0.30 PVP-K15 0.05 1 10.0 9150 ACS 卜 0.30 1 1 1 〇 測定極限以上 測定極限以上 寸 ACS 卜 0.30 PVP-K15 2.00 1 〇 測定極限以上 測定極限以上 ro 1 1 1 PVP-K15 0.05 1 〇 測定極限以上 測定極限以上 &lt;N C/3 U 卜 0.30 PVP-K15 0.05 0.20 〇 | 22927 1 (N ζΠ U 卜 0.30 ! PVP-K15 0.05 1 〇 1&gt; 21321 00 比較例 粒子種 一次粒徑(nm) 含量(質量%) 聚合物種 |含量(質量%) 1,2,4-三唑含量(質量%) 研磨液pH值 缺陷數(個) HAZE 值 研磨粒子 水溶性高 分子 201204818lif 實例1〜實例9中可知,缺陷數較少、HAZE變小。 另外,實例7、實例8中可知,藉由添 一步減小HAZE。 另一方面,比較例卜比較例2令是使用表面未經改 質的膠體二氧化雜子。比較例丨、 陷數較多,並且麗E雜大。根據比較例3及=例1 可知,在早獨使用表面經織鹽改質的改質二氧化石夕粒子 時、或者單獨使用PVP時’無法獲得降低缺陷數、減小 HAZE的效果。比較例4中可知,添加了 2 〇〇質量%的漬 後,缺隨及HAZE達到了測定極限以上,在水溶性高分 子的含量過多時’無法獲得降低缺陷數、減小HAz 果。 在比較例6中,含有表面經鋁酸鹽改質的改質二氧化 矽粒子、以及pvp,但研磨液的pH值為1〇 〇。比較例6 中’由於研磨液的pH值為鹼性區域,因此預料研磨粒子 與石夕晶圓的靜電排斥會變強,並且推測研練子或異物會 減少,相對於此,缺陷數為9150個,與實例相比增加。對 於比較例6而言認為’由於研磨液的pH值為驗性區域, 因此異物數減少’但藉由驗性雜刻所產生的結晶缺陷增 加,缺陷總量增加。 在比較例7中,含有表面經鋁酸鹽改質的改質二氧化 雜子、以及PVP ’但研磨液的pH值為4 5。對於比較例 7而言認為,由於研磨液的1)11值為酸性區域,因此藉由蝕 刻而產生的結晶缺陷減少,但認為研磨粒子或異物容易發 29 201204818 生靜電附著,結果缺陷增加。 【圖式簡單說明】 圖1 (a)〜圖1 (c)是表示本發明之一實施方式的半 導體晶圓的製造方法的示意剖面圖。 圖2是表示實例7中基板面内的缺陷分布的測定結果 的圖。 圖3是表示實例7中基板面内的HAZE值分布的測定 結果的圖。 圖4是表示比較例1中基板面内的缺陷分布的測定結 果的圖。 圖5是表示比較例1中基板面内的HAZE值分布的測 定結果的圖。 【主要元件符號說明】 1 ’·基板本體 la :表面 lb :背面 2 :元件 3a :中空部 3b :貫通孔 5 :絕緣層 7 :介層窗 7a :矽穿介層窗(TSV) 100、200 :半導體基板 300 :半導體晶圓Ja6looooe [Id 〇\ ACS I Bu 0.30 PVP-K30 I 0.025 1 ^ ^ ^ 1 4665 I ON 00 ACS Bu | 0.30 I 1 PVP-K15 I 0.025 0.50 〇丨 5115 I Bu ACS Bu 0.30 1 PVP-K15 I 1 0.05 I 0.20 〇5097 cs CN v〇ACS Bu 0.30 PVP-K15 0.05 1 00 4107 inch ACS Bu 0.30 PVP-K15 0.05 1 〇\〇4732 inch ACS Bu 0.30 PVP-K15 0.10 1 〇4321 | ACS I Bu 0.30 | PVP- K15 1 0.05 1 〇| 4533 I o (N | ACS 1 0.30 | PVP-K15 1 0.025 1 P 4589 inch "ACS 1 Bu 0.30 PVP-K15 0.005 1 〇6852 TH Particle size Primary particle size (nm) Content (% by mass ) Polymer species content (% by mass) 1,2,4-triazole content (% by mass) Number of defects in the pH of the slurry (Parts) HAZE value Grinding particles Water-soluble polymer bucket Ν Ν 】 卜 卜 卜 030 PVP-K15 0.05 1 in — above the measurement limit above the measurement limit v〇ACS Bu 0.30 PVP-K15 0.05 1 10.0 9150 ACS Bu 0.30 1 1 1 〇The measurement limit is above the measurement limit ACS 卜 0.30 PVP-K15 2.00 1 〇The measurement limit is above the measurement limit Ro 1 1 1 PVP-K15 0.05 1 〇 Measurement limit test Above the limit &lt;NC/3 U Bu 0.30 PVP-K15 0.05 0.20 〇| 22927 1 (N ζΠ U Bu 0.30 ! PVP-K15 0.05 1 〇1&gt; 21321 00 Comparative sample particle size Primary particle size (nm) Content (% by mass ) Polymer species|Content (% by mass) 1,2,4-triazole content (% by mass) Number of defects in the pH of the slurry (Parts) HAZE value Water-soluble polymer of the abrasive particles 201204818lif Examples 1 to 9 show the number of defects Less, HAZE became smaller. In addition, it can be seen from Example 7 and Example 8 that HAZE was further reduced by one step. On the other hand, Comparative Example 2 was a colloidal dioxide having a surface which was not modified. Compared with the example, the number of traps is large, and Li E is large. According to Comparative Example 3 and Example 1, it was found that when the surface-transformed modified quartz dioxide particles were used alone or when PVP was used alone, the effect of reducing the number of defects and reducing HAZE could not be obtained. In Comparative Example 4, it was found that after adding 2% by mass of the stain, the HAZE reached the measurement limit or more, and when the content of the water-soluble high molecule was too large, the number of defects was reduced and the HAz was reduced. In Comparative Example 6, the modified cerium oxide particles whose surface was modified with aluminate and pvp were contained, but the pH of the polishing liquid was 1 〇 〇. In Comparative Example 6, since the pH of the polishing liquid is an alkaline region, it is expected that the electrostatic repulsion of the abrasive particles and the Shixi wafer will become strong, and it is presumed that the number of the drills or the foreign matter is reduced. In contrast, the number of defects is 9150. Increased compared to the instance. In Comparative Example 6, it is considered that since the pH of the polishing liquid is an inspection region, the number of foreign matter is decreased, but the crystal defects caused by the in-situ etch are increased, and the total amount of defects is increased. In Comparative Example 7, the modified dioxate whose surface was modified with aluminate and PVP' were used, but the pH of the polishing liquid was 4 5 . In Comparative Example 7, it is considered that since the 1)11 value of the polishing liquid is an acidic region, crystal defects caused by etching are reduced, but it is considered that abrasive particles or foreign matter are likely to be generated, and as a result, defects are increased. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 (a) to Fig. 1 (c) are schematic cross-sectional views showing a method of manufacturing a semiconductor wafer according to an embodiment of the present invention. Fig. 2 is a graph showing the measurement results of the defect distribution in the surface of the substrate in Example 7. Fig. 3 is a graph showing the measurement results of the HAZE value distribution in the surface of the substrate in Example 7. Fig. 4 is a view showing the measurement result of the defect distribution in the surface of the substrate in Comparative Example 1. Fig. 5 is a graph showing the results of measurement of the HAZE value distribution in the surface of the substrate in Comparative Example 1. [Description of main component symbols] 1 '·Substrate body la: Surface lb: Back surface 2: Element 3a: Hollow portion 3b: Through hole 5: Insulation layer 7: Via window 7a: Through-via via window (TSV) 100, 200 : Semiconductor Substrate 300: Semiconductor Wafer

Claims (1)

201204818 · 七、申請專利範圍: 1·種半導體基板用研磨液,其包含表面經紹酸鹽改 質的改質二氧化石夕粒子、水溶性高分子以及水; 以半導體基板用研磨液的總質量為基準,上述水溶性 高分子的含量為超過〇質量%且為1〇〇質量%以下; pH值為5.0以上9.〇以下。 2·如申請專利範圍第1項所述之半導體基板用研磨 液,其中pH值為6.0以上8 0 以下。 3.如申請專利範圍第1項或第2項所述之半導體基板 用研磨液,其巾以半導體基板用研磨液的總質量為基準, 上述改質二氡化矽粒子的含量為〇 〇1質量%以上丨5〇質量 %以下。 4·如申請專利範圍第1項至第3項中任一項所述之半 導體基板用研磨液,其巾以半導縣誠研餘的總質量 為基準’上述水溶性高分子的含量為〇 〇〇1質量%以上〗㈨ 質量%以下。 5. 如申請專利範圍第1項至第4項中任一項所述之半 導體基板科綠,其巾上述水雜純子為_子性高 分子。 6. 如申請專利範圍» 1項至第5項中任-項所述之半 導體基板用研磨液,其中上述水溶性高分子是由包含乙婦 吡咯烷酮的聚合性單體而得的聚合物。 7. 如申請專利範圍第巧至^項中任_項所述之半 導體基板㈣磨液,其+上述水雜高分子為聚乙婦料 31 201204818 烧酮。 8·如申請專利範圍第1項至第7項中任一項所述之半 導體基板用研磨液,其中進一步包含1,2,4-三σ坐。 9. 如申請專利範圍第8項所述之半導體基板用研磨 液’其中以半導體基板用研磨液的總質量為基準,上述 1,2,4-三唑的含量為0 05質量%以上〇.7〇質量%以下。 10. 如申請專利範圍第1項至第9項中任一項所述之 半導體基板用研磨液,其中研磨對象為半導體基板的表 面,該表面包含石夕。 11. 一種半導體晶圓的製造方法,其包括:研磨步驟, 使用如申請專利範圍第1項至第10項中任一項所述之半導 體基板用研磨液,對半導體基板的表面進行研磨而獲得半 導體晶圓。 12. 如申請專利範圍第η項所述之半導體晶圓的製造 方法’其中進一步包括:在上述研磨步驟之前,對包含半 導體材料的板狀構件進行研光(lapping)或磨削(grinding) 而獲得粗晶圓的步驟;以及對上述粗晶圓進行研磨而獲得 上述半導體基板的步驟。 13. 如申請專利範圍第u項所述之半導體晶圓的製造 方法,其中進一步包括:在上述研磨步驟之前,對包含半 導體材料的板狀構件進行濕式蝕刻而獲得粗晶圓的步驟; 以及對上述粗晶圓進行研磨而獲得上述半導體基板的步 驟。 32201204818 · VII. Patent application scope: 1. A polishing liquid for a semiconductor substrate, which comprises modified smectite particles, water-soluble polymer and water whose surface is modified with acid salt; and total of polishing liquid for semiconductor substrate The content of the water-soluble polymer is more than 〇% by mass and is 1% by mass or less based on the mass, and the pH is 5.0 or more and 9.5% or less. 2. The polishing liquid for a semiconductor substrate according to claim 1, wherein the pH is 6.0 or more and 80 or less. 3. The polishing liquid for a semiconductor substrate according to the first or second aspect of the invention, wherein the content of the modified bismuth telluride particles is 〇〇1 based on the total mass of the polishing liquid for the semiconductor substrate. The mass% or more is less than 5% by mass. The polishing liquid for a semiconductor substrate according to any one of the first to third aspects of the invention, wherein the content of the water-soluble polymer is 〇 based on the total mass of the semi-conductor 〇〇 1% by mass or more (9) 5% by mass or less. 5. The semi-conductor substrate green according to any one of claims 1 to 4, wherein the water-pure pure substance is a _ sub-high molecule. 6. The polishing liquid for a semiconductor substrate according to any one of the preceding claims, wherein the water-soluble polymer is a polymer obtained from a polymerizable monomer containing ethyl pyrrolidone. 7. If the semi-conductor substrate (4) as described in any of the above-mentioned items is in the scope of the patent application, the above-mentioned water-hybrid polymer is polystyrene 31 201204818 ketone. The polishing liquid for a semiconductor substrate according to any one of claims 1 to 7, which further comprises 1,2,4-tris(s). 9. The polishing liquid for a semiconductor substrate according to claim 8, wherein the content of the 1,2,4-triazole is 0. 05% by mass or more based on the total mass of the polishing liquid for the semiconductor substrate. 7〇 mass% or less. The polishing liquid for a semiconductor substrate according to any one of the preceding claims, wherein the object to be polished is a surface of a semiconductor substrate, the surface comprising a stone eve. A method of producing a semiconductor wafer, comprising: a polishing step of: polishing a surface of a semiconductor substrate by using a polishing liquid for a semiconductor substrate according to any one of claims 1 to 10 Semiconductor wafers. 12. The method of manufacturing a semiconductor wafer according to claim n, wherein the method further comprises: lapping or grinding the plate member including the semiconductor material before the grinding step; a step of obtaining a rough wafer; and a step of polishing the coarse wafer to obtain the semiconductor substrate. 13. The method of fabricating a semiconductor wafer according to claim 5, further comprising: a step of wet etching the plate member including the semiconductor material to obtain a rough wafer before the grinding step; The step of polishing the above-mentioned rough wafer to obtain the above-described semiconductor substrate. 32
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