201201291六、發明說明： 【發明所屬之技術領域】 [0001] 本案係有關封裝結構 尤指封裝中的金屬層的結構 [0002]201201291 VI. Description of the invention: [Technical field to which the invention pertains] [0001] The present invention relates to a package structure, particularly a structure of a metal layer in a package [0002]
[0003] [0004][0003] [0004]
【先前技術】 電子封裝技術中，第一層級的封裝是將晶片（chip) 連結到承載板上，其具有三種封裝型態，分別為打線技 術（wire bonding)、貼帶自動接合技術（tape aut〇、 matic bonding，TAB)、覆晶接合技術（fHp chip， F/C)。 由於打線技術製程所需的時.間較長，於是成為打線 接合技術的最大瓶頸，且打線接合或捲帶式自動接合技 術（TAB)，其封裝後的電子元件體積較大，與現今追求輕 薄短小電子產品的目標相左，因此便發展出覆晶接合技 術（F/C)。 關於覆晶技術（F/C)的發展，著眼於需要使用高聊 數（I/O)特性、散熱性較佳或較為輕薄短小的封裝技術， 且由於覆晶接合技術比習知打線結合技術大幅縮短接線 長度’其有助於電子訊號傳遞速度與提升，因此逐漸形 成高密度封裝主流。 [0005] 請參閱「圖1」所示，為習知電子元件結構示意圖， 099120582 其於一晶片1配置有複數個金屬墊2，該金屬墊2 —般為叙 墊或銅墊，並於一基板3上設置有複數個接點4’並以複 數個錫基銲球5設置於該金屬墊2與該接點4之間，對該晶 片1與該基板3間形成連結，由該晶片1依序藉該金屬塾2 表單編號A0101 第3頁/共13頁 0992036359-0 201201291 、該錫基銲球5、該接點4產生電性連結到該基板3，另外 ，為避免濕氣與機械應力的破壞，可設置一底膠層6於該 晶片1與該基板3之間。 [0006] [0007] 如上所述結構的製程，其為先在該金屬墊2上形成該 錫基銲球5，再倒轉讓該錫基銲球5與該接點4連結，因此 該金屬墊2上形成該錫基銲球5的品質好壞，直接影響了 封裝的良率。 請再參閱「圖2」所示，為了於該金屬墊2形成該錫 基銲球5，該晶片1上的該金屬墊2上會先鍍上多層金屬薄 膜，一般稱之為金屬層 7(under-bump metallization ;UBM)，金屬層7通常包含三層金屬，其為黏附層 8(Adhesion layer)、潤濕層 9(Wetting Layer)與保 護層 l〇(Protective Layer)，其中黏附層 8(Adhesion 1 ayer)，如鈦（Ti )、絡（Cr )、鈦嫣（Ti W)、辞（Zn)等金 屬擇一，主要目的在於提供金屬墊2與潤濕層9有較強之 黏著性，因此黏附層8可以依據材料的特性選擇是否需要 。而潤濕層9，如鑷（Ni) '錄-硝(Ni-P)、銅（Cu)等， 此類金屬與該錫基銲球5的銲錫之潤濕程度較高，在迴焊 (Reflow)時銲錫可完全滯留附立其上而成球狀；保護層 10(Protective Layer)，則如金等電阻低的金屬，此 類金屬較純性（Passive)，可避免金屬層7氧化。 習知的金屬層7，為使用鍍金製程來形成該保護層10 ，然其不適用高溫無鉛封裝製程，無法滿足不同製程需 要進行高溫無鉛封裝製程的需求。 【發明内容】 表單編號A0101 099120582 第4頁/共13頁 0992036359-0 [0008] 201201291 [0009] [0010] [0011] ο [0012] 099120582 本發明之主要目的在於揭露一種適用高溫無鉛封裝 製程的金屬層。 為了達到上述目的，本發明為一種高溫無鉛二元辞 銘焊料，用於形成一金屬層，其中該金屬層設;^"5 金屬 墊上，且該金屬層為熱浸鍍鋅-5鋁鍍層，以適用於高溫 無鉛封裝製程。 據此，本發明的金屬層為由熱浸鍍鋅-5銘鍵層形成 ，可適用250度C至350度C的高溫製程，而可滿足高溫無 鉛封裝製程的需求。 實施方式】 茲有關本發明的詳細内容及技術說明，現以實施例來 作進一步說明，但應瞭解的是，該等實施例僅為例示說 明之用，而不應被解釋為本發明實施之限制。 請參閱「圖3」所示，本發明為一種高溫無鉛二元鋅 鋁銲料，用於形成一金屬層50，該金屬層50為熱浸鍍鋅-5鋁鍍層（Zn-5A1)，且形成於一金屬墊20(Steel foil) 上，該金屬墊20為設置在一晶片30上，並具有一鈍態保 護層80保護該晶片30，並讓該金屬墊20顯露出來，且該 金屬塾20可以為銅基、錄基、銦基、鎳金鑛層、錄把金 鍍層等常作為金屬接點的金屬。 請參閱「圖4」所示，為本發明的另一實施例，該金 屬層50為熱浸鍍鋅-5鋁鍍層，且可更具有一黏附層40， 該黏附層40設於該金屬墊20上，而該金屬層50設於該黏 附層40上，並藉該黏附層40與該金屬墊20結合，據而可 藉由黏附層40的黏力增加該金屬層50與該金屬墊20結合 表單編號A0101 第5頁/共13頁 0992036359-0 201201291 的穩定性。 請參閱「圖5」所示，本發明該金屬層50為熱浸鍍鋅-5鋁鍍層，其於該金屬墊20上形成一金屬銲接70後的結構 圖如「圖5」所示，其中金屬銲接70使用銅（CU)，因此金 屬銲接70與該金屬層50之間會產生一層鋅銅合金層 (Ci^Zn。），因而具良好的接合介面，可以滿足高溫無鉛 Ό Ο 封裝製程的需求。 如上所述，本發明揭露一種高溫無鉛二元鋅鋁銲料， 其用於形成的金屬層，可適用250度C至350度C的高溫製 程，可滿足高溫無鉛封裝製程的需求。 惟上述僅為本發明之較佳實施例而已，並非用來限定 本發明實施之範圍。即凡依本發明申請專利範圍所做的 均等變化與修飾，皆為本發明專利範圍所涵蓋。 【圖式簡單說明】 [0013] [0014] [0015] [0016] [0017] [0018] 圖1，為習知電子元件結構示意圖。 圖2，為習知金屬層斷面結構圖。 圖3，為本發明斷面結構圖。 圖4，為本發明另一實施例的斷面結構圖。 圖5，為本發明金屬銲接與金屬墊的接合結構圖。 【主要元件符號說明】 習知 1 ·晶片 2 :金屬塾 3 :基板 099120582 表單編號A0101 第6頁/共13頁 0992036359-0 201201291 4 :接點 5:錫基銲球 6 :底膠層 7 :金屬層 8 :黏附層 9 :潤濕層 10 :保護層 本發明 20 :金屬墊 〇 30 :晶片 40 :黏附層 50 :金屬層 70 :金屬銲接 80 :鈍態保護層 〇 099120582 表單編號A0101 第7頁/共13頁 0992036359-0[Prior Art] In the electronic packaging technology, the first level of packaging is to connect a chip to a carrier board, which has three package types, namely wire bonding and tape bonding (tape aut). Matic, matic bonding, TAB), flip chip bonding technology (fHp chip, F/C). Due to the long time required for the wire bonding technology process, it becomes the biggest bottleneck of wire bonding technology, and the wire bonding or tape automatic bonding technology (TAB) has a large volume of electronic components after packaging, and is now seeking thin and light. The goal of short electronic products is different, so the flip chip bonding technology (F/C) has been developed. Regarding the development of flip chip technology (F/C), the focus is on the need to use high-travel (I/O) characteristics, better heat dissipation or lighter and shorter package technology, and because of the flip chip bonding technology than the conventional wire bonding technology Significantly shortened wiring lengths, which contribute to the speed and speed of electronic signal transmission, and thus gradually form the mainstream of high-density packaging. [0005] Please refer to FIG. 1 for a schematic diagram of a conventional electronic component. 099120582 A plurality of metal pads 2 are disposed on a wafer 1. The metal pad 2 is generally a pad or a copper pad. A plurality of contacts 4 ′ are disposed on the substrate 3 , and a plurality of tin-based solder balls 5 are disposed between the metal pads 2 and the contacts 4 to form a connection between the wafer 1 and the substrate 3 . The metal 塾2 is sequentially used. Form No. A0101, page 3/13, 0992036359-0 201201291, the tin-based solder ball 5, the contact 4 is electrically connected to the substrate 3, and in order to avoid moisture and machinery In the destruction of the stress, a primer layer 6 may be disposed between the wafer 1 and the substrate 3. [0007] The manufacturing process of the above structure is to first form the tin-based solder ball 5 on the metal pad 2, and then transfer the tin-based solder ball 5 to the contact 4, so the metal pad The quality of the tin-based solder balls 5 formed on the 2 directly affects the yield of the package. Referring to FIG. 2 again, in order to form the tin-based solder ball 5 on the metal pad 2, the metal pad 2 on the wafer 1 is first plated with a plurality of metal thin films, generally referred to as a metal layer 7 ( Under-bump metallization; UBM), the metal layer 7 usually comprises three layers of metal, which are an adhesion layer 8 , a wetting layer 9 and a protective layer, wherein the adhesion layer 8 ( Adhesion 1 ayer), such as titanium (Ti), complex (Cr), titanium germanium (Ti W), lex (Zn) and other metals, the main purpose is to provide a strong adhesion between the metal pad 2 and the wetting layer 9. Therefore, the adhesive layer 8 can be selected depending on the characteristics of the material. The wetting layer 9, such as niobium (Ni) 'recording-nitrogen (Ni-P), copper (Cu), etc., such a metal and the tin-based solder ball 5 solder wettability is higher, in reflow ( Reflow) solder can be completely retained and attached to form a spherical shape; protective layer 10 (Protective Layer), such as gold and other low-resistance metals, such metals are more pure (Passive), can avoid metal layer 7 oxidation. The conventional metal layer 7 is formed by using a gold plating process to form the protective layer 10. However, it is not suitable for a high-temperature lead-free packaging process, and cannot meet the requirements of a high-temperature lead-free packaging process for different processes. SUMMARY OF THE INVENTION Form No. A0101 099120582 Page 4 / Total 13 Page 0992036359-0 [0008] 201201291 [0009] [0011] [0012] The main purpose of the present invention is to disclose a suitable high temperature lead-free packaging process. Metal layer. In order to achieve the above object, the present invention is a high-temperature lead-free binary solder for forming a metal layer, wherein the metal layer is provided on a metal pad, and the metal layer is hot dip galvanized-5 aluminum plating. For high temperature lead-free packaging processes. Accordingly, the metal layer of the present invention is formed by a hot dip galvanized -5 key layer, and can be applied to a high temperature process of 250 degrees C to 350 degrees C, and can meet the requirements of a high temperature lead-free packaging process. The detailed description of the present invention and the technical description of the present invention are now described by way of examples, but it should be understood that the embodiments are only illustrative and not to be construed as limit. Referring to FIG. 3, the present invention is a high-temperature lead-free binary zinc-aluminum solder for forming a metal layer 50 which is a hot dip galvanized-5 aluminum plating layer (Zn-5A1) and is formed. On a metal foil 20, the metal pad 20 is disposed on a wafer 30 and has a passive protective layer 80 to protect the wafer 30, and the metal pad 20 is exposed, and the metal pad 20 is exposed. It may be a metal such as a copper base, a recording base, an indium base, a nickel gold ore layer, or a gold plating layer, which is often used as a metal joint. Referring to FIG. 4, in another embodiment of the present invention, the metal layer 50 is a hot dip galvanized-5 aluminum coating layer, and may further have an adhesion layer 40. The adhesion layer 40 is disposed on the metal pad. The metal layer 50 is disposed on the adhesive layer 40 and bonded to the metal pad 20 by the adhesive layer 40. The metal layer 50 and the metal pad 20 can be increased by the adhesive force of the adhesive layer 40. Combine the stability of Form No. A0101 Page 5 of 13 0992036359-0 201201291. Please refer to FIG. 5 , the metal layer 50 of the present invention is a hot dip galvanized -5 aluminum plating layer, and the structural drawing of the metal pad 70 on the metal pad 20 is as shown in FIG. 5 , wherein The metal solder 70 uses copper (CU), so a layer of zinc-copper alloy (Ci^Zn) is formed between the metal solder 70 and the metal layer 50, and thus has a good bonding interface, which can satisfy the high-temperature lead-free 封装 封装 packaging process. demand. As described above, the present invention discloses a high-temperature lead-free binary zinc-aluminum solder which is used for forming a metal layer which can be applied to a high-temperature process of 250 ° C to 350 ° C to meet the demand of a high-temperature lead-free packaging process. The above are only the preferred embodiments of the present invention and are not intended to limit the scope of the present invention. That is, the equivalent changes and modifications made by the scope of the patent application of the present invention are covered by the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS [0018] FIG. 1 is a schematic view showing the structure of a conventional electronic component. Figure 2 is a cross-sectional view of a conventional metal layer. Figure 3 is a cross-sectional structural view of the present invention. Figure 4 is a cross-sectional structural view showing another embodiment of the present invention. Fig. 5 is a view showing the joint structure of the metal welding and the metal pad of the present invention. [Main component symbol description] Convention 1 · Wafer 2 : Metal 塾 3 : Substrate 099120582 Form No. A0101 Page 6 / Total 13 Page 0992036359-0 201201291 4 : Contact 5: Tin-based solder ball 6 : Primer 7 : Metal layer 8 : Adhesive layer 9 : Wetting layer 10 : Protective layer The present invention 20 : Metal pad 30 : Wafer 40 : Adhesion layer 50 : Metal layer 70 : Metal welding 80 : Passive protective layer 〇 099120582 Form No. A0101 No. 7 Page / Total 13 pages 0992036359-0