TW201142956A - Array molding method for avoiding air trap and mold utilized in the method - Google Patents

Array molding method for avoiding air trap and mold utilized in the method Download PDF

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Publication number
TW201142956A
TW201142956A TW099116727A TW99116727A TW201142956A TW 201142956 A TW201142956 A TW 201142956A TW 099116727 A TW099116727 A TW 099116727A TW 99116727 A TW99116727 A TW 99116727A TW 201142956 A TW201142956 A TW 201142956A
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Taiwan
Prior art keywords
mold
cavity
molding
telescopic
array
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TW099116727A
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Chinese (zh)
Inventor
ting-feng Su
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Powertech Technology Inc
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Priority to TW099116727A priority Critical patent/TW201142956A/en
Publication of TW201142956A publication Critical patent/TW201142956A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

Disclosed is an array molding method for avoiding air trap. An array molding mold is provided with a plurality of stretchable barriers formed inside its mold cavity. The mold has a plurality of barrier-accommodating caves formed on the top surface of the cavity where the stretchable barriers extrude elastically. A substrate on which a plurality of chips are disposed is loaded. A molding compound is provided to fill into the cavity along Y-axis direction. The molding flow speed on Y-axis scribe lines is slowed by blocking of the stretchable barriers during filling process. Additionally, the stretchable barriers are gradually retracted into the caves by compressive pressure of the molding compound during packing process. Accordingly, the molding flow speeds on the y-axis cutting lines and on the chips can be balanced to avoid air trap issue.

Description

201142956 • 六、發明說明: • 【發明所屬之技術領域】 本發明係有關於半導體裝置之製造技術,特別係有關 於一種避免回包之陣列模封方法及其使用之模具。 【先前技術】 隨著科技的進步,人們對於電子產品的需求量也與日 倶增。對於電子產品的要求也越來越輕薄短小 a 的限制條件之下,使得保護產品内部之半導體晶片與提 春供外部電路連接之封裝構造也同樣被要求趨向於輕薄短 小之設計。在封裝製程中良好模具的選用則可視為影響 後續產品品質的一個重要關鍵。一般而言,目前半導體 產業是利用轉移製模(Transfer Molding)的方式來密封曰 片。在轉移製模之製程中’以人工或自動送料方式將設 有晶片之基板送入模具的模穴之後,並將模具固定於基 板上。再將具有流動性之模封膠體灌入至模穴中直到 φ 完全填滿整個模穴。最後,經過一烘烤固化步驟後,以 製成咸在基板上封裝半導體晶片之模封膠體。 如第1圖所示’在習知的陣列模封方法中,提供一陣 列模封模具11〇,並壓合於一基板12〇之一上表面124。 詳細而言,該基板120係具有複數個矩陣陣列之基板單 元121與複數個在該些基板單元ι21之間與周邊的切割 道122與123(如第3A圖所示),複數個晶片13〇係設置 於該基板120之該上表面124並位於對應之該些基板單 元1 2 1内。當該些晶片丨3 0係以複數個黏晶膠工3 1相军^ 3 201142956 黏貼而呈現多晶片堆疊型態。接著,如第2圖所示,提 供一模封膠體140於該模具11〇之模穴U1内以使該 模封膠體140覆盍該基板120之該上表面124並密封該 些晶片1 3 0。但在轉移製模之後發現該模封膠體丨4()會 產生氣洞1 4卜常形成於該些晶片i 3 〇上方的模封空間, 呈外露或内包之型態,導致封裝失敗與產品可靠度低劣。 進一步分析氣洞之形成原因’如第3A圖所示,經由 該模具U 0之複數個注澆口 118,沿著γ轴方向灌入未 固化前模封膠體14〇,即為第3A圖中箭頭所指方向。接 著,如第3B圖所不,該模封膠體14〇開始灌入至該模 八111内,並對照第1圖,由於在合模之後該些晶片丨3 〇 上方至該模具11 〇之模穴i丨丨之頂面i丨3之間隙相對於 該些切割道123上方的注膠空間變得非常的小故該模 封膠體140於該些晶片130上方之模流速度將遠小於該 模封膠體140於該些切割道123上方之模流速度,兩者 • 無法達到平衡。隨著注膠填充的進行,該模封膠體140 於該些切割道123上方之覆蓋範圍明顯 膠體 ⑽於該些晶片⑴上方之覆蓋範圍。如第_所示, 當填充縱向切割道123之模封膠體14〇先到達橫向切割 道122而在該些晶片130上方未及時覆蓋便會產生回包 現象,故為在該些晶片130上方氣洞141的產生原因。 特別地’在半導體科技逐日發展之下,該些晶片13〇 堆疊數量增加,該些晶片130與該模穴iu之頂面113 的距離會變得更為狹小。所以,該模封膠體⑷在流姓s ] 4 201142956 該二片130上方和該些切割道123之模流速度差距越 趨擴大,將導致回包(air trap)現象越來越嚴重將嚴重 影響封裝品質。 【發明内容】 有鑒於此,本發明之主要目的係在於提供一種避免回 包之陣列模封方法及其使用之模具,在注膠填充過程中 能平衡模封膠體在Y軸切割道上之模流速度與晶片上方 _ 之模流速度,進而均勻填滿模穴,以避免回包現象發生。 本發月之-入一目的係在於提供一種避免回包之陣列 模封方法及其使用之模具,在壓縮填料過程中伸縮擋條 受到模封膠體的壓縮壓力逐漸縮回至擋條容置槽内,有 利於脫膜動作之進行並能防止氣洞在晶片上方產生。 本發明之再一目的係在於提供一種避免回包之陣列 模封方法及其使用之模具,可避免毛邊出現於切割後的 模封膠體之表面。 • 本發明的目的及解決其技術問題是採用以下技術方 案來實現的。本發明主要揭示一種避免回包之陣列模封 方法,包含以下步驟。提供一陣列模封模具,該模具係 具有一模穴與複數個伸縮擋條,該模穴之頂面係形成有 複數個擋條容置槽,該些伸縮擋條係.由該些擋條容置槽 彈性突出。裝載一基板,係具有複數個矩陣陣列之基板 單元與複數個在該些基板單元之間與周邊的又軸與¥軸 切割道,複數個晶片係設置於該基板之一上表面並位於 對應之該些基板單元内,該些伸縮擋條係對準於該些] 5 201142956 轴切割道之上方。以γ轴方向提供一模封膠體於該模穴 内,以使該模封膠體覆蓋該I板之該上表面並密封該些 在左膠填充過程中藉由該些伸縮撞條之阻擋以減 缓該模封膠體在該些Υ軸切割道上之模流速度,使其與 在該些晶片上方之模流速度達到平衡進而填滿該模穴, 並且在壓縮填料過程中該些伸縮擋條受到該模封膠體的 壓縮壓力逐漸縮回至該些擋條容置槽内。 本發月的目的及解決其技術問題還可採用以下技術 措施進一步實現。 在前述之陣列模封方法中,該模具係可更具有複數個 被動式彈性元件,係設於該些擋條容置槽内,以彈性推 出該些伸縮擋條。 在前述之陣列模封方法中,當該些被動式彈性元件於 壓縮狀態時’該些伸縮擋條係可完全縮回至碎些擋條容 置槽内’並使該些伸縮擋條之突出表面係與該模穴之頂 面在同一平面。 在前述之陣列模封方法中,該些伸縮擋條之寬度係可 小於該些γ轴切割道之寬度。 在前述之陣列模封方法中,該些伸縮擋條與該模穴之 該頂面之鄰近側邊係可留有一間隙,以提供一模封廢料 區〇 在前述之陣列模封方法中,在裝載該基板之步驟中, 可另包含之步驟有:設置一離形薄膜於該模具與該基板 之間,該離形薄膜係隔離該模穴内供該模封膠體填充< ς〕 6 201142956 二間與該些伸縮擋條, '、u避免該模封膠體沾黏於該些伸 縮擋條。 在前述之陣列模封 対方法中,該些晶片之設置方式係可 為多晶片堆疊型態。 在前述之陣列描_ 4+ , 封方法中,該模具係可具有一模穴與 複數個伸縮擋條,哕媳^ 模八之頂面係形成有複數個擋條容 ^ -伸縮擋條係由該些擋條容置槽彈性突出。 、在前述之陣列模封方法中,該模具係可更具有複數個 被動式彈性元件,传却·认4 , ’、0又於該些擋條容置槽内,以彈性推 出該些伸縮擋條。 在别述之陣列杈封方法中,該些伸縮擋條與該模穴之 該頂面之鄰近側邊係可留有一間隙,以提供一模封廢料 區。 由以上技術方案可以看出,本發明之避免回包之陣列 模封方法及其使用之模具,具有以下優點與功效: -、藉由提供-特定陣列模封模具作為其中之一技術手 段’由於模具於模穴内具有伸縮擋條,在注膠填充 過程中可藉由伸縮擋條之阻擋以減緩模封膠體在γ 轴切割道上方之模流速度。因此,能平衡模封膠體 在Υ轴切割道上方與;B u L Hf 興在曰日片上方之模流速度,進而 均勻填滿模穴,以避免回包現象發生。 二、藉由提供一特定陣列模封模具作為其中之—技術手 段’由於在壓縮填料過程中伸縮擋條受到模封膠體 的壓縮壓力逐漸縮回至擋條容置槽内,故有利於脱s] 7 201142956 膜動作之進行並能防止氣洞在晶片上方產生。 三、 藉由陣列模封模具内伸縮擋條與基板之γ轴切割道 之特定組合關係作為其中之—技術手段,由於伸縮 撐條之寬度係小於γ軸切割道之寬度,故能夠避免 毛邊出現於切割後模封膠體之表面。 四、 藉由陣列模封模具之模穴與伸縮擋條之特定組合關 係作為其中一技術手段,由於伸縮擋條與模穴之頂 面之鄰近側邊留有—間隙,以提供一模封廢料區。 因此,隨著模封膠體逐漸填滿模穴,_使在注膠填 充過程中產生氣洞亦會被模封膠體擠壓至模封廢料 區内’毋須擔心在基板單元區内的封裝結構中產生 氣洞。 【實施方式】 、以下將配合所附圖示詳細說明本發明之實施例,然應 注意的是,該些圖示均為簡化之示意圖,僅以示意方法 來說明本發明之基本架構或實施方法,故僅顯示與本案 有關之元件與組合關係,圖中所顯示之元件並非以實際 實施之數目、形狀、尺寸做等比例製,某些尺寸比例 與其他相關尺寸比例或已誇張或是簡化處理,以提供更 清楚的描述。實際實施之數目、形狀及尺寸比例為二種 選置性之設計,詳細之元件佈局可能更為複雜。 依據本發明之第一具體實施例,一種避免回包之陣列 模封方法舉例說明於第4至7圖,各步驟詳細說明如下。 請參閱第4圖所示,提供—陣列模封模具2iQ,該模 8 201142956 具210係具有一模穴211與複數個伸縮檔條212,該模 八211之項面213係形成有複數個擋條容置槽該 些伸縮擋條212係由該些擋條容置槽214彈性突出◊該 些伸縮擋條212之形狀可為對應切割道數量之水平狀樑 條形,或可為對應切割道上多個直立伸縮桿。此外,該 些伸縮擋條212之寬度係可不大於談些擋條容置槽214 之寬度,以使該些伸縮擋條212可全部縮回至該些擋條 • 容置槽214内;但非限定地,只要該些伸縮擋條2^之 伸縮部位可縮回至該些擋條容置槽214内即可,該些伸 縮擋條212之突出部寬度或可大於該些擋條容置槽 之寬度。在本實施例中,該模具21〇係可更具有複數個 被動式彈性元件215 ,例如壓縮彈簧,係設於該些擋條 容置槽214内,以彈性推出該些伸縮擋條212。換言之’ 當該些伸縮擋條212受到足夠大的壓力(例如壓縮ϋ填料 的壓力)壓迫時,會擠壓該些被動式彈性元件215而使其 鲁隨著壓力增加而逐漸壓縮,此時該些伸縮擋條212便會 逐漸縮回至該些擋條容置槽214之内。一旦所受壓力解 除,該些被動式彈性元件215亦會隨著壓力減少而逐漸 釋放,該些伸縮擋條212又會重新突出於該些擋條容置 槽2 14之外。 請參閱第5圖所示,裝載一基板220,係具有複數個 矩陣陣列之基板單元221與複數個在該些基板單元221 之間與周邊的X軸切割道222與γ軸切割道223(如第 圖所示)並且複數個晶片230係設置於該基板22i)s ] 9 201142956 - 之一上表面224並位於對應之該些基板單元22ι内,該 些伸縮擋條212係對準於該些γ轴切割道223之上方。 其中,該些X軸切割道222與該些γ軸切割道223相互 垂直,該些X軸切割道222係橫向於模流方向,該些υ 軸切割道223係與模流方向相同方向。該些伸縮擋條 具有在端部之突出表面216。該些伸縮擋條212必須發 揮減緩在該些γ軸切割道223上方模流速度之作用。在 籲本實施例中,該些伸縮擋條212之突出表面216至該基 板220之上表面224之縱向間隙應小於該些晶片之 堆疊高度,而儘可能接近由該些晶片23〇上方至該模穴 211之頂面213的高度。 S] 詳細而言,該基板220係可供模封陣列加工(μ〇μ Amy Process, MAP)製造之載體’通常可為一印刷電路 板(printed circuit board,PCB),作為半導體封裝結構内 晶片承載與電性連接之媒介物。此外,該些晶片23〇係 籲 為已形成有積體電路(integrated circuit,1C)之半導體元 .件,例如記憶體、邏輯元件以及特殊應用積體電路 (ASIC),可由一晶圓(wafer)分割成顆粒狀。在本實施例 中,該些晶片230之設置方式係可為多晶片堆疊型態, 並藉由複數個黏晶膠23 1黏貼該些晶片230。在一較佳 實施例中,該些晶片230係可藉由矽穿孔(SiHc〇n Through Via)垂直地電性導通至該基板220。或者,亦可 利用打線方式或内引腳接合方式建立該些晶片23〇與該 基板220之間的電性連接關係。 10 201142956 S] 請參閱第6圖所示,並請參酌第8八至8E圖為在注 膠填充過程中模封膠體的填充狀態,以Y軸方向提供一 模封膠體24G於該模穴211 β,以使該模封膠體覆 蓋該基板220之該上表面224並密封該些晶片23〇。形 成該模封膠體240 <模封步驟主要包含一注Α該模封膠 體240之注膠填充(fiUing)操作與使該模封膠體預固 化成型之壓縮填料(packing)操作。在注膠填充過程中藉 由該些伸縮擋條2 1 2之阻擋以減緩該模封膠體24〇在該 二Y軸切割道223上之模流速度,使其與在該些晶片 上方之模流速度達到平衡進而填滿該模穴211。再如第6 圖所示,由於該些伸縮擋條212突出於該模穴2ιι之頂 面2 1 3 ’而佔用了該些Y軸切割道223上方之部分空間, 使得該些晶片230之間的模流通道縮小。所以,能夠達 到降低該模封膠體240於該些γ軸切割道223上之模流 速度之功效。如第8Α圖所示’經由該模具21〇之複數 個注澆口 218,沿著γ軸方向提供該模封膠體24〇。具 體而a,該些注澆口 218則是呈X軸方向排列於該模具 210之一侧邊。並且’所述的「Y轴方向」係指該模封 膠體240之填充方向,即為第8A圖中箭頭所指方向。 接著,如第8B圖所示,該模封膠體24〇開始灌入至該 模穴2U内,由於該模封膠體24〇受到該些伸縮擋條 之阻礙,降低了該模封膠體24〇在通過該些γ軸切割道 223之模流速度,而與該模封膠體24〇在該些晶片 上方之模流速度平衡。所以,即使在進行注膠填充過程 11 201142956 的中段,該模封膠體240於該些Y軸切割道223上方之 覆蓋範圍不會發生明顯超出該模封膠體240於該些晶片 230上方之覆蓋範圍的情況。再如第8C圖所示,持續填 充該模封膠體240,以覆蓋較接近該些注澆口 218之該 些晶片230。此時該模封膠體240於該些Υ轴切割道223 與該些晶片230上方之模流速度仍然是維持在一定的平 衡狀態。如第8D圖所示,該模封膠體240在覆蓋後排 晶片230時已完全覆蓋較接近該些注澆口 218之前排晶 ® 片230,不會發生回包的現象。之後,如第8Ε圖所示, 在進行注膠填充過程的後段,該模封膠體240已填滿於 該模穴211内’但該些伸縮擋條212尚未縮回至該些擋 條容置槽214之内’即如第6圖所示之情況。 最後,請參閱第7圖所示,在壓縮填料過程中該些伸 縮擋條2 12受到該模封膠體240的壓縮壓力逐漸縮回至 該些擋條容置槽214内。由於該模封膠體240已填滿該 φ 模穴2 11之空間,經由在壓縮填料過程中該模封膠體240 的灌入量遠小於注膠填充過程的填充量,並且該模穴211 内之壓力明顯增加,擠壓該模封膠體24〇而推擠該些伸 縮擋條2 12,而使該些伸縮擋條21 2逐漸向該些擋條容 置槽214内縮回。當更多壓力亦無法灌入該模封膠體240 至該模穴2 11内,便能以更高溫度或更多壓縮時間令該 模封膠體240預固化成型》在一較佳型態中,當該些被 動式彈性元件215於壓縮狀態時,該些伸縮擋條212係 可元全縮回至該些擔條容置槽214内,並使該些伸縮擂$] 12 201142956 條212之突出表面216係與該模穴2Π之頂面213在同 一平面。因此,有利於後續脫模動作之進行,並且能防 止氣洞在該些晶片230上方產生。 較佳地,該些伸縮擋條212之寬度係可小於該些γ 轴切割道223之寬度。所以,當模封製程完成之後,即 使由於該些伸縮擋條212未完全縮回而在該模封膠體 240之頂部表面產生毛邊,在後續單離切割步驟中利用201142956 • VI. Description of the Invention: • Technical Field of the Invention The present invention relates to a manufacturing technique of a semiconductor device, and more particularly to a die-molding method for avoiding back-packing and a mold for use thereof. [Prior Art] With the advancement of technology, the demand for electronic products has also increased. The requirements for electronic products are also becoming lighter and thinner. Under the constraints of a, the package structure of the semiconductor chip inside the protection product and the external circuit for the spring is also required to be thinner and shorter. The selection of good molds in the packaging process can be considered an important key to the quality of subsequent products. In general, the semiconductor industry currently uses transfer Molding to seal the wafer. In the transfer molding process, the substrate on which the wafer is placed is fed into the mold cavity by manual or automatic feeding, and the mold is fixed to the substrate. The mold sealant with fluidity is then poured into the cavity until φ completely fills the entire cavity. Finally, after a baking curing step, a molding compound for sealing the semiconductor wafer on the substrate is prepared. As shown in Fig. 1, in the conventional array molding method, an array of molding dies 11 is provided and pressed against one of the upper surfaces 124 of a substrate 12. In detail, the substrate 120 is a substrate unit 121 having a plurality of matrix arrays and a plurality of dicing streets 122 and 123 between the substrate units ι21 and the periphery (as shown in FIG. 3A), and a plurality of wafers 13〇 The upper surface 124 of the substrate 120 is disposed in the corresponding substrate unit 112. When the wafers 丨30 are pasted by a plurality of viscous glues, the multi-wafer stacking pattern is presented. Next, as shown in FIG. 2, a molding compound 140 is provided in the cavity U1 of the mold 11 so that the molding compound 140 covers the upper surface 124 of the substrate 120 and seals the wafers 1 3 0 . However, after the transfer molding, the mold sealant 丨4() is found to have a cavity formed in the mold space above the wafer i 3 ,, which is exposed or encapsulated, resulting in package failure and product. Reliability is poor. Further analysis of the cause of the formation of the gas cavity is as shown in Fig. 3A, through the plurality of gates 118 of the mold U 0, the uncured pre-molding gel 14 灌 is poured along the γ-axis direction, that is, in the 3A The direction indicated by the arrow. Next, as shown in FIG. 3B, the molding compound 14〇 is initially poured into the die 181, and according to FIG. 1, since the wafer 丨3 〇 is over the mold 11 after the mold clamping The gap between the top surface of the hole i 丨 3 is very small relative to the injection space above the scribe lines 123. Therefore, the mold flow speed of the mold seal 140 above the wafers 130 will be much smaller than the mold. The mold flow speed of the sealant 140 above the dicing streets 123, both of which cannot be balanced. As the filling of the glue is performed, the coverage of the molding compound 140 over the dicing streets 123 is substantially the coverage of the colloid (10) over the wafers (1). As shown in FIG. _, when the molding compound 14 filling the longitudinal dicing street 123 first reaches the lateral dicing street 122 and is not covered in time over the wafers 130, a back-packing phenomenon occurs, so that the wafers 130 are ventilated. The cause of the hole 141. In particular, as semiconductor technology develops day by day, the number of stacked chips 13〇 increases, and the distance between the wafers 130 and the top surface 113 of the cavity iu becomes narrower. Therefore, the mold sealant (4) in the flow surname s] 4 201142956 above the two sheets 130 and the tangential speed difference between the scribe lines 123 is more and more wide, which will lead to an increasingly serious air trap phenomenon will seriously affect Package quality. SUMMARY OF THE INVENTION In view of this, the main object of the present invention is to provide an array sealing method for avoiding back-packing and a mold for using the same, which can balance the mold flow of the molding compound on the Y-axis cutting path during the filling process. The speed and the mold flow velocity above the wafer, so that the cavity is evenly filled to avoid the phenomenon of returning. The purpose of this month is to provide an array sealing method for avoiding back-packing and a mold for use thereof. During the compression of the filler, the telescopic strip is gradually retracted to the stopper receiving groove by the compression pressure of the molding compound. The inside is advantageous for the stripping action and prevents the gas hole from being generated above the wafer. Still another object of the present invention is to provide an array sealing method for avoiding back-packing and a mold for use thereof, which can prevent burrs from appearing on the surface of the molded molding compound after cutting. • The object of the present invention and solving the technical problems thereof are achieved by the following technical solutions. The present invention mainly discloses an array molding method for avoiding packet return, comprising the following steps. An array of mold dies is provided, the mold has a cavity and a plurality of telescopic ribs, and the top surface of the cavity is formed with a plurality of rib receiving grooves, and the detachable ribs are The accommodating groove is elastically protruded. Loading a substrate, which is a substrate unit having a plurality of matrix arrays and a plurality of parallel shaft and x-axis cutting lanes between the substrate units and the periphery, and a plurality of wafer systems are disposed on an upper surface of the substrate and corresponding thereto In the substrate units, the telescopic bars are aligned above the shaft cutting lanes of the 5 201142956. Providing a molding compound body in the cavity in the γ-axis direction, so that the molding compound covers the upper surface of the I plate and sealing the portions of the I-plate during the filling process of the left glue to be slowed down by the stretching strips The molding flow rate of the molding compound on the crucible cutting lanes is balanced with the mold flow velocity above the wafers to fill the cavity, and the telescopic bars are subjected to the compression of the filler The compression pressure of the molding compound is gradually retracted into the barrier receiving grooves. The purpose of this month and the resolution of its technical problems can be further realized by the following technical measures. In the above-mentioned array molding method, the mold system may further comprise a plurality of passive elastic members disposed in the plurality of barrier receiving grooves to elastically push the plurality of telescopic bars. In the foregoing array molding method, when the passive elastic members are in a compressed state, the telescopic bars can be completely retracted into the broken rib receiving grooves and the protruding surfaces of the telescopic bars are protruded. It is in the same plane as the top surface of the cavity. In the above array molding method, the width of the telescopic bars may be smaller than the width of the γ-axis cutting lanes. In the foregoing array molding method, the telescopic strips and the adjacent side edges of the top surface of the cavity may have a gap to provide a mold waste region, in the foregoing array molding method, The step of loading the substrate may further include: providing a release film between the mold and the substrate, the release film is isolating the cavity for filling the molding compound < ς] 6 201142956 II And the telescopic bars, ', u prevent the molding compound from sticking to the telescopic bars. In the foregoing array die attach method, the wafers may be arranged in a multi-wafer stack configuration. In the foregoing array _ 4+ sealing method, the mold system may have a cavity and a plurality of telescopic ribs, and the top surface of the 模^ 模 八 is formed with a plurality of dams. The dam receiving grooves are elastically protruded. In the foregoing array molding method, the mold system may further have a plurality of passive elastic elements, and the transmission and recognition 4, ', 0 are in the accommodating grooves of the dams, and the retractable ribs are elastically pushed out. . In the array sealing method of the other embodiments, the telescopic strips may have a gap with the adjacent side edges of the top surface of the cavity to provide a molded waste area. It can be seen from the above technical solution that the array sealing method for avoiding back-packing and the mold for using the same have the following advantages and effects: - by providing a specific array of molds as one of the technical means' The mold has a telescopic strip in the cavity, which can be blocked by the telescopic strip during the filling process to slow the mold flow rate of the molding colloid above the γ-axis cutting path. Therefore, the mold encapsulant can be balanced above the boring cutting line; B u L Hf is used to mold the velocity above the enamel sheet, thereby uniformly filling the cavity to avoid the phenomenon of returning. 2. By providing a specific array of mold-molding molds as one of the technical means, since the telescopic strip is gradually retracted into the dam receiving groove by the compression pressure of the molding colloid during the compression of the filler, it is advantageous to take off ] 7 201142956 The membrane action is carried out and prevents the gas hole from being generated above the wafer. 3. The specific combination relationship between the telescopic baffle in the array mold and the γ-axis cutting path of the substrate is taken as a technical means, since the width of the telescopic stay is smaller than the width of the γ-axis cutting lane, the occurrence of burrs can be avoided. The surface of the gel is molded after cutting. 4. The specific combination relationship between the cavity and the telescopic strip of the array mold is used as one of the technical means, because the telescopic strip and the adjacent side of the top surface of the cavity leave a gap to provide a mold waste. Area. Therefore, as the molding gel gradually fills the cavity, the void generated during the filling process is also squeezed by the molding compound into the die-cutting area. No need to worry about the package structure in the substrate unit area. Create a gas hole. The embodiments of the present invention will be described in detail below with reference to the accompanying drawings in which FIG. Therefore, only the components and combinations related to the case are shown. The components shown in the figure are not proportional to the number, shape and size of the actual implementation. Some ratios of dimensions and other related dimensions are exaggerated or simplified. To provide a clearer description. The actual number, shape and size ratio of the implementation are two alternative designs, and the detailed component layout may be more complicated. According to a first embodiment of the present invention, an array sealing method for avoiding back-packing is illustrated in Figures 4 through 7, and the steps are explained in detail below. Referring to FIG. 4, an array molding die 2iQ is provided. The die 8 201142956 has a cavity 211 and a plurality of telescopic bars 212. The face 213 of the die 211 is formed with a plurality of blocks. The strips 212 are elastically protruded from the strip receiving slots 214. The strips 212 may be in the shape of a horizontal beam corresponding to the number of cutting passes, or may be corresponding to the cutting lanes. Multiple upright telescopic rods. In addition, the width of the telescopic bars 212 may not be greater than the width of the bar accommodating slots 214, so that the telescopic bars 212 can be fully retracted into the dams/receiving slots 214; The width of the protrusions of the telescopic bars 212 may be larger than the barrier grooves of the plurality of the barrier strips 214. The width. In this embodiment, the mold 21 can have a plurality of passive elastic members 215, such as compression springs, which are disposed in the plurality of barrier receiving grooves 214 to elastically push out the telescopic bars 212. In other words, when the telescopic bars 212 are pressed by a sufficiently large pressure (for example, the pressure of the compressed crucible packing), the passive elastic members 215 are pressed to gradually compress the pressure as the pressure increases. The telescopic bar 212 is gradually retracted into the bar receiving slots 214. Once the pressure is removed, the passive elastic members 215 are gradually released as the pressure is reduced, and the telescopic bars 212 are again protruded beyond the barrier receiving grooves 2 14 . Referring to FIG. 5, a substrate 220 is mounted, which is a substrate unit 221 having a plurality of matrix arrays and a plurality of X-axis scribe lines 222 and γ-axis dicing streets 223 between the substrate units 221 and the periphery (eg, The plurality of wafers 230 are disposed on the substrate 22i)s] 9 201142956 - one of the upper surfaces 224 and located in the corresponding substrate units 22i, the plurality of flexible strips 212 are aligned with the Above the gamma axis cut 223. The X-axis cutting lanes 222 are perpendicular to the γ-axis cutting lanes 223, and the X-axis cutting lanes 222 are transverse to the mold flow direction, and the X-axis cutting lanes 223 are in the same direction as the mold flow direction. The telescoping bars have a protruding surface 216 at the ends. The telescoping bars 212 must act to slow the die flow velocity above the gamma axis cuts 223. In the present embodiment, the longitudinal gap of the protruding surface 216 of the telescopic strip 212 to the upper surface 224 of the substrate 220 should be smaller than the stack height of the wafers, as close as possible to the wafers 23 above. The height of the top surface 213 of the cavity 211. S] In detail, the substrate 220 is a carrier that can be fabricated by a molded array processing (MAP), which can be a printed circuit board (PCB) as a semiconductor package structure. A carrier that carries electrical connections. In addition, the wafers 23 are referred to as semiconductor elements in which an integrated circuit (1C) has been formed, such as a memory, a logic element, and an application-specific integrated circuit (ASIC), which can be used by a wafer (wafer). ) is divided into granules. In this embodiment, the wafers 230 are disposed in a multi-wafer stack configuration, and the wafers 230 are adhered by a plurality of adhesives 23 1 . In a preferred embodiment, the wafers 230 are electrically conductively electrically conductive to the substrate 220 by via holes (SiHc〇n Through Via). Alternatively, the electrical connection between the wafers 23A and the substrate 220 can be established by wire bonding or internal pin bonding. 10 201142956 S] Please refer to Figure 6 and please refer to Figures 8-8 to 8E for the filling state of the molding gel during the filling process, and provide a molding compound 24G in the cavity 211 in the Y-axis direction. , such that the molding compound covers the upper surface 224 of the substrate 220 and seals the wafers 23A. Forming the molding compound 240 < The molding step mainly comprises a filling operation (fiUing) of the molding compound 240 and a packing operation for pre-curing the molding compound. Blocking the telescopic strips 2 1 2 during the filling process to slow the mold flow rate of the molding compound 24 on the two Y-axis cutting streets 223, and the molds above the wafers The flow velocity is balanced to fill the cavity 211. As shown in FIG. 6, since the telescopic bars 212 protrude from the top surface 2 1 3 ' of the cavity 2 ι, occupy a portion of the space above the Y-axis dicing streets 223, so that between the wafers 230 The mold flow channel is reduced. Therefore, the effect of reducing the mold flow velocity of the molding compound 240 on the γ-axis cutting streets 223 can be achieved. The molding compound 24 is provided along the γ-axis direction via a plurality of gates 218 of the mold 21 as shown in Fig. 8 . Specifically, a, the gates 218 are arranged on one side of the mold 210 in the X-axis direction. Further, the "Y-axis direction" refers to the filling direction of the molding compound 240, that is, the direction indicated by the arrow in Fig. 8A. Then, as shown in FIG. 8B, the molding compound 24 is started to be poured into the cavity 2U. Since the molding compound 24 is blocked by the telescopic bars, the molding compound 24 is reduced. The mold flow velocity of the y-axis dicing streets 223 is balanced with the mold flow velocity of the molding compound 24 above the wafers. Therefore, even in the middle stage of the glue filling process 11 201142956, the coverage of the molding compound 240 over the Y-axis cutting streets 223 does not significantly exceed the coverage of the molding compound 240 over the wafers 230. Case. As further shown in Figure 8C, the molding compound 240 is continuously filled to cover the wafers 230 that are closer to the gates 218. At this time, the mold flow rate of the mold sealing body 240 above the crucible cutting streets 223 and the wafers 230 is maintained at a certain equilibrium state. As shown in Fig. 8D, the molding compound 240 completely covers the wafers 230 before the gates 230 are covered, and does not return. Thereafter, as shown in FIG. 8 , in the latter stage of the glue filling process, the molding compound 240 has been filled in the cavity 211 'but the retractable bars 212 have not been retracted to the dams. Within the slot 214 is the condition shown in Figure 6. Finally, referring to Fig. 7, the stretch ribs 2 12 are gradually retracted into the dam receiving grooves 214 by the compression pressure of the molding compound 240 during the compression of the filler. Since the molding compound 240 has filled the space of the φ cavity 2 11, the filling amount of the molding compound 240 is much smaller than the filling amount of the molding filling process during the compression of the filler, and the cavity 211 is filled. The pressure is significantly increased, and the molding compound 24 is pressed to push the telescopic bars 2 12, and the telescopic bars 21 2 are gradually retracted into the bar receiving grooves 214. When more pressure is not able to be poured into the mold cavity 240 to the cavity 2 11 , the molding compound 240 can be pre-cured at a higher temperature or more compression time. In a preferred form, When the passive elastic members 215 are in a compressed state, the telescopic bars 212 can be fully retracted into the strip receiving grooves 214, and the protruding surfaces of the telescopic plates ]$] 12 201142956 212 The 216 series is in the same plane as the top surface 213 of the cavity 2Π. Therefore, it is advantageous for the subsequent demolding operation to proceed, and it is possible to prevent the gas holes from being generated above the wafers 230. Preferably, the width of the telescopic bars 212 may be smaller than the width of the γ-axis cutting lanes 223. Therefore, after the molding process is completed, burrs are generated on the top surface of the molding compound 240 even if the telescopic bars 212 are not fully retracted, and are utilized in the subsequent single cutting step.

切割刀具沿著該些Υ軸切割道223切割時,同時切除該 模封膠體240產生毛邊之部位。因此,能夠避免在模封 製程與單離切割步驟之後所製成在基板單Μ封裝構造 外部產生毛邊。 在本發明中,可藉由該特定結構之陣列模封模具21 與對應的步驟配合,該模具21〇於該模穴2ιι内具有髮 些伸縮㈣212 ’在注膠填充過程中,可藉由該些利 擋條⑴之阻擋以減緩該模封膠體24Q在該些γ轴切害 道223上方之模流速度。因 此處平衡該模封膠體24 在該些Υ軸切割道223上方 万之模流速度與在該些晶片 230上方之模流速度,進 7勺填滿於該模穴211,以遥 免回包(air trap)現象發生。 特別是,再如第5圖所示,嗲 些伸縮擋條212與該賴 八211之談頂面213之鄰 拉 ^ ^ ^ j遭係可留有一間隙,以提 供一模封廢料區217。因為兮此从 ^ ^ ^ 馮該些伸縮擋條212會隨著該 模封膠體240之灌入而逐漸墙 β .如 斯縮回至該些擋條容置槽 内,在 >主膠填充過程中產生氣 玍虱涧,隨著模封膠體逐漸填 13 201142956 滿該模穴211 ’而使該些伸縮擋條212縮回至該些擋條 谷置槽214内,亦會使產生之氣洞被模封膠體推擠至該 模封廢料區217之内,毋須擔心在該些基板單元221區 内的封裝結構中產生氣洞。 在—變化實施例中,如第9圖所示,在裝載該基板 220之步驟中’可另包含之步驟有:設置一離形薄膜25〇 於該模具210與該基板220之間,該離形薄膜250係隔 離該模穴211内供該模封膠體240填充之空間與該些伸 縮擋條212,以避免該模封膠體24〇沾黏於該些伸縮擋 條212。該離形薄膜25〇具有不被該模封膠體24〇沾黏 或低沾黏力之特性,而易於脫模。詳細而言,當該模具 210壓合至該基板22〇之該上表面224,可同時夾緊該離 形薄膜250於該模具21〇與該基板22〇之間。再如第1〇 圖所示,在該模封耀·體2 4 0填充後的壓縮填料過程,,該 模封膠體240完全填滿於該模穴211,並且該些伸縮擋 條212會縮回至該些擋條容置槽214。該離形薄膜25〇 夂到該模封膠體240之擠壓而平貼於該模穴211之頂面 213與該些伸縮擋條212之突出表面216。因此,製程中 所發生的模封溢膠不會侵入至該些伸縮擋條212與該些 擋條合置槽2 14之間的間隙内,進而減少清理該模具2】〇 之頻率與該些伸縮擋條212失效可能。此外,在該離形 薄膜250的隔離下更能避免毛邊出現於該模封膠體24〇 在該些伸縮擋條212與該些擋條容置槽214之間的間隙。 以上所述’僅是本發明的較佳實施例而已,並非對本 14 201142956 發明作任何开3 4 式上的限制,雖然本發明已以較佳 .揭露如上,然而並非用以限定本發明,任何孰:= 術者,在不脫離本發明之技術範圍内,所作的 =、·#效,變化與修飾’均仍屬於本發明的技術範圍。 【圖式簡皁說明】 第1圖·;種習知的陣列模封方法在裝載基板之步驟中 元件截面示意圖。 φ 圓&知的11車列模封方法在提供模封膠體步驟之後 之元件截面示意圖。 第3A至3C圖.習知的陣列模封方法綠示在注膠填充過 程中模封膠體於基板上填充情況之示意圖。 第4圖:依據本發明之一具體實施例的一種避免回包之 陣列模封方法之模具截面示意圖。 第5圖:依據本發明之一具體實施例的避免回包之陣列 模封方法在裝载基板之步料元件截面示意 φ 圖。 第6圖:依據本發明之一具體實施例的避免回包之陣列 模封方法在提供模封膠體步驟之注膠填充過程 之後之元件截面示意圖。 第7圖:依據本發明之一具體實施例的避免回包之陣列 模封方法在提供模封膠體步驟之壓縮填料過程 之後之7L件截面示意圖。When the cutting tool is cut along the boring cutting lines 223, the portion of the molding compound 240 that is burred is simultaneously removed. Therefore, it is possible to avoid the occurrence of burrs on the outside of the substrate unit package structure after the molding process and the single-cutting step. In the present invention, the array molding die 21 of the specific structure can be matched with a corresponding step, and the mold 21 has a plurality of expansion and contraction (4) 212' in the cavity 2 ι. Blocking of the barrier strips (1) to slow the mold flow rate of the molding compound 24Q above the gamma axis cutting channels 223. Therefore, the mold flow rate of the molding compound 24 over the boring cutting lines 223 and the mold flow speed above the wafers 230 are balanced, and 7 spoons are filled in the mold holes 211 to avoid returning the package. (air trap) phenomenon occurs. In particular, as shown in Fig. 5, a gap may be left between the telescopic bars 212 and the top surface 213 of the Lai 211 to provide a molded waste area 217. Because of this, the retractable bar 212 will gradually become the wall β as the molding compound 240 is poured in. The retraction is returned to the bar receiving grooves, and the main glue is filled in the main glue. During the process, gas is generated, and as the molding compound gradually fills the cavity 211', the retractable bars 212 are retracted into the baffle grooves 214, which may also generate gas. The holes are pushed into the molding waste area 217 by the molding compound without worrying about the generation of air holes in the package structure in the substrate unit 221 area. In a variant embodiment, as shown in FIG. 9, in the step of loading the substrate 220, the method may further include: providing a release film 25 between the mold 210 and the substrate 220, the separation The shaped film 250 isolates the space in the cavity 211 for filling the molding compound 240 and the telescopic bars 212 to prevent the molding compound 24 from adhering to the telescopic bars 212. The release film 25 has a property of being not adhered or low-viscosity by the molding compound 24, and is easily released. In detail, when the mold 210 is pressed to the upper surface 224 of the substrate 22, the release film 250 can be simultaneously clamped between the mold 21 and the substrate 22A. Further, as shown in FIG. 1 , in the process of compressing the filler after the die-filling body 240 is filled, the molding compound 240 completely fills the cavity 211, and the telescopic bars 212 are shrunk. Return to the barrier receiving slots 214. The release film 25 is pressed against the molding compound 240 to be flatly attached to the top surface 213 of the cavity 211 and the protruding surface 216 of the telescopic bars 212. Therefore, the molding overfill occurred in the process does not intrude into the gap between the telescopic bars 212 and the bar closing grooves 2 14 , thereby reducing the frequency of cleaning the mold 2 and the The telescopic bar 212 may fail. In addition, under the separation of the release film 250, the burrs are prevented from appearing in the gap between the elastic strips 212 and the strip receiving grooves 214. The above description is only a preferred embodiment of the present invention, and is not intended to limit the invention in any way. Although the invention has been disclosed above, it is not intended to limit the invention, any孰: = The operator, without departing from the technical scope of the present invention, does not fall within the technical scope of the present invention. [Description of the simple soap] Fig. 1 is a schematic cross-sectional view of the element in the step of loading the substrate in the conventional array sealing method. φ circle & know the 11-column molding method after the step of providing the molding compound. 3A to 3C. A conventional array molding method green shows a schematic view of the filling of a molding compound on a substrate during the filling process. Fig. 4 is a cross-sectional view showing a mold of an array sealing method for avoiding back-packing according to an embodiment of the present invention. Figure 5: Array for avoiding back-packing according to an embodiment of the present invention The sealing method is shown in section φ of a cross-section of a stepping element of a substrate. Figure 6 is a cross-sectional view of the element after the injection molding process of the molding compound step is provided in accordance with an embodiment of the present invention. Figure 7 is a cross-sectional view of a 7L piece of the die-sealing method in accordance with an embodiment of the present invention after the process of compressing the filler in the step of providing a molding compound.

第8A至8E圖:依摅土政DO 本發明之一具體實施例的避免回包 之陣列模封方法繪示在注膠填充過程中模封膠S ] 15 201142956 體於基板上填充情況之示意圖。 第9圖.依據本發明之一變化實施例的避免回包之陣列 模封方法繪示在裝載基板之步驟中設置有離形 薄膜之元件截面示意圖。 第1 0圖.依據本發明之一變化實施例的避免回包之陣列 模封方法在提供模封膠體步驟之壓縮填料過程 之後之元件截面示意圖。 【主要元件符號說明】 鲁11 〇陣列模封模具 111 模穴 113 頂面 118 注澆口 120 基板 121 基板單元 122 切割道 123 切割道 124 上表面 130 晶片 131 黏晶膠 140 模封膠體 141 氣洞 210 陣列模封模具 211 模穴 212 伸縮擋條 213 頂面 214 擋條容置槽 215 被動式彈性元件 216 突出表面 217 模封廢料區 218 注澆口 220 基板 221 基板單元 222 X轴切电1 223 Y軸切割道 224 上表面 230 晶片 23 1 黏晶耀· 240 模封膠體 250 離形薄膜 168A to 8E: Depending on the embodiment of the present invention, the array sealing method for avoiding the returning of the package shows the molding of the molding compound during the filling process of the injection molding. S 2011 15 201142956 . Fig. 9. Array for avoiding back-packing according to a variant embodiment of the invention The sealing method shows a schematic cross-sectional view of an element provided with a release film in the step of loading a substrate. Fig. 10 is a cross-sectional view showing the element after the process of compressing the filler in the step of providing a molding compound, in accordance with a variant embodiment of the present invention. [Main component symbol description] Lu 11 〇 array mold sealing mold 111 cavity 113 top surface 118 gate 120 substrate 121 substrate unit 122 cutting channel 123 cutting channel 124 upper surface 130 wafer 131 adhesive 101 molding compound 141 cavity 210 Array Molding Mold 211 Mold Hole 212 Retractable Bar 213 Top Surface 214 Bar accommodating groove 215 Passive elastic element 216 Projection surface 217 Molded waste area 218 Injection gate 220 Substrate 221 Substrate unit 222 X-axis cut 1 223 Y Axis cutting path 224 Upper surface 230 Wafer 23 1 Adhesive lens · 240 Molding paste 250 Release film 16

Claims (1)

201142956 七、申請專利範圍: 1、 一種避免回包之陣列模封方法,包含: 提供一陣列模封模具,該模具係具有一模穴與複數 個伸縮擋條,該模穴之頂面係形成有複數個擋條 各置槽’該些伸縮擋條係由該些擋條容置槽彈性 突出; 裝載一基板,係具有複數個矩陣陣列之基板單元與 φ 複數個在該些基板單元之間與周邊的X軸與γ軸 切割道,複數個晶片係設置於該基板之一上表面 並位於對應之該些基板單元内,該些伸縮擋條係 對準於該些γ轴切割道之上方;以及 以γ軸方向提供一模封膠體於該模穴内,以使該模 封膠體覆蓋該基板之該上表面並密封該些晶片, 在注膠填充過程中藉由該些伸縮擋條之阻擋以減 緩該模封膠體在該些γ軸切割道上之模流速度, • 使其與在該些晶片上方之模流速度達到平衡進而 填滿該模穴’並且在壓縮填料過程中該些伸縮擋 條受到該模封膠體的壓縮壓力逐漸縮回至該些擋 條容置槽内。 2、 根據申請專利範圍第1項之避免回包之陣列模封方 法,其中該模具係更具有複數個被動式彈性元件, 係設於該些擋條容置槽内,以彈性推出該些伸縮擋 條。 . 3、 根據申請專利範圍第2項之避免回包之陣列模封方 17 201142956 法,其中當兮此(、士 I '^二m動式彈性元件於壓縮狀態時,該 些伸縮擋條係完; 金縮回至該些擂條容置槽内,並使 該些伸縮擋條之峦山+ 卞·^大出表面係與該模穴之頂面在同— 平面。 4、根據申請專利範圍第 法,其中該些伸縮擋 道之寬度。 1項之避免回包之陣列模封 條之寬度係小於該些γ軸切 方 割201142956 VII. Patent application scope: 1. An array sealing method for avoiding returning, comprising: providing an array of mold-molding molds, the mold has a mold cavity and a plurality of telescopic strips, and the top surface of the mold cavity is formed a plurality of dams each having a groove. The retractable ribs are elastically protruded from the rib receiving grooves; and a substrate is mounted, and the substrate unit having a plurality of matrix arrays and φ are plural between the substrate units And a plurality of dicing lines are disposed on an upper surface of the substrate and located in the corresponding substrate unit, and the telescopic bars are aligned above the γ-axis dicing streets And providing a molding compound in the cavity in the γ-axis direction, so that the molding compound covers the upper surface of the substrate and sealing the wafers, and blocking by the telescopic strips during the filling process To slow down the mold flow rate of the molding compound on the gamma-axis scribe lines, to balance the mold flow velocity above the wafers to fill the cavity, and to stretch during the compression of the filler The baffle is gradually retracted into the retaining grooves of the retaining groove by the compression pressure of the molding compound. 2. The array molding method for avoiding the return of the package according to the first application of the patent scope, wherein the mold system further comprises a plurality of passive elastic elements, which are disposed in the retaining grooves of the strips to elastically push out the telescopic blocks. article. 3, according to the scope of the patent application of the second paragraph of the avoidance of the array of the mold-molding method 17 201142956, which is the case when the (I, ^ I ^ ^ two dynamic elastic elements in the compressed state, the telescopic strip system Finished; the gold is retracted into the slats of the slats, and the surface of the ridges + 卞·^ of the telescopic ribs is in the same plane as the top surface of the cavity. 4. According to the patent application The range method, wherein the width of the telescopic track is 1. The width of the array sealing strip for avoiding the return is less than the γ axis cutting 5、 根據申請專利範圍第1、2、3或4項之避免回包之 陣列模封方法’其中該些伸縮擋條與該模穴之該頂 之鄰近側邊係留有一間隙,以提供一模封廢料區。 6、 根據申請專利範圍第卜2、3或4項之避免回包之 車列模封方法’在裝載該基板之步驟中,另包含之 步驟有.S又置—離形薄膜於該模具與該基板之間, 該離形薄膜係隔離該模穴内供該模封膠體填充之空 間與該些伸縮擋條,以避免該模封膠體沾黏於該些 伸縮擋條。 、根據申請專利範圍第1、2、3或4項之避免回包之 陣列杈封方法’其中該些晶片之設置方式係為多晶 片堆疊型態。 、一種避免回包之陣列模封模具,該模具係具有一模 穴與複數個伸縮擋條,該模穴之頂面係形成有複數 個擋條谷置槽,該些伸縮擋條係由該些擋條容置槽 彈性突出。 根據申請專利範圍第8項之避免回包之陣列模封模S ] 18 201142956 具’其中該模具係更具有複數個被動式彈性元件, 係6又於該些擋條容置槽内,以彈性推出該些伸縮擋 條。 !〇、根據申凊專利範圍第8或9項之避免回包之陣列 模封模具,其中該些伸縮擋條與該模穴之該頂面之 鄰近侧邊係留有一間隙’以提供一模封廢料區。5. The array sealing method for avoiding back-packing according to claim 1, 2, 3 or 4 of the patent application, wherein the telescopic strips have a gap with the adjacent side of the top of the cavity to provide a mode Seal the waste area. 6. According to the patent application scope No. 2, 3 or 4, the method for preventing the return of the package, in the step of loading the substrate, the step further comprises the step of: placing the release film on the mold and Between the substrates, the release film isolates the space in the cavity for filling the molding compound and the telescopic bars to prevent the molding compound from sticking to the telescopic bars. The array sealing method for avoiding back-up according to the scope of claims 1, 2, 3 or 4 of the patent application, wherein the wafers are arranged in a polycrystalline wafer stacking mode. An array molding die for avoiding returning a package, the mold having a cavity and a plurality of telescopic bars, wherein a top surface of the cavity is formed with a plurality of barrier valley grooves, and the telescopic bars are The strip receiving grooves are elastically protruded. According to the scope of the patent application, the array die-molding mold for avoiding the return of the package is S] 18 201142956, wherein the mold system has a plurality of passive elastic members, and the system 6 is further embedded in the groove receiving grooves. The telescopic bars. 〇 阵列 〇 阵列 阵列 阵列 阵列 阵列 阵列 阵列 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免Waste area. 1919
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI498977B (en) * 2012-04-11 2015-09-01 Advanced Semiconductor Eng Semiconductor package and the method of making the same
CN110900961A (en) * 2018-09-18 2020-03-24 日月光半导体制造股份有限公司 Semiconductor packaging mold
TWI722319B (en) * 2018-09-18 2021-03-21 日月光半導體製造股份有限公司 Mold chase for semiconductor package

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI498977B (en) * 2012-04-11 2015-09-01 Advanced Semiconductor Eng Semiconductor package and the method of making the same
CN110900961A (en) * 2018-09-18 2020-03-24 日月光半导体制造股份有限公司 Semiconductor packaging mold
TWI722319B (en) * 2018-09-18 2021-03-21 日月光半導體製造股份有限公司 Mold chase for semiconductor package

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