TW201142710A - Computer system, shutdown and boot method thereof - Google Patents

Abstract

A computer system and a shutdown and boot method thereof are provided. The computer system has a memory, a chipset, a basic input/output system (BIOS) and an embedded controller, and runs an operating system. The method includes notifying the embedded controller of the preparation for entering a suspend to RAM (ACPI S3) state and setting a register of the chipset in accordance with the ACPI S3 state by the BIOS when intercepting a shutdown instruction issued by the operating system. The method further includes reserving a present working state data of the computer system and continuously supplying power to the memory while putting the computer system into the ACPI S3 state.

Description

201142710 TP2010056 36710twf.doc/I VI. Description of the Invention: [Technical Field] The present invention relates to a computer system switching method, and more particularly to a switching machine method capable of reducing boot time and implementing the method Computer system. [Prior Art] According to various statistics, the penetration rate of computer systems has been increasing year by year, indicating that modern people are becoming more accustomed to using computer systems as tools for daily office, communication, information browsing, and entertainment. Generally speaking, the computer system must undergo a series of hardware initialization actions after the user presses the power button, and can be started normally after the detection is correct. Among them, 'Basic Inpm/C utput (four), BIOS) plays a very important role. Specifically, after turning on the power of the computer system, the basic input output system will be loaded with human memory and start the self-test (power 〇n Self Test, p〇ST) to the hardware of the computer system. The components are initialized and tested to ensure that these St:: are working properly. Boot self-test includes initializing whether the computer is normal: L to check the central processor's flag and register status = line: the function of the slice and north bridge chip, detect memory and sense H, etc. The process of the mouse and the input wheel is initialized. Waiting for the boot self-test to select the boot device ί,i and then the user will load the operating system according to the boot sequence specified by the user to complete the entire computer system.

201142710 TP2010056 36710twf.doc/I boot process. According to the Advanced Configuration and Power Interface (ACPI) specification, the general shutdown process shuts down all devices, including the power supply. At this point, the computer system enters the shutdown state (S5 state). The next time you want to start the computer system, you must wait for the computer system to completely execute the above boot process. Therefore, how to speed up the startup of the computer system has become a goal of those skilled in the art. SUMMARY OF THE INVENTION In view of the above, the present invention provides a computer system switching method for speeding up a computer system when it is started. The present invention provides a computer system that can be started up at a faster rate. The present invention provides a computer system switching method that includes a memory, a chipset, a basic output input system, and an embedded controller' and has an operating system implemented in the computer system. The memory may be a dynamic random access memory (DRAM) or a non-volatile memory. The method includes notifying the embedded controller that it is ready to enter the standby (ACPI S3) state when the basic output wheeling system intercepts the shutdown command issued by the operating system. Set the contents of the scratchpad of the wafer group according to the standby state. Keep the current working status of the computer system' and maintain the power supply to the memory to put the computer system into standby. In an embodiment of the invention, wherein the power supply is maintained to the memory 4

201142710 TP2010056 36710twf.doc/I After the computer system enters the standby state, the method further includes starting the power supply of the electric system. Determine if the computer system has a hardware change. If not, use the working status data in the memory to reply to the relevant register of the chipset. 5, 'Start the computer graphics system (Video Graphics Array ' VGA) display' to perform the hard disk on the computer system. The s forcing program 'checks the correctness of the initialization data of the local Southern Programmable Interrupt Controller (Local APCI) and turns on the operating system. In an embodiment of the invention, the step of executing the confirmation procedure for the hard disk further comprises checking the function of the INT 13 interrupt service, checking the base address of the Advanced Host Controller Interface (AHCI) (base) The correctness of the initialization data of address) and the function of confirming the input and output interface of the hard disk. In an embodiment of the present invention, after determining the step of determining whether the computer system has a hardware change, the method further comprises performing a complete Power On Self Test (POST) if a hardware change occurs. Start the computer system. In an embodiment of the present invention, the hardware change includes a memory change, a central processor change, and a peripheral device change (eg, a hard disk change, an extended card change, or a wireless local area network). , WLAN) and changes between 3G networks, etc.) and Real Time Clock (RTC) power changes. In an embodiment of the invention, the working state data of the computer system is retained in the memory, and the memory is a dynamic random access memory 5

36710twf.doc/I 201142710 lx ^, ^iw56 (Dynamic Random Access Memory, DRAM), and after maintaining the power supply to the memory to put the computer system into the standby state, the method further comprises determining that the computer system enters the standby state. Whether the time reaches the preset value. If so, the operational status data retained in the memory is written to a non-volatile storage device of the computer system, and the shutdown operation of the computer system is executed. In an embodiment of the present invention, after the step of starting the power supply of the computer system, the method further comprises: first checking whether there is working state data in the memory, and if not, determining whether the non-volatile storage device has a job. Status data. If so, the work status data is loaded into the memory. Viewed from another point of view, the present invention provides a computer system that executes an operating system. This computer system includes memory, chipset, embedded controller, and basic input output system. The chipset is connected to the hidden body embedded control (10) to the crystal# group, and the basic input output system can be a chipset or an embedded control11. When the basic input output system intercepts the shutdown command issued by H=, the embedded control tf standby state is notified through the chipset, and the temporary storage of the chipset is set according to the standby state: 隹:: Drag and retain the current working state data of the computer system In the computer department, I entered the Lai _ to maintain the crane to the memory. After the -5 example, in which the power of the computer system is started, if not, it is determined whether the computer system has a hardware change. Multi-chip: the second [Record = the working status data back to the array, the display is dry, crying, 1^, 6 and 疋, start the video graphics of the computer system, U do not steal, execute the confirmation procedure for the hard disk of the computer system, check 6

201142710 TP2010056 36710twf.doc/I The correctness of the initialization data of the local advanced programmable interrupt controller, and the opening of the operating system. In the embodiment of the invention, wherein the basic input output system performs a verification procedure for the crane of the computer system, it checks the initialization of the base address of the advanced host controller interface of the 臆丨3 interrupt and Confirm the function of the input interface of the hard disk. Start the computer system. More time to complete a complete boot self-test to more, in the case of 'hardware changes, including memory changes, benefits, peripheral devices changes (such as. 砀 辔 辔 right::= then 30 networks) Between changes, etc.), and in the instant embodiment of the invention, the towel is retained in the dragon, and the sand body is in the state of the security state, the embedded controller is in the computer system Connect to the chipset. Whether the basic input loss is awakened because it enters the standby mode: j, the electricity "charges the basic input and output system through the chipset will be guaranteed; =. If the 'state data is written to the non-volatile storage device, the work in the 5 memory The controller is turned off by the embedded controller in an embodiment of the present invention, wherein the power of the computer system is started 201142710

Irzuiuu56 36710twf.d〇c/I The second basic input/output system first checks whether there is working status data in the memory, and then determines whether the non-volatile storage device has working data. If so, the basic input/output system loads the workability data into the memory through the chipset. Based on the above, the present invention controls the computer system to enter a standby state instead of a shutdown state (s5 state) in which all devices are turned off when the computer operating system is turned off, thereby retaining the previous working state data in the memory. Therefore, when the computer system is started again, the data in the memory can be utilized to achieve the purpose of quick start. The above described features and advantages of the present invention will become more apparent from the description of the appended claims. [Embodiment] FIG. 1A is a block diagram of a computer system according to an embodiment of the invention. Referring to FIG. 1A, the computer system 1 includes a memory 11A, a wafer set 120, an embedded controller 130, and a basic input/output system (Bas=

Input/Output System, BIOS) 140. Among them, when the computer system 1〇3 is in the working state, an operating system is executed. The suffix 110 is, for example, a dynamic random access memory (d ^namic

Random Access Memory (DRAM) or Non-volatile memory (NVM). The memory 11 〇 is the main memory of the computer system 100 for loading various types of data and data when the computer system 100 is operating, for the central processing unit 121 of the computer system to perform rank. And transport 8 201142710

TP2010056 36710twf.doc/I In this embodiment, the chipset 120 includes a central processing unit 121, a north bridge 123 and a south bridge 125, and the memory 110 is coupled to the wafer set 120. The north bridge wafer 123, and the embedded controller 130 and the basic input output system 140 are coupled to the south bridge wafer 125 in the wafer set 120. Both the north bridge wafer 123 and the south bridge wafer ι25 are interconnected through peripheral components. The north bridge chip 123 is responsible for the 5-hole number transmission between the central processor 121, the memory 11 and the peripheral component interconnect busbars, and the south bridge wafer 125 is used to control other peripheral devices. The embedded controller 130 is used to control an input device such as a keyboard (not shown) of the computer system, and can manage the power. The basic input/output system 140 is, for example, a code stored in a read-only memory (not shown) on a motherboard (not shown) of the computer system 1 (not shown). In the present embodiment, the basic input/output system 140 is more particularly used to perform a special mechanism when the computer system 1 is turned off, thereby introducing the computer system 1 into the standby (ACPI S3) state. Moreover, when the computer system 100 is started next time, the complete PowerOnSelfTest (POST) is omitted, and the purpose of quickly starting the computer system 100 is achieved. 1B is a block diagram of a computer system in accordance with another embodiment of the present invention. The computer system 100 of this embodiment is similar to the computer system 100 shown in FIG. 1A, so the following description will only be made for differences. As shown in Fig. 2, in the chip set 120' of the computer system 100', an integrated wafer 122 of the whole human processor and North Bridge > and a south bridge wafer (2) are included. And the hidden body 110疋 is transferred to the integrated wafer 122 in the chip set 12〇' and the 201142710 ir layer u56 367l〇twf.d〇c/i the in-control controller 13〇 and the basic input/output system 14〇 are The south bridge wafer 125 is connected to the wafer set 120. Since the functions of the components of the computer system and the system are the same as those of the computer system, except for the difference in the above-mentioned light connection methods, they are not described here. It should be particularly noted that in other embodiments of the present invention, the basic input/output system 14G can also be used as a controller (as shown in the computer system 1 of Figure ic). To further illustrate the basics. The detailed operation mode of the input/output system 140 when the computer system is turned off, the following is a specific embodiment to illustrate the present invention. FIG. 2 is a schematic diagram of a computer system shutdown method according to an embodiment of the present invention. Flowchart. Please refer to both 1A and Figure 2. For a computer system that is in a working state, the user presses the "Start" button or "(5) + Alt + Del" on the desktop, and then When the "Shutdown" option is selected, the basic input/output system 140 can intercept the shutdown command issued by the operating system as shown in step S21A. Next, in step S22", the basic input/output system 14 informs the general control that the H13G is ready to enter the standby (four) body. The basic input/output system 140 can notify the embedded by setting the flag value of the embedded controller 13A. The controller 130 turns off the indicator of the standby state (mdlcator), so that the embedded control _ 13〇 knows that the computer system 100 is to enter the standby state next. / Next, as shown in step S230, the basic input/output system 140 is in accordance with the standby. The state sets the content of the - or more related registers in the chipset 120. In this implementation, the basic output readout (10) will be the slave chipset 12〇201142710 TP2010056 36710twf.doc/I the relevant temporary storage of the Southbridge wafer 125 The content of the device is because the operating system changes the state of the register set to the chipset 120 and then the chipset 120 when it is ready to enter the shutdown state (S5 state). Therefore, in order to avoid the chipset 120 When the power is turned off, the basic input/output system 140 changes the contents of the register to the standby state = the fixed value. ° As shown in step S240, the power is reserved. The system 1 〇〇 current working status data (the working status data is retained in the memory 11). Finally, as shown in step S250, the embedded controller 130 controls the power supply line to maintain the supply power to the memory 110 to save the work therein. The status data 'in turn causes the computer system 100 to enter the standby state. It is worth mentioning that, since the embodiment instructs the chip set 120 and the embedded controller 13 to enter the standby state through the basic input/output system 140 instead of entering the shutdown state, The behavior of the operating system itself has not changed, so the operating system still determines that the computer system 100 is ready to enter the shutdown state. In other words, from the perspective of the operating system, its status and stored data are the same as the general shutdown state. The detailed operation mode of each component in the computer system 100 when the user next turns on the computer system 100 will be described below with reference to Fig. 3. First, as shown in step S310, the user presses the power button of the computer system to start the computer. System 1 power supply. In an embodiment, the basic input output system 140 can be read by embedded 13〇 flag value is made, and other non-volatile memory system ⑽ iv shutting off each step at the last shutdown Cloth NO ® 2 are not subjected to the. When the flag value ⑽ computer system display. 11

201142710 ιι*^υιυυ56 3671〇twf.docA If the basic input/output system 14 is turned off according to the traditional process, then the Power On Self Test ' POST will be activated to start the computer system. That is, in this case, an initialization action must be performed on all hardware elements. However, if the flag value indicates that the computer system 1 is in the standby state instead of entering the shutdown state during the last shutdown, then the basic input/output system 14 determines that the computer system 100 is in the standby state as shown in step S32. Are there any hardware changes during the period? For example, hardware changes = memory changes (such as replacing or expanding memory), CPU changes (such as replacing the central processor), peripheral device changes (such as hard disk changes, various expansion cards (Extended card) Change, wireless local area network (SS 1〇Cal area net_k, WLAN) and changes between 3G networks, etc.), and Real Time Clock (RTC) power supply changes (such as replacing the battery of the instant clock chip) ) - or its group of people 0 σ ^ fine, in the event of a change in the name of the note or the current clock power supply before the relevant hardware model will be recorded with the memory of the hard disk: Lose 140 fiber mine 1 ^ 乍 state bucket. Based on this, if the basic input and output system -, its ^ ^ island system 100 has a hardware change, then step S33 〇 ΐ 4 4 4 4 4 4 4 4 4 4 4 4 (Initialize the operation of the -7L piece) to start the computer system. Step If the hardware change has not occurred, then the basic input/output system 140 will be saved in memory 12 201142710

TP2010056 36710twf.doc/I The working status data in the body 110 is used to reply to the setting of the associated register of the chipset l2. In addition to this, the basic input wheeling system 14〇 also initializes a small number of hardware devices. Specifically, as shown in step S350, the related information of the Video Graphics Array (VGA) display (not shown) of the computer system 100 is not stored in the buddy lio, but is stored in the VGA. The display itself is in the chip and memory, so the 'basic input wheeling system 14' can initiate the video graphics array by performing the initialization action of the VGA BIOS (VBIOS/DXE Driver) of the VGA display. Then, as shown in step S360, in order to be able to read the hard disk of the computer system (not shown), the basic input/output system 14 will execute several confirmation procedures regarding the hard disk. For example, the basic input wheeling system 14〇 checks the interrupt controller to determine if the function of the INT 13 interrupt service is normal. In addition, in the case where the computer system 1 supports the Advanced Host Controller Interface (AHCI), the basic input/output system 140 also checks the base address of the advanced host controller interface (base address). ) The initialization data is correct. The basic input/output system 140 also transmits commands to the hard disk through the input/output interface of the hard disk, thereby confirming whether the functions of the input and output interfaces of the hard disk are correct. In addition, since the data of the Local Advanced pr0grammable Interrupt Controller (Local APCI) of the central processing unit of the computer system 100 is stored in the middle 13

36710twf.doc/I 201142710,,, and in the computer system _ in the standby state, the central processing unit 2 is powered again, so in order to ensure that the local advanced programmable towel controller is responsible for the central processing when it operates, as in step (4) As shown, the basic input control system is correct for the initialization data of the south level programmable control system. In a r = ΓΓ 380, the operating system is loaded and turned on to complete the power-on process of the system 100). In the embodiment shown in FIG. 3, when the computer (four) 100 is to be notified by the basic input wheeling system 140, the chip phantom 20 and the talker light 130 are controlled to enter the standby state instead of off and retain the time. Play as a state dragon. Since the computer system (10) ΐϊΓ Temple memory 110 is still continuously supplied with power, ί:?〇〇Γ i is retained. When the computer is turned on and off for a while, you can use the work material retained in the memory 11〇 to quickly call the temporary storage (4) setting value of the 4 groups of 12 (), and after the detection of the body device, It should be specially stated that the above-mentioned embodiment is not limited to the computer system 100, and the steps of the method and the steps of the method are shown in FIG. 2 and FIG. 3, but the computer system of FIG. Figure: The computer system 100" can perform the steps shown in Figure 2 and Figure 3. Figure 4 is a block diagram of the green power according to another embodiment of the present invention. , the computer system 400 includes ... 曰 type controller 13 〇, basic input and output system 14 = 14 201142710

TP2010056 36710twf.doc/I and non-volatile storage device 450. In this embodiment, the memory ii is a dynamic random access memory. Since the chip set 12, the embedded controller and the basic input/output system 14A and the corresponding components of the computer system shown in Fig. 1A have the same or similar functions, they will not be described again. The non-volatile storage device 450 is coupled to the south bridge wafer 125 in the wafer set 12A. The non-volatile storage device 45 is, for example, a hard disk, a flash memory, or any other storage device that does not disappear after the power is lost. 4B is a block diagram of a computer system in accordance with another embodiment of the present invention. The computer system 400 of FIG. 4B is substantially similar to the architecture of the computer system 4A of FIG. 4A, with the difference being that the computer system 4, the central processor and the north bridge chip in the chipset 120 are integrated into an integrated wafer 122. In the chipset 12 of the system, the central processing unit 121, the north bridge wafer 123, and the south bridge wafer 125 are independent members. 4C is a block diagram of a computer system in accordance with another embodiment of the present invention. As shown in Fig. 4C, the basic input/output system 14 is not connected to the chip set 12 as shown in Figs. 4A and 4B. In the present embodiment, the basic input output system 140 is connected to the embedded controller. The detailed flow of the shutdown method of the computer system 400 will be described below with reference to Figs. 4A and 5 . Since steps S51 to S55 of Fig. 5 are the same as or similar to steps S210 to S250 shown in Fig. 2, they will not be described here. After the computer system 400 is brought into the standby state through steps S510 to S550, the memory 11 can receive the power supply of the power source. However for the sake of 15

201142710 ^ 36710twf.doc/I Further saving power consumption, in the embodiment, as shown in step S560, the embedded controller 130 repeatedly determines whether the time when the computer system 400 enters the standby state reaches a preset value. The preset value is, for example, 24 hours, but the present invention is not limited thereto. If the embedded controller 130 determines that the time when the computer system 400 has entered the standby state has reached the preset value, the embedded controller 130 wakes up the computer system 400 as shown in step S565. And as shown in step S570, the basic input/output system 140 determines whether the computer system 4 is woken up because the time when the computer system 400 enters the standby state has reached the preset value. If no, the normal booting process is executed as shown in step S580. ', if yes, as shown in step S5M, the basic input 450, and the soap storage device program as shown in step S59. That is, the basic input/output system === machine operation «by & input type _13() can further reduce the power consumption. And power. Thus, the status data is also non-volatile because of the written person. Fig. 6 is a detailed flow chart of another method of starting up in accordance with the present invention. The computer system shown in the example is the same, so the following is only the difference between the two; ^ 6 and the steps of FIG. 3 are roughly described in the step S610.

^ S613, S 4〇 check memory 11 ()

201142710 TP2010056 36710twf.doc/I Is there a working status (4)? If not, it is determined whether the non-volatile storage device 45 is stored with the operational status data as shown in step S615. If the non-volatile storage device 45 stores the working status data, it indicates that the computer system 400 has entered the standby state for more than the preset value. At this time, as shown in step S620, the basic input/output system has just reloaded the operational status data stored in the non-volatile storage unit f 450 into the memory 11A. Then, as shown in steps S630 to S690, the operating state data in the memory 11() is used to quickly start up the computer system 400 in the case where no hardware change has occurred. If it is determined in step S613 that the memory state has stored the working state data, or in step S615, it is determined that the non-volatile storage device does not store the working state data, and the booting method of the computer system described in this embodiment will also perform step S630. The action shown in S690. In the above embodiment, the same is to control the computer system 400 to enter the standby mode instead of the shutdown mode when the battery is to be turned off, thereby keeping the operational status data in the memory 11G. However, if the _ entering the standby mode exceeds the preset value, the working status data in the memory 110 is stored to the non-volatile storage device 45, which can save the data even if there is no power supply, thus achieving the purpose of saving power. It should be particularly noted that, in the above embodiment, although the computer system 400 of FIG. 4A is combined with FIG. 5 and FIG. 6 as an example to illustrate the steps of the on-off method of the present invention, the computer system of FIG. 4B is The computer system 400 of FIG. 4C can also perform the steps shown in FIG. 5 and FIG. 6. In summary, the computer system and the power switch method thereof according to the present invention are 17 201142710 => 〇 3671〇 Twf.doc/l When the machine is ready to shut down, the battery age is entered into the standby state, and the machine is separated, such as =- _ _ _ read status (four) is saved in the record (four) in preparation for restarting the power (four) system, you can The data stored in the memory speeds up the speed of starting the computer system. When the computer system is started, there is a hardware change in the computer system shirt to check. If there is a hardware change in the standby state, the age is changed. The original booting process, so as to ensure that the computer system can be started normally. Although the invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art without departing from the invention. Spirit and scope The scope of the invention is defined by the scope of the appended claims. [FIG. 1A to 1C are diagrams in accordance with an embodiment of the present invention. Figure 2 is a flow chart of a method for shutting down a computer system according to an embodiment of the invention. Figure 3 is a schematic diagram of a computer system according to an embodiment of the invention. Figure 4A to 4C are block diagrams of a computer system according to another embodiment of the present invention. Figure 5 is a flow chart showing a shutdown method of a computer system according to another embodiment of the present invention. Figure 6 is a diagram of a computer system 18 in accordance with another embodiment of the present invention.

201142710. ίΓ^υι νυ56 3671 Otwf.doc/I Flowchart of the boot method. [Main component symbol description] 100, 100', 1〇〇": computer system 110: memory 120 · crystal moon group 121: central processing unit 122: integrated wafer 123 ♦ north bridge wafer 125 · south bridge wafer 130: embedded controller 140: Basic input and output system S210 to S250: steps S310 to S380 of the shutdown method of the computer system according to an embodiment of the present invention: steps 400 of the booting method of the computer system according to an embodiment of the present invention, 400', 400": computer system 450: non-volatile storage devices S510 to S590. Steps S610 to S690 of the shutdown method of the computer system according to another embodiment of the present invention: another embodiment of the present invention Each step of the boot method of the computer system

Claims (1)

36710twf.d〇c/I 201142710., _____w)6 VII. Patent application scope: 1 · A computer system switching method, the computer system comprises a memory, a chipset, an embedded controller and a basic input Outputting the system, and having an operating system executed on the computer system, the method comprising: informing the embedded controller to enter a standby (ACPI S3) state when the basic input output system intercepts a shutdown command issued by the operating system Setting, by the basic input/output system, the content of the at least one register of the chipset according to the standby state; retaining a current working state data of the computer system; and maintaining supply power to the memory to enable the computer system to enter the standby mode. 2. The method of switching on and off a computer system according to claim 1, wherein the method further comprises: starting the computer after maintaining the supply of power to the memory to cause the computer system to enter the standby state The power of the system; determining whether the computer system has a hardware change; if not, using the working status data in the memory to restore the setting of the at least one register of the chip set; A Video Graphics Array (VGA) display; a confirmation program for one hard disk of the computer system; an initialization of a Local Advanced Programmable Interrupt Controller (Local APCI) 201142710 1 r ζυ ιυυ56 3671 Otwf.doc/I The correctness of the data; and the opening of the operating system. 3. The method of switching on and off a computer system according to claim 2, wherein the step of executing the confirmation procedure for the hard disk further comprises: checking a function of an INT 13 interrupt service; and double checking an advanced host control The correctness of the initialization data of the base address of the Advanced Host Controller Interface (AHCI); and the function of confirming one of the input and output interfaces of the hard disk. 4. The method of switching on and off a computer system according to claim 2, wherein after determining whether the computer system has the hardware change step, the method further comprises: if 疋', performing a complete booting self Test (p〇wer 〇n Self Test ' POST) to start the computer system. 5. The method of switching on and off a computer system as described in claim 2, wherein the change of the hardware includes a memory change, a central processing write change, a peripheral device change, and an instant clock (Real Time) Clock 'RTC) Power change. 6. The method of switching on and off a computer system according to claim 2, wherein the data of the operating status of the δHai electric service system is retained in the memory, and the memory is a dynamic random memory. Taking a memory (Dynm Random Access Memory, DRAM), and after maintaining the power supply to the memory to bring the computer system into the standby state, the method further includes: X 21 201142710 36710twf.doc/I determining the computer Whether the time when the system enters the standby state reaches a preset value; if yes, the working state data retained in the memory is written to a non-volatile (n〇n_v〇latile) storage of the system Device: and '* A shutdown program that executes the computer system. 7. The method of switching on and off a computer system according to claim 6, wherein after the step of starting the power of the computer system, the method further comprises: / 'checking whether the memory has the working status data; If not, it is determined whether the non-volatile storage device stores the state data; and if so, the working state data is loaded into the memory. .8. - A computer system 'execution--(4) system, the computer system includes a memory; a chipset coupled to the memory; a sweet-in controller, the chipset is lightly connected; and - the basic input Human output system 'transfer H group or new input type=the basic input output system in the interception work (four) unified two _ shutdown command 'through H Saki Axis-style control (four) ready to enter 7 - standby state, depending on the rib The standby state sets at least the stolen content of the chipset 'retains the current state of operation of the computer system, and the stone is maintained by the embedded controller to maintain the power supply to the clock to make the 22 201142710. ijt^uiw-56 3671 〇twf.doc/I enters the standby state. 9. The computer system of claim 8, wherein after the power of the computer system is started, the basic input/output system determines whether a hardware change occurs in the computer system, and if not, the basic input/output system utilizes The working status data in the memory returns the setting of the at least one register of the chip set, activates a video graphics array display of the computer system, performs a confirmation procedure on a hard disk of the computer system, and checks a local The initialization of the advanced programmable interrupt controller is correct and the operating system is turned on. 10. The computer system of claim 9, wherein the basic input/output system checks an INT 13 interrupt service function when performing a confirmation procedure for the hard disk of the computer system, and checks an advanced host. The correctness of the initialization data of the base address of the controller interface, and the function of confirming one of the input and output interfaces of the hard disk. 11. The computer system of claim 9, wherein the basic input/output system performs a complete self-test to start the computer system when determining that the hardware change occurs in the computer system. 12. The computer system of claim 9, wherein the hardware change comprises a memory change, a central processor change, a peripheral device change, and an immediate clock power change. 13. The computer system of claim 9, wherein the working status data of the computer system is retained in the memory, and the memory is a dynamic random access memory, the computer system further includes : a non-volatile storage device coupled to the chip set, 23 201142710, 3671〇_c/i wherein the mobile controller wakes up when the computer system enters the standby state for a predetermined time Computer system, ~ the basic input output system, the computer is simply woken up to reach the preset value for the time when the computer system enters the standby state, and if so, the basic input/output system remains in the memory through the chipset The working status data is written to the non-volatile storage device to notify the embedded controller to shut down the computer system and the power source by the embedded controller. 14. The computer system of claim 13, wherein the basic input/output system checks whether the memory has the working status data after starting the power of the computer system, and if not, the basic input/output system Determining whether the non-volatile storage device stores the working state data. If yes, the basic input/output system loads the working state data into the memory through the δ ray chip set. twenty four