201136459 六、發明說明： 【發明所屬之技術領域】 本發明係一種多層電路板，尤其是一種容易檢查堆疊 順序是否錯誤的多層電路板。 【先前技術】201136459 VI. Description of the Invention: [Technical Field] The present invention relates to a multilayer circuit board, and more particularly to a multilayer circuit board which is easy to check whether the stacking order is erroneous. [Prior Art]
為了因應目前科技的發展，電子設備必須具備高速且 大量的運算能力以及更複雜的機能應用性，所以在電子設 備t的單一電路板已經不敷使用，為了能夠提高線路密 度，多層電路板應用於目前許多電子設備中。 藉由多層電路板的堆疊能夠增加佈線面積。該多層電 路板的層數為偶數，包括複數由兩層電路板所組成的核心 (core)板以及設置於該等核心板外側的二外層電路板。而 在每詹電路板之間皆塗佈有一層絕緣層，以將每層電路板 相互壓合黏牢，意即在—核心板中兩層電路板之間設置有 -絕緣層，而二核心板之間或者核心板和外層電路板之間 皆設置有絕緣層，以使得該等電路板之間相互絕緣。 由於多層電路板具有複數電路板，而各個電路板皆且 有不同的佈線，所以該等電路板放置的順序皆固定，一旦 錯置即會造成該多層電路板無法正常使用的困《。因此， 每個？路板皆會標示數字’以在堆疊時藉由數字來檢查電 路板是否有按順序放置。 凊參看第八圖所示，既有多層電路板中，位於頂部 外層電路板（70)於近-邊緣處的位置形成有貫穿該位於 部之外層電路板（7 G)以令絕緣層露出的—開槽（川，而 接於該位於頂部之外層電路板（7〇)的第—電路板（8〇a)於 201136459 於該開槽（71)的相同位置形成與其形狀相同的第一開槽 (81a) ’又於該第一開槽（8ia)中近其一端的位置形成有第 一標示碼（82a)(於圖中為阿拉俏數字】，亦可為英文字母、 希臘文字等广而第二電路板（80b)又在相對於該第一開槽 (81a)的相同位置形成與其形狀相同的第二開槽（8ib厂又 於該第二開槽（81b)中相對於該第一標示碼（82a)位置旁側 的位置形成有第二標示碼（82b);而第三電路板（8〇c)又在 相對於該第二開槽（81b)的相同位置形成與其形狀相同的第 • 三開槽（81C) ’又於該第三開槽（81c)中相對於該第二標示 碼（82b)位置旁側的位置形成有第三標示碼（82c);以此類 推，以使得該等標示碼（82a_h)的位置呈階梯狀排列。故於 該等電路板（70)(8〇a-h)(90)疊合時，檢查者能夠從該位於 頂部之外層電路板（70)的開槽（71)觀看，即可看到標示碼 (82a-h)(91)依序排列，若缺少任何一標示碼（82ah)(9i)， P可知道缺少具有該標示碼（82a_h)(9i)的電路板（8〇a_ h)(90) 〇 φ 然而，由於二電路板之間會設置絕緣層，因著絕緣層 的材質並非完全透明，使得越接近底部之電路板的標示碼 會越來越模糊，而導致檢查者無法辨識；再者，既有的電 路板開槽結構僅能檢查出是否有漏放電路板，但當電路板 錯置時，各個標示碼仍能從該等開槽中顯露，而無法辨識 是否有則後顛倒的情形，故目前多層電路板的結構仍無法 讓檢查者確實檢查出多層電路板是否依照順序正確放置。 【發明内容】 本發明人有鑑於既有的多層電路板無法使檢查者順利 201136459 檢查出該等電路板是否按昭正砝 .、，、正確順序擺放，亦因絕緣層的 阻隔而讓標示碼越來越模細，w > 倮糊以致於無法辨識，故經過長 期的研究以及不斷的試驗之後，終於發明出此多層電路 板。 本發明之目的係在於提供一種容易檢查堆疊順序是否 錯誤的多層電路板。 為達上述目#，本發明之多層電路板，包括： 一頂部外層電路板，其係於近-邊緣處從第-位置至 第η位置間隔穿設n個開口，n為大於2的整數； 底Ρ外層電路板’其係於相對於該頂部外層電路板 之第η位置形成第η標示碼； 複數中央電路板，其係從該頂部外層電路板朝該底部 夕層電路板具# W個中央電路板，其中第—中央電路板 相對於該頂部外層電路板之第一位置形成有第一標示碼， =於相對於第二位置至第η位置處間隔穿設有相對於該等 :口的複數第H而第χ中央電路板相對於該頂部外 層電路板之第X位置形成有帛χ標示碼，且相對於該⑴ :立置至η位置穿設有複數第χ穿孔，且該第χ中央電路板 目對於該頂部外層電路板之第—位置至第的位置為實 u結構’其中X為2至ΓΜ ; 複數絕緣廣，盆将八5丨 八係刀別狄置於該頂部外層電路板與中 久 之間該底部外層電路板與中央電路板之間以及 各二中央電路板之間。 -中，該等開口係相互聯通而形成從第一位置至第η 置貝穿的結構；而第一中央電路板之該等第一穿孔對應 201136459 於該等開口而形成從相對於該第二位置至帛η位置貫穿的 結構；第X中央電路板之該等第χ穿孔對應於該等開口而 形成從相對於該χ +1位置至η位置貫穿的結構。 本發明尚關於一種多層電路板總成，其係包括兩個上 ^多層電路板，其中該等多層電路板之底部外層電路板係 °又置於十央絕緣層的兩面，以令各多層電路板之頂部外 層電路板設置於該多層電路板總成之外側。 本發明又關於一種多層電路板，包括：In order to cope with the development of current technology, electronic equipment must have high speed and a large amount of computing power and more complex functional applications, so a single circuit board of electronic equipment t is no longer sufficient, in order to improve the line density, multi-layer circuit board is applied. Currently in many electronic devices. The wiring area can be increased by stacking of multilayer boards. The multi-layer circuit board has an even number of layers, and includes a plurality of core boards composed of two layers of circuit boards and two outer circuit boards disposed outside the core boards. An insulating layer is coated between each of the circuit boards to press and bond each of the circuit boards to each other, that is, in the core board, an insulating layer is disposed between the two circuit boards, and the second core An insulating layer is disposed between the boards or between the core board and the outer circuit board to insulate the boards from each other. Since a multi-layer circuit board has a plurality of circuit boards, and each of the circuit boards has different wirings, the order in which the boards are placed is fixed, and if it is misplaced, the board cannot be used normally. So each? The boards are labeled with the number ' to check if the boards are placed in order by numbers when stacking. Referring to the eighth embodiment, in the multilayer circuit board, the outer layer circuit board (70) is formed at the near-edge position through the outer layer circuit board (7G) to expose the insulating layer. - grooving, and the first circuit board (8〇a) connected to the outer circuit board (7〇) at the top forms a first opening of the same shape at the same position of the slot (71) at 201136459 The slot (81a)' is further formed with a first identification code (82a) at the position near the end of the first slot (8ia) (in the figure, the Ala Qiao number), and may also be an English letter, a Greek character, or the like. The second circuit board (80b), in turn, forms a second slot of the same shape with respect to the first slot (81a) (the 8ib factory is in the second slot (81b) relative to the first slot A position adjacent to the position of the identification code (82a) is formed with a second identification code (82b); and the third circuit board (8〇c) is formed in the same shape at the same position relative to the second slot (81b). The third slot (81C) 'is further in the third slot (81c) relative to the second indicator code (82b) The position is formed with a third identification code (82c); and so on, so that the positions of the identification codes (82a_h) are arranged in a stepwise manner. Therefore, the circuit boards (70) (8〇ah) (90) are stacked. In time, the examiner can view from the slot (71) of the top outer circuit board (70), and then the identification code (82a-h) (91) can be seen in order, if any identification code is missing ( 82ah)(9i), P knows that the board (8〇a_h) (90) with the identification code (82a_h) (9i) is missing. 〇 φ However, since insulation is provided between the two boards, insulation is required. The material of the layer is not completely transparent, so that the marking code of the circuit board closer to the bottom will become more and more blurred, which will make the inspector unable to recognize; in addition, the existing circuit board slotting structure can only check whether there is a leakage circuit. Board, but when the board is misplaced, the various identification codes can still be revealed from the slots, and it is impossible to identify whether there is a reversed situation. Therefore, the structure of the multilayer board still cannot allow the inspector to check the layers. Whether the circuit board is correctly placed in the order. SUMMARY OF THE INVENTION The present inventors have The multi-layer circuit board can not make the inspectors smooth 201136459 to check whether the boards are placed in the correct order, and the marking code is more and more fine due to the barrier of the insulation layer, w > Therefore, it has not been recognized, so after long-term research and continuous experimentation, the multilayer circuit board was finally invented. The object of the present invention is to provide a multilayer circuit board which is easy to check whether the stacking order is erroneous. The invention relates to a multilayer circuit board comprising: a top outer circuit board having n openings spaced from a first position to an nth position at a near-edge, n being an integer greater than 2; Forming an nth identification code with respect to the nth position of the top outer circuit board; a plurality of central circuit boards from the top outer circuit board toward the bottom circuit board having #W central circuit boards, wherein the first Forming, by the first circuit board, a first identification code with respect to the first position of the top outer circuit board, and having a spacing relative to the second position to the nth position The number H and the second central circuit board are formed with a 帛χ mark on the Xth position of the top outer circuit board, and a plurality of second punctured holes are formed with respect to the (1): standing to the η position, and the third 穿The central circuit board is a real u structure for the first position to the first position of the top outer circuit board, where X is 2 to ΓΜ; the plurality of insulation is wide, and the basin is placed on the top outer circuit of the octave Between the board and the medium and long between the bottom outer circuit board and the central circuit board and between the two central circuit boards. - the openings are interconnected to form a structure from the first position to the nth; and the first perforations of the first central circuit board correspond to the 201136459 at the openings to form from the second a structure in which the position to the 帛n position penetrates; the second turn of the Xth central circuit board corresponds to the openings to form a structure penetrating from the χ +1 position to the η position. The present invention relates to a multi-layer circuit board assembly comprising two upper multi-layer circuit boards, wherein the outer circuit board of the multi-layer circuit board is placed on both sides of the ten-yang insulating layer to make each multi-layer circuit The top outer circuit board of the board is disposed on the outer side of the multi-layer circuit board assembly. The invention further relates to a multilayer circuit board comprising:
一頂部外層電路板，其係於近一邊緣處從第—位置至 第η位置間隔穿設η個開口，η為大於$的整數； 一底部外層核心板’包括二底部外層電路板，其中接 近該頂部外層電路板之上底部外層電路板相對於該頂部外 層電路板之第η位置形成第η標示碼，而下底部外層電路 板則由實心結構組成； 複數組核^板，其係從該頂部外層電路板朝該底部 層核心板設…·，組核心板，各組核心板包括二中央 路板’其t第-組核心板接近該頂部外層電路板之上中 電路板，其第一位置形成有第一標示碼，且於相對於第 位置至第n位置處間隔f設有相對於該等開口的複數第 上穿孔，而第-組核心板接近該底部外層核心 :路板，其第-位置係呈實心結構，而相對於第二位置 ::位置處間隔穿設有相對於該等第—上穿孔的複數第 下穿孔，而第X組核心板接近該頂 双侵％召頂4外層電路板之中央 板，其第X位置形成有第X標示碼，且 位置至第η位置處間隔穿有門 ；ΧΗ 了、D亥專開口的複數第 201136459 上穿孔你V接近該底部外層核心、板 電路板，其第一位置至第x位置係呈實心社 中央 第X+1位置至第门位置處間隔穿設有相對=等而相對於 孔的複數第X下穿孔，其中）<為2至nd; x上穿 複數絕緣層’其係分別設置於該頂部外層 心板之間、該底部外層核心板與核心板之間、、/ 之間之r央電路板與下中央β電路板二：。板 /、中該專開口係相互聯通而形成從第 位置貫穿的結構；各上中央雷故王弟 雄曰 電路板之該等上穿孔對應於該 等開口形成相互貫穿的結構；各 〜人 中央電路板之該等下穿 孔對應於該等上穿孔形成相互貫穿的結構。 本發明亦關於一種多層雷软^ 總成’其係包括兩個上 述多層電路板，其中該箸容藤带 下…… 路板之底部外層核心板的 下底部外層電路板係設置於_中央絕緣層的兩面以令各 2電路板之頂部外層電路板設置於該多層電路板總成之 外側。 藉由中央電路板實心i士棋# 败只、，·σ構與穿孔結構的配合，當各中 央電路板依順序排列時，該頂部外層電路板的開口能夠看 到各中央電路板的標示@，_旦錯置，則中央電路板的實 :。構將會把錯置之中央電路板的標示碼遮蔽，故能輕易 才双測中央電路板排列之下被 Α 確性。再者，該多層電路板總成 、勺讓h查者從其一外側之頂部外層電路板進行檢查，所 以無需擔心因多層電路板的堆疊而導致標示碼模糊不清的 狀況。 【實施方式】 7 201136459 *請參看第-及二圖所示，其係本發明第一實施例之一 態樣的多層電路板，其係包括： -頂部外層電路板(10)，其係於近一邊緣處從第一位 置⑴）至第^置⑽間隔穿設⑽開口⑽， 的整數； 一底部外層電路板（20)，其係、於相對於該頂部外層電 路板（10)之第η位置（12)形成第η標示碼（21); 複數中央電路板（31_，其係㈣頂料層電路板（1〇) φ朝該底部外層電路板（20)具有W個中央電路板（MW)， 其中第一中央電路板（31a)相對於該頂部外層電路板（1〇)之 第一位置（11)形成有第一標示碼（311a)，且於相對於第二 位置至第η位置（12)處間隔穿設有相對於該等開口（13)的 複數第一穿孔（312a);而第X中央電路板（31b_h)相對於該 頂部外層電路板（10)之第x位置形成有第χ標示碼（3iib_ h)，以令該等標示碼（311a-h)的位置呈階梯狀排列，又在 相對於該x+1位置至n位置穿設有複數第χ穿孔（312b h)， • 且該第x中央電路板（31b-h)相對於該頂部外層電路板（1〇) 之第一位置（11)至第X-1的位置為實心結構（313bh)，其 中X為2至η-1 ; 複數絕緣層（40)，其係分別設置於該頂部外層電路板 (1〇)與中央電路板（31 a-h)之間、該底部外層電路板（2〇)與 中央電路板（31 a-h)之間以及各二中央電路板（31 a-h)之 間，該絕緣層（40)係由樹脂所組成。 請參看第三圖所示’其係本發明第一實施例之另一態 樣的多層電路板，其結構大致於上述態樣相同，其中不同 201136459 之處在於該等開口係相互聯通而形成從第一位置（1彳）至第 η位置（12)貫穿的貫口（13·)結構；而第一中央電路板（3叫 之該等第-穿孔對應於料貫口（13，）而形成從相對於該第 二位置至第η位置（12)貫穿的貫孔（312a·)結構；第X中央 電路板（31b-h)之該等帛x穿孔對應於該等貫口（13,)而形成 從相對於該x+1位置至置貫穿的貫孔（312b,_h,)結構。 請參看第四圖所示，其係本發明之第二實施例之一態 樣的多層電路板，其係包括： • 一頂部外層電路板（10)，其係於近一邊緣處從第一位 置（11)至第η位置（12)間隔穿設n個開口（13)，n為大於2 的整數； 一底部外層核心板（50)，其包括二底部外層電路板 (51)(52)，其中接近該頂部外層電路板（1〇)之上底部外層電 路板（51)相對於該頂部外層電路板（1〇)之第〇位置（12)形 成第η標示碼（511 )，而下底部外層電路板（52)則由實心結 構組成； 鲁 複數組核心板（60a)(60b)，其係從該頂部外層電路板 (1〇)朝該底部外層電路板（20)具有n-1組核心板 (60a)(60b) ’各組核心板（60a)(60b)包括二中央電路板 (61 a)(62a)(61 b)(62b)，其中第一組核心板（6〇a)接近該頂 部外層電路板（10)之上中央電路板（61a)，其第—位置（11) 形成有第一標示碼（611a)，且於相對於第二位置至第n位 置（12)處間隔穿設有相對於該等開口（彳3)的複數第一上穿 孔（61 2a)，而第一組核心板（60a)接近該底部外層核心板（5〇) 之下中央電路板（62a)，其第一位置（11)係呈實心結構 201136459 (621a)，而相對於第二位置至第n位置（12)處間隔穿設有 相對於該等第一上穿孔（612a)的複數第一下穿孔（621a); 而弟X組核心板（60b)接近該頂部外層電路板（1 〇)之上中央 電路板（61b)，其第X位置形成有第χ標示碼（61ib)，且於 相對於第x+1位置至第η位置（12)處間隔穿設有相對於該 等開口 (13)的複數第X上穿孔（612b)，該上中央電路板（61b) 相對於該頂部外層電路板（1〇)之第一位置（11)至第χ-1的 位置為實心結構（613b)，而第X組核心板（6〇b)接近該底部 φ 外層電路板（20)之下中央電路板（62b)，其第一位置（11)至 第X位置係呈實心結構（621 b)，而相對於第χ+1位置至第 π位置（12)處間隔穿設有相對於該等第X上穿孔（6i2b)的. 複數第X下穿孔（622b)，其中X為2至n-1 ; 複數絕緣層’其係分別設置於該頂部外層電路板（彳〇) 與核心板（60a)(60b)之間、該底部外層核心板（5〇)與核心 板（60a)(60b)之間' 各二核心板（60a)(60b)之間以及各核心 板（60a)(60b)之上中央電路板（61a)(61b)與下中央電路板 φ (62a)(62b)之間。 如同第一實施例，本發明之第二實施例之另一態樣的 結構大致於上述態樣相同’其中不同之處在於該等開口（1 3) 係相互聯通而形成從第一位置（11)至第η位置（12)貫穿的 貫口結構；各上中央電路板（61 a)(61b)之該等上穿孔 (612a)(612b)對應於該等開口（13)形成相互貫穿的貫孔結 構；各下中央電路板（62a)(62b)之該等下穿孔（6223)(6221)丨 對應於該等上穿孔（612a)(612b)形成相互貫穿的貫孔結 構0 201136459 請參看第五圖所示，其係以本發明之第—實施例作為 例示’當多層電路板組合完成後，檢查者能從頂部外斧電 路板（1_開口（13)進行檢查，若各層電路板依順序排列， 則會如圖所示於各個位置的開口（13)看到各層電路板的標 示碼（311 a - h)。 請參看第一及六圖所示，當中央電路板（3la_h)並未依 順序排列而產生錯置情形時，於圖中所示的情形係標示碼 (311幻為3的中央電路板（31(^與標示碼（311〇1)為4的中央 φ 電路板（31d)順序互調而錯置，因此標示碼（311 d)為4的中 央電路板（31d)之實心結構（311d)遮擋住標示碼3(3iic)(以 虛線表示），讓檢查者能夠輕易發現該等中央電路板（3ia_h) 有錯置的情形產生，而能即刻進行處理。 請參看第七圖所示，本發明之多層電路板總成係包括 兩個上述多層電路板，其中該等多層電路板之底部外層電 路板（20)係設置於一中央絕緣層的兩面，以令各多層電路 板之頂部外層電路板（10)設置於該多層電路板總成之外 鲁側。本發明之多層電路板總成係為了避免太多層電路板堆 疊，而讓絕緣層遮蔽接近底部之電路板的標示碼，所以將 所需的電路板分為兩組，讓檢查者能從該多層電路板總成 二外側之頂部外層電路板（10)進行檢查，故無需擔心因多 層電路板的堆疊而導致標示碼模糊不清的狀況。 本發明藉由電路板實心結構（313b-h)與穿孔（3l2a-hW士 構的配合，當各中央電路板（31 a-h)依順序排列時，從該頂 部外層電路板（10)的開口（13)能夠看到各中央電路板（31ah) 的4示示碼（311a-h)依序排列，一旦錯置，則中央電路板 201136459 (31a-h)的實心結構（313b_h)將會把錯置之中央電路板（31a_ h)的標示碼（3lia-h)遮蔽，故能輕易檢測中央電路板（31a_h) 排列之正破性。 【圖式簡單說明】 第一圖係本發明多層電路板第一實施例之一態樣的分 解部分俯視圖 第二圖係本發明多層電路板第一實施例之一態樣的部 分側面剖視圖。 φ 第三圖係本發明多層電路板第一實施例之另一態樣的 部分俯視分解圖。 第四圖係本發明多層電路板第二實施例之一態樣的部 分俯視分解圖。 第五圖係本發明多層電路板第一實施例之一態樣擺放 正確時的俯視圖。 第六圖係本發明多層電路板第一實施例之一態樣擺放 錯誤時的俯視圖。 • 第七圖係本發明之多層電路板總成的部分立體分解 圖。 第八圖係既有多層電路板的部分俯視分解圖。 【主要元件符號說明】 (10)頂部外層電路板（1 ”第一位置 (12) 第η位置 （13)開口 (13) 貫口 （2〇)底部外層電路板 (21)第η標示碼 （31a)第一中央電路板 12 201136459 (31b-h)第x中央電路板（311a)第—標糸瑀 (311 b-h)第X標示碼 (312a)第~~穿孔 (312a，）貫扎 (312b-h)第χ穿扎 (312b，-h')貫孔 (313b-h)實心結構 (40)絕緣層 (5 0)底部外層核心振 (51)(52)底部外層電路板（511)第〇標$碼 (60a)(60b)核心板 (6 0 a)第一組核心板 (60b)第X組核心板 (61a)(61b)上中央電路板 (611 a)第一標示碼 (612a)第一上穿孔 (621a)第一下穿孔 (611 b)第X標示碣 (61 2b)第X上穿孔 (613b)實心結構 (62a) (62b)下中央電路板 (621a) (621b)實心結構（622b)第X下穿孔 (70)位於頂部之外層電路板（71)開槽 (80a-h)(90)電路板 (81a)第一開槽 (81b)第二開槽 (81c)第三開槽 (82a-h)(91)標示碼 η 【： 13a top outer circuit board, which is spaced apart from the first position to the nth position by n openings, η is an integer greater than $; a bottom outer core board 'includes two bottom outer circuit boards, wherein The bottom outer circuit board above the top outer circuit board forms an nth identification code with respect to the nth position of the top outer circuit board, and the lower bottom outer circuit board is composed of a solid structure; the complex array core board is from the The top outer circuit board is disposed toward the bottom layer core plate..., the group core board, each group core board includes two central road boards, wherein the t-group core board is close to the upper circuit board upper circuit board, the first of which The position is formed with a first identification code, and at a spacing f relative to the first position to the nth position, a plurality of upper perforations are provided with respect to the openings, and the first set of core plates are adjacent to the bottom outer core: a road plate, The first position is a solid structure, and a plurality of lower perforations are formed with respect to the first-upper perforations relative to the second position:: the position of the X-th core plate is close to the top intrusion 4 outer circuit board The central board has an Xth mark formed at the Xth position, and the door is spaced through the position from the position to the η position; ΧΗ, DH, the opening of the plural number 201136459, the hole is pierced, the V is close to the bottom outer core, the board circuit The first position to the xth position of the plate are at a distance from the X+1th position to the door position of the center of the solid society, and are provided with a relative X-thperture with respect to the hole, wherein) <Nd; x is applied through a plurality of insulating layers' which are respectively disposed between the top outer core plate, between the bottom outer core plate and the core plate, between the / and the lower central beta circuit board 2: . The special openings of the board/the middle are interconnected to form a structure penetrating from the first position; the upper perforations of the upper central Leiwang Wangxiong circuit board corresponding to the openings form a mutually penetrating structure; The lower perforations of the circuit board correspond to the structures in which the upper perforations form a mutual penetration. The present invention also relates to a multi-layer lightning soft assembly [the system comprising two of the above-mentioned multilayer circuit boards, wherein the sturdy rattan belt is underneath... The bottom bottom outer layer of the outer core board of the circuit board is disposed at the central insulation The two sides of the layer are such that the top outer circuit board of each of the two circuit boards is disposed on the outer side of the multilayer circuit board assembly. With the central circuit board solid ishiqi # 败 , , · σ structure and the perforation structure, when the central circuit boards are arranged in order, the opening of the top outer circuit board can see the marking of each central circuit board @ , _ _ dislocation, then the central board is: The structure will shield the misplaced central circuit board's identification code, so it is easy to double-check the accuracy of the central circuit board arrangement. Moreover, the multi-layer circuit board assembly and the scoop allow the inspector to inspect from the outer outer circuit board of one of the outer sides, so that there is no need to worry about the ambiguity of the identification code due to the stacking of the multi-layer circuit boards. [Embodiment] 7 201136459 * Please refer to the first and second figures, which is a multilayer circuit board according to an aspect of the first embodiment of the present invention, which comprises: - a top outer circuit board (10), which is tied to An integer from the first position (1)) to the first (10) interval (10) opening (10) at a near edge; a bottom outer circuit board (20) that is opposite to the top outer circuit board (10) The η position (12) forms the nth identification code (21); the plurality of central circuit boards (31_, which are (4) the top layer circuit board (1〇) φ have W central circuit boards toward the bottom outer circuit board (20) ( MW), wherein the first central circuit board (31a) is formed with a first identification code (311a) with respect to the first position (11) of the top outer circuit board (1), and is opposite to the second position to the second A plurality of first through holes (312a) are formed at a position (12) spaced relative to the openings (13); and an Xth central circuit board (31b_h) is formed with respect to an xth position of the top outer circuit board (10) There is a Dijon identification code (3iib_h) to arrange the positions of the identification codes (311a-h) in a stepwise manner, and in relation to the x+ 1 position to n position is provided with a plurality of second hole perforations (312b h), and the xth central circuit board (31b-h) is opposite to the first position (11) of the top outer circuit board (1) The position of X-1 is a solid structure (313bh), where X is 2 to η-1; a plurality of insulating layers (40) are respectively disposed on the top outer circuit board (1 〇) and the central circuit board (31 ah) Between the bottom outer circuit board (2〇) and the central circuit board (31 ah) and between the two central circuit boards (31 ah), the insulating layer (40) is composed of resin. 3 is a multilayer circuit board according to another aspect of the first embodiment of the present invention, the structure of which is substantially the same as the above aspect, wherein the different 201136459 is that the openings are connected to each other to form a first position. (1彳) to the nth position (12) through the mouth (13·) structure; and the first central circuit board (3 called the first perforation corresponding to the material port (13,) formed from The through hole (312a·) structure through which the second position to the nth position (12) penetrates; the 帛x perforation pair of the Xth central circuit board (31b-h) The through holes (312b, _h,) are formed from the x+1 position to the through port (13). Referring to the fourth figure, it is a second embodiment of the present invention. A multi-layer circuit board comprising: a top outer circuit board (10) having n openings spaced from a first position (11) to an nth position (12) at a near edge (13), n is an integer greater than 2; a bottom outer core plate (50) comprising two bottom outer circuit boards (51) (52), wherein the bottom outer circuit is adjacent to the top outer circuit board (1 〇) The plate (51) forms a ηth designation code (511) with respect to the 〇 position (12) of the top outer circuit board (1〇), and the lower bottom outer circuit board (52) is composed of a solid structure; a plate (60a) (60b) having n-1 sets of core plates (60a) (60b) from the top outer circuit board (1) toward the bottom outer circuit board (20) 'each core plate (60a) (60b) includes two central circuit boards (61a) (62a) (61b) (62b), wherein the first set of core boards (6〇a) are adjacent to the central circuit board above the top outer circuit board (10) (6) 1a), the first position (11) is formed with a first identification code (611a), and is spaced apart from the second position to the nth position (12) with respect to the plurality of openings (彳3) a first upper perforation (61 2a), and the first set of core plates (60a) is adjacent to the central circuit board (62a) below the bottom outer core plate (5〇), the first position (11) of which is a solid structure 201136459 ( 621a), and a plurality of first lower perforations (621a) with respect to the first upper perforations (612a) are interposed with respect to the second position to the nth position (12); and the X-core plate (60b) a central circuit board (61b) above the top outer circuit board (1 〇), the Xth position is formed with a second identification code (61ib), and relative to the x+1th position to the ηth position (12) Intersecting a plurality of Xth upper perforations (612b) relative to the openings (13), the upper central circuit board (61b) being opposite the first position (11) of the top outer circuit board (1) to The position of the first χ-1 is a solid structure (613b), and the core group of the Xth group (6〇b) is close to the central circuit board (62b) below the bottom φ outer circuit board (20), the first The position (11) to the Xth position are solid structures (621b), and are spaced relative to the Xth upper perforations (6i2b) with respect to the χ+1 position to the πth position (12). a plurality of X-th lower perforations (622b), wherein X is 2 to n-1; a plurality of insulating layers are respectively disposed between the top outer circuit board (彳〇) and the core board (60a) (60b), the bottom a central circuit board (61a) between the outer core board (5〇) and the core board (60a) (60b) between the two core boards (60a) (60b) and the core boards (60a) (60b) ( 61b) is between the lower central circuit board φ (62a) (62b). As with the first embodiment, the structure of another aspect of the second embodiment of the present invention is substantially the same as the above-described aspect, wherein the openings (13) are interconnected to form a first position (11). a through-port structure penetrating to the nth position (12); the upper perforations (612a) (612b) of the upper central circuit boards (61a) (61b) corresponding to the openings (13) forming a mutual penetration The hole structure; the lower perforations (6223) (6221) of each lower central circuit board (62b) (62b) corresponding to the upper perforations (612a) (612b) forming a through-hole structure interpenetrating each other 0 201136459 See also As shown in the fifth figure, it is exemplified by the first embodiment of the present invention. 'When the multi-layer circuit board assembly is completed, the inspector can check from the top outer axe circuit board (1_opening (13), if each layer of the circuit board is In order of sequence, the identification code (311 a - h) of each layer of the circuit board is seen at the opening (13) of each position as shown in the figure. Please refer to the first and sixth figures, when the central circuit board (3la_h) When the misplacement occurs without being arranged in order, the situation shown in the figure is the identification code (311 magic 3 The central circuit board (31 (^) and the central φ circuit board (31d) with the identification code (311〇1) of 4 are mutually intermodulated and misplaced, so the solidity of the central circuit board (31d) with the identification code (311 d) of 4 The structure (311d) blocks the identification code 3 (3iic) (shown in phantom), allowing the examiner to easily find out that the central circuit board (3ia_h) is misplaced and can be processed immediately. See Figure 7 As shown, the multi-layer circuit board assembly of the present invention comprises two of the above-mentioned multilayer circuit boards, wherein the bottom outer circuit board (20) of the multi-layer circuit boards is disposed on both sides of a central insulating layer to enable each of the multi-layer circuit boards. The top outer circuit board (10) is disposed on the outer side of the multi-layer circuit board assembly. The multi-layer circuit board assembly of the present invention is used to shield the circuit board from the bottom layer in order to avoid stacking too many circuit boards. Code, so the required boards are divided into two groups, so that the inspector can check from the top outer circuit board (10) on the outer side of the multi-layer board assembly, so there is no need to worry about the marking due to the stacking of the multi-layer boards. Unclear code The present invention is formed by the solid structure (313b-h) of the circuit board and the perforation (3l2a-hW configuration), when the central circuit boards (31 ah) are sequentially arranged, from the top outer circuit board (10) The opening (13) can see that the four display codes (311a-h) of the central circuit boards (31ah) are sequentially arranged. Once misplaced, the solid structure (313b_h) of the central circuit board 201136459 (31a-h) will be The misplaced central circuit board (31a_h) is shielded by the identification code (3lia-h), so the positive break of the central circuit board (31a_h) arrangement can be easily detected. BRIEF DESCRIPTION OF THE DRAWINGS The first drawing is a partial plan view of an aspect of a first embodiment of a multilayer circuit board of the present invention. The second drawing is a partial side sectional view showing an aspect of the first embodiment of the multilayer circuit board of the present invention. φ Fig. 3 is a partially exploded perspective view showing another aspect of the first embodiment of the multilayered circuit board of the present invention. Fig. 4 is a partially exploded perspective view showing an aspect of a second embodiment of the multilayered circuit board of the present invention. The fifth drawing is a plan view showing a state in which the first embodiment of the multilayered circuit board of the present invention is placed correctly. Fig. 6 is a plan view showing a state in which the first embodiment of the multilayer circuit board of the present invention is placed in an error. • Figure 7 is a partial exploded perspective view of the multilayer circuit board assembly of the present invention. The eighth figure is a partial exploded view of a multilayer circuit board. [Description of main component symbols] (10) Top outer circuit board (1 ” first position (12) η position (13) opening (13) through port (2 〇) bottom outer circuit board (21) η identification code ( 31a) First central circuit board 12 201136459 (31b-h) xth central circuit board (311a) first - standard (311 bh) Xth identification code (312a) ~ ~ perforation (312a,) through (312b -h) Dijon threading (312b, -h') through hole (313b-h) solid structure (40) insulation layer (50) bottom outer core vibration (51) (52) bottom outer circuit board (511) $ mark $ code (60a) (60b) core board (60 a) first group core board (60b) group X core board (61a) (61b) on the central circuit board (611 a) first identification code (612a) First upper perforation (621a) first lower perforation (611b) Xth mark 61 (61 2b) Xth upper perforation (613b) solid structure (62a) (62b) lower central circuit board (621a) (621b) solid Structure (622b) Xth lower perforation (70) is located at the top outer layer circuit board (71) slotted (80a-h) (90) circuit board (81a) first slotted (81b) second slotted (81c) Three slots (82a-h) (91) indicate code η [: 13