TW201133759A - Trimming circuit - Google Patents

Trimming circuit Download PDF

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Publication number
TW201133759A
TW201133759A TW99108926A TW99108926A TW201133759A TW 201133759 A TW201133759 A TW 201133759A TW 99108926 A TW99108926 A TW 99108926A TW 99108926 A TW99108926 A TW 99108926A TW 201133759 A TW201133759 A TW 201133759A
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TW
Taiwan
Prior art keywords
switch
adjustment
voltage
output
current
Prior art date
Application number
TW99108926A
Other languages
Chinese (zh)
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TWI393235B (en
Inventor
Chao-Wen Chiu
Original Assignee
Himax Analogic Inc
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Application filed by Himax Analogic Inc filed Critical Himax Analogic Inc
Priority to TW99108926A priority Critical patent/TWI393235B/en
Publication of TW201133759A publication Critical patent/TW201133759A/en
Application granted granted Critical
Publication of TWI393235B publication Critical patent/TWI393235B/en

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Abstract

A trimming circuit is provided. The trimming circuit had at least a trimming cell, and each of the at least trimming cells includes three current paths and a fuse. A first one of the current paths is interrupted when a second one of the current paths is uninterrupted, and the first one of the current paths is uninterrupted when the second one of the current paths is interrupted. When a trimming control signal is at an enable state, a third one of the current paths is uninterrupted, such that the fuse is blown. Based on the status of the fuse, the trimming circuit is capable of trimming an output voltage or an output current of an electric apparatus.

Description

201133759 —^-0013-TW 33I42twfdoc/n 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種調整電路,且特 調整封裝積體電路(integrated circuit,: 關於種 /1^祠整電路。 【先前技術】 -取吃傾肢私格的過程中,積體電 能因為製簡偏差㈣生漂移。嫩1,「 可 定為1 3V,伯县%-TAt π上 瑪』出甩壓原本為預 = 1.3V’但最後可能因為製程的偏差 二電了氣二:?致在設計電路時的= 路製程;素’除了使積體電 特性。 碰的射—驗漂移的電氣 #統的調整技術包括雷、户敫 ^。例如,在㈣或雷射調整方 ^=::路藉_以= :的雷射切; = 行積體電 電路晶片後電氣特=進=路 ;::=,封_電路晶广 ,圖:封=體:^=路晶片5。 電路54。 ϋ具有多個焊墊52和核心 核心電路54被龍於積體電路晶片冗中,並電性 201133759 HA-2009-〇〇13-TW 33142twf.doc/n 連接至焊塾52。由於核心電路54被封裝,因此很難去調 整核心電路54漂移的電氣特性。 【發明内容】 本發明提供一種電子裝置的調整電路,即使電子裝 置為-封裝積體電路晶片仍可方便地調整其電氣特性。、 本發明提出-種調整電路,包括至少—調整單元,夂 調整單元包括驅動單元、保險絲、第—電流路徑、第二^ 流路徑以及第三電流路徑。其巾單元減輸人訊號與 控制訊號。第-電流路徑包括串接的第—開關和第二 開關,第一電流路徑耦接於系统電壓與保險絲之間。第二 路#包括第二開關n流路徑轉接於系統電壓與 第一開關和第二開關的共同接點之間。另外,第三電流路 徑輕接.於系統電壓與保險絲之間。其中第—開關、Z開 關以及第三開關依據輸入訊號而被開啟或關閉。 ^在本發明之一實施例中,當輸入訊號為第一狀態時, 第一開關與第二開關被關閉,而第三開關被開啟。 在本發明之一實施例中,上述之第三電流路徑包括第 =開關,當輸入訊號在第一狀態且調整控制訊號為致能狀 悲,第四開關被開啟以燒毁保險絲。 々在本發明之一實施例中,當輸入訊號為第二狀態時, 第一開關與第二開關被開啟,而第三開關被關閉。 在本發明之一實施例中,上述之調整電路的輸出端耦 接至第一開關與第二開關的共同接點,當輸入訊號在第一 201133759 ΗΑ-ζυυν-0013-TW 33142twf.doc/n 狀態時’輸出端的電壓準位在第一狀態,且保險絲不被燒 毀。 在本發明之一實施例中,上述之調整電路的輸出端耦 接至第-開關與第二開關的共同接點,#輪人訊號在第二 狀態時’輸出端的電壓準位在第二狀態,且保險絲不被燒 毁。 ,本發明之—實施例中,上述之調整電路的輸出端搞 -關鮮二開關的共同接點,當保險絲被燒毁 守’輸出端的電屋準位在第一狀態。 在^明之—實施例中,上述之驅動_包括第二反 二=相器以及反及閉。其中第二反相器的輸出端 弟―反相器接收輸人訊號,第—反相器的 ^外轉接弟二反相器的輸人端、第二開關與第三開關。 ’反及閘之兩輸人端接收調整控制訊號和反 喊’反及_輸出端難接第四„。 在本^明之一貫施例中,上述之一三 與第四開關為PMOS電s触&外 一碣關 辦。 …电日日肢,而第二開關為NMOS電晶 一電發^之—實_巾’上述之m路徑更包括 =6、,電流源祕於系統電壓與第—關之間。 —電阻本ί日月之—貫施例巾,上述之第三1流路徑更包括 電ρ ’電_接於第四開關與保險絲之間。 整單元本,之—5施例中,上述之調整單元包括第〜調 弟一調整單凡與串接的多個電壓調節器,而調整 201133759 n/\-zuwW13,TW 33142twfdoc/n 电路更㈣m源以及第-電阻。其中第—電_接電流 源,用以提供-調整電遷。串接的多個電麼調節 整電屋’各電Μ調節器包括—第二電阻以及盘第^ = 聯的-電晶體。其中電壓調節器的第—電壓調節::、曰 體整單元的輪出端,而電跑騎器的i日 ㈣的電晶體之閑爾第二調整單元的輸出 在本發明之-實施例中,上述之調整電路 -反相器、第二反相器以及第三反相器。 調整單元的輸出端與第—電: 之閘極。第三反相器串接第二反相器。曰曰肢 器的電晶體之間_接透過第二反相⑼t電壓調節 第二調整單元的輸出端。 。〃弟二反相器耦接 整單單元包括多個調 調節器包括第—電流源;第:開;:即電阻。其中各 對應的上述調整單元之-的輸 則轉接调節器,用以提供-調整電壓。的魏。電阻 在本發日月之—實施例中,上述各 =與苐六開關,第二電流源串接耦接第二電流 :對應的調整單元的輸刪,使得’第六開關受控 於對,上述調整單元之一的輸出電c開關受控 本發明之—實施例中,上述之; I早π,調整電路更包括多個調 整早4括多個調 。與—電流鏡。其中各 201133759 n^uu?-〇〇13-TW 33142twf.doc/n 調節器包括電赫鮮, ,對應的上述調整單元之一的―輸_=開: =鏡則耦接調節器’以提供—調整電流。其中調整電流依 據電流鏡所接絲自第—電流源的電流而被調整。 # 之/施例中,上述各調節Ε -接第二電流 屬Μ弟/、開關’第二電流源串接笛丄 ^ 於對應的上述調整單元之—的輸出電;:使 開關應的上述調整單元之—的輸出.電_變化。 調整電路的調值可在進行被 期望值後,調整控制訊號用 或·電流的 或調整電流至期望值。因此,即正調整電壓 展成積體電路晶片,賴整電路^ ^路已經被封 電路進行修正。 电軋特性仍可藉由調整 舉實上述特徵和優點能更明顯㈣,下文特 ,並配合所附圖式作詳細說明如下㈣下文斗寸 【實施方式】 本發明提供一種調整電子裝置 :子裝置例如是積體電路、電路板或::。被調整的 片。調整電路可騎調整的電子裝t封裝的積體電路晶 電子裝置外。調整電路包括至少—調^:部分或是獨立於 « 2繪示為本發明—實施敎= 早①。請參照圖2。 體電路晶片⑽的方塊圖的封裝積 私電路晶片100包括調 201133759 HA-2009-0013-TW 33142twf.doc/n 整電路110和核心電路120。調整電路11〇用以根據輸入 訊號A1-A3和調整控制訊號St調整核心電路120。輸入訊 號A1-A3和調整控制訊號St經由積體電路晶片1〇〇的焊 墊102被傳送至調整電路110。調整電路n〇包括三個用 以輸出輸出訊號T1-T3的調整單元200。調整電路no提 供調整電壓Vref或調整電流Iref至核心電路120。值得注 意的是,調整單元200的數量可為任何正整數。例如,在 本發明的一實施例中,調整電路110包括一個調整單元 200。再者’在本發明的另一實施例中,調整電路ho包括 兩個或更多的調整單元200。另外,在本實施例中,輸入 訊號A1-A3依序地經由單一的焊墊1〇2被傳送至調整電路 110。然而’在本發明的另一實施例中,輸入訊號A1-A3 可分別經由不同的焊墊102被傳送至調整電路110。 在本實施例中,各個調整單元2〇〇中皆包括一保險絲 250。當在致能狀態接收調整控制訊號&而輸入訊號Αχ 在第一狀態時,不管參數X為1、2或3 ,對應的調整單元 中的保險絲250會被燒毁。換言之,當輸入訊號Αχ在第 一狀態時,調整控制訊號St用以燒毀對應調整單元200的 保險絲250。相反地’當調整控制訊號以為禁能狀態時, 保險絲250不被燒毁。另外,若保險絲25〇未被燒毁,對 應輸出電壓TX的狀態與對應的輸入訊號St的狀態相同。 而當保險絲250被燒毀時,對應的輸出電壓τχ的狀態為 第一狀態。更多有關調整單元2〇〇的操作如下所述。 在本實施例中’輸入訊號Α1-Α3為數位訊號。各個輪 201133759 πΛ-ζυυ^-ΟΟ 13-TW 33142twf.doc/n 入訊號A1-A3包括一個1位元的位元碼,用以控制對應調 整單元200。在調整核心電路12〇期間。輸入訊號a1-A3 的位元逐步地改變。例如,輸入訊號A1-A3的位元碼可依 序地改變至“000”,“〇〇1”,“〇1〇”,“〇11”,“1〇〇”,, “110”和“111”。在本實施例中,若輸入訊號A1-A3其中之 一的位元碼為“Γ’’其表示對應的輸入訊號為第一狀態。若 輸入訊號A1-A3其中之一的位元碼為“〇,,,其表示對應的 鲁 輸入訊號為第二狀態。當改變輸入訊號A1-A3的位元石馬 時’調整電壓Vref或調整電流Iref相應地被調整。因此, 調整電壓Vref或調整電流Iref的期望值可在調整單元2〇〇 的保險絲250被燒毁前,藉由依序地改變輸入訊號A1_A3 的位元碼而被決定。 輸入訊號A1-A3的位元碼被輸入至對應調整電壓 Vref的期望值的調整單元2〇〇,或對應已決定的調整電流 Iref的調整單元200,而調整控制訊號St由禁能狀態改變 至致能狀態,使得被選擇的保險絲25〇(或單一被選擇的保 險絲250)依據輸入訊號A1-A3的位元碼(或狀態)被燒毀, 使調整電壓Vref或調整電流Iref可被調整至期望值。在被 選擇的保險絲250(或單一被選擇的保險絲25〇)依據輸 入訊 號A1-A3的位元碼被燒毁後,調整核心電路12〇的操作便 告完成。在本實施例中,當結束調整核心電路12〇的操作 後,輸入sfl號A1-A3的位元碼被維持在“〇〇〇,,。 请蒼照圖3。圖3緣示為本發明—實施例之調整電路 的調整單元200的方塊圖。各個調整單元2〇〇包括驅動單 201133759 HA-2009-0013-TW 33142twf.doc/n 元210、第一電流路徑220、第二電流路徑230、第三電流 路徑240和保險絲250。第一電流路徑220和第三電流路 徑240皆耦接於系統電壓Vdd和保險絲250之間。第—電 流路徑220包括第一開關222與第二開關224。第—開關 222串接第二開關224。第二電流路徑230耦接於系統電壓 Vdd和第一開關222與第二開關224的共同接點A。第三 電流路徑240包括第四開關242。 輸入§fl號AX和调整控制訊號St被輸入至驅動單元 210以控制開關222、224、232和242的操作。第—開關 222、第二開關224、第三開關232的開關狀態對應輸入訊 號AX的變化而改變,而第四開關242的開關狀態對應輸 入訊號AX和調整控制訊號St的變化而改變。輸入訊號 AX由第一狀態變化至第二狀態或由第二狀態變化至第一 狀態。類似地,調整控制訊號St由禁能狀態變化至致能狀 態或由致能狀態變化至禁能狀態。在本發明的一實施例 中’輸入訊號AX在第一狀態的電壓準位為高電壓準位而 在第二狀態的電壓準位為低電壓準位。調整控制訊號St 在禁能狀態的電壓準位為高電壓準位而在致能狀態的電壓 準位為低電壓準位。然而,本發明不以此為限。 請參照圖4。圖4繪示為本發明一實施例之輸入訊號 AX在第一狀態且調整控制訊號St在禁能狀態時的調整單 元200的方塊圖。在本實施例中,當輸入訊號Αχ在第一 狀態時’第一開關222和第二開關224被關閉,而,第三開 關232被開啟。因此,第一電流路徑22〇被中斷,而第二 201133759 tm-/uuy-0013-TW 33142twf.doc/n 電流路徑230被連接。另外,由於調整控制訊號St為禁能 狀態’第四開關242也被關閉,使得第三電流路徑24〇被 中斷。由於第二電流路徑230被接通,調整單元2〇〇的輸 出端260耦接至系統電壓Vdd,輸出端260的輸出電壓TX 為高電壓準位(亦即在第一狀態)。總言之,在圖4之實施 例中,當輸入訊號AX在第一狀態而調整控制訊號st在禁 能狀態時,輸出電壓TX為第一狀態。 請參照圖5。圖5緣示為輸入訊號AX在第二狀態而 調整控制訊號St在禁能狀態時調整單元200的方塊圖。當 輸入訊號AX在第二狀態時,第一開關222和第二開關224 被開啟’而第三開關232被關閉。因此,第一電流路徑220 被連接,而第二電流路徑230被中斷。當調整控制訊號St 在禁能狀態時,第四開關242被關閉,使得第三電流路徑 240被中斷。由於第一電流路徑220被連接,電流源226 的電流II流經第一開關222、第二開關224和保險絲250。 電流源226的電流II為微小電流,因而保險絲250不會被 流經第一開關222的電流II燒毁。另外,由於電流源226 的阻抗遠大於保險絲250的阻抗,輸出電壓TX被拉低(亦 即在第二狀態)。總言之,在圖5之實施例中,當輸入訊號 AX在第二狀態而調整控制訊號St在禁能狀態時,輸出電 壓TX在第二狀態。 請參照圖6。圖6繪示為輸入訊號AX在第一狀態而 調整控制訊號St在致能狀態時調整單元200的方塊圖。如 圖6所示,當輸入訊號AX在第一狀態,第一開關222和 11 201133759 HA-2009-0013-TW 33142twf.doc/n 第二開關224被關閉,而第三開關232被開啟。因此,第 一電流路徑220被中斷,而第二電流路徑230被連接。當 調整控制訊號St在致能狀態而輸入訊號AX在第一狀態 時’第四開關242被開啟’使得第三電流路徑240被連接。 由於第三電流路徑240被連接,來自系統電壓Vdd的電流 12流經電阻244和保險絲250而流向接地GND。其中電流 12大到足以燒毀保險絲250。因此,當調整控制訊號St由 禁能狀態改變至致能狀態’輸入訊號AX在第一狀態時, 保險絲250將被電流12燒毀。 · 請參照圖7。圖7繪示為保險絲25〇被燒毁時調整單 元200的方塊圖。第一電流路徑220和第二電流路徑230 其中之一被中斷,而調整單元2〇〇的輸出端260耦接至系 統電壓Vdd。例如,第一電流路徑22〇可被中斷而第二電 流路徑230被連接,如圖7所示。相反地,在其他實施例 中,第二電流路徑230可被中斷而第一電流路徑22〇被連 接。由於保險絲250被燒毁,調整單元200的輸出端26〇 與接地GND間的連接被切斷,並經由電流路徑22〇和23〇 φ 其中之一耦接至系統電壓Vdd。因此,保險絲25〇被燒毁 而輸出電壓TX為南電壓準位(亦即第一狀態)。 請参照圖8。圖8繪示為本發明一實施例之調整單元 2〇〇的電路圖。調整單元200的驅動單元210包括第一反 相态712、第二反相器714以及反或閘716。調整單元2〇〇 的包括、電流源226、第一開關Qi以及第二開關Q2。調 整單70 200的第二電流路徑230包括第三開關Q3,調整單 12 201133759 X Λ^ί L· v Ν·/201133759 —^-0013-TW 33I42twfdoc/n VI. Description of the Invention: [Technical Field] The present invention relates to an adjustment circuit, and an integrated package circuit (integrated circuit,: [Prior Art] - In the process of taking the peculiarity of the body, the integrated electrical energy drifts due to the deviation (4). Nen 1, "can be set to 1 3V, Bo County %-TAt π上玛" Originally pre-=1.3V' but in the end may be due to the deviation of the process two electric two: the circuit in the design of the circuit = [in addition to the electrical characteristics of the integrated body. The adjustment techniques include mine, household 敫 ^. For example, in (4) or laser adjustment side ^=:: road borrowing _ to =: laser cutting; = line integral electrical circuit chip after electrical special = incoming = road; :=, seal_circuit crystal wide, figure: seal = body: ^ = road wafer 5. Circuit 54. ϋ has a plurality of pads 52 and the core core circuit 54 is entangled in the integrated circuit chip, and electrical 201133759 HA-2009-〇〇13-TW 33142twf.doc/n is connected to the soldering iron 52. Since the core circuit 54 is packaged, it is difficult to adjust The present invention provides an adjustment circuit for an electronic device that can easily adjust its electrical characteristics even if the electronic device is a packaged integrated circuit chip. The present invention proposes an adjustment circuit. Including at least an adjustment unit, the adjustment unit includes a driving unit, a fuse, a first current path, a second current path, and a third current path. The towel unit reduces the input signal and the control signal. The first current path includes the serial connection. a first switch and a second switch, the first current path is coupled between the system voltage and the fuse. The second path # includes the second switch n flow path is switched to the common contact between the system voltage and the first switch and the second switch In addition, the third current path is lightly connected between the system voltage and the fuse, wherein the first switch, the Z switch, and the third switch are turned on or off according to the input signal. ^ In an embodiment of the present invention, When the input signal is in the first state, the first switch and the second switch are turned off, and the third switch is turned on. In an embodiment of the present invention, the above The three current path includes a third switch, when the input signal is in the first state and the control signal is adjusted to be sorrowful, the fourth switch is turned on to burn the fuse. In an embodiment of the invention, when the input signal is the first In the second state, the first switch and the second switch are turned on, and the third switch is turned off. In an embodiment of the invention, the output end of the adjusting circuit is coupled to the common connection between the first switch and the second switch Point, when the input signal is in the first 201133759 ΗΑ-ζυυν-0013-TW 33142twf.doc/n state, the voltage level of the output terminal is in the first state, and the fuse is not burned. In an embodiment of the present invention, the output end of the adjusting circuit is coupled to the common contact of the first switch and the second switch, and the voltage signal of the output terminal is in the second state when the wheel signal is in the second state. And the fuse is not burned. In the embodiment of the present invention, the output of the above-mentioned adjustment circuit engages with the common contact of the fresh switch, and when the fuse is burned, the electric house of the output terminal is in the first state. In the embodiment, the above-described driving_includes the second inverse two-phase phase and the inverse and closed. The output of the second inverter, the inverter, receives the input signal, and the output of the first inverter is the input end of the second inverter, the second switch and the third switch. 'The two inputs of the opposite gate receive the adjustment control signal and the anti-spoken 'reverse _ output is difficult to connect to the fourth „. In the consistent example of this ^ Ming, one of the above three and the fourth switch is a PMOS electric s touch & outside the office. ... electric day and limb, and the second switch is NMOS electric crystal, an electric hair ^ - real _ towel 'the above m path also includes = 6,, the current source is secret system voltage and the first - between the two. - Resistor ί 日月-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- In the example, the adjustment unit includes a plurality of voltage regulators that are adjusted to be connected to the series, and adjust the 201133759 n/\-zuwW13, TW 33142twfdoc/n circuit to further (4) m source and the first resistance. —Electrical_connected to the current source to provide-adjust the electromigration. The multiple electric devices connected in series adjust the electric house's respective electric switch regulators to include the second resistor and the disk ^^-connected-transistor. The voltage-regulation of the regulator::, the wheel-out end of the body unit, and the transistor of the i-day (four) of the electric runner The output of the second adjustment unit is in the embodiment of the invention, the above-mentioned adjustment circuit - the inverter, the second inverter and the third inverter. The output of the adjustment unit and the gate of the first - electricity: The third inverter is connected in series with the second inverter. The output of the second adjusting unit is adjusted by the second inverting (9)t voltage between the transistors of the limbs. The second inverter is coupled to the whole single unit. The element includes a plurality of regulators including a first current source; a first: open; a resistor, wherein each of the corresponding adjustment units of the current adjustment regulator is used to provide a voltage adjustment. In the embodiment of the present invention, each of the above-mentioned = and six-switches, the second current source is coupled in series with the second current: the corresponding adjustment unit is deleted or deleted, so that the sixth switch is controlled by the pair, The output of one of the adjustment units is controlled by the present invention. In the embodiment, the above-mentioned; I is early π, and the adjustment circuit further comprises a plurality of adjustments, including a plurality of adjustments, and a current mirror. Each of the 201133759 n^ Uu?-〇〇13-TW 33142twf.doc/n regulator includes electric fresh, corresponding to the above adjustment One of the yuan's "transmission_=open: = the mirror is coupled to the regulator' to provide - adjust the current. The adjustment current is adjusted according to the current from the current source of the current mirror. # / / , the above-mentioned respective adjustments - the second current is the younger brother /, the switch 'the second current source is connected to the flute ^ to the corresponding adjustment unit - the output power; the output of the above-mentioned adjustment unit of the switch should be The value of the adjustment circuit can be adjusted after the desired value is adjusted, or the current is adjusted or the current is adjusted to the desired value. Therefore, the voltage is adjusted to form the integrated circuit chip, and the circuit is integrated. It has been corrected by the circuit. The electric rolling characteristics can still be more obvious by adjusting the above-mentioned features and advantages (4), and the following is a detailed description with reference to the following figures. (4) The following is an embodiment. The present invention provides an adjustment electronic device: a sub-device For example, an integrated circuit, a circuit board, or ::. The piece that was adjusted. The adjustment circuit can be mounted on an external electronic device outside the packaged electronic package. The adjustment circuit includes at least - a part: or is independent of « 2 as the invention - implementation 敎 = early 1. Please refer to Figure 2. The packaged private circuit chip 100 of the block diagram of the bulk circuit die (10) includes a modulation circuit 201133759 HA-2009-0013-TW 33142 twf.doc/n integer circuit 110 and core circuit 120. The adjusting circuit 11 is configured to adjust the core circuit 120 according to the input signals A1-A3 and the adjustment control signal St. The input signals A1-A3 and the adjustment control signal St are transmitted to the adjustment circuit 110 via the pad 102 of the integrated circuit chip 1''. The adjustment circuit n〇 includes three adjustment units 200 for outputting the output signals T1-T3. The adjustment circuit no provides an adjustment voltage Vref or an adjustment current Iref to the core circuit 120. It is worth noting that the number of adjustment units 200 can be any positive integer. For example, in an embodiment of the invention, the adjustment circuit 110 includes an adjustment unit 200. Further, in another embodiment of the present invention, the adjustment circuit ho includes two or more adjustment units 200. Further, in the present embodiment, the input signals A1 - A3 are sequentially transferred to the adjustment circuit 110 via a single pad 1 〇 2 . However, in another embodiment of the invention, the input signals A1-A3 may be transmitted to the adjustment circuit 110 via different pads 102, respectively. In this embodiment, each of the adjustment units 2 includes a fuse 250. When the adjustment control signal & is received in the enabled state and the input signal Αχ is in the first state, the fuse 250 in the corresponding adjustment unit is burned regardless of the parameter X being 1, 2 or 3. In other words, when the input signal Αχ is in the first state, the control signal St is adjusted to burn the fuse 250 corresponding to the adjustment unit 200. Conversely, when the control signal is adjusted to the disabled state, the fuse 250 is not burned. Further, if the fuse 25 is not burned, the state corresponding to the output voltage TX is the same as the state of the corresponding input signal St. When the fuse 250 is burnt, the state of the corresponding output voltage τ 为 is the first state. More details on the operation of the adjustment unit 2〇〇 are as follows. In the present embodiment, the input signals Α1-Α3 are digital signals. Each round 201133759 πΛ-ζυυ^-ΟΟ 13-TW 33142twf.doc/n The incoming signal A1-A3 includes a 1-bit bit code for controlling the corresponding adjusting unit 200. During the adjustment of the core circuit 12〇. The bits of the input signals a1-A3 are changed step by step. For example, the bit code of the input signal A1-A3 can be sequentially changed to "000", "〇〇1", "〇1〇", "〇11", "1〇〇", "110" and " 111”. In this embodiment, if the bit code of one of the input signals A1-A3 is “Γ”, it indicates that the corresponding input signal is in the first state. If the bit code of one of the input signals A1-A3 is “ 〇,,, which indicates that the corresponding Lu input signal is in the second state. When the bit stone of the input signal A1-A3 is changed, the adjustment voltage Vref or the adjustment current Iref is adjusted accordingly. Therefore, the desired value of the adjustment voltage Vref or the adjustment current Iref can be determined by sequentially changing the bit code of the input signal A1_A3 before the fuse 250 of the adjustment unit 2 is burned. The bit code of the input signal A1-A3 is input to the adjustment unit 2〇〇 corresponding to the desired value of the adjustment voltage Vref, or the adjustment unit 200 corresponding to the determined adjustment current Iref, and the adjustment control signal St is changed from the disable state to the disable state. The energy state is such that the selected fuse 25A (or a single selected fuse 250) is burned according to the bit code (or state) of the input signal A1-A3, so that the adjustment voltage Vref or the adjustment current Iref can be adjusted to a desired value. After the selected fuse 250 (or a single selected fuse 25A) is burned according to the bit code of the input signal A1-A3, the operation of adjusting the core circuit 12A is completed. In the present embodiment, after the operation of adjusting the core circuit 12A is completed, the bit code of the input sfl number A1-A3 is maintained at "〇〇〇,, please see FIG. 3. The edge of FIG. 3 is shown as the present invention. - Block diagram of the adjustment unit 200 of the adjustment circuit of the embodiment. Each adjustment unit 2 includes a drive list 201133759 HA-2009-0013-TW 33142twf.doc/n element 210, a first current path 220, and a second current path 230 The third current path 240 and the fuse 250. The first current path 220 and the third current path 240 are both coupled between the system voltage Vdd and the fuse 250. The first current path 220 includes a first switch 222 and a second switch 224. The first switch 222 is connected in series with the second switch 224. The second current path 230 is coupled to the system voltage Vdd and the common contact A of the first switch 222 and the second switch 224. The third current path 240 includes a fourth switch 242. The §fl AX and the adjustment control signal St are input to the driving unit 210 to control the operations of the switches 222, 224, 232, and 242. The switching states of the first switch 222, the second switch 224, and the third switch 232 correspond to the input signal AX. Change while changing, and the fourth switch 242 The switch state changes according to the change of the input signal AX and the adjustment control signal St. The input signal AX changes from the first state to the second state or from the second state to the first state. Similarly, the adjustment control signal St is disabled. The state changes to the enabled state or changes from the enabled state to the disabled state. In an embodiment of the invention, the voltage level of the input signal AX in the first state is a high voltage level and the voltage level in the second state is The bit is at a low voltage level, and the voltage level of the control signal St in the disabled state is a high voltage level and the voltage level in the enabled state is a low voltage level. However, the present invention is not limited thereto. Referring to FIG. 4, FIG. 4 is a block diagram of an adjusting unit 200 when the input signal AX is in the first state and the control signal St is in the disabled state according to an embodiment of the present invention. In this embodiment, when the signal is input Αχ In the first state, the first switch 222 and the second switch 224 are turned off, and the third switch 232 is turned on. Therefore, the first current path 22 is interrupted, and the second 201133759 tm-/uuy-0013-TW 33142twf.doc/n current path The path 230 is connected. In addition, since the adjustment control signal St is in the disabled state, the fourth switch 242 is also turned off, so that the third current path 24 is interrupted. Since the second current path 230 is turned on, the adjustment unit 2〇〇 The output terminal 260 is coupled to the system voltage Vdd, and the output voltage TX of the output terminal 260 is at a high voltage level (ie, in the first state). In summary, in the embodiment of FIG. 4, when the input signal AX is at the When the state is adjusted and the control signal st is in the disabled state, the output voltage TX is in the first state. Please refer to Figure 5. Figure 5 is a block diagram showing the adjustment unit 200 when the input signal AX is in the second state and the control signal St is in the disabled state. When the input signal AX is in the second state, the first switch 222 and the second switch 224 are turned "on" and the third switch 232 is turned off. Therefore, the first current path 220 is connected and the second current path 230 is interrupted. When the adjustment control signal St is in the disabled state, the fourth switch 242 is turned off, causing the third current path 240 to be interrupted. Since the first current path 220 is connected, the current II of the current source 226 flows through the first switch 222, the second switch 224, and the fuse 250. The current II of the current source 226 is a small current, so that the fuse 250 is not burned by the current II flowing through the first switch 222. Additionally, since the impedance of current source 226 is much greater than the impedance of fuse 250, output voltage TX is pulled low (i.e., in the second state). In summary, in the embodiment of Fig. 5, when the input signal AX is in the second state and the control signal St is in the disabled state, the output voltage TX is in the second state. Please refer to Figure 6. FIG. 6 is a block diagram showing the adjustment unit 200 when the input signal AX is in the first state and the control signal St is in the enabled state. As shown in FIG. 6, when the input signal AX is in the first state, the first switch 222 and the 11201133759 HA-2009-0013-TW 33142twf.doc/n second switch 224 are turned off, and the third switch 232 is turned on. Therefore, the first current path 220 is interrupted and the second current path 230 is connected. When the adjustment control signal St is in the enable state and the input signal AX is in the first state, the fourth switch 242 is turned on, so that the third current path 240 is connected. Since the third current path 240 is connected, the current 12 from the system voltage Vdd flows through the resistor 244 and the fuse 250 to the ground GND. The current 12 is large enough to burn the fuse 250. Therefore, when the adjustment control signal St is changed from the disabled state to the enabled state, the input signal AX is in the first state, and the fuse 250 is burned by the current 12. · Please refer to Figure 7. Figure 7 is a block diagram showing the adjustment unit 200 when the fuse 25 is burned. One of the first current path 220 and the second current path 230 is interrupted, and the output terminal 260 of the adjustment unit 2A is coupled to the system voltage Vdd. For example, the first current path 22A can be interrupted and the second current path 230 can be connected, as shown in FIG. Conversely, in other embodiments, the second current path 230 can be interrupted while the first current path 22 is connected. Since the fuse 250 is burnt, the connection between the output terminal 26 of the adjustment unit 200 and the ground GND is cut off, and is coupled to the system voltage Vdd via one of the current paths 22A and 23〇φ. Therefore, the fuse 25 is burned and the output voltage TX is at the south voltage level (i.e., the first state). Please refer to Figure 8. FIG. 8 is a circuit diagram of an adjustment unit 2A according to an embodiment of the present invention. The driving unit 210 of the adjusting unit 200 includes a first inverted phase 712, a second inverter 714, and a reverse OR gate 716. The adjustment unit 2A includes, the current source 226, the first switch Qi, and the second switch Q2. The second current path 230 of the adjustment unit 70 200 includes a third switch Q3, the adjustment order 12 201133759 X Λ^ί L· v Ν·/

>0013-TW 33142twf.doc/n 元200的弟二電流路控240包括第四開關Q4。在本實施例 中,各個第一開關Q1、第三開關Q3以及第四開關q4為 PMOS電晶體,而第二開關Q2為NMOS電晶體。第—反 相器712接收輸入訊號AX,第一反相器712的輸出端耦 接至第二反相器714的輸入端、第二開關Q2和第三開關 Q3。第二反相器714的輸出端耦接至第一開關Q1,而反 或閘716的兩輸入端分別接收調整控制訊號St和反相輸入 訊號石。反或閘716的輪出單耦接至第四開關q4。因此, _ 當輸入訊號AX為高電壓準位時(亦即在第一狀態),第— 開關Q1和第二開關Q2被關閉’第三開關Q3被開啟。當 輸入訊號AX為低電壓準位時(亦即第二狀態),第—開關 Q1和第二開關Q2被開啟,而第三開關Q3被關閉。當輸 入訊號AX為高電壓準位(亦即在第一狀態)而調整控制訊 號St為低電壓準位時(亦即在致能狀態),第四開關被 開啟以燒毀保險絲250。 請參照圖9。圖9繪示為本發明一實施例之調整電路 • 8〇〇的電路圖。調整電路800包括調整單元2〇〇、電流源 810、電阻R、電壓調節器82〇以及反相器83〇。調整電壓 Vref被提供至調整電路8〇〇,調整電壓Vref基於調整單元 200的輸出電壓TX而具可調性。當輪出電·τχ為高電壓 準位日守,電壓调即820的電晶體q被關閉,使得電流源 81〇的電流I流經電阻R和電壓調節器82〇的電阻幻。因 此,調整電壓Vref被拉高至㈣!^)]。當輸出電壓τχ 為低電壓準位時,電晶體Q被開啟,使得電流I流經電阻 201133759 HA-^uuy-u013-TW 33142twf.doc/n R和電晶體Q。因此’調整電壓Vref被拉高至(IxR)。因此, 調整電壓Vref根據的電壓準位被設置為[][X(R+R1yj或 (IxR)。 請參照圖10。圖10繪示為本發明一實施例之調整電 路9〇〇的電路圖。相較於調整電路800,調整電路9〇〇更 包括耦接於調整單元200和反相器830之間的反相器 840。因此,當輸出電壓丁父為高電壓準位時,電壓調節器 820的電晶體q被開啟,使得電流源81 〇的電流I流經電 和電晶體Q。因此,調整電壓Vref被拉高至(IxR)。 田,出电壓TX為低電壓準位時,電晶體Q被關閉,使得 I流經電阻尺和。因此,調整電壓祈打被拉高至 X(R+R1)]。在本實施例中,若調整單元2〇〇的保險絲 ^皮燒毁’輸出電壓TX為低電壓準位,使得調整電壓㈣ 置的[IX(R+R1)]。當調整單元的保險絲250 =’輸出電壓TX為高電壓準位,使得調整電壓Μ 之’調整電壓Vref原本 路^=絲㈣—實關之調整電 的情米下Λ f整電路1000在無反相器83〇和_ 90f:下始乍時’調整電路麵的功能相同於調整電路 電晶體的調整單元2GQ的輸出端直接輕接至 關閉。 可直接依據輪出電壓丁乂被開啟或 月μ圖12 °圖12緣示為本發明—實施例之調整電 14 201133759 .…一〜-0013-TW 33142twf.doc/n 路1100的電路圖。調整電路謂包括調整單元200、電 流源810、電阻R、電壓調節器ιιι〇、ιι2〇、反相器ιΐ3〇、 1140以及1150。電壓調節器111〇串接112〇。電壓調節器 im和mo分別包括電晶體〇和電阻Ri或幻。調整電 壓¥时為可調且依據輪出電壓T1和Τ'2的狀態決定其電壓 值。虽兩s周整單凡2QG的輸出電壓T1和T2皆為低電壓準 ,3守’電壓调即器1110的電晶體Q被開啟,而電壓調節 广112。的電晶體Q被關閉,使得調整.電M Vref被拉高至 [Ix(R+R2)]。當輸出電壓T1為高電壓準位而輸出電壓丁2 =電壓準位時,電壓調節器和112〇的電晶體q被 ,閉’使得調整電壓Vref被拉高至[Ix(R+Ri ^電射1為低電壓準位而輸出電壓T2為高電壓準位時輸 ^調即^mo#⑽的電晶體Q被開啟,使得>0013-TW 33142twf.doc/n The second current path 240 of the element 200 includes a fourth switch Q4. In this embodiment, each of the first switch Q1, the third switch Q3, and the fourth switch q4 is a PMOS transistor, and the second switch Q2 is an NMOS transistor. The first phase inverter 712 receives the input signal AX, and the output of the first inverter 712 is coupled to the input of the second inverter 714, the second switch Q2 and the third switch Q3. The output of the second inverter 714 is coupled to the first switch Q1, and the two inputs of the inverse gate 716 receive the adjustment control signal St and the inverted input signal, respectively. The turn-off of the NAND gate 716 is coupled to the fourth switch q4. Therefore, when the input signal AX is at the high voltage level (i.e., in the first state), the first switch Q1 and the second switch Q2 are turned off, and the third switch Q3 is turned on. When the input signal AX is at a low voltage level (i.e., the second state), the first switch Q1 and the second switch Q2 are turned on, and the third switch Q3 is turned off. When the input signal AX is at a high voltage level (i.e., in the first state) and the control signal St is at a low voltage level (i.e., in an enabled state), the fourth switch is turned on to burn the fuse 250. Please refer to Figure 9. FIG. 9 is a circuit diagram of an adjustment circuit of FIG. 8 according to an embodiment of the invention. The adjustment circuit 800 includes an adjustment unit 2A, a current source 810, a resistor R, a voltage regulator 82A, and an inverter 83A. The adjustment voltage Vref is supplied to the adjustment circuit 8A, and the adjustment voltage Vref is adjustable based on the output voltage TX of the adjustment unit 200. When the wheel power-off τ χ is a high voltage level, the voltage q, that is, the transistor q of 820 is turned off, so that the current I of the current source 81 流 flows through the resistor R and the voltage regulator 82 电阻. Therefore, the adjustment voltage Vref is pulled up to (4)!^)]. When the output voltage τ χ is at a low voltage level, the transistor Q is turned on, so that the current I flows through the resistors 201133759 HA-^uuy-u013-TW 33142twf.doc/n R and the transistor Q. Therefore, the adjustment voltage Vref is pulled up to (IxR). Therefore, the voltage level according to the adjustment voltage Vref is set to [][X(R+R1yj or (IxR). Please refer to FIG. 10. FIG. 10 is a circuit diagram of the adjustment circuit 9A according to an embodiment of the present invention. Compared with the adjusting circuit 800, the adjusting circuit 9 further includes an inverter 840 coupled between the adjusting unit 200 and the inverter 830. Therefore, when the output voltage is high voltage level, the voltage regulator The transistor q of 820 is turned on, so that the current I of the current source 81 流 flows through the electric and the transistor Q. Therefore, the adjustment voltage Vref is pulled up to (IxR). When the output voltage TX is at a low voltage level, the electricity is charged. The crystal Q is turned off, so that I flows through the resistance ruler. Therefore, the adjustment voltage is pulled up to X(R+R1)]. In this embodiment, if the fuse of the adjustment unit 2〇〇 is burned out' The output voltage TX is at a low voltage level, so that the voltage (4) is set to [IX(R+R1)]. When the fuse of the adjustment unit is 250 = 'the output voltage TX is at a high voltage level, the adjustment voltage Μ 'adjusts the voltage Vref The original road ^ = silk (four) - the real adjustment of the electric meter under the Λ f whole circuit 1000 in the absence of inverter 83 〇 and _ 90f: the next When the 'adjustment circuit surface function is the same as the adjustment circuit of the adjustment unit 2GQ, the output end of the adjustment unit is directly connected to the off. It can be directly opened according to the wheel output voltage or the moon μ map 12 ° Figure 12 is the invention - The adjustment circuit of the embodiment 14 201133759 .... a ~-0013-TW 33142twf.doc / n circuit diagram of the 1100. The adjustment circuit includes the adjustment unit 200, the current source 810, the resistance R, the voltage regulator ιιι〇, ιι2〇, the reverse The phase regulators ΐ3ΐ, 1140 and 1150. The voltage regulator 111 is connected in series with 112. The voltage regulators im and mo respectively comprise a transistor 〇 and a resistor Ri or phantom. The adjustment voltage is adjustable and depends on the wheel voltage T1 and The state of Τ'2 determines its voltage value. Although the output voltages T1 and T2 of 2QG are both low voltage standards for two s weeks, the transistor Q of the 3 s' voltage regulator 1110 is turned on, and the voltage adjustment is 112. The transistor Q is turned off, causing the adjustment. The electric M Vref is pulled high to [Ix(R+R2)]. When the output voltage T1 is at the high voltage level and the output voltage is 2 = the voltage level, the voltage regulator And the 112 〇 transistor q is closed, so that the adjustment voltage Vref is pulled up to [Ix(R+Ri^Electrical emission 1 is a low voltage level and output voltage T2 is a high voltage level, and the transistor Q of ^mo#(10) is turned on, so that

St ^ =(1%。#兩調整單^ 的輸出電㈣ 準位時,電壓調節器咖的電晶體Q被 電壓Vref Μ古1 Q被開啟,使得調整 電& Vref破拉同至[Ix(R+R1)]。因此’ 被設置為[Ix(R+R2)]而可某於雨,墼如 冤i ef原本 T1知T9 整早元200的輸出電壓St ^ = (1%. # two adjustment single ^ output power (four) level, the transistor Q of the voltage regulator coffee is turned on by the voltage Vref 1 ancient 1 Q, so that the adjustment electric & Vref is broken to the same [Ix (R+R1)]. Therefore 'is set to [Ix(R+R2)] and can be some rain, such as 冤i ef original T1 know T9 early morning 200 output voltage

矛 的電壓準位被調整至(IxR)、[Ix(R 办_+卿。因此,若電阻R1的R [I =2)]或 的電阻值’在進行調整操作後 ㈣ [「ΓΓ2)]增加至[Ix(騰贈)]或^^ [Ix(R+R2)]減少至(IxR)。 力-飞疋由 請參照圖13。圖13繪示為本發明—實施例之調整電 15 201133759 HA-^uuy-u〇13-TW 33142twf.doc/n 路1200的電路圖。相較於圖12所述之調整電路胸,調 整電路12GG的操作不採用反相器丨⑽。當兩調整單元· 的輸出電壓T1和T2皆為低電壓準位時,調整電壓w 等於(IxR)。當輸出電壓T1㈣電壓準位而輸出電壓η 為低電壓準位時’調整電壓Vref等於[Ix(R+R2)]。當輸出 電壓τι為低電壓準位而輸出電壓T2為高電壓準位^,調 整電壓Vref等於[Ix(R+R1)]。當兩調整單元2〇〇的輪出電 壓T1和T2皆為高電壓準位時,調整電壓Vref被拉高至 [Ix(R+Rl+R2)]。因此,在本實施例中,調整電壓原 φ 本被設置為(IxR)而可被調整至[Ix(R+R1)]、[Ix(R+R2)]或 [Ix(R+Rl+R2)]。 ^ 請參照圖14。圖14繪示為本發明一實施例之調整電 路1300的電路圖。調整電路1300包括三個調整單元2〇〇、 電流源810、電阻R,三個電壓調節器111〇、112〇、113〇 以及四個反相器1130、1150、1170以及1180。電壓調節 器1110,1120以及1130串接在一起。電壓調節器,111〇、 Π20和1130分別包括電晶體Q、電阻R1、R2或R3。調 _ 整電壓Vref為可調且依據三個調整單元2〇〇的輸出電壓 ΤΙ、T2和T3的狀態決定其電壓值。在本實施例中,調整 電壓Vref原本被設置為[Ix(R+R3)]而可被調整至(ixR)、 [Ix(R+Rl)]' [Ix(R+R2)]' [Ix(R+Rl+R2)]' [Ix(R+Rl+R3)] n [Ix(R+R2+R3)]或[Ix(R+R1+R2+R3)]。 請參照圖15。圖15繪示為本發明一實施例之調整電 路1400的電路圖。調整電路1400包括調整單元2〇〇,調 16 201133759 ^ ^V^>0013-TW 33142twf.d〇c/nThe voltage level of the spear is adjusted to (IxR), [Ix (R _ + qing. Therefore, if the resistance R1 R [I = 2)] or the resistance value 'after the adjustment operation (four) [" ΓΓ 2)] Increase to [Ix (Teng)) or ^^ [Ix (R+R2)] to (IxR). Force-flying by please refer to Figure 13. Figure 13 shows the adjustment of the power of the present invention - 15 201133759 HA-^uuy-u〇13-TW 33142twf.doc/n Circuit diagram of circuit 1200. Compared to the adjustment circuit chest described in Fig. 12, the operation of the adjustment circuit 12GG does not use the inverter 丨 (10). · When the output voltages T1 and T2 are both low voltage levels, the adjustment voltage w is equal to (IxR). When the output voltage T1 (four) voltage level and the output voltage η is low voltage level 'adjust voltage Vref is equal to [Ix(R+ R2)]. When the output voltage τι is at a low voltage level and the output voltage T2 is at a high voltage level ^, the adjustment voltage Vref is equal to [Ix(R+R1)]. When the two adjustment units 2〇〇 are turned on the voltage T1 and When T2 is at the high voltage level, the adjustment voltage Vref is pulled up to [Ix(R+Rl+R2)]. Therefore, in the present embodiment, the adjustment voltage original φ is set to (IxR) and can be adjusted. To [Ix(R+R1)], [Ix(R+R2)] or [ Ix(R+Rl+R2)]. Please refer to FIG. 14. FIG. 14 is a circuit diagram of an adjustment circuit 1300 according to an embodiment of the present invention. The adjustment circuit 1300 includes three adjustment units 2, a current source 810, and a resistor. R, three voltage regulators 111A, 112A, 113A and four inverters 1130, 1150, 1170 and 1180. Voltage regulators 1110, 1120 and 1130 are connected in series. Voltage regulators, 111 〇, Π 20 And 1130 respectively comprise a transistor Q, a resistor R1, R2 or R3. The modulating voltage Vref is adjustable and the voltage value is determined according to the states of the output voltages ΤΙ, T2 and T3 of the three adjusting units 2〇〇. In the example, the adjustment voltage Vref is originally set to [Ix(R+R3)] and can be adjusted to (ixR), [Ix(R+Rl)]' [Ix(R+R2)]' [Ix(R+ Rl+R2)]' [Ix(R+Rl+R3)] n [Ix(R+R2+R3)] or [Ix(R+R1+R2+R3)]. Please refer to Fig. 15. Fig. 15 shows A circuit diagram of an adjustment circuit 1400 according to an embodiment of the present invention. The adjustment circuit 1400 includes an adjustment unit 2〇〇, 调16 201133759 ^ ^V^>0013-TW 33142twf.d〇c/n

節器1410和1420以及電阻R。調節器mo和1420分別 =弟=流源1412或1422以及第五開關Q。在 例中’各弟五開關Q為PM〇st晶體。第一電流源i4i2 和1422分別提供電流n和12。t這些第五開關q盆中之 -被開啟,對應的電流η < 12可流經電⑯R。換^之, 電阻R提供的調整電壓Vl,ef可藉由控五開而被 調整。各第五開關Q分別對應調整單4細對應的輸出電 堡T1或T2而被開啟或關閉。在_ ls的實施例中,調節 器剛的第五開關Q受控於對應的輪出電壓^,而調節 器1420的第五開關Q受控於對應的輪出電壓τ2。冬輸出 電壓Ti為低電壓準位時,電晶體Q1被關閉,使得H原 HM的電流可能不會流經電晶體Q卜而使得調節器i4i〇 的黾日日肢Q的閘極柄接至糸統電墨Vdd。因此,調節器141〇 的第五開關Q被關閉,而電流丨丨可能不會流經電阻R。冬 輪出電壓Ή為高電壓準位時,電晶體Q1被開啟,使^ 流源1414的電流可流經晶體Qi,而使調節器的141〇的電 曰曰體Q的閘極為接地。因此,調節器141〇的第五開關p 被開啟,而使電流II可流經電阻r。 類似地’當輸出電壓T2為低電壓準位時,反相器1 * 1 $ 的輸出電壓為高電壓準位而使得電晶體Q2被關閉Γ因此, 電流源1416的電流可能不會來自電晶體q2,而使調節器 1420的電晶體q的閘極接地。因此’調節器ι42〇的第五 開關Q被開啟,而電流12可流經電阻R。當輸出電壓τ2 為高電壓準位時,電晶體Q2被開啟,使得電流源1416的 17 201133759 iirv-丄叫广 UJ13-TW 33142twf.doc/n :來自電晶體Q 2,使調節器H 2 0的電晶體Q的閘極Nodes 1410 and 1420 and resistor R. Regulators mo and 1420 are respectively = source = flow source 1412 or 1422 and fifth switch Q. In the example, each of the five switches Q is a PM〇st crystal. First current sources i4i2 and 1422 provide currents n and 12, respectively. t Among these fifth switches q are turned on, and the corresponding current η < 12 can flow through the electricity 16R. In other words, the adjustment voltage Vl, ef provided by the resistor R can be adjusted by controlling the five switches. Each of the fifth switches Q is turned on or off corresponding to the output electric bar T1 or T2 corresponding to the adjustment unit 4, respectively. In the embodiment of _ls, the fifth switch Q of the regulator is controlled by the corresponding wheel-out voltage ^, and the fifth switch Q of the regulator 1420 is controlled by the corresponding wheel-out voltage τ2. When the winter output voltage Ti is at a low voltage level, the transistor Q1 is turned off, so that the current of the H original HM may not flow through the transistor Qb, so that the gate of the regulator i4i〇 is connected to the gate of the Japanese limb Q to糸 电 ink Vdd. Therefore, the fifth switch Q of the regulator 141A is turned off, and the current 丨丨 may not flow through the resistor R. When the winter output voltage is at the high voltage level, the transistor Q1 is turned on, so that the current of the current source 1414 can flow through the crystal Qi, and the gate of the 141 〇 electric body Q of the regulator is grounded. Therefore, the fifth switch p of the regulator 141A is turned on, so that the current II can flow through the resistor r. Similarly, when the output voltage T2 is at a low voltage level, the output voltage of the inverter 1 * 1 $ is at a high voltage level such that the transistor Q2 is turned off. Therefore, the current of the current source 1416 may not come from the transistor. Q2, and the gate of the transistor q of the regulator 1420 is grounded. Therefore, the fifth switch Q of the regulator ι 42 被 is turned on, and the current 12 can flow through the resistor R. When the output voltage τ2 is at the high voltage level, the transistor Q2 is turned on, so that the current source 1416 17 201133759 iirv- 广 wide UJ13-TW 33142twf.doc / n: from the transistor Q 2, so that the regulator H 2 0 Gate of transistor Q

糸,ϊ ·。因此,調節器1420的第五開關Q I曰二而€/;π·12可能不會流經電阻R。亦即,電流I流 R決定於輪幢Τ1和Τ2。因此_壓 轉電壓Μ為可調且與調整單元 2〇〇的輸出電壓T1與T2有關。 16。圖16纷示為本發明—實施例之調整 的電路圖。相較於圖ls中的調整電路剛,調整Hey, hey. Therefore, the fifth switch Q I of the regulator 1420 and the π·12 may not flow through the resistor R. That is, the current I flow R is determined by the wheel blocks Τ1 and Τ2. Therefore, the _voltage Μ is adjustable and is related to the output voltages T1 and T2 of the adjustment unit 2〇〇. 16. Figure 16 is a circuit diagram showing the adjustment of the embodiment of the present invention. Compared to the adjustment circuit in Figure ls, adjust

η -- 凋即斋Μ30和另一用以輸出輸出電 ι曰’卜正早70 2QQ。當輪出電壓13為低電壓準位時, 被關閉’使得電流源1424的電流可能不會流經 電j Φ ’而使調節器_的電晶體q的閘極墟至系 τ 5周即态14邓的第五開關Q被關閉, ;.飢3可此不會流故電阻R。當輸出電壓了3為高電壓準η -- With the fasting 30 and the other for outputting output 曰 曰 卜 正 early 70 2QQ. When the turn-on voltage 13 is at a low voltage level, it is turned off 'so that the current of the current source 1424 may not flow through the electric j Φ ' and the gate of the transistor q of the regulator _ is 5 5 周14 Deng's fifth switch Q is turned off;; hunger 3 can not flow the resistor R. When the output voltage is 3, it is high voltage

位’電晶體Q3破開啟,使得電流源1424的電流可能不會 流經電晶體Q3’而使調節器1430的電晶體Q的閘極為接 地°因此’調節器143G的第五開關Q被開啟,使電流13 可流經電阻R。因此,調整電壓Vref為可調且與三個調整 單元200的輸出電壓ΤΙ、T2和T3有關。 月ί ,、、、Η 17。圖17、纟會示為本發明一實施例之調整電 路1600的電路圖。相較於圖16令的調整電路1500,調整 電路_中的電阻R在調整電路1_中被取代為電流鏡 1610。電流鏡1610耦接至調節器1412、1422與1432以提 供調整電流1ref。電流鏡1610包括電晶體Q4和Q5。調整 18 201133759 ΠΛ-^υυ^-0013-TW 33142twf.doc/n 電流Iref等於流經電晶的電流卜 三個調整單元200的輪出電壓Τ^Τ2 可调且與 來,調整電流Iref為可調且與三個調整:二:此-壓T1、T2和T3有關。 早兀200的輸出電 綜上所述,調整電壓或調整電流的 路前決定。決定調整電壓或調整電流的期望::在=電 制訊號用以燒毀保險絲以修正調整電壓或控 t。Γ ’即使被調整電路已經被封裝成積 t周整電路㈣氣碰仍可藉由本發_觀電路^于修 雖然本發明已以實施例揭露如上,然 本發明’任何所屬技術領域中具有通常知i者,在 當可作些許之更動與潤部,故本 毛月之保·圍自顺附之申請專纖圍所界定者為準。 【圖式簡單說明】 圖1繪:為傳統封裝積體電路晶片的方塊圖。 圖2繪示為本發明一實施例之具有調整電 體電路晶片的方塊圖。 対裝積 方塊圖 圖3繪示為本發明一實施例之調整電路的調整單元的 圖4繪不為本發明一實施例之輸入訊號在第一狀態且 調整控制訊號在禁能狀態時的調整單元的方塊圖。^ 圖5、’.s示為輪入訊號在第二狀態而調整控制訊號在梵 19 201133759、 ixrv-^vv/^-w〇13-TW 33142twf.doc/n 能狀態時調整單元的方塊圖。 圖6繪不為輸入訊號在第一狀態而調整 能狀態時調整單元的方塊圖。 I」訊戒在致Bit 'Crystal Q3 breaks open, so that the current of current source 1424 may not flow through transistor Q3' and the gate of transistor Q of regulator 1430 is grounded. Therefore, the fifth switch Q of regulator 143G is turned on. Current 13 can flow through resistor R. Therefore, the adjustment voltage Vref is adjustable and is related to the output voltages ΤΙ, T2 and T3 of the three adjustment units 200. Month ί,,,, Η 17. Figure 17 is a circuit diagram showing an adjustment circuit 1600 according to an embodiment of the present invention. In contrast to the adjustment circuit 1500 of Figure 16, the resistor R in the adjustment circuit_ is replaced by a current mirror 1610 in the adjustment circuit 1_. Current mirror 1610 is coupled to regulators 1412, 1422 and 1432 to provide an adjustment current 1ref. Current mirror 1610 includes transistors Q4 and Q5. Adjustment 18 201133759 ΠΛ-^υυ^-0013-TW 33142twf.doc/n Current Iref is equal to the current flowing through the crystal. The turn-off voltage 三个^Τ2 of the three adjustment units 200 is adjustable and the current Iref is adjustable. Adjusted with three adjustments: two: this - pressure T1, T2 and T3. As early as the output of 200, the adjustment of the voltage or the adjustment of the current is determined. The desire to adjust the voltage or adjust the current:: ==Electrical signal to burn the fuse to correct the adjustment voltage or control t. Γ 'Even if the adjusted circuit has been packaged into a product t-round circuit (4), the air touch can still be obtained by the present invention. Although the present invention has been disclosed in the above embodiments, the present invention has the usual Those who know i can make some changes to the Ministry of Health, so this is the definition of the application for the special fiber package. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of a conventional packaged integrated circuit chip. 2 is a block diagram of a wafer having an adjustment power circuit according to an embodiment of the invention. FIG. 3 illustrates an adjustment unit of an adjustment circuit according to an embodiment of the present invention. FIG. 4 illustrates an adjustment of an input signal in a first state and an adjustment control signal in an disabled state according to an embodiment of the present invention. A block diagram of the unit. ^ Figure 5, '.s shows the block diagram of the adjustment unit in the second state and adjusts the control signal in the state of Brahman 19 201133759, ixrv-^vv/^-w〇13-TW 33142twf.doc/n . Figure 6 depicts a block diagram of the adjustment unit when the input signal is in the first state and the energy is adjusted. I"

圖7繪示為保險絲被燒毁時調整單元的方塊 圖8繪示為本發明一實施例之調整單元的電二 圖9繪示為本發明一實施例之調整電路的電路二 圖10繪示為本發明另一實施例之調整 S 』王电路的電敗 圖11繪示為本發明另一實施例之調整電路的吻圖。 圖12繪示為本發明另一實施例之調整略圖。 圖13繪示為本發明另一實施例之調整電路的電圖。 圖14繪示為本發明另一實施例之調整電路的電略圖。 圖15繪示為本發明另一實施例之調整電路的你略_。 圖16繪示為本發明另一實施例之調整電路的=隊_。 圖17繪示為本發明另一實施例之調整電路的=略_。 【主要元件符號說明】 50、100 :積體電路晶片 52、102 :焊墊 110、800、900、1〇〇〇、11〇〇 :調整電落 54、120 :核心電路 200 :調整單元 210 :驅動單元 220、230、240 :電流路徑 222、224、232、242 :開關 20 2011337597 is a block diagram of an adjustment unit when a fuse is burned. FIG. 8 is a second embodiment of an adjustment unit according to an embodiment of the present invention. FIG. FIG. 11 is a kiss diagram of an adjustment circuit according to another embodiment of the present invention. FIG. 12 is a schematic diagram showing an adjustment of another embodiment of the present invention. FIG. 13 is an electrical diagram of an adjustment circuit according to another embodiment of the present invention. FIG. 14 is a schematic diagram of an adjustment circuit according to another embodiment of the present invention. FIG. 15 is a schematic diagram of an adjustment circuit according to another embodiment of the present invention. FIG. 16 is a diagram showing the = team_ of the adjustment circuit according to another embodiment of the present invention. FIG. 17 is a diagram showing an adjustment circuit of another embodiment of the present invention. [Description of main component symbols] 50, 100: integrated circuit wafers 52, 102: pads 110, 800, 900, 1 〇〇〇, 11 〇〇: adjustment falls 54, 120: core circuit 200: adjustment unit 210: Drive unit 220, 230, 240: current path 222, 224, 232, 242: switch 20 201133759

/ …少 0013-TW 33142twf.doc/n 226、810、1412、1414、1416、1422、1424、1432 : 電流源 244、R、R1、R2 :電阻 2 5 0 ·保險絲 260 :輸出端 712、714、830、840、1130〜1180、1418 :反相器 716 :反或閘 820、1110、1120 :電壓調節器 1410、1420、1430 :調節器 T1〜T3、Tx :輸出電壓 St :調整控制訊號 A :接點 A1〜A3、Αχ :輸入訊號 4:反相輸入訊號 Vdd :糸統電壓 GND :接地 I、II、12、13 :電流 Q、Q1〜Q5 :電晶體開關 Vref :調整電壓 Iref :調整電流 21/ ...少0013-TW 33142twf.doc/n 226, 810, 1412, 1414, 1416, 1422, 1424, 1432: Current source 244, R, R1, R2: Resistor 2 5 0 · Fuse 260: Output 712, 714 830, 840, 1130~1180, 1418: Inverter 716: Inverting gates 820, 1110, 1120: Voltage regulators 1410, 1420, 1430: Regulators T1 to T3, Tx: Output voltage St: Adjusting control signal A : Contact A1~A3, Αχ: Input signal 4: Inverting input signal Vdd: 糸 voltage GND: Ground I, II, 12, 13: Current Q, Q1~Q5: Transistor switch Vref: Adjust voltage Iref: Adjust Current 21

Claims (1)

201133759 ^ nrt.-zwy-<j〇13-TW 142twf.doc/n 七、申請專利範圍: 1. 一種調整電路’包括至少一 §周整單元,各該調整單 元包括: 一驅動單元,接收一輸入訊號與—調整控制訊號; 一保險絲; 一第一電流路徑,包括串接的一第一開關和一第二開 關,其中該第一電流路徑耦接於一系統電壓與該保險絲 間; 、’、201133759 ^ nrt.-zwy-<j〇13-TW 142twf.doc/n VII. Patent application scope: 1. An adjustment circuit includes at least one § week unit, each of which includes: a driving unit, receiving An input signal and an adjustment control signal; a fuse; a first current path comprising a first switch and a second switch connected in series, wherein the first current path is coupled between a system voltage and the fuse; ', ·电肌崎仅不一丨⑴勒’琢第二電流路 躺接於該系統電壓與該第-開關和該第二開關的共同接 之間;以及 .-第三電流路徑,減於該I统電壓與該保 間; 、 其中該第-開關、該第二開關以及該第三 輸入訊號而被開啟或關閉。 、豫 2.如申請專利範圍第丄項所述之調整電路,·Electric muscles are only different (1) Le'琢 second current path lies between the system voltage and the common connection between the first switch and the second switch; and - the third current path, minus the I And the protection switch; wherein the first switch, the second switch, and the third input signal are turned on or off. , Yu 2. If the adjustment circuit described in the scope of the patent application, 輸入訊號為第-狀態時,該第—開 =田 閉,而該第三_被開I …W J關被 一 3.如申請專利範圍第2項所述之調整 广電流路#包括-第四開關,當該輪入訊 二二 該調整控制喊為致能狀態時,該* 、. 該保險絲。 開關被開啟以燒: 輸專利範圍第1項所述之調整電路,其中當· 輸入《衫二狀態時,該第—„與該第二開;^ 22 201133759 --------->0013-TW 33142twf.doc/n 啟’而該第三開關被關閉。 .5·如申請專利範圍第1項所述之調整電路,其中1調 整電路的一輸出端耦接至該第一開關與該第二開關的共同 接點’當該輸入訊號在第一狀態時,該輸出端的電壓準位 在第一狀態,且該保險絲不被燒毀。 6. 如申請專利範圍第1項所述之調整電路,其中該調 整電路的一輸出端耦接至該第一開關與該第二開關的共同 接點’當該輸入訊5虎在弟二狀態時’該輸出端的電壓準位 春 在第二狀態,且該保險絲不被燒毁。 7. 如申請專利範圍第1項所述之調整電路,其中該調 整電路的一輸出端耦接至該第一開關與該第二開關的共同 接點,當該保險絲被燒毁時,該輸出端的電壓準位在第一 狀態。 8. 如申請專利範圍第1項所述之調整電路,其中該驅 動單元包括: · 一第二反相器,該第二反相器的輸出端耦接該第一開 • 關; 一第一反相态,接收該輸入訊號,該第一反相器的輸 出端耦接該第二反相器的輸入端、該第二開關與該第三開 關;以及 一反及閘,其兩輪入端接收該調整控制訊號和反相的 該輸入訊號,該反及閘的輸出端耦接該第四開關。 9. 如申請專利範圍第!項所述之調整電路,其中該第 -開關、該第三開關與該第四開關為—pM〇s電晶體,而 23 33142twf.doc/n 201133759 i3.TW 該第二開關為一NMOS電晶體。 10. 如申請專利範圍第1項所述之調整電路,其中該第 一電流路徑更包括一電流源,該電流源耦接於該系統電壓 與該第一開關之間。 11. 如申請專利範圍第1項所述之調整電路,其中該第 三電流路徑更包括一電阻,該電阻耦接於該第四開關與該 保險絲之間。 12. 如申請專利範圍第1項所述之調整電路,其中該調 整單元包括一第一調整單元與一第二調整單元,而該調整 電路更包括: 一電流源; 一第一電阻,耦接該電流源,提供一調整電壓;以及 串接的多個電壓調節器,調整該調整電壓,各該電壓 調節器包括一第二電阻以及與該第二電阻並聯的一電晶 體; 其中該電壓調節器的一第一電壓調節器的該電晶體 之閘極耦接該第一調整單元的輸出端,而該電壓調節器的 一第二電壓調節器的該電晶體之閘極耦接該第二調整單元 的輸出端。 13. 如申請專利範圍第12項所述之調整電路,更包括: 一第一反相器,耦接於該第一調整單元的輸出端與該 第一電壓調節器的該電晶體之閘極; 一第二反相器;以及 一第三反相器,串接該第二反相器; 24 y-0013-TW 33142twf.doc/n 201133759 其中該第二電壓調節器的該 該第二反相器與該第三反相器輕接該二=接透過 端。 纖Μ—5周整早兀的輪出 14.如申請專利範圍第丨項所述 整單元包括多個,敗胃- 又調正電路’其中該調 多二2整早兀’而該調整電路更包括: 開關,其中各該調節哭的哕第五ns,弟—電流源與-第五 整單元之-的-輸出;===控於對應的該些調 ή電:.耦接該調節器,提供-調整電壓。 該調節器轉:===之調整電路,其中各 串接該第六開關,開關’該第二電流源 的該輸出電壓,使;;於對應的該些調整單元 調整單元之-的該輸出;壓=開關受控於對應的該些 整單二===整電路,其中該調 多個綱〜 周整電路更包括: 開關,其ί:二ί該調節器包括-第-電流源與-第五 整單元之: =該第五開關受控於對應的該些調 _ 的一輪出電壓的變化;以及 =流鏡,接該調節器,提供1 /、中該調整電流依據該電 流源的電流而被調整。 4所接收來自該第-電 該調:器:16項所述之調整電路,其中各 键1二電流源與—第六開關,該第二電流源 25 20113375913.TW 33142twf.doc/n 串接該第六開關,該第六開關受控於對應的該些調整單元 之一的該輸出電壓,使得對應的一第五開關受控於對應的 該些調整單元之一的一輸出電壓的變化。 20113375913.TW 33142twf.doc/nWhen the input signal is in the first state, the first-open=field closed, and the third_opened I...WJ-off is a 3. As described in the second application of the patent scope, the wide current path #includes - fourth The switch, when the wheel enters the second or second, the adjustment control is called the enable state, the *, the fuse. The switch is turned on to burn: The adjustment circuit described in the first item of the patent scope, wherein when the input "the second state of the shirt, the first - and the second opening; ^ 22 201133759 --------- <0013-TW 33142 twf.doc/n and the third switch is turned off. The adjustment circuit according to claim 1, wherein an output end of the adjustment circuit is coupled to the first a common contact of the switch and the second switch. When the input signal is in the first state, the voltage level of the output is in the first state, and the fuse is not burned. 6. As described in claim 1 An adjustment circuit, wherein an output end of the adjustment circuit is coupled to a common contact of the first switch and the second switch, and when the input signal is in the state of the second phase, the voltage level of the output terminal is in the first The second state, and the fuse is not burned. 7. The adjustment circuit of claim 1, wherein an output end of the adjustment circuit is coupled to a common contact of the first switch and the second switch When the fuse is burned, the voltage level of the output is at the first 8. The adjustment circuit of claim 1, wherein the driving unit comprises: a second inverter, the output of the second inverter is coupled to the first opening and closing; a first inverted state, receiving the input signal, an output end of the first inverter coupled to the input end of the second inverter, the second switch and the third switch; and a reverse gate, two of The input terminal receives the adjustment control signal and the inverted input signal, and the output end of the anti-gate is coupled to the fourth switch. 9. The adjustment circuit according to the item of claim 2, wherein the first switch The third switch and the fourth switch are -pM〇s transistors, and 23 33142twf.doc/n 201133759 i3.TW the second switch is an NMOS transistor. 10. As described in claim 1 The adjusting circuit, wherein the first current path further comprises a current source coupled between the system voltage and the first switch. 11. The adjusting circuit according to claim 1, wherein the The third current path further includes a resistor coupled to the resistor The adjustment circuit of the first aspect of the invention, wherein the adjustment unit comprises a first adjustment unit and a second adjustment unit, and the adjustment circuit further comprises: a current a first resistor coupled to the current source to provide an adjustment voltage; and a plurality of voltage regulators connected in series to adjust the adjustment voltage, each of the voltage regulators including a second resistor and in parallel with the second resistor The transistor of the first voltage regulator of the voltage regulator is coupled to the output of the first adjusting unit, and the second voltage regulator of the voltage regulator The gate of the crystal is coupled to the output of the second adjustment unit. 13. The adjustment circuit of claim 12, further comprising: a first inverter coupled to the output of the first adjustment unit and the gate of the transistor of the first voltage regulator a second inverter; and a third inverter connected in series with the second inverter; 24 y-0013-TW 33142twf.doc/n 201133759 wherein the second counter of the second voltage regulator The phase device and the third inverter are lightly connected to the second=connecting end. Μ Μ - 5 weeks of early 兀 轮 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 The method further includes: a switch, wherein each of the adjustments is cried, the fifth ns, the younger-current source and the - fifth unit--the output; the === is controlled by the corresponding ones: the coupling is adjusted , provide - adjust the voltage. The regulator turns: === the adjustment circuit, wherein each of the sixth switch is connected in series, the switch 'the output voltage of the second current source is made;; the output of the corresponding adjustment unit adjusting unit The voltage=switch is controlled by the corresponding two single=== whole circuits, wherein the plurality of circuits are further included: a switch, wherein the regulator includes a -first current source and - the fifth whole unit: = the fifth switch is controlled by the change of the corresponding one of the voltages of the corresponding _; and = the flow mirror, connected to the regulator, providing 1 /, the adjustment current is based on the current source The current is adjusted. 4 receiving the adjustment circuit from the first-electrode: the circuit of claim 16 wherein each of the two current sources is connected to the sixth switch, and the second current source is connected to the second current source 25 20113375913.TW 33142twf.doc/n The sixth switch is controlled by the output voltage of one of the corresponding adjustment units, such that a corresponding fifth switch is controlled by a change of an output voltage of one of the corresponding adjustment units. 20113375913.TW 33142twf.doc/n 2626
TW99108926A 2010-03-25 2010-03-25 Trimming circuit TWI393235B (en)

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KR0146203B1 (en) * 1995-06-26 1998-12-01 김광호 Circuit element controlled circuit of semiconductor ic
KR100247937B1 (en) * 1997-11-12 2000-03-15 윤종용 Fusing circuit
US7098722B2 (en) * 2004-07-13 2006-08-29 Etron Technology, Inc. Low power design for fuse control circuit
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