201131797 六、發明說明： 【發明所屬之技術領域】 本1發明係關於改善製造薄膜矽系太陽能電池或模組 之製程。該發明更明確地關於對薄膜矽太陽能電池之該基 板或覆板（superstrate)之處理過程。 【先前技術】 光電伏裝置、光電裝換裝置或太陽能電池等裝置係轉 換光’特別是將太陽光轉爲直流（DC)電能之裝置。大量生 產低成本薄膜太陽能電池受到矚目的原因在於其允許使用 玻璃、玻璃陶瓷或其他堅硬或可彎曲基板做爲一基底材料 (基板）’以代替晶矽或多晶矽。負起或有光電伏效果之太 陽能電池結構’即該連續層沉積在薄層。這沉積可發生在 氣體環境或真空條件下。本技藝中廣爲人知的沉積技術有 諸如PVD、CVD、PECVD、APCVD，…全用在半導體技術。 太陽能電池之轉換效率係對太陽能電池之執行該共 同量測，並由該外部功率密度（=開路電壓 V。。，塡充因子 FF及電流密度Jse之積）對該內部功率密度之比決定。 薄膜太陽能電池一般包含第一電極、一個以上半導體 薄膜p-i-n或n-i-p接面，及連續堆疊在一基板上的第二電 極。每一 p-i-n接面或薄膜光電轉換單元包含一本質或i-型層，其夾在一正摻雜或P型層與一負摻雜或η型層之間。 該本質半導體層佔該薄膜p-i-n接面之大部分厚度。光電轉 換主要發生在這i型層；因此這也被稱爲主動或吸收層。 不管鄰近P及η層之結晶性的類型如何’依i型層太 201131797 陽能電池或光電（轉換）裝置之結晶牲而定，特徵爲非晶體 (a-Si)或微晶體（pc-Si)太陽能電池。微晶體層咸知爲在一非 晶矩陣中，包含至少一微晶晶體1 5%之拉曼結晶度之層。 p-i-n接面的摻雜層也經常稱爲窗層。由於該摻雜ρ/η 層所吸收的光因該主動層而消失，因此，高度透明的窗層 宜得到高電流密度（Jsc)。此外該窗層有助於在半導體接面 構成的太陽能電池上建立電場，這有助於收集所產生光的 電荷載子及得到高V。。及FF値。此外，前透明導電氧化物 π I (TCO)與窗層間應爲歐姆接觸，爲得到好FF値，該接點應 具有低阻抗。在本技藝中，微晶矽之窗層因有較好的光學 特性（較少吸收）而優先於非晶窗層使用。 習知技術第1圖顯示基本、簡單光電伏電池40包含 透明基板41，其例如爲有一層沉積於其上之TCO 42之玻 璃。這層也被稱爲前接點以及作爲用於光電伏元件之第一 電極。基板41與前接點42的結合也稱覆板。下寧（next Q layer)43作爲主動光電伏層使用及包含三，，次 層’’（sub-layers)以形成一 p-i-n接面。該層43包含微晶、 奈米晶氫化砂或非晶砂或一結合兩者。次層44(鄰近TCO 則接點42)係爲正摻雜，該鄰近次層45係本質，且該最後 A層46係負摻雜。在替代實施例中，連續層p_i_n可如描 述轉爲n-i-p’接者’層44被定義爲η層，層45再次定義 爲本質，層46爲ρ層。 最後，該電池包含一背後接觸層47(也叫背接點），其 201131797 可爲氧化鋅、氧化錫或ITO所製造及反射層48。替代地， 可實現金屬背接觸，其能結合被反射面48及背接觸47之 物理特性。箭頭指出照射光。 咸知，當例如太陽輻射之光照射在光電伏裝置時，於 i層產生電子電洞對。電洞被從所產生之對導向ρ區域，且 電子朝向η區域。一般該接觸會直接或間接的接觸在p或 η區域。只要光持續產生電子電洞對，電流即流經連接這 些接點之外部電路。 ^ [技術缺點] 本技藝對同時改善電池效率及減少製造成本持續的 努力。惟，此平衡係難以維持。 爲改善光電伏（PV)裝置電性的轉換效率，須可於主動 砂層內吸收盡可能多的照射光。這藉由1)最小化反射損失 及2)在該光電伏主動矽層之鄰處導入光散射光學介面，予 以解決。 0 在該覆板P_i_n結構中產生光強損失之第一光學界面 係該空氣/玻璃介面49(第1圖）。爲預防因此界面光之反射 所造成典型的4%損失’可應用兩主要技術：抗反射薄膜鍍 層（ARC)或抗反射蝕刻術（化學、電漿或機械的）。 爲在光學界面得到光散射’一般使用粗糙界面，其大 部分爲TCO/Si界面等’在第1圖中，其設置在參考42(前 接點）與44與46與47(背接點）間。然而，強的光散射需要 非常粗糙的TCO s’這使得之後密集的矽成長及該裝置之雷 201131797 射圖案化更加困難。 因此，宜藉由使用紋理玻璃（textured glasses)，引進 粗糙空氣/玻璃，及/或粗糙玻璃/TCO界面。然而，該最初 紋理玻璃之使用昂貴且產生具有”雷射圖案化”之基本製程 步驟的問題》 通常，在平坦鍍AR(AR-coated)玻璃上沉積薄膜矽太 陽能電池P - i - η，顯示光電流增加3至4 %，其直接有助於 增加電池效率。 D 然而，對商業上可利用在該近可見光ir範圍（寬波段） 的介電質抗AR鍍層（AR-coating)而言，成本相當高。因此， 鍍抗反射玻璃只具體地用在高效率（紀錄）電池實驗。 就撰文者所知，製造抗反射玻璃的第二已知技術，亦 即抗反射蝕刻，直到目前方被使用在該薄膜太陽能電池之 製造。這令人驚異，因玻璃之更進一步蝕刻能額外地造成 在第一空氣/玻璃界面的光散射。然而，這效應大槪因沉積 Q 在初始紋理玻璃上的該電池之雷射結構化的額外的困難而 未開發。確實，從玻璃側進入裝置之圖案化雷射束經歷此 光散射效應’並因此’既定材料脫落所需聚焦強度局部喪 失。這造成在光散射玻璃上，電池以及模組之雷射散射更 加困難。由於和習知晶圓爲基礎之技術相較，單體連續連 結係薄膜矽光電伏之至要元件，因此，到目前爲止很少注 意到光散射玻璃基板之應用。 【發明內容】 201131797 含之 太 i 系 出矽 提膜 此薄 因造 明製 發種 本一 後 池 裝 池 電 匕匕 陽 包 : 置 ” 裝 理該 處， 璃法 玻方 11之 力 匕匕 會 射 反 抗 具 有 具 構 結 面 接 該 構 結 面 接 η I • 1 垂 Ρ / 板 基 面 界 氣 空 / 璃 玻 該方法包含提供一具有玻璃/空氣界面之玻璃-基板 /p-i-n接面結構，然後DART_蝕刻該玻璃表面，爲該玻璃 /空氣界面提供該抗反射（AR)及所需的光散射能力（D)。 在一根據本發明實施之方法中，在第一時段期間執行 η ^ 蝕刻’以提供抗反射能力（AR)及在被選擇的第二時段期 間，額外地執行該蝕刻，以額外地（AR + D)提供光散射之增 加量。 因此，無論如何，僅在該基板/p-i-η接面結耩已被確 立後進行DART(擴散及抗反射）蝕刻。這可能是提供抗反射 及散射能力兩者的唯一蝕刻步驟。 然而，亦可在該玻璃-基板/p-i-n接面結構完成前施加 0 僅提供抗反射能力且僅達到可忽視量的光散射能力的蝕刻 步驟，此乃因爲紋理化不會影響對雷射圖案化，該雷射圖 案化僅於該玻璃-基板/p-i-n接面結構被整合後及蝕刻到提 供所欲光散射作用的量前施加。 因此在該玻璃-基板/P-i-n接面結構完成前或後的第 一時段期間，進行提供AR之蝕刻，及在第二時段期間執 行達成光散射的.鈾刻，該第二時段未與第一時段分離-若在 該玻璃-基板/p-i-n接面結構完成前，確立後者-或接續於第 201131797 一時段-若該玻璃-基板/p-i-n接面結構完成後，施加後者。 根據本發明實施的方法可切斷在空氣/玻璃界面引進 1)光學抗反射及2)光散射的並存關聯。因此，依最大裝置 之執行所需光擴散之總量而定，可配合各種的薄膜太陽能 結構修改擴散抗反射處理（DART)。 在根據本發明實施之進一步實施方法中，本發明包括 下列特徵之至少一者： a)該矽系太陽能電池係一矽太陽能電池； r\ L- b)該玻璃基板/p-i-n接面結構包含連續的堆疊在該 基板上的第一電極、一個以上的半導體薄膜p-i-n或n-i-p 接面及第二電極； Ο該玻璃基板/p-i-n接面結構包含玻璃之透明基 板，該透明基板具有沉積在其上的透明導電氧化物之層； d)該玻璃基板/p-i_n接面結構係爲一玻璃 /TCO/a-Si:Hp-i-n/TCO 結構； Q e)在提供該玻璃基板々“-η接面結構後，藉由蝕刻， 建立抗反射及散射能力。 在一根據本發明實施的進〜步實施方法中，該方法包 括只在該第二時段期間執行該蝕刻前，在整個該玻璃/空氣 界面執行雷射圖案化之步驟。 在一根據本發明實施的進〜步實施方法中，藉反應性 離子蝕刻執行該蝕刻。 在一根據本發明實施的進〜步實施方法中，其包括保 201131797 護該p-i-n接面結構以免受到該玻璃表面的該蝕刻 驟，該p-i-n接面結構較佳地藉由下列者來保護·· a) 暫時的機械手段，較佳爲具有夾架的載體配 而該夾架提供密封手段，該密封手段允許只露出須飽 該玻璃表面；或 b) 可移除的黏性薄膜或可移除的顏料，較佳爲 反射物顏料。 根據本發明，其提議，在完全的電池或模組的 ^ 後，構成或紋理化該空氣/玻璃介面49。露出該玻璃以 刻處理，其不破壞在其他（被避開）側上，製作該太陽 池（或完全地被雷射圖案化的模組）。這蝕刻DART處 佳地係由藉RIE(反應式離子蝕刻）電漿蝕刻來執行，但 於這製程。依該玻璃構成而定，也能使用微波電漿餓 機械的或化學玻璃蝕刻。蝕刻DART在如下所示的條 處理5-15分鐘，以便提供抗反射效果（AR)，處理提千 q hrs將額外地提供增加光散射特性（D + AR)。 【實施方式】 經察’在一 RIE 反應器中，一具有 c SF6(SF6:02 = 5:1 之氣體流率，壓力 3〇mT〇rr， 600-1000W，較佳地5min以上）之混合物的電漿處理適 來蝕刻玻璃（Schott Boro float 33)。爲避免該電池堆積 害，須進行保護性量測。如本技藝中周知，該矽堆積 及背接觸層47(比較桌1圖）及有時反射層48藉由 之步 置， 刻的 白色 製備 便蝕 能電 理較 不限 刻， 件下 至2 >2及 功率 合用 之損 層43 諸如 201131797 PECVD ' LPCVD、PVD之真空或接近真空製程步驟沉積。 若在該製造過程階段使用該DART製程，敏感的堆積層即 應受保護以免·來自前側蝕刻製程之影響。這能例如藉暫時 的機械手段’如一具一夾架的牽轉具配置來進行，因該架 構提供密封手段’其允許只露出基板41之須被DART處理 之該前側部分。替代地，能使用可移除的接著劑膜或可移 除的顏料。該發明者已發現，令人驚訴的，周知之白色顏 料反射（特徵48)亦係對該蝕刻步驟之露出的充分保護。因 Π v 擴散白色顏料反射須應用在模組組裝過程的之後段步驟， 因此，基本上無需額外的手段。就延長的DART處理而言， 該白色顏料可能因在該DART處理藉該處理或/及應用的該 等化學玻璃產生熱而改變其特性。因此，對長處理及/或能 產生該樣品的變熱的處理而言，較佳係在該白色顏料塗覆 前進行DART處理，或提供充分的冷卻，以避免有害的影 響。 Ο 第2圖顯示一系列玻璃/TCO/a-Si:H pin/TCO結構之 全部反射係數的量測結果。在近反射鏡光入射時，在空氣/ 平的玻璃（Schott Boro fIaot33)介面有6-7 %的反射損失。藉 使用在400-650 nm範圍，一典型商業的（Schott)寬波段鍍抗 反射（AR-coating)玻璃，該總反射下降至RtotARCgiassd%。 這相當於一被減少的反射RtotfIatglass-RtotARCglass = 4%。至少 15 min之發明性擴散抗反射處理（DART)允許得到和該昂貴 的鏟抗反射相似的Rt〇t。在進入該裝置之該光強度的相對 -10- 201131797 增益以3.5-4%之相對增益完整地被傳送至該薄膜裝置之光 電流（Js。）中。 須知，於第2圖中，該鍍抗反射損失在該範圍介 40 0-6 5 Onm間呈現某些波長依存（干涉條紋），其異於從平板 玻璃結構。此乃因爲，在介電質薄膜堆積中，該ARC效應 依賴干涉.。然而，對該等dart玻璃，該條紋之振幅明顯 地減少。 實驗証明，一些光擴散效應定會在該玻璃/DART介面 I’ 產生。.經觀察該處理的玻璃表面形態發現，玻璃表面的粗 糙和形態會隨著蝕刻次數（見第2圖）發展。然而，該DART 處理可被修改以產生只抗反射效應（短暫處理時間）或抗反 射+光散射效應（長玻璃處理時間）。 第3及4圖顯示被蝕刻非常多次（具一 〇2及SF6且流 量率SF6/02 = 1.67之混合物的RIE反應器，壓力5mTorr及 放出1 000W之功率）玻璃（Schott Borofloat33)之該處理表 Q 面的掃描式電子顯微鏡圖。第3圖：5分鐘電黎處理，第4 圖：120分鐘電漿處理。 第5圖顯示對一雙微型態電池沒有（沒a R，下部曲線） 及具DART處理（120分鐘’上部曲線）的該外部量子效率 EQE之量測結果。優於該a-Si:H電池頂部中及該微結晶基 底電池中所預期4%的Js。中的增益指出，該DART處理對 光捕捉增加的貢獻。 這係一優點，藉此在該等矽層中入射光之吸收能被進 -11- 201131797 一步地最大化。因此，該dart的擴散成分能被修改，以 符合該前TCO光學散射特徵及該裝置厚度（雙-或單-接 面）。例如，若該玻璃之DART增加該長波長（>700 nm)之光 散射，該微結晶基底電池即可能保持較薄，俾電流匹配該 電池頂部。 此作用可由玻璃之較長蝕刻次數獲得。其允許在該長 波長範圍增加光散射，此性質難以從a-Si :H電池的硏發下 該原生（asgrown)紋理化的ZnO中得到。 ^ 通常，對在相當平的ZnO沉積一微型態太陽能電池 而言，該玻璃之最適蝕刻製程較長，此乃因爲，對微結晶 基底電池，需要增加光散射。該最適宜的鈾刻時間亦依該 雙微結構內部該中間反射物之存在而定。 最後，經察，具有一微型態太陽能電池的DART之特 別組合不限於增加Jsc，但能導至增加V。。及FF。 所有這些例子指出 ，DART 容許對 q TCO/a-Si:H^c-Si:H/TCO層厚組合的幾乎任何組合之最大 效率之最適修改。201131797 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a process for improving the manufacture of a thin film tantalum solar cell or module. This invention is more specifically directed to the processing of the substrate or superstrate of a thin film tantalum solar cell. [Prior Art] A device such as a photovoltaic device, an optoelectronic device, or a solar cell is a device that converts light, particularly a device that converts sunlight into direct current (DC) power. The reason for the large number of low-cost thin-film solar cells to be produced is that they allow the use of glass, glass ceramics or other hard or bendable substrates as a base material (substrate)' instead of wafers or polysilicon. The solar cell structure that is negative or has a photovoltaic effect is that the continuous layer is deposited on a thin layer. This deposition can occur in a gaseous environment or under vacuum. Deposition techniques well known in the art are such as PVD, CVD, PECVD, APCVD, ... all in semiconductor technology. The solar cell conversion efficiency is performed on the solar cell and is determined by the ratio of the external power density (= open circuit voltage V, the product of the charge factor FF and the current density Jse) to the internal power density. A thin film solar cell generally comprises a first electrode, one or more semiconductor film p-i-n or n-i-p junctions, and a second electrode continuously stacked on a substrate. Each p-i-n junction or thin film photoelectric conversion unit comprises an intrinsic or i-type layer sandwiched between a positively doped or p-type layer and a negatively doped or n-type layer. The intrinsic semiconductor layer occupies most of the thickness of the p-i-n junction of the film. Photoelectric conversion occurs primarily in this i-type layer; therefore this is also referred to as the active or absorbing layer. Regardless of the type of crystallinity of the adjacent P and η layers, depending on the crystal of the i-type layer 201131797 solar cell or photoelectric (conversion) device, characterized by amorphous (a-Si) or microcrystalline (pc- Si) solar cells. The microcrystalline layer is known as a layer comprising at least one crystallite of Raman crystallinity of at least one crystallite in an amorphous matrix. The doped layer of the p-i-n junction is also often referred to as the window layer. Since the light absorbed by the doped ρ/η layer disappears due to the active layer, a highly transparent window layer preferably has a high current density (Jsc). In addition, the window layer helps to establish an electric field on the solar cell formed by the semiconductor junction, which helps to collect the charge carriers of the generated light and obtain a high V. . And FF値. In addition, the front transparent conductive oxide π I (TCO) should be in ohmic contact with the window layer. To obtain good FF, the contact should have low impedance. In the art, the window layer of microcrystalline germanium is preferred over the amorphous window layer due to its better optical properties (less absorption). DETAILED DESCRIPTION OF THE INVENTION Figure 1 shows a basic, simple photovoltaic cell 40 comprising a transparent substrate 41, such as a glass having a layer of TCO 42 deposited thereon. This layer is also referred to as the front contact and as the first electrode for the photovoltaic element. The combination of the substrate 41 and the front contact 42 is also referred to as a superstrate. The next Q layer 43 is used as an active photovoltaic layer and contains three, sub-layers to form a p-i-n junction. This layer 43 comprises microcrystalline, nanocrystalline hydrogenated sand or amorphous sand or a combination of both. Sublayer 44 (contact 42 adjacent TCO) is positively doped, the adjacent sublayer 45 is intrinsic, and the last A layer 46 is negatively doped. In an alternate embodiment, the continuous layer p_i_n may be defined as an n-layer as described in the n-i-p' connector layer 44, layer 45 is again defined as essence, and layer 46 is a p-layer. Finally, the battery includes a back contact layer 47 (also referred to as a back contact), which may be a reflective layer 48 made of zinc oxide, tin oxide or ITO. Alternatively, a metal back contact can be achieved that combines the physical characteristics of the reflective surface 48 and the back contact 47. The arrows indicate the illumination. It is known that when a light such as solar radiation is irradiated on a photovoltaic device, an electron hole pair is generated in the i layer. The hole is directed from the resulting pair to the ρ region, and the electrons are directed toward the η region. Typically the contact will be in direct or indirect contact with the p or η region. As long as the light continues to generate pairs of electron holes, current flows through the external circuitry that connects the contacts. ^ [Technical Disadvantages] This technology continues to improve battery efficiency and reduce manufacturing costs. However, this balance is difficult to maintain. In order to improve the electrical conversion efficiency of photovoltaic devices, it is necessary to absorb as much illumination as possible in the active sand layer. This is solved by 1) minimizing the reflection loss and 2) introducing a light scattering optical interface adjacent to the photovoltaic active layer. The first optical interface that produces a loss of light intensity in the structure of the superstrate P_i_n is the air/glass interface 49 (Fig. 1). To prevent the typical 4% loss caused by the reflection of the interface light, two main techniques can be applied: anti-reflective film coating (ARC) or anti-reflection etching (chemical, plasma or mechanical). To obtain light scattering at the optical interface 'generally use a rough interface, most of which is TCO/Si interface, etc.' in Figure 1, which is set at reference 42 (front contact) and 44 and 46 and 47 (back contact) between. However, strong light scattering requires a very rough TCO s' which makes the subsequent intensive growth of the crucible and the thunder of the device 201131797 more difficult to pattern. Therefore, it is desirable to introduce a rough air/glass, and/or a rough glass/TCO interface by using textured glasses. However, the use of the original textured glass is expensive and creates the problem of a basic process step with "laser patterning". Generally, a thin film tantalum solar cell P-i-n is deposited on a flat AR-coated glass. The photocurrent is increased by 3 to 4%, which directly contributes to an increase in battery efficiency. D However, the cost of a dielectric anti-AR coating (AR-coating) that is commercially available in the near visible ir range (wide band) is quite high. Therefore, the anti-reflective glass is specifically used in high-efficiency (record) battery experiments. To the best of the author's knowledge, a second known technique for making anti-reflective glass, i.e., anti-reflective etching, has been used in the manufacture of thin film solar cells until now. This is surprising because further etching of the glass can additionally cause light scattering at the first air/glass interface. However, this effect has not been exploited due to the additional difficulty of depositing the laser structure of the cell on the initial textured glass. Indeed, the patterned laser beam entering the device from the glass side experiences this light scattering effect' and thus the focus intensity required for the detachment of the intended material is partially lost. This makes laser scattering of batteries and modules more difficult on light-scattering glass. The use of light-scattering glass substrates has so far been seldom noted since the monolithic continuous bonding of the thin film to the photovoltaic element is due to the conventional wafer-based technology. [Summary of the Invention] 201131797 Including the i is the 矽 矽 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此The anti-reflection has a structuring surface connected to the constituting surface η I • 1 Ρ Ρ / 基 面 气 / / 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该Etching the glass surface to provide the anti-reflection (AR) and desired light scattering capability (D) for the glass/air interface. In a method implemented in accordance with the present invention, η ^ etching is performed during the first time period Providing anti-reflection capability (AR) and additionally performing the etching during the selected second time period to additionally (AR + D) provide an increase in light scattering. Therefore, in any case, only on the substrate /pi- The η junction junction has been established and DART (diffusion and anti-reflection) etching is performed. This may be the only etching step that provides both anti-reflection and scattering capabilities. However, it can also be completed in the glass-substrate/pin junction structure. before Applying an etch step that provides only anti-reflective capability and only achieves negligible amount of light scattering capability, since texturing does not affect laser patterning, which is only applied to the glass-substrate/pin junction The structure is applied and etched to an amount that provides the desired light scattering effect. Therefore, during the first period before or after the completion of the glass-substrate/Pin junction structure, etching to provide AR is performed, and during the second period During the execution of the uranium engraving that achieves light scattering, the second period of time is not separated from the first period - if the glass-substrate/pin junction structure is completed, the latter is established - or continues to be in the period of 201131797 - if the glass - After the substrate/pin junction structure is completed, the latter is applied. The method according to the invention can cut off the coexistence of introducing 1) optical anti-reflection and 2) light scattering at the air/glass interface. Therefore, according to the execution of the largest device Depending on the total amount of light diffusion, the diffusion anti-reflection treatment (DART) can be modified in conjunction with various thin film solar structures. In a further implementation of the method according to the invention, the invention includes the following features At least one of: a) the tantalum solar cell is a solar cell; r\L-b) the glass substrate/pin junction structure comprises a continuous first electrode stacked on the substrate, and more than one semiconductor film pin Or a nip junction and a second electrode; the glass substrate/pin junction structure comprises a transparent substrate of glass having a layer of transparent conductive oxide deposited thereon; d) the glass substrate /p-i_n The surface structure is a glass/TCO/a-Si:Hp-in/TCO structure; Q e) After providing the "-n junction structure" of the glass substrate, the anti-reflection and scattering ability is established by etching. In a further implementation of the method according to the invention, the method includes the step of performing a laser patterning throughout the glass/air interface only prior to performing the etching during the second time period. In an implementation method according to the present invention, the etching is performed by reactive ion etching. In an implementation method according to the present invention, which comprises protecting the pin junction structure from the 201131797 to avoid the etching step of the glass surface, the pin junction structure is preferably protected by the following: a) a temporary mechanical means, preferably a carrier with a clamp, which provides a means of sealing which allows only the surface of the glass to be exposed; or b) a removable adhesive film or removable The pigment is preferably a reflector pigment. According to the invention, it is proposed to form or texture the air/glass interface 49 after a complete battery or module. The glass is exposed for processing, and the solar pool (or a module that is completely laser patterned) is fabricated without damaging the other (avoided) side. This etched DART is preferably performed by RIE (Reactive Ion Etching) plasma etching, but in this process. Depending on the composition of the glass, microwave plasma or chemical glass etching can also be used. The etched DART is treated for 5-15 minutes in the strip as shown below to provide an anti-reflective effect (AR), which will additionally provide increased light scattering characteristics (D + AR). [Embodiment] In a RIE reactor, a mixture having c SF6 (gas flow rate of SF6:02 = 5:1, pressure of 3 〇mT rr, 600-1000 W, preferably 5 min or more) The plasma treatment is suitable for etching glass (Schott Boro float 33). To avoid the buildup of the battery, a protective measurement is required. As is well known in the art, the ruthenium stacking and back contact layer 47 (compare table 1) and sometimes the reflective layer 48 are placed by stepping, and the white preparation of the etched energy can be electrically inferior to the engraved, down to 2 > 2 and power loss layer 43 such as 201131797 PECVD 'LPCVD, PVD vacuum or near vacuum process step deposition. If the DART process is used during this manufacturing process, the sensitive buildup layer should be protected from the effects of the front side etch process. This can be done, for example, by temporary mechanical means such as a one-clamped deflector configuration, since the frame provides a means of sealing that allows only the front side portion of the substrate 41 to be treated by the DART to be exposed. Alternatively, a removable adhesive film or a removable pigment can be used. The inventors have discovered that the surprisingly known white pigment reflection (feature 48) is also sufficient protection for the exposure of the etching step. Since Π v diffuses white pigment reflections must be applied in the subsequent steps of the module assembly process, so basically no additional means are required. For extended DART processing, the white pigment may change its properties due to the heat generated by the DART processing the chemical glass by the treatment or/and application. Thus, for long treatments and/or treatments that produce heat of the sample, it is preferred to perform DART treatment prior to application of the white pigment or to provide adequate cooling to avoid deleterious effects. Ο Figure 2 shows the measurement results for all reflection coefficients of a series of glass/TCO/a-Si:H pin/TCO structures. At the incidence of near-mirror light, there is a 6-7 % reflection loss in the air/flat glass (Schott Boro fIaot33) interface. By using a typical commercial (Schott) broadband anti-reflection (AR-coating) glass in the 400-650 nm range, the total reflection drops to RtotARCgiassd%. This is equivalent to a reduced reflection RtotfIatglass-RtotARCglass = 4%. At least 15 minutes of inventive diffusion anti-reflection treatment (DART) allows Rt〇t similar to the expensive shovel anti-reflection. The relative gain of the light intensity entering the device - -10- 201131797 is transmitted intact to the photocurrent (Js.) of the thin film device with a relative gain of 3.5-4%. It should be noted that in Fig. 2, the anti-reflection loss of the plating exhibits some wavelength dependence (interference fringes) in the range of 40 0-6 5 Onm, which is different from the flat glass structure. This is because, in dielectric thin film deposition, the ARC effect relies on interference. However, for these dart glasses, the amplitude of the fringes is significantly reduced. Experiments have shown that some light diffusion effects will occur at the glass/DART interface I'. After observing the surface morphology of the treated glass, it was found that the roughness and morphology of the glass surface progressed with the number of etchings (see Fig. 2). However, the DART process can be modified to produce only anti-reflective effects (short processing time) or anti-reflective + light scattering effects (long glass processing time). Figures 3 and 4 show the treatment of glass (Schott Borofloat 33) which has been etched very many times (the RIE reactor with a mixture of 〇2 and SF6 and a flow rate of SF6/02 = 1.67, a pressure of 5 mTorr and a power of 1 000 W). Scanning electron micrograph of the surface of Table Q. Figure 3: 5 minutes of electricity processing, Figure 4: 120 minutes of plasma processing. Figure 5 shows the measurement of this external quantum efficiency EQE for a pair of miniature cells without (no a R, lower curve) and with DART treatment (120 minutes 'upper curve). It is superior to the 4% Js expected in the top of the a-Si:H battery and in the microcrystalline base cell. The gain in the middle indicates that the DART processing contributes to the increased light trapping. This is an advantage whereby the absorption of incident light in the layer of germanium is maximized in one step by way of -11-201131797. Thus, the diffusing component of the dart can be modified to conform to the pre-TCO optical scattering characteristics and the thickness of the device (double- or single-junction). For example, if the DART of the glass increases the light scattering of the long wavelength (>700 nm), the microcrystalline base cell may remain thin and the erbium current matches the top of the cell. This effect can be obtained by the longer number of etches of the glass. It allows for increased light scattering over this long wavelength range, a property that is difficult to obtain from the as-grown textured ZnO from the burst of a-Si:H cells. ^ In general, for a micro-state solar cell deposited on fairly flat ZnO, the optimum etching process for the glass is longer because of the need to increase light scattering for microcrystalline substrate cells. The optimum uranium engraving time is also dependent on the presence of the intermediate reflector within the dual microstructure. Finally, it has been observed that the special combination of DARTs with a miniature solar cell is not limited to increasing Jsc, but can lead to an increase in V. . And FF. All of these examples indicate that DART allows for an optimum modification of the maximum efficiency of almost any combination of q TCO/a-Si:H^c-Si:H/TCO layer thickness combinations.
用於對非常高效率的測試電池之本發明應用若其成 本相較於預期3.5-4%的模組功率增加並非很昂貴，即亦能 應用於工業的薄膜a-Si :H矽模組。該反射係數之角度依存 非常小即使是遠離近銳 （near_specular)的光入射角度’ 反射損失仍減少。因此，不僅可藉DART達成較高的效率’ 實際戶外應用的模組之年能量產率（kWh/kWp)亦因DART -12- 201131797 特徵之弱角度依存性而確實地受到影響。周知之寬波段鍍 抗反射薄膜亦可因最小角度依存性而最佳化，但這是對此 一銨膜之最佳化之額外，強制要件。 本發明藉前玻璃/TCO/Si/TCO裝置系統的最佳化的 組合，具有微形態雙太陽能電池效率增加之可能性，及供 進一步減少Si吸收體之增進光陷捕能力的可能性（直到 現在，在該基底電池之光電流有10%增益，在某些‘情況下， 增加之Voc及FF)。須知，以上給定之値依許多參數而定， 〇 且無法輕易地給予一般的做法。對本發明DART處理之曝 露時間取決於蝕刻儀器的能力、玻璃類型（厚度，化學構 成）、該使用的前及背接點（特別是其模糊（Haze)因素），該 技術（a Si或微型態）、就每一技術而言對該電池所使用的吸 收材層厚度、中間（intermediate)反射物的使用與否、及雖 最後卻非不重要地，僅達到抗反射效應（短蝕刻）或擴散 PLUS抗反射（長蝕.刻處理）。熟於本技藝人士將遵循上述 Q 基本指導，對同等製程環境採取必要的轉變。 【圖式簡單說明】 第1圖顯示基本簡單光電伏電池結構； 第2圖顯示具有空氣/平面玻璃介面、商用寬波段抗 反射塗層及具發明性的擴散抗反射處理的一系列玻璃 /TC0/a-Si:Hpin/TC0結構的全反射係數之特性光譜； 第3圖顯示一藉由5分鐘電漿處理蝕刻過的Schott Borofl〇at33玻璃之具發明性處理的表面之掃描式電子顯 -13- 201131797 微鏡圖； 第 4圖顯示於 120分鐘期間蝕刻J Borofloat33玻璃之具發明性之處理表面之掃 微鏡圖，以及 第5圖顯示一雙微型態電池無及有120分 理之該微結晶基底電池（右側）及該非晶頂部電 子效率。 【主要元件符號說明】 i 的 Schott 描式電子顯 鐘DART處 池的外部量The present invention for very high efficiency test cells is not very expensive if it is expected to be 3.5-4% higher than the expected module power increase, i.e., it can also be applied to industrial thin film a-Si:H矽 modules. The angle of the reflection coefficient is very small, even if it is far from the near-specular light incident angle, the reflection loss is reduced. Therefore, not only can DART achieve higher efficiency', the annual energy yield (kWh/kWp) of modules for practical outdoor applications is also positively affected by the weak angular dependence of the characteristics of DART -12-201131797. The widely known wide-band anti-reflective film can also be optimized for minimum angular dependence, but this is an additional and mandatory requirement for the optimization of this ammonium film. The invention combines the optimized combination of the front glass/TCO/Si/TCO device system, has the possibility of increasing the efficiency of the micro-morphic double solar cell, and the possibility of further reducing the ability of the Si absorber to enhance the light trapping ability (until Now, the photocurrent in the base cell has a gain of 10%, in some cases, Voc and FF are increased. It should be noted that the above given parameters depend on many parameters, and it is not easy to give a general practice. The exposure time for the DART treatment of the present invention depends on the ability of the etching apparatus, the type of glass (thickness, chemical composition), the front and back contact of the use (especially its Haze factor), the technique (a Si or micro) State, for each technology, the thickness of the absorber layer used for the battery, the use of intermediate reflectors, and, although not unimportant, only achieve anti-reflection effects (short etching) or Diffusion PLUS anti-reflection (long etch. engraving). Those skilled in the art will follow the above Q basic guidance and take the necessary changes to the same process environment. [Simple diagram of the diagram] Figure 1 shows the structure of a basic simple photovoltaic cell; Figure 2 shows a series of glass/TC0 with an air/planar glass interface, a commercial wide-band anti-reflective coating and an inventive diffusion anti-reflection treatment. /a-Si: Characteristic spectrum of the total reflection coefficient of the Hpin/TC0 structure; Figure 3 shows a scanning electron display of the inventive surface of the Schott Borofl〇at33 glass etched by a 5 minute plasma treatment - 13- 201131797 Micromirror; Figure 4 shows a micromirror image of the invented treated surface of J Borofloat 33 glass during 120 minutes, and Figure 5 shows that a pair of miniature state batteries have no 120 divisions. The microcrystalline base cell (right side) and the amorphous top electron efficiency. [Main component symbol description] The external quantity of the pool of the Schott-type electronic clock DART of i
40 光電伏電池 41 透明基板 42 則接點 43 下層 44 次層 45 鄰近次層 46 最後次層 47 背接點 48 反射層 49 空氣/玻璃介面 -14-40 Photovoltaic cells 41 Transparent substrate 42 Contact point 43 Lower layer 44 Sublayer 45 Adjacent sublayer 46 Last sublayer 47 Back contact 48 Reflective layer 49 Air/glass interface -14-