201129117 六、發明說明： 【發明所屬之技術領域】 本發明侧於-種微機電播製作方式，尤指—種微機電麥克風 的製作方式。 · 【先前技術】 、微機電麥克風結獅由高度整合電子電路與微麵械結構所構 成。目前微機電麥克風結構可藉由—般的微電子技術例如微影、氣 相沉積、钱刻’或光刻電铸模造(LIGA)等技術，於絕緣層或其他半 導體等之基板上製得。近來，為了賴機電元件與CM〇s(互補式金 氧料體)元將合概機電纽錢·射，已有姻與習知類 比及數位CMOS電路同麵的製造步驟來製造微機電系統麥克風 結構。 、微機電麥克風其主要運作原理為使用一可因應聲波變化作相對 運動之微小且可彎曲之隔膜(diaphragm)4薄膜(_brane)。薄膜一 般具有導铺性或包含―電極，同喊由—且具錢孔之背板電極 與薄膜構成-可變電容，以偵_膜之微幅撓曲。上述由薄膜與背 板導體所產生之電容值會被制A並成為麥克風之輸出訊號。 一般來說，伽彳隔膜訊號之邏輯树所放置的位置稱為晶圓正 面\未設置主動元件的那—面晶關稱為晶时面。目前背板電極 的製作方式為在·正面的隔膜、邏輯树以及電連結隔膜及邏輯 凡件的金助連線完成之後，將晶_轉，再由晶圓背面製作出麥 201129117 克風的月板極與麥克風的通孔。不論如何製作麥克風的通孔，現 有的製作方式有幸父耗時或難以控制背板電極幾何尺寸的問題。 【發明内容】 有^於此’本發明之主要目的之一在於提供一麵機電麥克風結 製乍方法以有效降低微機電系統麥克風之製作時間以及控制 背板電極幾何尺寸。 • _根據本發明之較佳實施例，本發明之製作微機電麥克風的方法， 包3·百先’提供—基底包含—第—表面和—第二表面並且該基底 包含至少-邏輯元件區和至少一微機電元件區，然後，形成依序形 成塾氧化層和-氮化石夕層於該基底之第一表面，接著圖案化塾氧 化層和氮化石夕層’曝露出部分的邏輯元件區基底，之後，以整氧化 層和氮化石夕層為遮罩，侧基底之第一表面以形成至少-第三溝渠 於該邏輯元件區。然後，再次圖案化墊氧化層和氮化石夕層，曝露出 部分的微機電元件區基底，再以圖案化的塾氧化層和氣化石夕層為遮 罩’钱刻基底之第-表面以形成複數個第一溝渠。之後形成一絶緣 材料於第三溝渠和第-溝渠之中，接著，去除塾氧化層和氮化石夕層， 然後至少形成-邏輯元件於邏輯元件區，再形成金屬層間介電層， 並且形成金屬内連線於金屬層間介電層，此外，此時亦在微機電元 件區内形成-金屬振膜，嵌人於金屬層間介電層中。紐，钱刻基 底的第二表面，職-第二溝渠於微機電元件區，最後再去除微機 電讀區部分的金屬層間介電層，以及位於第一溝渠中的絶緣材料。 本發明的第-溝渠和第二溝渠即作為微機電麥克風的通孔，而第 201129117 一溝渠係藉由蝴基底的第—表面形成，而第二溝渠是蝴第二表 面形成，其優點在於可加快通孔的製作速度。 【實施方式】 第1圖至第8圖繪示的是本發明製作微機電麥克風的方法之示音 圖。如第1圖所示，首先，提供一基底1G包含一第—表面12，丁^ 如絲面’和—第二表面14，例如背面，並且基底⑺包含至少— 邏輯兀件HA和至少-微機電元件區B，基底1()可以是單晶石夕、 多晶矽、絕緣層上覆矽等。 接著，全面形成遮罩層17於基底10之第-表面12，遮罩層17 例如包含-塾氧化層16和—氮化碎層18，而塾氧化層16係在氮化 石夕層18下方，其可利用熱氧化製程或化學氣相沈積製程形成，而氮 化石夕層18則可利用化學氣相沉積形成。前述的氮化砂層18 續的步驟中作為硬遮罩，而塾氧化層丨6齡獅來將氮化石夕層18 的應力釋放分散。然後，形成—贿化光_絲)覆蓋位於微機 電兀件區B的基底U)之第—表面12，曝露出部分邏輯元件區a的 氮化夕層18祕姓刻塾氧化層16和氮化碎層邮圖案化光阻之 圖案轉印到魏化層16和氮化料18上，之後絲圖案化光阻， 再以塾氧化層16和氮切層18為遮罩，侧邏輯元件區A之基底 10之第-表面12以形成至少_淺溝渠2G，絲作為邏輯元件區A 中後續所形成之各树的電性隔離。根據本發明之較佳實施例，淺 深度dl係小於1微米，其中深度dH__2〇之底 部至基底U)之第-表面12之垂直距離。 201129117 如第2圖所示’形成另一圖案化光阻(圖未示)覆蓋位於邏輯元件 區A的基底1G之第—表面12，曝露出部分位於微機電元件區b的 氮化石夕層I8豸後，進行—侧製程，將圖案化光阻之圖案轉移到 氮化石夕層18和塾氧化層16上。接著，以圖案化光阻、塾氧化層Μ 和氮化㈣18為遮罩，則基底1G㈣—表面12形成複數個獨立 的第-溝渠22 ’各個第一溝渠22在後續將作為微機電麥克風的通 孔圖案。根據本發明之較佳實施例，可利用深反應式離子侧伽p reaCtlVei〇netChing)方式來形成第一溝渠22，當然，其它如電賴刻 法亦可以使用在本發明，在侧第—溝渠22時，較佳係利用餘刻時 間紐制第-溝渠22的深度，而第—溝渠22的深度旧較佳約為 20微未，而各個第一溝渠22之間的間距s較佳介於3至顧米之 間，其中棘㈣指第-溝渠22之底部至基錢之第—表面12 之垂直距離。 =艮據本發明之另一較佳實施例，淺溝渠2〇和第一溝渠η形成的 =:後更動’例如’在墊氧化層16 _層18完成之後， —圖案刀位於微機電元件區B的氮化石夕層18墊氧化層Μ。接 層16和氣化石夕層18為遮罩，飯刻基底10的第一表面 —溝渠22 ’然後再圖案化邏輯元件區A的 亂切層18缝化層16，紐再_基底 2 淺溝渠20。 j禾衣囟丨2形成 如第3圖所示’接著於基底1〇之第一表面η上全面形成 材料24如氧化矽層填入淺溝準加 、、緣 接著再以氮化石夕屏18奸Μ ^22’如第4圖所示’ 曰8為停止層，平坦化絶緣材料24。值得注咅的 201129117 二二渠22的深度較深，因此，在利用化學氣相沈積法 5 Μ又電漿化學氣她積法(HDP-CVD)形親緣材料24 於第一賴22巾時’可能會由於第—溝渠22的高紅(aspectrati〇) 過大.E &成緣材料24將嶋^(_*hang)縣而無法完全填滿第 :秦尔 _在第—溝渠22中形成孔洞26，但由於本發明控制了 第-溝渠22之深度d2和間距s，因此，即使在第—中形成 孔洞26，孔洞26也會在第—溝渠22的中間部分而孔洞％周圍皆 被絶緣频24包覆，並且在平坦姚騎料24後，孔洞％ 依然會被包覆錢緣材料Μ巾，不轉露出來。 如第5圖所示’去除氮化石夕層18以及塾氧化層16，接著於位於 邏輯元件HA中之基底1G的第—表面12上形成所需的邏輯元件^ 例如一 M〇S電晶體或是CMOS電晶體等。接著，選擇性地進行金 屬石夕化物餘，例如全面性形成—金胁化物崎層(目未示)如氧 化矽、氮化矽等介電層覆蓋在微機電元件區B内以及邏輯元件區A 内之基底10之第一表面12，然後移除至少部分邏輯元件區A内的 金屬石夕化物阻擔層，隨後，形成一金屬層（圖未示），例如，Ni、c〇、 Pt、Pd、Mo、Ti或其組合或合金等，覆蓋邏輯元件區A内之基底 10之第一表面12和位在微機電元件區b内剩餘的金屬矽化物阻擋 層，之後，對金屬層進行一金屬矽化製程，此時，利用熱處理使金 屬層和矽基材反應生成金屬矽化物。於是在邏輯元件16上的訊號輪 入端或輸出端，例如MOS電晶體的汲極、源極和閘極以及裸露的 矽材上即會形成金屬矽化物。然後將金屬矽化物阻擋層和金屬層移 201129117 然後，進行—金屬内連線製程。例如於基底1G的第-表面12 上形成金屬賴介電層3G，其㈣可包含有氧切、l.k等絕緣 材料，、可為單層結構也可為多層結構。並且在金屬層間介電層邓 内形成金屬内連線32，例如，金屬插塞與金屬連線層。上述步驟可 反覆進行多次’以在金屬層間介電層3〇中形成完整的金屬内連線 32 ’並利用此金制連線製程同時在微機電元件區B内之金屬層間 介電層30的上方亦彻各金屬連線層與各金屬插塞形成至少一微 機電το件，例如隔膜34，作為微機電麥克風的振動膜。隔膜％ _ 般係採用銘製程來形成微型金屬網作為_。此外，邏輯元件μ 係藉由金屬内連線32和前述之隔膜％電連結。又，在本發明的另 -實㈣巾’可姻多晶⑪在前段製程中來製作微機電麥克風的振 動膜來替代金屬内連線所形成的振動膜。 如第6圖所示，翻轉基底1〇，選擇性地研磨基底1〇之第二表面 14使基底10的厚度減少，然後在基底1()之第二表面14選擇性地 全面形成一氧化矽層36 ’之後形成一圖案化遮罩38，如一光阻戋是 -硬遮罩層於基底1G的第二表面Μ覆蓋邏輯元件區A並且曝露出 微機電元件區B預定形成一第二溝渠的位置。 如第7圖所示’姓刻基底1()以形成—第二溝渠4()，在钱刻基底 10時，可以位於各個第一溝渠22中的絶緣材料24為停止層，^者 是以触刻_來控·二溝渠4〇舰度。第二溝渠4G同時和各個 第-溝渠22減’紐，去除圖案化遮罩38。根據本發明之較佳 實施例’第二溝渠40可以利用深反應式離子餘刻而形成。此外，如 前文所述’由於孔洞26周圍完全被絶緣材料24包圍，並且孔洞％ 201129117 在離絶緣㈣24的表面—齡财之下，_ 4〇時，絶緣材料24健會完全包圍孔胳細6不會曝露一出^ 直^後續將絶緣材料24移除時，孔洞％才會連同 起 被去除。 π 4起 ^兀龍A來進行製程，例如等向性的祕刻或蒸氣則 電=::=電:龍B内位於隔膜34周圍的金屬層間介 工移除金屬層間介電層30同時亦移除位於 成一:g 安絶緣材料24。其中第-溝渠22和第二溝渠4〇構 成一通孔圖案42，以容許空氣分子上下的自由運動，使得振㈣ =從外界進入之聲波而震動或藉由本身之震動而將聲波傳遞至外 ^而位於第-溝渠22之間的基底1G卿為麥克風的背板電極。 ^後’再移除圖案化遮罩。接著可選擇性地全面塗覆—彈性 ^振膜34上，以提供振膜34更好的彈性，彈性層可包括例如塑 性橡师她c rubber)、鐵弗隆⑽〇n)、帕瑞玲(㈣咖⑧，商品名， 屬於多氣聯苯-族的化合物）、及聚醯胺(p〇lyamide)。至此本發明之 微機電麥克風已完成。 本發明之特徵在於通孔圖案並非皆由侧晶背形成，其係分別由 餘刻晶圓正面形成複數個第—溝渠與_晶圓_形成第二溝渠而 形成，因此，可以避免第—溝渠之_基底發生伽。再者，本發 明於形成第二溝渠時，係使用第—溝渠中的絶緣材料作祕刻停止 層，此外，相較於習知由钱刻晶背形成通孔圖案的方式，本發明之 方式可以減少通孔圖案的製作時間。 201129117 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所 做之均等變化與修飾’皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖至第8圖繪示的是本發明製作微機電麥克風的方法之示意圖。 【主要元件符號說明】 基底 第一表面 遮罩層 淺溝渠 絶緣材料 邏輯元件 金屬内連線 氧化石夕層 第二溝渠 10 14 17 20 24 28 32 36 40 12 16 18 22 26 30 34 38 42 第一表面 墊氧化層 氮化破層 第一溝渠 孔洞 金屬層間介電層 隔膜 圖案化遮罩 通孔圖案 11201129117 VI. Description of the Invention: [Technical Field] The present invention is directed to a micro-electromechanical broadcast production method, and more particularly to a micro-electromechanical microphone production method. · [Prior Art] The MEMS microphone lion is composed of highly integrated electronic circuits and micro-machine structures. At present, the microelectromechanical microphone structure can be fabricated on a substrate such as an insulating layer or other semiconductor by a microelectronic technique such as lithography, gas deposition, or laser photolithography (LIGA). Recently, in order to make electromechanical components and CM〇s (complementary oxy-oxide body) elements will be combined with the analogy and digital CMOS circuits in the same manufacturing steps to manufacture MEMS microphones. structure. The main operating principle of MEMS microphones is to use a tiny and flexible diaphragm 4 film (_brane) that can respond to changes in sound waves. The film is generally conductive or includes an "electrode, which is shouted by - and a back hole electrode with a carbon hole and a thin film - a variable capacitance to detect the slight deflection of the film. The capacitance values produced by the film and backplane conductors described above are A and become the output signal of the microphone. In general, the position where the logic tree of the Galer diaphragm signal is placed is called the front side of the wafer. The surface of the wafer is not the active element. At present, the back-plate electrode is fabricated in such a way that after the front diaphragm, the logic tree, and the gold-bonded connection of the electrical connection diaphragm and the logic component are completed, the crystal is turned, and then the back of the wafer is made into the moon of 201129117 gram wind. The through hole of the plate and the microphone. Regardless of how the through hole of the microphone is made, the existing method of production is fortunate that the father is time consuming or has difficulty controlling the geometry of the back plate electrode. SUMMARY OF THE INVENTION One of the main objects of the present invention is to provide an electromechanical microphone junction method for effectively reducing the fabrication time of a microelectromechanical system microphone and controlling the geometry of the backplane electrode. • In accordance with a preferred embodiment of the present invention, a method of fabricating a microelectromechanical microphone of the present invention, the package includes a substrate comprising a first surface and a second surface and the substrate comprises at least a logic element region and At least one microelectromechanical element region, and then forming a tantalum oxide layer and a nitride layer on the first surface of the substrate, followed by patterning the tantalum oxide layer and the nitride layer to expose portions of the logic element region substrate And then, with the oxide layer and the nitride layer as a mask, the first surface of the side substrate forms at least a third trench in the logic element region. Then, the pad oxide layer and the nitride layer are patterned again to expose a portion of the MEMS region, and then the patterned ruthenium oxide layer and the gasification layer are used as a mask to form a first surface of the substrate. The first ditches. Forming an insulating material in the third trench and the first trench, and then removing the tantalum oxide layer and the nitride layer, and then forming at least a logic element in the logic element region, forming a metal interlayer dielectric layer, and forming a metal The interconnect is connected to the inter-metal dielectric layer. In addition, a metal diaphragm is also formed in the MEMS region to be embedded in the inter-metal dielectric layer. New, the second surface of the base, the second-ditch in the MEMS region, and finally the inter-metal dielectric layer of the portion of the electro-acoustic region of the microcomputer, and the insulating material located in the first trench. The first trench and the second trench of the present invention serve as through holes of the MEMS microphone, and the 201129117 ditch is formed by the first surface of the butterfly substrate, and the second trench is formed by the second surface of the butterfly, which has the advantage that Speed up the production of through holes. [Embodiment] Figs. 1 to 8 are diagrams showing a method of fabricating a microelectromechanical microphone according to the present invention. As shown in Fig. 1, first, a substrate 1G is provided to include a first surface 12, such as a silk surface and a second surface 14, such as a back surface, and the substrate (7) contains at least - a logic element HA and at least - micro The electromechanical element region B, the substrate 1 () may be a single crystal, a polycrystalline silicon, an insulating layer, or the like. Next, a mask layer 17 is formed over the first surface 12 of the substrate 10. The mask layer 17 includes, for example, a germanium oxide layer 16 and a nitride layer 18, and the tantalum oxide layer 16 is under the nitride layer 18. It can be formed using a thermal oxidation process or a chemical vapor deposition process, while the nitride layer 18 can be formed by chemical vapor deposition. The aforementioned nitriding sand layer 18 is used as a hard mask in the subsequent step, and the bismuth oxide layer 丨 6-year-old lion to release the stress release of the nitride layer 18. Then, forming a bribe-lighting wire covers the first surface 12 of the substrate U) located in the microelectromechanical element region B, exposing a portion of the logic element region a, and etching the oxide layer 16 and nitrogen The pattern of the patterned layered photoresist is transferred onto the Weihua layer 16 and the nitride material 18, after which the photoresist is patterned, and the tantalum oxide layer 16 and the nitrogen cut layer 18 are used as masks, and the side logic element region is used. The first surface 12 of the substrate 10 of A is formed to form at least a shallow trench 2G which is electrically isolated as a subsequent tree formed in the logic element region A. In accordance with a preferred embodiment of the present invention, the shallow depth dl is less than 1 micron with a vertical distance from the bottom of the depth dH__2〇 to the first surface 12 of the substrate U). 201129117 As shown in FIG. 2, 'forming another patterned photoresist (not shown) covers the first surface 12 of the substrate 1G located in the logic element region A, and exposing a portion of the nitride layer I8 located in the microelectromechanical device region b Thereafter, a pattern of patterned photoresist is transferred to the nitride layer 18 and the tantalum oxide layer 16 by a side process. Next, with the patterned photoresist, tantalum oxide layer 氮化 and nitride (4) 18 as masks, the substrate 1G(4)-surface 12 forms a plurality of independent first trenches 22' each of the first trenches 22 will be used as a microelectromechanical microphone Hole pattern. According to a preferred embodiment of the present invention, the first trench 22 can be formed by means of a deep reactive ion side gamma pC V tl tl Ch , , , , , , , , , , , , , , , , , , , , , , , , , , , , , At 2 o'clock, it is preferred to utilize the depth of the first-ditch 22 in the remaining time, and the depth of the first-ditch 22 is preferably about 20 μg, and the spacing s between the first trenches 22 is preferably between 3. Between the two meters, the spine (four) refers to the vertical distance from the bottom of the ditch 22 to the surface 12 of the base money. According to another preferred embodiment of the present invention, the shallow trench 2〇 and the first trench η form a =: after the change 'for example, after the pad oxide layer 16 _ layer 18 is completed, the pattern knife is located in the MEMS region B nitride layer 18 is padded with oxide layer. The bonding layer 16 and the gasification layer 18 are masks, the first surface of the substrate 10 is dug-ditch 22' and then the chaotic layer 18 of the logic element area A is patterned. The new layer is 20 shallow trenches 20 . j 衣衣囟丨2 is formed as shown in Fig. 3 'subsequently forming a material 24 on the first surface η of the substrate 1 如 such as a yttrium oxide layer filled with a shallow groove, and then a nitrite 18 Μ Μ ^22 ' As shown in Figure 4 曰 8 is the stop layer, flattening the insulating material 24. It is worth noting that the depth of 201129117 Er 2 canal 22 is deep, so when using chemical vapor deposition 5 Μ and plasma chemical gas herding method (HDP-CVD) shaped affinity material 24 in the first Lai 22 towel ' It may be because the high red (aspectrati) of the first-ditch 22 is too large. The E & rim material 24 will not be completely filled in the 嶋^(_*hang) county: Qiner _ forming a hole in the first-ditch 22 26. However, since the present invention controls the depth d2 and the spacing s of the first trench 22, even if the hole 26 is formed in the first portion, the hole 26 is insulated in the middle portion of the first trench 22 and around the hole %. 24 covered, and after the flat Yao riding material 24, the hole% will still be covered with money edge material wipes, not revealed. As shown in FIG. 5, 'the nitride layer 18 and the tantalum oxide layer 16 are removed, and then the desired logic element ^, such as an M〇S transistor, is formed on the first surface 12 of the substrate 1G in the logic element HA. It is a CMOS transistor or the like. Then, selectively performing a metallization, for example, a comprehensive formation - a metallization layer (not shown) such as a dielectric layer such as hafnium oxide or tantalum nitride is covered in the microelectromechanical element region B and the logic element region The first surface 12 of the substrate 10 in A is then removed from at least a portion of the metallization resist layer in the logic element region A, and then a metal layer (not shown) is formed, for example, Ni, c〇, Pt , Pd, Mo, Ti, or a combination or alloy thereof, covers the first surface 12 of the substrate 10 in the logic element region A and the metal halide barrier layer remaining in the microelectromechanical device region b, and thereafter, the metal layer is performed A metal deuteration process, in which case the metal layer and the ruthenium substrate are reacted to form a metal ruthenium by heat treatment. Metal halides are then formed on the signal wheel or output of the logic element 16, such as the drain, source and gate of the MOS transistor and the exposed coffin. The metal telluride barrier layer and the metal layer are then moved 201129117 and then subjected to a metal interconnect process. For example, a metal dielectric layer 3G is formed on the first surface 12 of the substrate 1G, and (4) may include an oxygen-cut, l.k, etc. insulating material, and may have a single layer structure or a multilayer structure. And a metal interconnect 32 is formed in the inter-metal dielectric layer, for example, a metal plug and a metal wiring layer. The above steps may be repeated a plurality of times to form a complete metal interconnect 32' in the inter-metal dielectric layer 3 and utilize the gold wiring process to simultaneously interleave the inter-metal dielectric layer 30 in the microelectromechanical device region B. Further, the metal wiring layer and the metal plugs form at least one microelectromechanical device, such as the diaphragm 34, as a diaphragm of the MEMS microphone. The diaphragm % _ is generally formed by the Ming process to form a micro metal mesh as _. In addition, the logic element μ is electrically coupled by the metal interconnect 32 and the aforementioned diaphragm %. Further, in the other embodiment of the present invention, the vibrating film of the microelectromechanical microphone is used in the front stage process to replace the vibrating film formed by the metal interconnect. As shown in Fig. 6, the substrate 1 is flipped, the second surface 14 of the substrate 1 is selectively ground to reduce the thickness of the substrate 10, and then the tantalum oxide is selectively formed on the second surface 14 of the substrate 1 (). The layer 36' is followed by a patterned mask 38, such as a photoresist layer, a hard mask layer over the second surface of the substrate 1G, covering the logic element region A and exposing the microelectromechanical device region B to form a second trench. position. As shown in Fig. 7, 'the base 1 () is named to form the second trench 4 (), when the substrate 10 is engraved, the insulating material 24 which may be located in each of the first trenches 22 is a stop layer, Touching the _ to control the second ditches and 4 ships. The second trench 4G is simultaneously subtracted from each of the first trenches 22 to remove the patterned mask 38. According to a preferred embodiment of the present invention, the second trench 40 can be formed using deep reactive ion scavenging. In addition, as described above, 'because the circumference of the hole 26 is completely surrounded by the insulating material 24, and the hole % 201129117 is below the surface of the insulation (four) 24, _ 4 ,, the insulating material 24 will completely surround the hole. It will not be exposed. When the insulating material 24 is removed, the hole % will be removed together. π 4 兀 兀 A A 来 进行 , , , , , , , , , , , , , , , , , , , , , , , , , , , = = = = = = : : : : : : : : : : : : The removal is located in one: g An insulation material 24. The first trench 22 and the second trench 4 〇 form a through-hole pattern 42 to allow free movement of the air molecules up and down, so that the vibration (four) = sound waves entering from the outside to vibrate or transmit the sound waves to the outside by the vibration of the ^ The substrate 1G located between the first trenches is the back electrode of the microphone. ^ After 'removal of the patterned mask. Then, the elastic film 34 can be selectively applied in a comprehensive manner to provide better elasticity of the diaphragm 34, and the elastic layer can include, for example, a rubber rubber, a metal rubber, an iron alloy (10) 〇n), a paring ((4) Coffee 8, trade name, a compound belonging to the poly-biphenyl-group), and polypamine (p〇lyamide). So far, the MEMS microphone of the present invention has been completed. The present invention is characterized in that the through-hole patterns are not all formed by the side crystal backs, which are formed by forming a plurality of first-ditch and _wafer_forming second trenches on the front surface of the remaining wafer, thereby avoiding the first-ditch The base of the gamma occurs. Furthermore, in the formation of the second trench, the present invention uses the insulating material in the first trench as a secret stop layer, and in addition, the manner of the present invention is compared with the conventional method of forming a via pattern by the crystal engraved back. The production time of the via pattern can be reduced. The above description is only the preferred embodiment of the present invention, and all changes and modifications made by the scope of the present invention should be within the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 to 8 are schematic views showing a method of fabricating a microelectromechanical microphone according to the present invention. [Main component symbol description] Substrate first surface mask layer shallow trench insulation material logic element metal interconnect line oxide oxide layer second trench 10 14 17 20 24 28 32 36 40 12 16 18 22 26 30 34 38 42 Surface pad oxide layer nitriding layer first trench hole metal interlayer dielectric layer diaphragm patterned mask via pattern 11