TW201128916A - Switching mode power supply with a spectrum shaping circuit - Google Patents

Switching mode power supply with a spectrum shaping circuit Download PDF

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TW201128916A
TW201128916A TW99123789A TW99123789A TW201128916A TW 201128916 A TW201128916 A TW 201128916A TW 99123789 A TW99123789 A TW 99123789A TW 99123789 A TW99123789 A TW 99123789A TW 201128916 A TW201128916 A TW 201128916A
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Taiwan
Prior art keywords
switching
circuit
signal
power supply
voltage
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TW99123789A
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Chinese (zh)
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TWI474595B (en
Inventor
Jin Hu
Jun-Ming Zhang
Yuan-Cheng Ren
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Monolithic Power Systems Inc
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Priority claimed from US12/697,979 external-priority patent/US8270185B2/en
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Publication of TWI474595B publication Critical patent/TWI474595B/en

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Abstract

In accordance with the teachings described herein, systems and methods are provided for a switching mode power supply. In one example, the switching mode power supply may include a transformer, a switching circuit and a switching control circuit. The transformer receives a DC input voltage on a primary winding and generates a DC output voltage on a secondary winding. The switching circuit, which may include a MOSFET switch, is coupled to the transformer and is configured to switch the transformer on and off. The switching circuit in order to regulate the DC output voltage of the transformer. The switching control circuit is configured to generate the switching control signal as a function of a timing signal having a varying frequency, wherein the varying frequency of the timing signal causes a switching frequency of the switching circuit to vary over a period of time in order to reduce electromagnetic interference caused by the switching circuit.

Description

201128916 六、發明說明: 【發明所屬之技術領城】 [⑽π 本專利申請案所述技術大體上關於切換模式電源供應。 此申請案主張2009年5月26日申請之中國專利申請案第 200910059429. 7號的優先權及權益,其完整内容 乂弓丨用 的方式併入本文中。 [先前技術] 闺在-典仙換模式電源供應巾,“換頻率造成的错波 通常會增添整體系統之電磁干擾(EMI)。這對於具有 一高切換頻率造成之大量諧波增益的電源供應來說特別由 是個問題。因此最好提供一可以高切換頻率運作且對如 有一減低效果的切換模式電源供應。 【發明内容】 [0003]201128916 VI. Description of the invention: [Technology leading to the invention] [(10) π The technology described in this patent application relates generally to a switched mode power supply. This application claims the priority and benefit of the Chinese Patent Application No. 200910059429. filed on May 26, 2009, the entire content of which is incorporated herein by reference. [Prior Art] 闺 - 典 典 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换 换In particular, it is a problem. Therefore, it is preferable to provide a switching mode power supply that can operate at a high switching frequency and has a reducing effect. [Abstract]

依據本發明之教示’提出用於切換模式電源供應之系 及方法。在-實财’仙騎式電源絲可包含二 壓器、-切換電路及—切換控制電路。該變壓器在一 級繞組上接收-DC輪入電壓且在一次級繞組上產生一 輸出電壓該切換電路(其可包含—職⑽開關)泰 至該變壓器且經構形用以接通及斷開該變壓器。該切 控制電路纽-切換控制錢絲控職切換電路以 調節該變壓H復輸出電壓1切換控制電路經構形 以產生該切換控制信號為_具有—變動頻率之-時序 號的函數’其中該時序信號之變動頻率導致該切換電 之一切換頻率在一段時間當中變動。 在另一實财,該切顧式電源供應苦包含—整流器 099123789 表單編號A0101 第4頁/共33頁 〇9933467〇〇-〇 201128916 Ο 一變壓器、一切換電路、及一切換控制電路。該整流器 接收一 AC輸入電壓且將該AC輸入電壓轉化成一 DC輸入電 壓。該變壓器經構形用以將其初級繞組上之一DC輸入電 壓轉化成其次級繞組上之一DC輸出電壓。該切換電路耦 接至該變壓器之初級繞組且經構形用以基於一切換控制 信號控制通過該變壓器之初級繞組的電流。該切換控制 電路產生該切換控制信號為一具有一變動頻率之一時序 信號的函數,其中該時序信號之變動頻率導致該切換電 路之一切換頻率在一段時間當中變動以便減小由該切換 電路造成之電磁干擾。 一種調節一切換模式電源供應中之一輸出電壓的方法可 包含以下步驟:產生一具有一變動頻率的時序信號;監 測產生該輸出電壓之一變壓器的一或多個操作特性以產 生一反饋信號;產生一切換控制信號為該時序信號及該 反饋信號之一函數;且利用該切換控制信號接通及斷開 該變壓器以調節該輸出電壓,其中該時序信號之變動頻 ❹ 率導致該變壓器之一切換頻率在一段時間當中變動以便 減小電磁干擾。 [0004] 【實施方式】 第1圖是一具有一頻譜整形電路102之實例切換模式電源 供應100的簡圖。切換模式電源供應100包含一整流器電 橋104、一變壓器106、一切換電路108、及一切換控制 電路110。運作時,整流器電橋104接收一AC輸入電壓( V.),將該AC輸入電壓轉化成一被變壓器106之初級繞 in 組接收的DC輸入電壓。變壓器106受切換電路108控制以 099123789 在次級繞組上產生一DC輸出電壓(V +)。可包含一 out 表單編號A0101 第5頁/共33頁 0993346700-0 201128916 mosfet (如圖所示)或—些其他合適的電子切換器件之 切換電路108控制通過變壓器1〇6之初級繞組的電流以有 效地接通及斷開變壓器1()6。第i圖亦例示一儲存獄輸 入電㈣輸人電容器(cin)、—儲存霞輪出電壓的輸 出電谷為(C〇ut )、及一防止電流流回次級變壓器繞組内 的二極體(D)。 切換電路108受一切換控制信號lu控制,該切換控制信 號係由切換控制電路110產生為一具有一變動頻率之一時 序信號的函數。在第丨圖所示實例中,該時序信號係經J 利用頻譜整形電路1 〇 2改變一時轉信號(^κ )之頻率而 產生,詳見下文。這導致切換電路1〇8之切換頻率在一段 時間當中變動,改變切換頻譜之形狀以包含一較寬頻帶 。藉由加大該切換頻率之帶寬,之諧波増益減小從而 導致EMI減小。 為幫助例示所得EMI減小度,第2圖提供一具備恆定切換 頻率之典型切換模式電源供應..中之%的諧波增益與第1 圖實例之Vds的諧波增益之比較。在第2圖所示之圖中, 三條垂直實線例示一典型切換模式電源供應中之v的主 ds 要諸波。點線代表第1圖切換模式電源供應中可能發生之 減小諧波,其中切換頻率係變動的。如圖所示,藉由改 變切換頻率,vds的諧波散佈於一較寬頻譜當中且尖峰諧 波減小。這導致系統EMI減小。 再次參照第1圖,圖示實例中之切換電路1 1 〇包含一 RS正 反器112、一反饋電路(114、116、118)及一時序電路 (10 2、12 0 )。該反饋電路利用一電流感測電路1丨4、 一電壓反饋電路116及一比較電路118產生重設輸入(r) 099123789 表單編號A0101 第6頁/共33頁 0993346700-0 201128916A system and method for switching mode power supply is proposed in accordance with the teachings of the present invention. In the - real money, the Xianqi power cord can include a voltage regulator, a switching circuit and a switching control circuit. The transformer receives a -DC wheeling voltage on the primary winding and produces an output voltage on a secondary winding. The switching circuit (which may include a (10) switch) is coupled to the transformer and configured to turn the switch on and off transformer. The switching control circuit-switching control money control switching circuit to adjust the variable voltage H complex output voltage 1 switching control circuit is configured to generate the switching control signal as a function of the frequency coefficient of the variable frequency The varying frequency of the timing signal causes the switching frequency of the switching power to fluctuate over a period of time. In another real money, the power supply of the power supply is included - rectifier 099123789 Form No. A0101 Page 4 of 33 〇9933467〇〇-〇 201128916 Ο A transformer, a switching circuit, and a switching control circuit. The rectifier receives an AC input voltage and converts the AC input voltage to a DC input voltage. The transformer is configured to convert one of the DC input voltages on its primary winding to one of the DC output voltages on its secondary winding. The switching circuit is coupled to the primary winding of the transformer and is configured to control current through the primary winding of the transformer based on a switching control signal. The switching control circuit generates the switching control signal as a function of a timing signal having a varying frequency, wherein the varying frequency of the timing signal causes a switching frequency of the switching circuit to fluctuate over a period of time to reduce the switching circuit Electromagnetic interference. A method of adjusting an output voltage of a switched mode power supply can include the steps of: generating a timing signal having a varying frequency; monitoring one or more operational characteristics of the transformer that produces the output voltage to generate a feedback signal; Generating a switching control signal as a function of the timing signal and the feedback signal; and using the switching control signal to turn the transformer on and off to adjust the output voltage, wherein the varying frequency of the timing signal causes one of the transformers The switching frequency varies over a period of time to reduce electromagnetic interference. [Embodiment] FIG. 1 is a diagram showing an example switching mode power supply 100 having a spectrum shaping circuit 102. The switched mode power supply 100 includes a rectifier bridge 104, a transformer 106, a switching circuit 108, and a switching control circuit 110. In operation, rectifier bridge 104 receives an AC input voltage (V.) that translates the AC input voltage into a DC input voltage that is received by the primary winding in group of transformer 106. Transformer 106 is controlled by switching circuit 108 to produce a DC output voltage (V+) on the secondary winding with 099123789. May include an out form number A0101 page 5 / page 33 0993346700-0 201128916 mosfet (as shown) or some other suitable electronic switching device switching circuit 108 controls the current through the primary winding of transformer 1〇6 Effectively turn the transformer 1 () 6 on and off. Figure i also illustrates a storage input power (4) input capacitor (cin), an output electric valley for storing the output voltage of the Xia Lu (C〇ut), and a diode for preventing current from flowing back into the winding of the secondary transformer. (D). The switching circuit 108 is controlled by a switching control signal lu which is generated by the switching control circuit 110 as a function of a timing signal having a varying frequency. In the example shown in the figure, the timing signal is generated by J using the spectrum shaping circuit 1 〇 2 to change the frequency of the one-time turn signal (^κ), as described below. This causes the switching frequency of the switching circuit 1 to 8 to vary over a period of time, changing the shape of the switching spectrum to include a wider frequency band. By increasing the bandwidth of the switching frequency, the harmonic gain is reduced to cause EMI to decrease. To aid in exemplifying the resulting EMI reduction, Figure 2 provides a comparison of the harmonic gain of a typical switched mode power supply with a constant switching frequency, and the harmonic gain of Vds of the first example. In the diagram shown in Figure 2, three vertical solid lines illustrate the main ds of the v in a typical switched mode power supply. The dotted line represents the reduced harmonics that may occur in the switching mode power supply of Figure 1, where the switching frequency varies. As shown, by changing the switching frequency, the harmonics of vds are spread over a wider spectrum and the peak harmonics are reduced. This leads to a reduction in system EMI. Referring again to Figure 1, the switching circuit 1 1 〇 in the illustrated example includes an RS flip-flop 112, a feedback circuit (114, 116, 118), and a timing circuit (10 2, 12 0 ). The feedback circuit uses a current sensing circuit 1丨4, a voltage feedback circuit 116 and a comparison circuit 118 to generate a reset input (r). 099123789 Form No. A0101 Page 6 of 33 0993346700-0 201128916

給RS正反器Π2。該時序電路利用頻譜整形電路102及一 振逢器120產生—時鐘信號(CLK)為設定輸入(S)給 RS正反器112。rs正反器U2讓重設信號(r)有高於設 定信號(S)的優先權。因此,在重設輸入(R)處於一 两邏輯狀態之時會在該正反器之Q輸出上產生一邏輯低輸 出(亦即切換控制信號111),這導致MOSFET開關108斷 開,停止通過變壓器1〇6之初級繞組的電流。設定輸入( S)至該正反器之一高邏輯狀態(在此同時R為低)會在QGive the RS flip-flop Π 2. The timing circuit generates a clock signal (CLK) as a set input (S) to the RS flip-flop 112 by using the spectrum shaping circuit 102 and a oscillator. The rs flip-flop U2 causes the reset signal (r) to have a higher priority than the set signal (S). Therefore, when the reset input (R) is in a logic state, a logic low output (ie, the switching control signal 111) is generated on the Q output of the flip-flop, which causes the MOSFET switch 108 to be turned off and stopped. The current of the primary winding of transformer 1〇6. Set input (S) to one of the high-logic states of the flip-flop (where R is low) will be in Q

產生一邏輯高輸出,導致MOSFET開關108回到接通,允 許電流通過該初級繞組 在該反饋電路中,電流感測電路114產生一與通過變壓器 106之初級繞組的電流成正比之電流感謂信號(丨 ) sense ,且電壓反饋電路116產生一反饋信號(FB),該反饋信 號提供一閾值以將變壓器106之此電壓輸出(V )調節 out 成一期望值。由比較電路118比較電流感測信號(! senseGenerating a logic high output causes MOSFET switch 108 to return to turn on, allowing current to pass through the primary winding in the feedback circuit, and current sense circuit 114 produces a current sense signal proportional to the current through the primary winding of transformer 106. (丨) sense and the voltage feedback circuit 116 generates a feedback signal (FB) that provides a threshold to regulate the voltage output (V) of the transformer 106 out to a desired value. The current sense signal is compared by the comparison circuit 118 (! sense

)與反饋信號(FB)以產生送至正反器U2之重設輸入( R),在例示實例中鵁.較電路係一單一比較器。比較電 路118因而在電流感測信號(Isense)達到反饋信號(FB )所設定之閾值時在重設輸入(R)產生一邏輯高脈衝。 在該時序電路中,利用一定頻振盪器12〇產生一時鐘信號 (CLK),且由頻譜整形電路1〇2改變時鐘信號(CLK) 之頻率以產生作為設定輸入(S)送至rs正反器112之時 序信號。依此方式,由於電流感測信號(! )導致 sense J 守 MOSFET開關1 〇8將變壓器1 〇6斷開且該時序電路之時鐘脈 衝將變壓器106回復成接通,變壓器106持續循環經歷斷 開及接通週期。藉由改變時鐘脈衝之頻率,開關 099123789 0993346700-0 表單編號A0101 第7頁/共33頁 201128916And the feedback signal (FB) to generate a reset input (R) to the flip-flop U2, in the illustrated example, a single comparator. The comparison circuit 118 thus produces a logic high pulse at the reset input (R) when the current sense signal (Isense) reaches the threshold set by the feedback signal (FB). In the sequential circuit, a clock signal (CLK) is generated by the fixed frequency oscillator 12, and the frequency of the clock signal (CLK) is changed by the spectrum shaping circuit 1〇2 to be sent as a set input (S) to the rs positive and negative Timer 112 timing signal. In this way, since the current sense signal (!) causes the sense J MOSFET switch 1 〇 8 to disconnect the transformer 1 〇 6 and the clock pulse of the sequential circuit returns the transformer 106 to be turned on, the transformer 106 continues to cycle through the disconnection. And the on cycle. By changing the frequency of the clock pulse, the switch 099123789 0993346700-0 Form number A0101 Page 7 of 33 201128916

如第5圖所示,這減小系統EM I 108之接通點變成可變的, 〇 第3圖是一用於第1圖切換模式電源供應之-實例時序電 路的簡圖該0铸電路包含—頻譜整形電路1()2及一振盘 器120。在振盡器120中,由—固定電流源(1」與一從 頻譜整形電路102接收之頻譜整形信號(ss)的組合改變 橫跨s電電谷器(ct)之電壓。由一比較器122在橫跨 充電電容器(ct)之電壓達到—閾電M (、)時產生一 時鐘脈衝(CLK)。時鐘信號(CLK)亦控制—開關 )以在每一時鐘脈衝使龙電電容器放電。運作時 ,振盪器120因為頻譜整形儈號(ss)所提供之一變動電 流而產生一具有一變動頻率'的時鐘信號(CLK)❶ 頻譜整形電路102利用一位移暫存器126產生變動頻譜整 形信號(ss),該位移暫存器控制一數位_類比(D/A) 轉換器128中之一系列切換電流源(13_1〇)的輸出。位 移暫存器126包含一系列的d正反器(q0i_q7),該等 反器係由來自振盪器120之時鐘信號(CLK)驅動且經構 形用以使每一時綠脈衝通過該位移暫存器之一邏輯、" 位移。該位移暫存器之輸出(Q〇_Q7)被輸入至一系列邏 輯閘(OR2-ORO)以產生一個四位元數位控制字元,後者 被輸入至D/A轉換器128。在D/A轉換器128中,藉由控制 一系列的開關(S0-S3)切換電流源接通及斷 開來改變SS之電流而將該四位元控制字元轉化成一類比 頻譜整形(SS)信號。 頻譜整形電路102經歷該SS信號之一個循環的實例運作例 示於第4圖。如第4圖所示,該位移暫存器之每—時鐘( 099123789 表單編號A0101 第8頁/共33頁 0993346700-0 201128916 Q7-Q0 )導致開關系列(S3-S0 )加大ss之電流。特定 之’開關SO係用來供應0.251,開關S1係用來供應〇 5ι ,開關S2係用來供應0.75Ϊ,且開關S3係用來供應I。在 該例示實例中,頻譜整形電路102經構形用以依一重複模 式將SS從0提高至一峰值(I )然後降回到〇。依此方式,As shown in FIG. 5, this reduces the turn-on point of the system EM I 108 to become variable, and FIG. 3 is a simplified diagram of the example sequential circuit for the switching mode power supply of FIG. 1 The spectrum shaping circuit 1() 2 and a vibrating unit 120 are included. In the oscillating device 120, the voltage across the s electric grid (ct) is varied by a combination of a fixed current source (1) and a spectral shaping signal (ss) received from the spectral shaping circuit 102. A comparator 122 is provided. A clock pulse (CLK) is generated when the voltage across the charging capacitor (ct) reaches - threshold power M (,). The clock signal (CLK) also controls - switches to discharge the thermal capacitor at each clock pulse. In operation, the oscillator 120 generates a clock signal (CLK) having a varying frequency 'because of a varying current provided by the spectral shaping apostrophe (ss). The spectral shaping circuit 102 utilizes a shift register 126 to generate varying spectral shaping. A signal (ss) that controls the output of a series of switching current sources (13_1 〇) in a digital-to-analog ratio (D/A) converter 128. The shift register 126 includes a series of d flip-flops (q0i_q7) that are driven by a clock signal (CLK) from the oscillator 120 and configured to temporarily buffer each green pulse through the shift. One of the logic, " displacement. The output of the shift register (Q〇_Q7) is input to a series of logic gates (OR2-ORO) to generate a four-bit digital control word which is input to the D/A converter 128. In the D/A converter 128, the four-bit control word is converted into an analog spectrum shaping by changing the current of the SS by switching a series of switches (S0-S3) to switch the current source on and off. )signal. An example operation of the spectrum shaping circuit 102 undergoing one cycle of the SS signal is illustrated in FIG. As shown in Figure 4, each of the shift registers—clocks (099123789 Form No. A0101, Page 8 of 33, 0993346700-0, 201128916, Q7-Q0) causes the switch series (S3-S0) to increase the current of ss. The particular 'switched SO is used to supply 0.251, the switch S1 is used to supply 〇 5ι, the switch S2 is used to supply 0.75 Ϊ, and the switch S3 is used to supply I. In the illustrated example, spectrum shaping circuit 102 is configured to increase SS from 0 to a peak (I) and then back to 〇 in a repeating pattern. In this way,

改變振盪器120中之電容器(Ct)的該SS信號之電流隨每 一時鐘脈衝(CLK)增量’導致時鐘信號(clk)之頻率 依SS之一函數改變。也就是說,時鐘頻率隨著%電流加 大而加大。 第5圖示出橫跨第1圖的MQSFET開喊1Μ之電壓(V )之 ds ’〈 一實例,此時該開關為斷開。第5圖例示M0SFET開關1〇8 之接通點2 0 0如何因時鐘信號.:(CLK...).:.:之變化而變動(在 影線區200内)。開關接通點2〇〇之此變化造成一可變切 換頻率,其在接通時將vds之諧波分散於一較寬頻譜當中 ,導致EMI如前所述減小。Changing the current of the SS signal of the capacitor (Ct) in the oscillator 120 with each clock pulse (CLK) increment causes the frequency of the clock signal (clk) to change according to a function of SS. That is, the clock frequency increases as the % current increases. Fig. 5 shows an example of ds'' of the voltage (V) across the MQSFET of Fig. 1, in which case the switch is off. Figure 5 illustrates how the turn-on point 2 0 0 of the MOSFET switch 1 〇 8 varies due to a change in the clock signal :: (CLK...).::: (in the hatch area 200). This change in switch-on point 2 造成 results in a variable switching frequency that disperses the harmonics of vds across a wider spectrum when turned on, resulting in a reduction in EMI as previously described.

第6圖是一具有一頻譜整形電路3〇2之男一實例切換模式 電源供應300的簡圖,該頻譜整形電路使該電源供應之切 換頻率變動。在此實例中,使切換頻率變動的時序信號 304係利用一準共振變換器產生,該準共振變換器包含— 波谷彳貞測電路3 0 6以使該切換頻率與切換波形(v )中 ds 之一波谷對準。此準共振切換技術降低該變壓器中之功 率損失,進一步提高系統效率。第6圖亦例示用於電流感 測電路308及反饋電路31〇之實例電路實施,其亦可被用 在第1圖之實例中。 第6圖所示切換模式電源供應包含一整流器電橋312,一 099123789 具有一個初級繞組及二個次級繞組的變壓器314,一切換 表單煸號 A0101 第 9 頁/共 33 S 0993346700-0 201128916 電路316,及一具有一RS正反器317、一反饋電路及一時 序電路的切換控制電路。在此實例中,該時序電路包含 一頻譜整形電路302、一參考電路318、一波谷偵測電路 3 0 6、及一比較電路3 2 0。該反饋電路包含電流感測電路 308、反饋電路310、一比較電路322、一邏輯閘324、及 一延時電路326。 在電流感測電路3 08中包含一電阻器(R )以提供一與通Figure 6 is a simplified diagram of a male-in-one switching mode power supply 300 having a spectral shaping circuit 3〇2 that varies the switching frequency of the power supply. In this example, the timing signal 304 that causes the switching frequency to vary is generated using a quasi-resonant converter that includes a valley detection circuit 306 to cause the switching frequency to be in the switching waveform (v) One of the troughs is aligned. This quasi-resonant switching technique reduces the power loss in the transformer and further increases system efficiency. Figure 6 also illustrates an example circuit implementation for current sensing circuit 308 and feedback circuit 31, which may also be used in the example of Figure 1. The switching mode power supply shown in Fig. 6 comprises a rectifier bridge 312, a 099123789 transformer 314 having a primary winding and two secondary windings, a switching form number A0101, a total of 33 S 0993346700-0 201128916 circuit 316, and a switching control circuit having an RS flip-flop 317, a feedback circuit, and a sequential circuit. In this example, the timing circuit includes a spectrum shaping circuit 302, a reference circuit 318, a valley detecting circuit 306, and a comparison circuit 320. The feedback circuit includes a current sensing circuit 308, a feedback circuit 310, a comparison circuit 322, a logic gate 324, and a delay circuit 326. A resistor (R) is included in the current sensing circuit 308 to provide a pass

SS

過變壓器314之初級繞組之電流量成正比的電壓(I sense )。在反饋電路310中,一電壓調節器328 (例如TL431 )經構形用以藉由控制在該時序電路之每一循環期間該 變壓器保持接通之時間量的方式維持DC電壓輸出(V +The amount of current through the primary winding of transformer 314 is proportional to the voltage (I sense ). In feedback circuit 310, a voltage regulator 328 (e.g., TL431) is configured to maintain a DC voltage output by controlling the amount of time the transformer remains on during each cycle of the sequential circuit (V+

)之一期望電壓位準而提供一參考電壓(FB)。期望DC 電壓輸出(V +)可藉由改變反饋電路310中之電阻器值 out 以調整閾電壓(FB)之位準的方式予以設定,該閾電壓 位準經比較電路322與電流感測信號(I )做比較。 sense 比較電路322之輸出透過OR邏輯閘324耦接至正反器31 7 之重設輸入(R)。如第7圖所示,這導致M0SFET開關 316在電流感測信號(I )達到參考電壓(FB)時斷 sense 開(產生一橫跨V。的電壓)。 ds 再次參照第6圖,比較一週期性閾電壓(ν+μ)與一波谷 偵測信號(VD)以產生具有一變動頻率的時序信號304, 此信號被設定輸入(S)接收送至正反器317。波谷偵測 電路306監測橫跨變壓器314之第三繞組的電壓,該變壓 器第三繞組取樣橫跨M0SFET開關308之電壓(Vds)的形 狀。波谷偵測電路306包含一RC網路,該RC網路經構形用 以在Vds掉到一預設閾電壓以下時於其輸出(VD)上產生 099123789 表單編號A0101 第10頁/共33頁 0993346700-0 201128916 一脈衝,該預設閾電壓係由該!^網路中之電阻及電容值 決定。週期性閾電壓(vth)係由„整形電路3^參 考電路318產生。週期性閾電壓('η)的幾個可能實例 例示於第10圖,且頻譜整形電路3〇2之二個實例實施將在 下文參照第11圖至第13圖說明。再次參照第6圖,頻譜整 形電路302產生-頻讀整形信號(ss)以控制頻率變量。 頻讚整形信號(SS)由參考電路318添加至參考電壓 以產生週期性閾電壓(vth) ^由參考電路318施加的該 0 DC參考電壓舉例來說可為一〇伏參考電壓或一正DC電壓譬 如50毫伏。 .. ..... . .. 丨+ .:: 第7圖是一例示第6圖所示切換模式電源供應3〇〇之實例運 作的時序圖。第7圖之上部提供切換電路(ν&)及切換 控制電路在時序信號(S)之二發脈衝期間的時序圖。第 7圖之下部例示週期性閾電壓(Vth)及‘序信號(s)在 一段較長時間當中的實例。如圖所示,時序信號(S )之 頻率依Vth之一函數變動。第7圖之上部例示的時序信號 ◎ ( S )二個脈衝在第々圖..之下部中被圈出。 第7圖之時序圖始於% ’此時M0SFET開關316被接通導致 電流流過變壓器312之初級繞組。通過初級繞組的電流隨 著C被充電而加大,如電流感測信號(I )中之斜 111 sense 坡所例示。一旦電流感測信號(I )達到在t反饋電 sense 1 路310所設定之閾值(FB),重設輸入(R)導致MOSFET 開關316斷開。再次參照第6圖,延時電路3 2 6導致 MOSFET開關316保持斷開達一段預設延遲時間(在此實 例中為9微秒),這在第7圖中藉由重設信號(R)之斷開 時間極限例示。 099123789 表單編號A0101 第11頁/共33頁 0993346700-0 201128916 如第7圖所示,切換波形(vds)在斷開期間包含一波谷 400,該波谷係由因與MOSFET開關316之寄生電容共振所 致的洩漏造成。當切換波形(Vds)中之波谷4〇〇低於閾 值402通過,波谷偵測電路3〇6導致一初始脈衝4〇4在設 定輸入(S)上發聲。但是,由於此初始脈衝4〇4係在延 時電路326之預設延遲期間發生,初始脈衝4〇4不會導致〇 輸出改變狀態(R具有高於S之優先權)°MOSFET開關 31 6隨後在該時序信 號之下一個前緣被設定輪入(S)再 次接通,此係在第7圖之、發生。 第7圖中之時序參考__3分別例示在時序信號(S) 之最高頻率及最低頻率的接通點。如_示,時序信號 ()之頻率改I由延時電路32 6設定之斷開時間極限與One of the desired voltage levels provides a reference voltage (FB). The desired DC voltage output (V + ) can be set by changing the resistor value out in the feedback circuit 310 to adjust the level of the threshold voltage (FB), which is compared by the comparison circuit 322 and the current sensing signal. (I) Compare. The output of the sense comparison circuit 322 is coupled through an OR logic gate 324 to the reset input (R) of the flip-flop 31 7 . As shown in Figure 7, this causes the MOSFET switch 316 to open sense (generating a voltage across V.) when the current sense signal (I) reaches the reference voltage (FB). Ds again referring to Fig. 6, comparing a periodic threshold voltage (ν + μ) and a valley detection signal (VD) to generate a timing signal 304 having a varying frequency, which is sent to the positive input by the set input (S) Counter 317. The valley detection circuit 306 monitors the voltage across the third winding of the transformer 314, which samples the voltage across the MOSFET switch 308 (Vds). The valley detection circuit 306 includes an RC network configured to generate 099123789 on its output (VD) when Vds falls below a predetermined threshold voltage. Form No. A0101 Page 10 of 33 0993346700-0 201128916 A pulse, the preset threshold voltage is determined by the resistance and capacitance values in the network. The periodic threshold voltage (vth) is generated by the shaping circuit 3^ reference circuit 318. Several possible examples of the periodic threshold voltage ('n) are illustrated in FIG. 10, and two examples of the spectrum shaping circuit 3〇2 are implemented. It will be explained below with reference to Fig. 11 through Fig. 13. Referring again to Fig. 6, the spectrum shaping circuit 302 generates a frequency-reading shaped signal (ss) to control the frequency variable. The frequency-shaping shaped signal (SS) is added by the reference circuit 318 to The reference voltage is used to generate a periodic threshold voltage (vth). The 0 DC reference voltage applied by the reference circuit 318 can be, for example, a sinusoidal reference voltage or a positive DC voltage, such as 50 millivolts. . . . . . . . . . 丨+ .:: Figure 7 is a timing diagram showing an example operation of the switching mode power supply 3〇〇 shown in Fig. 6. The upper part of Fig. 7 provides the switching circuit (ν&) and the switching control circuit. Timing diagram during the second burst of the timing signal (S). The lower part of Figure 7 illustrates an example of the periodic threshold voltage (Vth) and the 'sequence signal (s) over a long period of time. As shown, the timing signal The frequency of (S) varies according to a function of Vth. The upper part of Figure 7 is illustrated. The sequence signal ◎ (S) is pulsed out in the lower part of the second diagram. The timing diagram of Figure 7 begins at % 'At this point the MOSFET switch 316 is turned on causing current to flow through the primary winding of the transformer 312. The current through the primary winding increases as C is charged, as exemplified by the slope 111 sense slope in the current sense signal (I). Once the current sense signal (I) reaches the set in the t feedback power sense 1 path 310 The threshold (FB), reset input (R) causes MOSFET switch 316 to open. Referring again to Figure 6, delay circuit 326 causes MOSFET switch 316 to remain off for a predetermined delay time (9 in this example) Microseconds, which is illustrated in Figure 7 by the reset time limit of the reset signal (R). 099123789 Form No. A0101 Page 11 of 33 0993346700-0 201128916 As shown in Figure 7, the waveform is switched ( Vds) includes a valley 400 during the disconnection caused by leakage due to resonance with the parasitic capacitance of the MOSFET switch 316. When the valley 4 of the switching waveform (Vds) is below the threshold 402, the valley detector The measuring circuit 3〇6 causes an initial pulse 4〇4 to be set in the input The sound is emitted on (S). However, since this initial pulse 4〇4 occurs during the preset delay of the delay circuit 326, the initial pulse 4〇4 does not cause the 〇 output to change state (R has priority over S) The MOSFET switch 316 is then set to turn on (S) again at a leading edge of the timing signal, which occurs in Figure 7. The timing reference __3 in Figure 7 is illustrated in the timing signal, respectively. (S) The highest frequency and the lowest frequency of the turn-on point. As indicated by _, the frequency of the timing signal () is changed by the delay time limit set by the delay circuit 32 6 and

接通點(、和%)之間的距離。變壓器接it點的變動亦 例示於第8圖所示切換波形中。籍由加大切換頻 率之帶寬’如第8圖所示,Vds㈣波增益減小導致系統 EMI減小。所得Vds譜波増益滅小之-實痛例示於第9圖tThe distance between the switch-on points (, and %). The variation of the transformer connection point is also illustrated in the switching waveform shown in Fig. 8. By increasing the bandwidth of the switching frequency, as shown in Fig. 8, the Vds (four) wave gain reduction results in a reduction in system EMI. The obtained Vds spectrum wave is beneficial to the small - the actual pain is illustrated in Figure 9

第9圖所不之圖包含例示—典型切換模式電源供應中之 要諧波的—條實線及例示素6圖實例中可能發生之 為波的—條點線。如圖所示,尖蜂諧波減低導致整體 EM I減小。 第U圖是-用於第6⑽換模式電;綠紅-實例頻議整 電路3〇2的簡圖。該頻譜整形電路包含-振1器500、 位移暫存器5G2及-D/A轉換器5()4。此實 器5〇〇係一電壓受控振 099123789 ,其產生一具有一由一閾電壓 th)之固定頻率的時鐘輸出(clk)。時鐘輸出 ^U)係用於驅動位移暫存器502並且為RS正反器317 表單編號Α0101 a 10 0993346700 弟12頁/共33頁 201128916 供應時鐘(圖中未示)。 位移暫存器502包含一系列的D正反器(q〇_q7),該等D 正反器係由振盪器500之時鐘輸出(CLK)計時且經構形 用以使母一時鐘脈衝通過該位移暫存器之一邏輯,位 移。該位移暫存器之輸出(Q〇_Q7)被輸入至一系列邏輯 閘(OR2-ORO)以產生一個四位元數位控制字元,後者被 D/A轉換器504轉化成一類比信號(ss)。經歷ss之一個 循環的頻譜整形電路之—實例運作例示於第4圖。如第4 圖所不,位移暫存器之每—時鐘(Q7_Q〇)導致該D/A轉 換器中之開關系列(S3-S0)加大SS之電流,產生一步進 波形。此步進SS波形如第6圖所示被輸入至參考電路318 以產生一週斯性閾電壓(V 、, th / 第12圖是一用於第6圖切換模式電.源供應之另一實例頻譜 整形電路302的簡圖。該頻譜整形電路3〇2包含一電壓受 控振蘯器600、-位移暫存器6〇2及一 D/A轉換器6〇3。電 壓文控振盪器600產生,由閾電壓妓定且驅動位 移暫存器602的定頻時鐘信號乂“㈠。在此實例中,位 移暫存器602包含一系列的d正反器,該等D正 反器經構形用以產生一串行輪出信號(G)。如第13圖所 不’位移暫存器602每八個時鐘循環在串行輸出(g)上 產生一單個脈衝。 再次參照第12圖,來自位移暫存器6〇2的串行輸出信號( G)係用於控制來自一D/A轉換器603之SS輸出。特定言 之’D/A轉換器603包含一固定電流源(I ),其充電 c 11 由一充電電容器(Cu)儲存的電壓。來自位移暫存器 602的串行輸出信號(g)控制d/a轉換器603中之一開關 099123789 表單編號A0101 第13頁/共33頁 0993346700-0 201128916 (su)以在每八個時鐘循環放電充電電容器)The figure in Figure 9 contains an illustration - a solid line of the harmonics in a typical switched mode power supply and a line of dots that may occur as an example in the example of Figure 6. As shown, the sharp bee harmonic reduction results in a reduction in overall EM I. Figure U is - for the 6th (10) mode change; green red - the example frequency is discussed in the circuit 3〇2. The spectrum shaping circuit includes a -vibrator 500, a shift register 5G2, and a -D/A converter 5()4. The actuator 5 is a voltage controlled oscillator 099123789 which produces a clock output (clk) having a fixed frequency of a threshold voltage th). The clock output ^U) is used to drive the shift register 502 and is the RS flip-flop 317. Form number Α0101 a 10 0993346700 12 pages/total 33 pages 201128916 Supply clock (not shown). The shift register 502 includes a series of D flip-flops (q〇_q7) that are clocked by the clock output (CLK) of the oscillator 500 and configured to pass the parent clock. One of the displacement registers is logic, displacement. The output of the shift register (Q〇_Q7) is input to a series of logic gates (OR2-ORO) to generate a four-bit digital control word, which is converted by the D/A converter 504 into an analog signal (ss ). The example of a spectrum shaping circuit that undergoes a cycle of ss is illustrated in Figure 4. As shown in Figure 4, each clock of the shift register (Q7_Q〇) causes the switch series (S3-S0) in the D/A converter to increase the current of SS to generate a step waveform. This stepped SS waveform is input to the reference circuit 318 as shown in FIG. 6 to generate a one-cycle threshold voltage (V, th / Fig. 12 is another example of the source mode supply for the switching mode of Fig. 6. A schematic diagram of the spectrum shaping circuit 302. The spectrum shaping circuit 3〇2 includes a voltage controlled oscillator 600, a shift register 6〇2, and a D/A converter 6〇3. The voltage controlled oscillator 600 A fixed frequency clock signal 乂 "(1) is generated by the threshold voltage and drives the shift register 602. In this example, the shift register 602 includes a series of d flip-flops, and the D flip-flops are constructed The shape is used to generate a serial rounding signal (G). As shown in Fig. 13, the shift register 602 generates a single pulse on the serial output (g) every eight clock cycles. Referring again to Fig. 12, The serial output signal (G) from the shift register 6〇2 is used to control the SS output from a D/A converter 603. In particular, the 'D/A converter 603 includes a fixed current source (I). And its charging c 11 is stored by a charging capacitor (Cu). The serial output signal (g) from the shift register 602 controls the d/a converter 6 One of the switches in 03 099123789 Form No. A0101 Page 13 of 33 0993346700-0 201128916 (su) to discharge the charging capacitor every eight clock cycles)

SS產生一鋸波輸出,如第13圖所示。 U 以上說明利用實例揭示本發明,包含最佳模弋並且= 熟習此技藝者能夠製作及使用本發明。本發明之可專利 範圍可包含熟習此技藝者想出的其他實例。 【圖式簡單說明】 [0005] 第1圖是-具有-頻谱整形電路之實例切換模式電源供應 的簡圖。The SS produces a saw wave output as shown in Figure 13. U The above description discloses the invention by way of example, and includes the best mode and the skilled in the art can make and use the invention. The patentable scope of the invention may encompass other examples that are apparent to those skilled in the art. BRIEF DESCRIPTION OF THE DRAWINGS [0005] Fig. 1 is a simplified diagram of an example switching mode power supply with a spectrum shaping circuit.

第2圖是一示出因改變第丨圖切換模式電源供應中之切換 頻率而獲得之諳波增益減小結果的圖。 第3圖是一用於第1圖切換模式電源供應之實例時序電路 的簡圖。 第4圖例示第1圖頻譜整形電路之一實例運相。 第5圖示出第1圖切換模式電源供應之切換波形(vFig. 2 is a diagram showing the result of the chopper gain reduction obtained by changing the switching frequency in the power supply mode of the first diagram switching mode. Figure 3 is a simplified diagram of an example sequential circuit for the switched mode power supply of Figure 1. Figure 4 illustrates an example phase of the spectrum shaping circuit of Figure 1. Figure 5 is a diagram showing the switching waveform of the switching mode power supply of Fig. 1 (v)

ds J 一實例。 第6圖是-具有-頻譜整形電路之另—實例切換模式電源 供應的簡圖。 第7A圖和第7B圖示出-例示第6圖切換模式電源供應之一 實例運作的時序圖。 第8圖示出第6圖切換模式電源供應之切換波形(v )之 ds 一實例。 第9圖是一不出因改變第6圖切換模式電源供應中之切換 頻率而獲得之諧波增益減小結果的圖。 第10圖例不可供第6圖時序電路使用之實例週期性波形。 第11圖是一用於第6圖切換模式電源供應之一實例頻譜整 形電路的簡圖。 099123789 表單編號A0101 第14頁/共33頁 0993346700-0 201128916 第1 2圖是一用於第6圖切換模式電源供應之另一實例頻譜 整形電路的簡圖。 第13圖是一例示第12圖頻譜整形電路之運作的時序圖。 【主要元件符號說明】 [0006] CLK 固定頻率的時鐘輸出 Ct 充電電容器 FB 閾值 G 串行輸出信號 ΟAn example of ds J. Figure 6 is a simplified diagram of an alternative power supply with an instance-switched mode. Figs. 7A and 7B are timing diagrams showing an example operation of the switching mode power supply of Fig. 6. Fig. 8 is a view showing an example of the ds of the switching waveform (v) of the switching mode power supply of Fig. 6. Fig. 9 is a diagram showing the result of the harmonic gain reduction obtained by changing the switching frequency in the switching mode power supply of Fig. 6. Figure 10 illustrates an example periodic waveform that is not available for the sequential circuit of Figure 6. Figure 11 is a simplified diagram of an example spectrum shaping circuit for a switching mode power supply of Figure 6. 099123789 Form No. A0101 Page 14 of 33 0993346700-0 201128916 Figure 1 2 is a simplified diagram of another example spectrum shaping circuit for the switching mode power supply of Figure 6. Fig. 13 is a timing chart showing an example of the operation of the spectrum shaping circuit of Fig. 12. [Main component symbol description] [0006] CLK fixed frequency clock output Ct Charging capacitor FB threshold G serial output signal Ο

10、 11 ' 12 ' 13 切換電流源 let 固定電流源 I SENSE 電流感測信號 Q0-Q7 D正反器 ORO 、0R1、0R2 邏輯閘 S0、 SI、S2、S3 開關 St 開關 SS 類比信號、頻譜整形 r f、':: Vds 電壓 Vth 閾電壓 100 實例切換模式電源供應 102 頻譜整形電路、時序電路 104 整流器電橋 106 變壓器 108 切換電路 110 切換控制電路 112 RS正反器 114 、116、118 反饋電路 099123789 表單編號A0101 第15頁/共33頁 0993346700-0 201128916 120 振盪器 122 比較器 126 位移暫存器 128 轉換器 200 接通點 300 切換模式電源供應 302 頻譜整形電路 304 時序信號 306 波谷偵測電路 308 電流感測電路 310 反饋電路 312、 314 變壓器 316 M0SFET開關 317 RS正反器 318 參考電路 320、 322 比較電路 324 邏輯閘 326 延時電路 328 電壓調節器 400 波谷 402 閾值 404 初始脈衝 500 振盪器 502 位移暫存器 504 D/A轉換器 600 電壓受控振盪器 表單編號A0101 099123789 第16頁/共33頁 0993346700-0 201128916 602 位移暫存器 603 D/A轉換器10, 11 ' 12 ' 13 Switching current source let Fixed current source I SENSE Current sensing signal Q0-Q7 D Positive and negative ORO, 0R1, 0R2 Logic gate S0, SI, S2, S3 Switch St Switch SS analog signal, spectrum shaping Rf, ':: Vds voltage Vth threshold voltage 100 example switching mode power supply 102 spectrum shaping circuit, sequential circuit 104 rectifier bridge 106 transformer 108 switching circuit 110 switching control circuit 112 RS flip-flop 114, 116, 118 feedback circuit 099123789 form No. A0101 Page 15 of 33 0993346700-0 201128916 120 Oscillator 122 Comparator 126 Displacement Register 128 Converter 200 Switch-on Point 300 Switching Mode Power Supply 302 Spectrum Shaping Circuit 304 Timing Signal 306 Valley Detection Circuit 308 Current Sensing circuit 310 feedback circuit 312, 314 transformer 316 M0SFET switch 317 RS flip-flop 318 reference circuit 320, 322 comparison circuit 324 logic gate 326 delay circuit 328 voltage regulator 400 valley 402 threshold 404 initial pulse 500 oscillator 502 displacement temporary storage 504 D/A converter 600 Controlled oscillator Form Number A0101 099123789 Page 16/33 Total 201 128 916 602 0993346700-0 shift register 603 D / A converter

❹ 099123789 表單編號A0101 第17頁/共33頁 0993346700-0❹ 099123789 Form No. A0101 Page 17 of 33 0993346700-0

Claims (1)

201128916 七、申請專利範圍: 1 . 一種切換模式電源供應,其包括: 一整流器; 一變壓器,其具有一耦接至該整流器的初級繞組及一次級 繞組; 一切換電路,其耦接至該變壓器之初級繞組以基於一切換 控制信號控制通過該變壓器之初級繞組的電流;及 一切換控制電路,其用以產生該切換控制信號為一具有一 變動頻率之一時序信號的函數,其中該時序信號之變動頻 f ··: 率導致該切換電路之一切換頻率在一段時間當中變動。 2 .如申請專利範圍第1項之切換模式電源供應,其中該切換 控制電路包括: 一正反器,其輸出該切換控制信號為一設定輸入及一重設 輸入之一函數; 一反饋電路,其產生該重設輸入給該正反器,該反饋電路 經構形用以監測通過該變壓器之初級繞組的電流且在通過 該初級繞組的電流達到一閾值時在該重設輸入上產生一狀 態改變;及 一時序電路,其產生該時序信號作為該設定輸入送至該正 反器,該時序電路包含一造成該時序信號之變動頻率的頻 譜整形電路。 3 .如申請專利範圍第2項之切換模式電源供應,其中該時序 電路包括一耦接至該頻譜整形電路的振盪器,且其中該頻 譜整形電路改變由該振盪器產生之一時鐘信號的頻率以產 生該時序信號。 099123789 表單編號A0101 第18頁/共33頁 0993346700-0 201128916 4 .如申請專利範圍第2項之切換模式電源供應,其中該時序 電路包括: 一波谷偵測電路,其產生一波谷偵測信號為一橫跨該切換 電路之一切換電壓的函數,其中該波谷偵測信號指出該切 換電壓何時掉到一閾電壓以下; 經構形用以產生一頻譜整形信號的頻譜整形電路; 一參考電路,其經構形用以產生一週期性閾電壓為該頻譜 整形信號之一函數,其中該週期性閾電壓之頻率係由該頻 0 譜整形信號設定;及 一比較電路,其比較該波谷偵測信號與該週期性閾電壓以 產生該時序信號作為該設定輸入輸入至該正反器,其中該 時序信號之變動頻率係由該週期性閾電壓造成。 5 .如申請專利範圍第4項之切換模式電源供應,其中該反饋 電路包含一耦接於一反饋迴路中介於該切換控制信號與送 至該正反器之該重設輸入之間的延時電路,該延時電路導 致該切換電路在因通過該初級繞組之電流達到該閾值而造 Q 成該重設輸入上之一狀態改變之後保持處於一斷開狀態一 段預設時間。 6 .如申請專利範圍第1項之切換模式電源供應,其中該切換 電路包括一 M0SFET開關。 7 .如申請專利範圍第4項之切換模式電源供應,其中該變壓 器包含一附加次級繞組且其中該波谷偵測電路藉由監測橫 跨該附加次級繞組之一電壓而取樣該切換電壓。 8 .如申請專利範圍第2項之切換模式電源供應,其中該反饋 電路包含一電壓調節器,該電壓調節器經構形用以產生與 通過該初級繞組之電流做比較的該閾值,其中由該電壓調 099123789 表單編號A0101 第19頁/共33頁 0993346700-0 201128916 節器產生的該閾值經設定用以產生一期望DC輸出電壓。 9 .如申請專利範圍第3項之切換模式電源供應,其中該時序 電路包括: 產生該時鐘信號的該振盪器; 一位移暫存器,其由該時鐘信號計時且經構形用以產生一 數位控制信號;及 一數位-類比轉換器,其經構形用以將該數位控制信號轉 化成一類比頻譜整形信號; 其中該類比頻譜整形信號被回授至該振盪器以改變該時鐘 信號之頻率產生該時序信號。 10 .如申請專利範圍第4項之切換模式電源供應,其中該頻譜 整形電路包括: 一振盪器,其產生一時鐘信號; 一位移暫存器,其由該時鐘信號計時且經構形用以產生一 數位控制信號;及 一數位-類比轉換器,其經構形用以將該該數位控制信號 轉化成該頻譜整形信號。 11 . 一種調節一切換模式電源供應中之一輸出電壓的方法,其 包括: 產生一具有一變動頻率的時序信號; 監測產生該輸出電壓之一變壓器的一或多個操作特性以產 生一反饋信號; 產生一切換控制信號為該時序信號及該反饋信號之一函數 :且 利用該切換控制信號接通及斷開該變壓器以調節該輸出電 壓; 099123789 表單編號A0101 第20頁/共33頁 0993346700-0 201128916 其中該時序信號之變動頻率導致該變壓器之一切換頻率在 一段時間當中變動以便減小電磁干擾。 12 .如申請專利範圍第11項之方法,其進一步包括: 偵測與該變壓器之接通及斷開相關的一切換電壓中之一波 谷;且 使該時序信號與該切換電壓中之該波谷對準。 ❹ ❹ 099123789201128916 VII. Patent application scope: 1. A switching mode power supply, comprising: a rectifier; a transformer having a primary winding and a primary winding coupled to the rectifier; a switching circuit coupled to the transformer The primary winding controls the current through the primary winding of the transformer based on a switching control signal; and a switching control circuit for generating the switching control signal as a function of a timing signal having a varying frequency, wherein the timing signal The frequency of change f ··: causes the switching frequency of one of the switching circuits to vary over a period of time. 2. The switching mode power supply of claim 1, wherein the switching control circuit comprises: a flip flop that outputs the switching control signal as a function of a set input and a reset input; a feedback circuit Generating the reset input to the flip-flop, the feedback circuit configured to monitor current through the primary winding of the transformer and to generate a state change on the reset input when current through the primary winding reaches a threshold And a timing circuit that generates the timing signal as the set input to the flip-flop, the timing circuit including a spectrum shaping circuit that causes a varying frequency of the timing signal. 3. The switched mode power supply of claim 2, wherein the sequential circuit includes an oscillator coupled to the spectral shaping circuit, and wherein the spectral shaping circuit changes a frequency of a clock signal generated by the oscillator To generate the timing signal. 099123789 Form No. A0101 Page 18 of 33 0993346700-0 201128916 4. The switching mode power supply of claim 2, wherein the timing circuit comprises: a valley detecting circuit that generates a valley detecting signal a function of switching a voltage across one of the switching circuits, wherein the valley detection signal indicates when the switching voltage falls below a threshold voltage; a spectral shaping circuit configured to generate a spectrally shaped signal; a reference circuit, The method is configured to generate a periodic threshold voltage as a function of the spectral shaping signal, wherein the frequency of the periodic threshold voltage is set by the frequency 0 spectral shaping signal; and a comparison circuit that compares the valley detection The signal and the periodic threshold voltage are used to generate the timing signal as the set input input to the flip-flop, wherein the frequency of the timing signal is caused by the periodic threshold voltage. 5. The switching mode power supply of claim 4, wherein the feedback circuit comprises a delay circuit coupled between the switching control signal and the reset input to the flip-flop in a feedback loop The delay circuit causes the switching circuit to remain in an off state for a predetermined period of time after the state of the reset input is changed because the current through the primary winding reaches the threshold. 6. The switched mode power supply of claim 1, wherein the switching circuit comprises a MOSFET switch. 7. The switched mode power supply of claim 4, wherein the transformer includes an additional secondary winding and wherein the valley detecting circuit samples the switching voltage by monitoring a voltage across the additional secondary winding. 8. The switched mode power supply of claim 2, wherein the feedback circuit includes a voltage regulator configured to generate the threshold for comparison with current through the primary winding, wherein The voltage is 099123789 Form No. A0101 Page 19 of 33 0993346700-0 The threshold generated by the 201128916 section is set to generate a desired DC output voltage. 9. The switched mode power supply of claim 3, wherein the sequential circuit comprises: the oscillator that generates the clock signal; a shift register that is clocked by the clock signal and configured to generate a a digital control signal; and a digital-to-analog converter configured to convert the digital control signal into an analog spectrally shaped signal; wherein the analog spectrally shaped signal is fed back to the oscillator to change the frequency of the clock signal This timing signal is generated. 10. The switched mode power supply of claim 4, wherein the spectral shaping circuit comprises: an oscillator that generates a clock signal; a displacement register that is clocked by the clock signal and configured to Generating a digital control signal; and a digital-to-analog converter configured to convert the digital control signal into the spectrally shaped signal. 11. A method of regulating an output voltage in a switched mode power supply, comprising: generating a timing signal having a varying frequency; monitoring one or more operational characteristics of a transformer that produces the output voltage to generate a feedback signal Generating a switching control signal as a function of the timing signal and the feedback signal: and using the switching control signal to turn the transformer on and off to adjust the output voltage; 099123789 Form No. A0101 Page 20 of 33 0993346700- 0 201128916 wherein the varying frequency of the timing signal causes one of the switching frequencies of the transformer to fluctuate over a period of time to reduce electromagnetic interference. 12. The method of claim 11, further comprising: detecting one of a switching voltage associated with turning on and off the transformer; and causing the timing signal and the valley in the switching voltage alignment. ❹ ❹ 099123789 表單編號A0101 第21頁/共33頁 0993346700-0Form No. A0101 Page 21 of 33 0993346700-0
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TWI502873B (en) * 2014-07-01 2015-10-01 Univ Nat Taiwan Control circuit
US9419526B2 (en) 2012-03-16 2016-08-16 Apple Inc. Phase-shifting a synchronization signal to reduce electromagnetic interference

Family Cites Families (3)

* Cited by examiner, † Cited by third party
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US6249876B1 (en) * 1998-11-16 2001-06-19 Power Integrations, Inc. Frequency jittering control for varying the switching frequency of a power supply
JP4494763B2 (en) * 2003-11-20 2010-06-30 コーセル株式会社 Switching signal modulation circuit
KR101468719B1 (en) * 2008-03-12 2014-12-05 페어차일드코리아반도체 주식회사 Power converter and driving method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9419526B2 (en) 2012-03-16 2016-08-16 Apple Inc. Phase-shifting a synchronization signal to reduce electromagnetic interference
CN104170225B (en) * 2012-03-16 2017-10-20 苹果公司 Synchronizing signal is carried out phase shift to reduce electromagnetic interference
US10069423B2 (en) 2012-03-16 2018-09-04 Apple Inc. Phase-shifting a synchronization signal to reduce electromagnetic interference
TWI502873B (en) * 2014-07-01 2015-10-01 Univ Nat Taiwan Control circuit

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