201117176 HM-2008-0064-TW 29706twf.doc/n 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種源極驅動器（source driver)，且 特別是有關於一種用以控制其電荷分享功能的源極驅動 器。 【先前技術】 平面顯示裝置，例如薄膜電晶體液晶顯示器（thin fiim transistor-liquid crystal display，TFT-LCD)，被打算用來取 代傳統陰極射線管(cathode ray tube，CRT)顯示裝置。與傳 統CRT顯示器相比，TFT-LCD裴置具有諸如相當低/的動 作電壓、低功率消耗、小而薄以及重量輕等優點。 圖1A繪示一傳統液晶顯示器ι〇〇。液晶顯示器1〇〇 包括日守序控制态TCON、一源極驅動器以及一顯示 面板130。其中，源極驅動器SD包括多個源極驅動單元 120與HI。每一源極驅動單元(例如源極驅動單元12〇)分 別包括.一介面電路122、一數位至類比轉換器 (chgital-to-analog converter，DAC)124 以及—輸出緩衝器 126。傳統液晶顯示器1〇〇使用時序控制器產生各 種控制訊號至源極轉器SD以及閘極驅動器（未綠示），藉 以控制源極驅動器SD以及閘極驅動器（未纷示）之運作。^ 控制訊號的控制下，.驅動器（未緣示）依序驅動每一間 極線，接著源極‘驅動器SD中的源極驅動單元12〇及 輸出電壓V136以及Vl37。每一源極驅動單元的運作細節 201117176 HM-20〇8-〇〇64.Tw 297〇6twf d〇c/n 為所屬技術領域巾具有通常知識者所熟知，此處*再賢述。 顯>示面板130具有多個資料線(例如資料線136以及 13 7) L每—資料線分別耦接多個次晝素單元(此處僅繪示次 晝，早7L 139以及140)。資料線136連接一組次晝素單元， 次晝素單元包括—電晶體132以及—液晶電容 。電晶體132的邏輯狀態透過其對應掃描線131之訊於 [Π而源極驅動單元120 1將電荷訊號儲存在電ί 私谷134基於共同電壓Vcpm儲存資料線136的資 =而^晝素單元的透光枝由液晶電容134兩端差 =時庠=示圖1A的一偶資料線以及，^ = : 娜㈣與資料線137為用以說明。 ^里面板大部分採用直流(DC)共同電壓的伙 =，所以顯不面板的資料、線136與137具有低於妓同^ I嶋的-負極性電壓（以-表示）以及高於共同電壓 '正極性電壓（以+表示）。資料線經由正極性電，盘名 性電壓而交替性地驅動。例如，如圖m所綠示 136的電壓V136之電壓擺 w 貝枓線 為_。電壓擺=¾ 耗大小有關。然而’依據上述傳統方法，源極 ^ 的*1壓擺幅太大、功率消耗也大而且源極驅 ，2〇 溫度會太高。 果疋120的 為了要解決上述源極驅動單元120功率消 題，圖1C繪示了 一傳統顯示器150，其包括二本士大j問 路以減少源極驅動單元(例如源極驅動單元160^^分旱電 201117176 I-2008-0064-TW 29706twf.doc/n 以驅動對應資料線的電壓的擺幅。圖lc的顯示器i5〇包 括一時序控制器TCON、一源極驅動器SD以及—顯示面 板180，其中，源極驅動器SD包括多個驅動單元(例如驅 動160與170)、開關172、174以及176(也就是電荷 刀旱％路）。母一源極驅動單元(例如源極驅動單元160)包 括’丨面電路162、一 DAC 164以及一輸出緩衝器166。 於液晶顯不器15〇中，時序控制器丁(：〇]^產生多個控制訊 號至源極驅動器SD與閘極驅動器（未繪示），藉以控制源極 驅動器SD與閘極驅動器（未緣示)進行運作。在控制訊號的 ^制下閘極驅動态（未緣示）依序驅動每一個閘極線，接 著源極驅動單元⑽與17G輸出電壓州6與v⑻。 細圖ϋ為圖1 C中的—偶資料線與—奇資料線的訊號時 ，的資料線186與187為用以說明。在電荷分享 =通狀，72與176處於不導通狀態’而開關Π4 門產短路的原因使得資料線186與187之 二十厂私何为旱。因此，在電荷分享期間tl，資料線1δ6 vlT的V187會_接近共同電壓 έ士束後，接签^何刀旱功能的運作。在電荷分享期間份 幻76處普通驅動期間t2，於此期間，開關m 於源極驅動單二開關174處於不導通狀態，以致 此驅動運作的4:麗广驅動資料、線186與⑻。 知，此處不再^ 屬技術領域具有通常知識者所熟 攸圖1D可得知，經由電荷分享功能的運作，在電荷 201117176 HM-2008-0064-TW 29706twf.doc/n $旱期資料線186的電壓準位被預先拉 ==，n=c被減小。在普通驅動 的内部電路再次間〇，顯示器150 的動作。透過電荷‘“同樣 動資料狳夕带阿’愿牲馬£動早7L用以驅 # _消耗二:;=r因而減少源極驅動單元 視§fl貧料沒右增几一，，^ ^ 由於 的電壓ν187 Γ如圖貧 =1一86的，V186與資料線m at pa B= 1 圖1E所不。此日卞’若電壓分享雷201117176 HM-2008-0064-TW 29706twf.doc/n VI. Description of the Invention: [Technical Field] The present invention relates to a source driver, and in particular to a method for controlling its charge The source driver for the share function. [Prior Art] A flat display device such as a thin fiim transistor-liquid crystal display (TFT-LCD) is intended to replace a conventional cathode ray tube (CRT) display device. Compared to conventional CRT displays, TFT-LCD devices have advantages such as relatively low/acting voltage, low power consumption, small and thin, and light weight. FIG. 1A illustrates a conventional liquid crystal display. The liquid crystal display 1 includes a day-to-day control state TCON, a source driver, and a display panel 130. The source driver SD includes a plurality of source driving units 120 and HI. Each source driver unit (e.g., source driver unit 12A) includes an interface circuit 122, a chigital-to-analog converter (DAC) 124, and an output buffer 126, respectively. The conventional liquid crystal display 1 uses a timing controller to generate various control signals to the source converter SD and the gate driver (not shown) to control the operation of the source driver SD and the gate driver (not shown). ^ Under the control of the control signal, the driver (not shown) drives each of the lines in sequence, and then the source 'source drive unit 12 in the driver SD and the output voltages V136 and Vl37. Details of the operation of each source drive unit 201117176 HM-20〇8-〇〇64.Tw 297〇6twf d〇c/n is well known to those of ordinary skill in the art, and is here again. The display panel 130 has a plurality of data lines (for example, data lines 136 and 13 7). Each of the data lines is coupled to a plurality of secondary pixel units (only the secondary lines are shown here, 7L 139 and 140 are early). The data line 136 is connected to a set of secondary halogen units, and the secondary unit includes - a transistor 132 and a liquid crystal capacitor. The logic state of the transistor 132 is transmitted through the corresponding scan line 131. [The source driving unit 120 1 stores the charge signal in the memory 134 based on the common voltage Vcpm. The difference between the two ends of the liquid crystal capacitor 134 = time 庠 = an even data line of Figure 1A and ^ = : Na (four) and data line 137 are for illustration. Most of the panels in the panel use DC (DC) common voltage =, so the panel data, lines 136 and 137 have lower-negative voltages (indicated by -) and higher than the common voltage. 'Positive polarity voltage (indicated by +). The data lines are alternately driven via positive polarity and disk nominal voltage. For example, the voltage V136 of the voltage 136 shown in Fig. m is 136. The voltage swing is related to the 3⁄4 consumption. However, according to the above conventional method, the *1 voltage swing of the source ^ is too large, the power consumption is large, and the source is driven, and the temperature is too high. In order to solve the power consumption problem of the above-mentioned source driving unit 120, FIG. 1C illustrates a conventional display 150 including two Benshida j-way to reduce the source driving unit (for example, the source driving unit 160^) ^分旱电201117176 I-2008-0064-TW 29706twf.doc/n to drive the swing of the voltage of the corresponding data line. The display i5 of Figure lc includes a timing controller TCON, a source driver SD and - display panel 180, wherein the source driver SD comprises a plurality of driving units (eg, drivers 160 and 170), switches 172, 174, and 176 (ie, a charge path). A mother-source driving unit (eg, a source driving unit 160) The method includes a 'face circuit 162, a DAC 164, and an output buffer 166. In the liquid crystal display 15〇, the timing controller generates a plurality of control signals to the source driver SD and the gate driver. (not shown), by controlling the source driver SD and the gate driver (not shown) to operate. In the control signal, the gate driving state (not shown) sequentially drives each gate line, and then Source drive unit (10) and 17G output voltage State 6 and v(8). The fine line ϋ is the signal of the even data line and the odd data line in Figure 1 C. The data lines 186 and 187 are used for explanation. In the charge sharing = pass, 72 and 176 are not The conduction state 'and the short circuit of the switch Π4 causes the data lines 186 and 187 to be dry. Therefore, during the charge sharing period tl, the V187 of the data line 1δ6 vlT will be close to the common voltage gentleman bundle. During the charge sharing period, the normal drive period t2 during the charge sharing period, during which the switch m is in the non-conducting state of the source drive single switch 174, so that the drive operates 4: Li Wide drive data, line 186 and (8). Know, here is no longer ^ is familiar with the general knowledge of the technical field Figure 1D can be known, through the operation of the charge sharing function, in the charge 201117176 HM-2008-0064-TW 29706twf The voltage level of the .doc/n $dry data line 186 is pre-pulled ==, n=c is reduced. The internal circuit of the normal drive is again 〇, the action of the display 150. The same data is transmitted through the charge '夕带阿' willing to play horses early 7L to drive # _ consumption two:; = r The reduction of the source drive unit depends on the §fl lean material not increased by a few, ^ ^ because the voltage ν187 Γ as shown in the figure = 1 - 86, V186 and the data line m at pa B = 1 Figure 1E does not.日卞'If voltage sharing mine
"關172、174以及176等等)在 U ’那麼會有-種非預期的現象;:在：=t3 與V187，立诉伽认』π 小奴玍隹電壓V186 會導致、、㈣n ;圖1F之切換現象。此非預料的情、方 2致源極驅動器SD的工作溫度升高。因此，」f况 固適合的顯示裝置來解決此問題。 ❿叹叶 【發明内容】 有鐘於此，本發明提供—種雜 作用於顯示器上的電荷八含_ ’以=、°° 了以控制其 率消耗及降低诉…二刀子^即’源極驅動器的功 牛低原極驅動器的工作溫度。 刀 法，種源極驅動器的電荷分享控制方 的功率祕及降細極驅動器= 2〇1117176 HM-2008-0064-TW 29706twf.doc/n 作溫度。 。。為了解決上述習知的問題’本發明提出—種源極驅動 益’其包括-麟單元及-資料分析單元。鶴單元依據 視訊訊號驅動顯示面板。資料分析單元耦接驅動單元，並 且資料分析單元依據分析結果致能或禁能驅動單 分享功能。 7 本發明另提出一種源極驅動器的電荷分享控制方 法。此方法包括分析視訊訊號的灰階分佈以取得^析結 果並且依據分析結果致能或禁能源極驅動器中的驅動 元的電荷分享功能。 本發明所提出的源極驅動器及其電荷分享控制方 法’可以控制由本發明所提出的源極驅動器的電荷分享功 能，以致於源極驅動器的功率消耗及工作溫度皆可以降低。 為讓本發明之上述待徵和優點能更明顯易懂，下文特 舉實施例，並配合所附圖式作詳細說明如下。 寸 【實施方式】 圖2為依據本發明一實施例的顯示器的簡化方塊圖。 在本實施例中，顯示器200以薄膜電晶體液晶顯示器(thin film transistor-liquid crystal display，TFT-LCD)為例。如圖 2 所不，顯示器200包括時序控制器TC〇N、源極驅動器sd 及顯不面板210，其中源極驅動器SD包括多個驅動單元 <(例如驅動單元230及250)、接收器232及資料分析單 兀220。時序控制器TC0N透過接收器23〇傳送水平同步 201117176 HM-2008-0064-TW 29706twf.doc/n 訊號TP1及視訊資料VD至各驅動單元230及25〇。也就 是說’接收器232接收由時序控制器tc〇n所提供的視訊 資料VD ’並且輸出對應的視訊訊號vs至各驅動單元230 及250。各驅動單元（例如驅動單元23〇)依據視訊訊號 V S驅動顯示面板210。每一源極驅動單元的運作細節為所 屬技術領域中具有通常知識者所熟知，此處不再贅述二 顯示面板210具有多個資料線（例如資料線DL1及 DL2)及多個掃描線（例如第一掃描線SL1)。每一資料 線分別搞接多個次晝素(此處僅纟會示次晝素單元212以及 214)。資料線DL1連接一組次晝素單元212，且每一次書 素單元212包括電晶體T以及一液晶電容c。對應第一掃 為線SL1的訊號用以控制電晶體τ，以便於驅動單元230 儲存資料驅動電壓於電容C。電容C基於共同電壓Vcom 儲存資料線DL1的資料，而次晝素單元212的透光率是由 液晶電容C兩端的壓差決定。 圖3為依據本發明一實施例的圖2源極驅動器的簡化 鲁 方塊圖其中源極驅動器包括驅動單元及資料分析單元。 在此，僅繪示驅動單元230及資料分析單井220，但i源 極驅動器SD中的其他驅動單元亦同樣具有如下述特徵。 請參照圖3’驅動單元230包括線缓衝器234、數位至類比 轉換器（digital-to-analog converter，DAC ) 236 及輸出緩衝 裔238。接從器232接收由時序控制器TC〇N所提供的視 訊資料VD，接著輸出對應的視訊訊號vs。輸出緩衝器238 驅動如圖2所示的顯示面板200，以顯示對應的晝面。每 201117176 HM-2008-0064-TW 29706twf.doc/n 一源極驅動單元的運作細節為所屬技術領域中具有通常知 識者所熟知，此處不再贅述。 Π 值得-提的是，資料分析單喊接接收器232的輪出 端，用以分析視訊訊號VS的灰階分佈，並且據此取得八 析結果。接著，資料分析單元220輸出對應分析結果 鎖脈波#號LP，以致能或禁能驅動單元23〇的電行八古力 能。因此，電荷分享功能可選擇性地致能於不同二 享期間。本實施例中，為利用薄膜電晶體液晶顯示哭及『 鎖脈波訊號LP控制電荷分享功能以舉例，但本發二 限於此。 ' 進-步來說，請參照圖3，資料分析單元細 數單元222、暫存器224及比較單元⑽。在本實施例卜 ==析早疋220分析來自接收器拉的視訊訊號vs的 取回有效位το (mGstsignifleantbit，MSB)的邏輯狀能，以 取得視訊職的灰階分佈。舉㈣說，計數單元^ =訊號VS的最高纽位元的邏輯㈣（ 能 =量’並且輸出計數結果，其中計數單元222Hlj 數結果。暫存器224的輸入端綱 物的時序;224依據水平同步訊 早元222的計數結果，並且輸 的輪Ξ端及1著’比較單元226 _暫存器224 其中222的輪出結果以取得分析結果， 中暫存』4的輸出結果以χ表示，計數軍元 201117176 j-ijvi-^u08-0064-TW 29706twf.doc/n 出結果以Y表不。 圖4為依據本發明一實施例的圖3資料分析單元的簡 化方塊圖。圖5為圖3的視訊資料的資料傳送模式。請 照圖3至圖5,由時序控制器TC〇N職供的視訊;料;; 透過兩貧料對傳送至接收器232,例如第一資料對pA與 第二資料對PB。如圖5所示，在此第一資料對pA與一第 二資料對PB都取8個位元為例。接著，接收器说輸出 對應的視訊訊號至線緩衝器234及計數單元222。因此， 計數單元222中的第—計數器222a及第二計數器现分 別，收第-資料對PA及第二資料對pB。接下來，第一計 數為222a計數高準位的最高有效位元，其中在第一資料對 PA中，最咼有效位元例如標記為D〇7。當哭 的計數結果大於灰階閘限值z時，第一計數器222/會傳送 咼邏輯，位訊號至邏輯閘22δ。此時，若與第二資料對ρβ 才:，的苐—4數$ η%的計數結果也大於灰階閘限值z 時’第二計數器22h會傳送高邏輯準位訊號至邏輯閘. 在此’邏輯閘228以及閘為例，並且因此及閘輸出高 邏輯準位訊號至暫存器224以暫存來自及閘的第—邏輯結 ^X。在本實施例中，邏輯閘228也可以或閘實現，但灰 p白蜀限值z須^之對應改變。在接收到水平同信號τρι 後’暫存於暫存器224的第—邏輯結果乂會傳送^比較單 亚且第—計數單元222a、第二計數單it 222b及暫 1會ΐ置。接著，計數單元222進行計數在視訊訊 〜 為阿準位的最高有效位元。在水平同步訊號TP1 201117176 HM-2008-0064-TW 29706twf.doc/n 的先別日$序中’藉由類似的分析視訊資料的方法 自及閘的第—邏輯結果γ會傳送至暫存器a4暫存， 送至比較單元226以便與第一邏輯結果以乍比較。辱 ^^:邏輯絲-以高邏輯準位且第二邏輯結果丫 _域準位時，表不視訊資料vs的灰階分佈在第 描線su會比第二掃描線su(未繪示)亮，且因此比 7C 226輪出低邏輯準位之_脈波訊號Lp。因此，閃 波訊號〇>致能驅動單元230的電荷分享功能。值得一提 的是，在本實施例中，在第1輯結果X及第二邏輯結果 =的其他條件下，比較單元226會輸出高邏輯準位的 2mLp，b ’藉由上述方法來分析圖2顯示面板 ^任思兩條掃描線的視訊訊號vs的灰階分佈，在 ㈣荷分享期間，源極驅動器SD中的驅動單元的電荷分 子功能會依據來自㈣綺單元⑽關鎖脈波訊號 之邏輯準位而選擇性地致能。 圖6為依據本發㈣—實施例的圖2祕驅動 化方塊圖，其中源極驅動器包括驅動單元及資料分析 ，。在此，僅繪示驅動單元230及資料分析單元22〇， 在源極驅動器SD中·他驅動單元亦同樣具有如下特 徵。味參照® 6，在本實施例中，源極驅動器SD更括 序列平行轉換器240,其耦接於接收器232及驅動單元23〇 序3行轉換器240將視訊訊號VS由序列資料轉 千仃貝料。進一步來纟兄，序列平行轉換器24〇 訊訊號VS(如來自接收器232的序列資料），接著轉換 12 201117176 ruvi-^v〇8-〇〇64-TW 29706twf.doc/n 為平行資料。 因此，序列平仃轉換器240輪出視訊訊號^，至線緩 =器234’·其中視訊訊號vs，為平行資料。當視訊訊號VS， ^运至線緩衝H 234 ’資料分析單元22G的計數單元222 2!^訊號VS，的最高有效位^。^最高有效位元的 遴輯狀悲為南準位（例如標記為，，Γ，）時，計數單元2D 計數最高有效位元，並且以此取得來自計數單元奶的第 2一果Χ。接著’第一計數結果Χ會暫存於暫存器 。在接收到水平同步訊號τρι後，暫存在暫存器故 、弟-捕結果X會傳送至比較單元a%，並且計數單元 =及士暫存器224會重置。接下來，在水平同步訊號的下 二個，:，計數單元222進行計數視訊訊號VS，中為高 /;位的最南有效位元，並且傳送至暫存m乂暫存第二 ^數結，γ。此時’計數單元222也傳送第二計數結果γ 比奴單7L 220，以便與第—邏輯結果χ及灰階閘限值z 4比車又。依據分析結果，決定輸出自比較單元的閃鎖 脈波訊號LP的邏輯狀態。 、值侍-提的是，第一計數結果X及第二計數結果γ 刀=經由比較單元226與灰階閘限值ζ比較，以分別表示 在第-掃描線SL1及第二掃描線[(未繪示）的灰階分 ，、其^灰_值z侧於灰階閘限準位。舉例來說， 方視訊貝料VS，的灰階準位為0到255，那麼前50%的灰階準 到127(衫像的較暗區域），而後5〇%的灰階準位為ία 到255(衫像的較壳區域）。因此’灰階閘限值z為127或丨。 13 201117176 HM-2008-0064-TW 29706twf.doc/n 在此’上述為高準位的最高有效位元表示視訊資料，之—灰 階準位對應一較亮的晝素。也就是說，若第一計數結果χ大 於灰階閘限值Ζ(意指χ>ζ)，表示在第一掃描線中的視訊資料 VS’的灰階分佈較亮。換言之，若第二計數結果γ大於第一計 數結果Χ(意指Υ>χ) ’表示在第二掃描線的視訊資料vs，之灰 階分佈比第一掃描線的視訊資料vs，之灰階分佈還要亮。 須注意的是，在本實施例所提到的灰階閘限值z對應 灰階準位為0到255前50%的灰階準位與後50%的灰階準位 被視為一特定的實施方式。任何本技術領域中具有通常知識 者，皆能調整上述前50%的灰階準位與後5〇%的灰階準位^ 為前60%的灰階準位與後40%的灰階準位或前4〇%的灰階準 位與後6〇%的灰階準位等等。因此，上述特定的實施方式並 非用以限定本發明。 請參照圖6,由上面說明可知，若取自資料分析 220的分析結果為第二計數結果γ大於或等於第—計數姓 果Χ(也就是Υ^Χ)，那麼由資料分析單元22〇輸出的^ 脈波訊號LP之邏輯準位為高準位，因此在源極驅動器犯 中贿單元的電荷分享功能會依據問鎖脈波訊號Lp °之 輯準位而在一電荷分享期間禁能。同樣地，若分析結果為 第二計數結果Y小於第一計數結果χ且大於灰階問限值z (也就是Y<X且Y>Z)，那麼問鎖脈波訊號Lp之邏輯準 ^為南準位，並且在源極驅動器SD中驅動單以 享功能會禁能。相反地，若分析結果為第二計數結果γ = 於第-計數結果X且小於或等於灰階閘限值ζ(也就是 201117176 HM-2008-0064-TW 29706twf.doc/n X且’那麼閃鎖脈波訊號LP之邏輯準位為低準位， 並且在源極驅動器SD中驅動單元的電荷分享功能會依據 閃鎖脈波訊號LP之邏輯準位而致能。因此，在源^驅動 器SD中驅動單元的電荷分享功能會依據來自資料 元220的_脈波訊號LP之邏輯準位而於不 八 享期間中選擇性地致能。 一用以，態分析視訊資# vs 5戈vs，之灰階分 貪料分析單兀220及在源極驅動器SD中 如驅動單細及⑽），其有多種實現^動^^ 料分析皁兀。圖2至圖6緣示的方塊設計 ★疋貝 屬技術領域+具有通常知識者絲實現本X明所 並非用以限定本發明。 X 3貫施例， 相對於上述内容，本發明另一實施例提供—、 其用以控制源極驅動器的電荷分享功能。、—種f法’ 方法包括：（a)分析視訊訊號vs的灰階分，何分旱控制 析結果；（b)依據分析結果，致能或^取得-分 動單元的電荷分享功能。 ’、驅動器中驅 综上所述’本發明實施例的源極驅動器， =析單元分析視訊訊號的灰階分佈以取得—八/、利用資料 著’依據分析結果，在源極鶴器中驅:析結果。接 功能會於不同電荷分享觸巾致能或⑼。^的電荷分享 先前技術，可以減少源極驅動器的功率消耗此，相較於 雖然本發明已以實施例揭露如上，然复:工作溫度。 本發明’任何所屬技術領域中具有通常知^非用以限定 °考，在不脫離 15 ] 201117176 HM-2008-0064-TW 29706twf.doc/n 今之更動與潤飾，故本 利範圍所界定者為準。 本發明之精神和範圍内，當可作些許 發明之保護範圍當視後附之申請專^ 【圖式簡單說明】 奇資料線的訊號時序 圖1A繪示一傳統液晶顯示器。 圖1B為圖ία的一偶資料線及_ 圖。 圖1C繪示一傳統顯示器。 圖。圖1D為圖1C的-偶資料線及—奇資料線的訊號時序 φ 一圖1Ε為圖ic的一偶資料線及一奇資料線於無電荷分 享功能的一白色晝面的訊號時序圖。 刀 圖1F為圖1C的一偶資料線及一奇資料線於電荷分享 功能的一白色畫面的訊號時序圖。 圖2為依據本發明一實施例的顯示器的簡化方塊圖。 圖3為依據本發明一實施例的圖2源極驅動器的簡化 方塊圖，其中源極驅動器包括驅動單元及資料分析單元。 圖4為依據本發明一實施例的圖3資料分析單元的 化方塊圖。 圖5為圖3的視訊資料的資料傳送模式。 圖6為依攄太發明旯„眘谂也丨从園9"Off 172, 174, and 176, etc.) In U 'then there will be an unexpected phenomenon;: in: =t3 and V187, confessing gamma π π small slave voltage V186 will lead to, (4) n; Figure 1F is a switching phenomenon. This unpredictable situation causes the operating temperature of the source driver SD to rise. Therefore, it is a suitable display device to solve this problem. ❿ 叶 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 【 The operating temperature of the driver's low-pole driver. Knife method, the power sharing control of the source driver of the source driver and the reduced-pole driver = 2〇1117176 HM-2008-0064-TW 29706twf.doc/n. . . In order to solve the above-mentioned conventional problems, the present invention proposes a source driving benefit, which includes a -lin unit and a data analysis unit. The crane unit drives the display panel according to the video signal. The data analysis unit is coupled to the drive unit, and the data analysis unit enables or disables the single share function according to the analysis result. 7 The present invention further provides a charge sharing control method for a source driver. The method includes analyzing the gray scale distribution of the video signal to obtain a result of the analysis and enabling or disabling the charge sharing function of the driving element in the energy source driver according to the analysis result. The source driver and its charge sharing control method proposed by the present invention can control the charge sharing function of the source driver proposed by the present invention, so that the power consumption and operating temperature of the source driver can be reduced. The above-described embodiments and advantages of the present invention will be more apparent from the following description. [Embodiment] FIG. 2 is a simplified block diagram of a display according to an embodiment of the present invention. In the embodiment, the display 200 is exemplified by a thin film transistor-liquid crystal display (TFT-LCD). As shown in FIG. 2, the display 200 includes a timing controller TC〇N, a source driver sd, and a display panel 210. The source driver SD includes a plurality of driving units < (for example, driving units 230 and 250) and a receiver 232. And data analysis sheet 220. The timing controller TC0N transmits the horizontal synchronization through the receiver 23 2011 201117176 HM-2008-0064-TW 29706twf.doc/n the signal TP1 and the video data VD to the respective driving units 230 and 25〇. That is, the receiver 232 receives the video data VD supplied by the timing controller tc〇n and outputs the corresponding video signal vs to the respective driving units 230 and 250. Each of the driving units (for example, the driving unit 23A) drives the display panel 210 in accordance with the video signal V S . The details of the operation of each of the source driving units are well known to those of ordinary skill in the art, and the two display panels 210 have no multiple data lines (such as data lines DL1 and DL2) and a plurality of scanning lines (for example, First scan line SL1). Each data line is connected to multiple secondary elements (here only the secondary elements 212 and 214 are shown). The data line DL1 is connected to a set of sub-singular elements 212, and each of the pixel units 212 includes a transistor T and a liquid crystal capacitor c. The signal corresponding to the first scan line SL1 is used to control the transistor τ, so that the driving unit 230 stores the data driving voltage to the capacitor C. The capacitor C stores the data of the data line DL1 based on the common voltage Vcom, and the light transmittance of the sub-cell unit 212 is determined by the voltage difference across the liquid crystal capacitor C. 3 is a simplified block diagram of the source driver of FIG. 2, wherein the source driver includes a drive unit and a data analysis unit, in accordance with an embodiment of the present invention. Here, only the driving unit 230 and the data analysis single well 220 are shown, but the other driving units in the i source driver SD also have the following features. Referring to Figure 3, the drive unit 230 includes a line buffer 234, a digital-to-analog converter (DAC) 236, and an output buffer 238. The slave 232 receives the video material VD supplied from the timing controller TC〇N, and then outputs the corresponding video signal vs. The output buffer 238 drives the display panel 200 as shown in FIG. 2 to display the corresponding facets. The operation details of a source driving unit are well known to those skilled in the art and will not be described herein.值得 It is worth mentioning that the data analysis single call is connected to the round end of the receiver 232 for analyzing the gray scale distribution of the video signal VS, and the result of the analysis is obtained accordingly. Next, the data analysis unit 220 outputs a corresponding analysis result lock pulse wave # number LP to enable or disable the electric power of the drive unit 23〇. Therefore, the charge sharing function can be selectively enabled for different periods of sharing. In the present embodiment, the thin film transistor liquid crystal display is used to display the crying and "lock pulse signal LP control charge sharing function" as an example, but the present invention is limited thereto. For the step-by-step, please refer to Fig. 3, the data analysis unit fine unit 222, the register 224, and the comparison unit (10). In the present embodiment, the error signal of the video signal vs. the retrieved valid bit το (mGstsignifleantbit, MSB) from the receiver is analyzed to obtain the grayscale distribution of the video operator. Let (4) say that the counting unit ^ = the logical (4) of the highest new bit of the signal VS (can = quantity ' and output the counting result, wherein the counting unit 222Hlj number results. The timing of the input end of the register 224; 224 according to the level Synchronizing the result of the counting of the early element 222, and the rim of the input and the result of the rounding of the comparison unit 226_the register 224 of 222 to obtain the analysis result, the output result of the temporary storage 4 is represented by χ, Figure 7 is a simplified block diagram of the data analysis unit of Figure 3, in accordance with an embodiment of the present invention. Figure 5 is a simplified block diagram of the data analysis unit of Figure 3, in accordance with an embodiment of the present invention. 3 data transmission mode of video data. Please refer to Figure 3 to Figure 5, the video provided by the timing controller TC〇N; material;; transmitted to the receiver 232 through the two lean pairs, for example, the first data pair pA and The second data is PB. As shown in Fig. 5, the first data pair pA and the second data pair PB take 8 bits as an example. Then, the receiver outputs the corresponding video signal to the line buffer 234. And the counting unit 222. Therefore, the first counter 222a and the second counter in the counting unit 222 are present Separately, the data-to-data pair and the second data pair pB are received. Next, the first count is 222a, which counts the most significant bit of the high level, wherein in the first data pair PA, the most significant bit is marked, for example, D〇7. When the counting result of crying is greater than the grayscale threshold z, the first counter 222/ transmits the logical logic, and the bit signal to the logic gate 22δ. At this time, if the second data is ρβ, the 苐- 4 counts $ η% of the count result is also greater than the gray scale threshold z when 'the second counter 22h will send a high logic level signal to the logic gate. Here's the logic gate 228 and the gate as an example, and therefore the gate output The high logic level signal is sent to the register 224 to temporarily store the first logic node ^X from the gate. In this embodiment, the logic gate 228 can also be implemented by the gate, but the gray p white limit value z must be Corresponding change. After receiving the horizontal same signal τρι, the first logical result 暂 temporarily stored in the temporary memory 224 will be transmitted, and the comparison unit and the first counting unit 222a, the second counting unit 222b and the temporary one will be placed. Then, the counting unit 222 counts the most significant bit in the video message~ as the A. The flat synchronization signal TP1 201117176 HM-2008-0064-TW 29706twf.doc/n the first day of the day 'in the order' by a similar method of analyzing video data from the gate - the logical result γ will be transmitted to the register a4 The temporary storage is sent to the comparison unit 226 for comparison with the first logical result. Insufficiency: when the logic wire is at a high logic level and the second logic result is at the _ domain level, the gray level of the video data vs. The distribution trace su will be brighter than the second scan line su (not shown), and thus the pulse signal Lp having a lower logic level than the 7C 226. Therefore, the flash signal 〇 > enables the charge sharing function of the driving unit 230. It should be noted that in this embodiment, under the other conditions of the first result X and the second logical result=, the comparison unit 226 outputs 2mLp, b ' with a high logic level, and analyzes the image by the above method. 2 display panel ^ Rensi two scan lines of the video signal vs gray scale distribution, during (four) load sharing, the charge molecule function of the drive unit in the source driver SD will be based on the (four) 绮 unit (10) lock pulse signal Logic level is selectively enabled. Figure 6 is a block diagram of the secret drive of Figure 2 in accordance with an embodiment of the present invention, wherein the source driver includes a drive unit and data analysis. Here, only the drive unit 230 and the data analysis unit 22 are shown. In the source driver SD, the other drive unit also has the following features. In the present embodiment, the source driver SD further includes a serial-parallel converter 240 coupled to the receiver 232 and the driving unit 23, and the sequential 3-line converter 240 converts the video signal VS from the sequence data to thousands. Mussels. Further to the brother, the sequence parallel converter 24 讯 signal VS (such as the sequence data from the receiver 232), and then convert 12 201117176 ruvi-^v〇8-〇〇64-TW 29706twf.doc/n for parallel data. Therefore, the sequence switch converter 240 rotates the video signal ^, to the line buffer = 234', wherein the video signal vs. is parallel data. When the video signal VS, is sent to the most significant bit ^ of the counting unit 222 2! ^ signal VS of the line buffer H 234 ' data analyzing unit 22G. ^ When the most significant bit of the most significant bit is the south level (e.g., marked as, Γ,), the counting unit 2D counts the most significant bit, and thereby obtains the second factor from the counting unit milk. Then the 'first count result 暂 will be temporarily stored in the scratchpad. After receiving the horizontal sync signal τρι, the temporary register is temporarily stored, and the result X is transmitted to the comparison unit a%, and the counting unit = and the register 224 are reset. Next, in the next two of the horizontal synchronization signals, the counting unit 222 counts the video signal VS, which is the most south significant bit of the high/bit, and transmits to the temporary storage m乂 temporary storage second number knot , γ. At this time, the counting unit 222 also transmits the second counting result γ to the slave 7L 220 so as to be closer to the first logical result 灰 and the grayscale threshold z 4 . Based on the analysis result, the logic state of the flash lock pulse signal LP outputted from the comparison unit is determined. The value of the first count result X and the second count result γ knife are compared with the gray scale threshold value 比较 via the comparing unit 226 to respectively represent the first scan line SL1 and the second scan line [( The gray level of the unillustrated, and its gray_value z side is on the gray level threshold. For example, the square-order material VS, the gray-scale level is 0 to 255, then the first 50% of the gray level is accurate to 127 (the darker area of the shirt image), and the next 5〇% of the gray level is ία To 255 (the shell area of the shirt). Therefore, the gray scale threshold z is 127 or 丨. 13 201117176 HM-2008-0064-TW 29706twf.doc/n Here, the most significant bit of the above-mentioned high-level indicates the video data, and the gray-scale level corresponds to a brighter pixel. That is, if the first count result χ is greater than the gray scale threshold Ζ (meaning χ > ζ), it indicates that the gray scale distribution of the video material VS' in the first scan line is bright. In other words, if the second count result γ is greater than the first count result Χ (meaning Υ > χ) ' indicates the video data vs at the second scan line, the gray scale distribution is smaller than the video data vs of the first scan line, The distribution is even brighter. It should be noted that the gray scale threshold z mentioned in this embodiment corresponds to the gray scale level of the gray level order of 0 to 255 and the gray level of the last 50% is regarded as a specific Implementation. Anyone with ordinary knowledge in the art can adjust the top 50% gray level and the last 5% gray level. The first 60% gray level and the last 40% gray level. Bit or the first 4〇% of the gray level and the last 6〇% of the gray level and so on. Therefore, the above specific embodiments are not intended to limit the invention. Referring to FIG. 6 , it can be seen from the above description that if the analysis result obtained from the data analysis 220 is that the second count result γ is greater than or equal to the first count result (ie, Υ^Χ), then the data analysis unit 22 outputs The logic level of the pulse signal LP is a high level, so the charge sharing function of the bribe unit in the source driver is disabled during a charge sharing period according to the level of the lock pulse signal Lp °. Similarly, if the analysis result is that the second count result Y is smaller than the first count result 大于 and greater than the gray scale question limit z (that is, Y < X and Y > Z), then the logic of the lock pulse signal Lp is The south level, and the function of driving the single in the source driver SD will be disabled. Conversely, if the analysis result is the second count result γ = the first-count result X and less than or equal to the gray-scale threshold ζ (that is, 201117176 HM-2008-0064-TW 29706twf.doc/n X and 'think The logic level of the lock pulse signal LP is low level, and the charge sharing function of the drive unit in the source driver SD is enabled according to the logic level of the flash lock pulse signal LP. Therefore, in the source driver SD The charge sharing function of the middle drive unit is selectively enabled in the non-occupied period according to the logic level of the pulse signal LP from the data element 220. One, the state analysis video resource #vs 5go vs, The gray scale is divided into the greedy analysis unit 220 and the source driver SD as the driving unit is thin and (10), and there are various implementations for analyzing the saponin. The block design shown in Fig. 2 to Fig. 6 is a technical field of the art and is generally used to define the present invention. In another embodiment, in contrast to the above, another embodiment of the present invention provides a charge sharing function for controlling a source driver. The method of "f method" includes: (a) analyzing the gray scale of the video signal vs, and analyzing the result of the drought control; (b) enabling or acquiring the charge sharing function of the transfer unit according to the analysis result. 'In the drive, the source driver of the embodiment of the present invention, the analysis unit analyzes the gray scale distribution of the video signal to obtain - eight /, using the data according to the analysis result, driving in the source crane : Analysis of the results. The connection function will be enabled in different charge sharing touches or (9). ^ Charge Sharing Prior art, the power consumption of the source driver can be reduced, as compared to the above, although the present invention has been disclosed in the above embodiments, the operating temperature. The present invention has a general knowledge in the field of the art, and does not deviate from the 15] 201117176 HM-2008-0064-TW 29706twf.doc/n. Prevail. In the spirit and scope of the present invention, the scope of protection of some inventions can be seen as a singular application of the singular data line. FIG. 1A illustrates a conventional liquid crystal display. Fig. 1B is an even data line and _ diagram of Fig. Figure 1C illustrates a conventional display. Figure. 1D is the signal timing of the - even data line and the odd data line of FIG. 1C. FIG. 1A is a signal timing diagram of an even data line of the image ic and a white data line of the odd data line in the no-charge sharing function. Fig. 1F is a signal timing diagram of a white picture of the charge sharing function of an even data line and an odd data line of Fig. 1C. 2 is a simplified block diagram of a display in accordance with an embodiment of the present invention. 3 is a simplified block diagram of the source driver of FIG. 2, wherein the source driver includes a drive unit and a data analysis unit, in accordance with an embodiment of the present invention. 4 is a block diagram of the data analysis unit of FIG. 3 in accordance with an embodiment of the present invention. FIG. 5 is a data transmission mode of the video material of FIG. 3. Figure 6 shows the 旯 摅 旯 旯 谂 谂 谂 谂 谂 丨 from the garden 9
16 201117176 HM-2008-0064-TW 29706twf.doc/n 【主要元件符號說明】 100、150、200 :顯示器 120、121、160、170 :源極驅動單元 122、162 :介面電路 124、164、236 :數位至類比轉換器 126、166、238 :輸出緩衝器 130、 180、210 :顯示面板 131、 15卜SL1 :掃描線 132、 T :電晶體 134、C :液晶電容 136、137、186、187、DU、DL2 :資料線 139、140、212、214、239、240 :次晝素單元 172、174、176 :開關 220 :資料分析單元 222 :計數單元 222a、222b :計數器 224 :暫存器. 226 :比較單元 228 :及閘 230、250 :驅動單元 232 :接收器 234 :線緩衝器 240 :序列平行轉換器 VD :視訊資料 17 201117176 HM-2008-0064-TW 29706twf.doc/n VS、VS’ ：視訊訊號 LP :閂鎖脈波訊號 PA、PB :資料對 SD :源極驅動器 TCON :時序控制器 TP1 :同步訊號 Vcom :共同電壓 MSB .最尚有效位元16 201117176 HM-2008-0064-TW 29706twf.doc/n [Main component symbol description] 100, 150, 200: display 120, 121, 160, 170: source drive unit 122, 162: interface circuit 124, 164, 236 : Digital to analog converters 126, 166, 238: output buffers 130, 180, 210: display panels 131, 15b SL1: scan lines 132, T: transistors 134, C: liquid crystal capacitors 136, 137, 186, 187 , DU, DL2: data line 139, 140, 212, 214, 239, 240: secondary unit 172, 174, 176: switch 220: data analysis unit 222: counting unit 222a, 222b: counter 224: register. 226: comparison unit 228: and gate 230, 250: drive unit 232: receiver 234: line buffer 240: serial parallel converter VD: video data 17 201117176 HM-2008-0064-TW 29706twf.doc / n VS, VS ' : Video signal LP : Latch pulse signal PA, PB : Data pair SD : Source driver TCON : Timing controller TP1 : Synchronization signal Vcom : Common voltage MSB . Most effective bit
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