TWI379274B - Source driver and method for restraining noise thereof - Google Patents

Source driver and method for restraining noise thereof Download PDF

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Publication number
TWI379274B
TWI379274B TW96133734A TW96133734A TWI379274B TW I379274 B TWI379274 B TW I379274B TW 96133734 A TW96133734 A TW 96133734A TW 96133734 A TW96133734 A TW 96133734A TW I379274 B TWI379274 B TW I379274B
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voltage
source driver
output
data
multiplexer
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TW96133734A
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TW200912861A (en
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Chuan Che Lee
Tsung Yu Wu
Yu Jui Chang
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Himax Tech Ltd
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Description

1379274 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種顯示器,且特別是有關於一種顯 示器之源極驅動器及其方法。 【先前技術】 近年來’隨著光學科技與半導體技術的進步,液晶顯 示裝置(Liquid Crystal Display ; LCD)已廣泛的應用於電子 產品上。液晶顯示器具有高畫質、體積小、重量輕、低電 壓驅動及低消耗功率等優點,故已廣泛的應用於可攜式電 腦、個人數位助理以及彩色電視機等產品中,成為顯示器 的主流。 第1圖係繪示使用於液晶顯示器之習知源極驅動器 1〇〇之示意圖。源極驅動器100至少包括通道(1〇8、11〇)、 一多工器_x)112'輸出墊(114、116)、—資料匯流排118 以及電壓均分開關(Charge Sharing Switch) 120。通道jog 與110經由多工器112,分別連接至輸出墊114與116。電 壓均分開關120電性連接於輸出墊114與116之間,以在 需要時’均分輸出端的電壓。各通道具有一移位暫存器(122 或132)、一栓鎖’單元(LatchUnit)(123或133)、一位準移位 器(128或138)、以及一數位/類比轉換器(DAc”3〇或 ⑽)。各栓鎖單元至少包括一第一拾鎖(124或叫與一第 二栓鎖(126或136)串聯。資料傳輸於資料匯流排ιι8上, 並儲存於栓鎖單元中,更甚者,資料絲存在第—检鎖中, 再儲存於第二栓鎖中。資料會再經由輸出塾ιΐ4與ιΐ6,傳 1379274 送至—顯示器(未繪示),以在顯示器上顯示對應之影像。 然而,當供電至源極驅動器之電源供應器要關閉時, 供應至源極驅動器之電壓會降低,因為電壓不夠,通道便 可能會誤動作’這會在顯示器上造成不正常的影像,例如 線缺陷(Line Defects)或條紋(Band Mura) 0 【發明内容】1379274 IX. Description of the Invention: [Technical Field] The present invention relates to a display, and more particularly to a source driver of a display and a method thereof. [Prior Art] In recent years, with the advancement of optical technology and semiconductor technology, liquid crystal display (LCD) has been widely used in electronic products. The liquid crystal display has the advantages of high image quality, small size, light weight, low voltage driving and low power consumption, and has been widely used in portable computers, personal digital assistants, and color televisions, and has become the mainstream of displays. Fig. 1 is a schematic view showing a conventional source driver used in a liquid crystal display. The source driver 100 includes at least a channel (1〇8, 11〇), a multiplexer_x) 112' output pad (114, 116), a data bus 118, and a voltage sharing switch (Charge Sharing Switch) 120. Channels jog and 110 are coupled to output pads 114 and 116 via multiplexer 112, respectively. The voltage equalization switch 120 is electrically coupled between the output pads 114 and 116 to 'equalize the voltage at the output when needed. Each channel has a shift register (122 or 132), a latch unit (LatchUnit) (123 or 133), a bit shifter (128 or 138), and a digital/analog converter (DAc) "3〇 or (10)). Each latch unit includes at least a first pick-up (124 or a series connection with a second latch (126 or 136). The data is transmitted to the data bus ι 8 and stored in the latch unit. In the middle, and even more, the data is stored in the first lock, and then stored in the second latch. The data is then sent to the display (not shown) via the output 塾ιΐ4 and ιΐ6, 1379274, on the display. The corresponding image is displayed. However, when the power supply to the source driver is turned off, the voltage supplied to the source driver will decrease, and the channel may malfunction due to insufficient voltage. This will cause an abnormal image on the display. , for example, Line Defects or Strip Mura 0 [Invention]

因此,本發明的目的就是在提供一種源極驅動器及其 雜訊抑制方法,可在電源供應器導通/關閉時,減少顯示ς 顯示器上之不正常影像。 、 本發明的另一目的就是在提供一種源極驅動器,具有 -f降偵測器,用以偵測電源供應器是否正導通/關閉,若 為是,則產生一重設訊號(Reset Signal)。 根據本發明之上述目的’提出—種在—電源供應器等 通/關閉時,抑制-源極驅動器輸出之雜訊之方法。此源相SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a source driver and a noise suppression method thereof which can reduce an abnormal image on a display device when the power supply is turned on/off. Another object of the present invention is to provide a source driver having a -f drop detector for detecting whether the power supply is being turned on/off, and if so, generating a Reset Signal. According to the above object of the present invention, there is proposed a method of suppressing noise of a source driver output when a power supply or the like is turned on/off. This source phase

驅動器至少包括一資料匯流排、複數個通道、一多工器心 及複數個輸㈣。通道經由多輪出墊,各通道具 ^栓鎖單it ’資料傳輸於資料匯流排上,並儲存^鎖 單元中。源極驅動器可由電源供應器輸一笙 4 ^ ^ 乐一供應雷 塵供電。上述之方法至少包括下列步驟。首先,判別第一 供應電麗是否不足,若不足,則進行下列步驟。先將傳翰 於資料匯流排上之資料設為一預設值,再維持栓鎖單元門』 啟’以使資料從栓鎖單元輸出。接著,維持多卫器開啟: 以根據上述之資料,經由輸出墊輸出—驅動電壓。The driver includes at least one data bus, a plurality of channels, a multiplexer, and a plurality of inputs (four). The channel passes through multiple rounds of the pad, and each channel has a latching single it' data transmitted on the data bus and stored in the lock unit. The source driver can be powered by a power supply. The above method includes at least the following steps. First, it is determined whether the first supply battery is insufficient, and if it is insufficient, the following steps are performed. First set the data on the data bus to a preset value, and then maintain the latch unit door to enable the data to be output from the latch unit. Next, the multi-guard is turned on: to output the driving voltage via the output pad according to the above information.

根據本發明之另^一目的,接'JE 曰町杈出種源極驅動器,可由 1379274 一電源供應器供電。此源極驅動器至少包括一資料匯流 排、至少二通道'一多工器、至少二輸出墊、以及一壓降 偵測器。各通道具有一栓鎖單元,資料傳輸於資料匯流排 上’並儲存於栓鎖單元中。輸出墊經由多工器耦接通道。 壓降偵測器用以偵測由電源供應器輸出之一第一供應電壓 疋否不足,若不足,則產生一重設訊號。若產生此重設訊 號,則將傳輸於資料匯流排上之資料設為一預設值’開啟 栓鎖單元,以使資料從栓鎖單元輸出,並開啟多工器,以 根據^料’經由輸出堡輸出一驅動電壓。 【實施方式】 為了使本發明之敘述更加詳盡與完備,可參照下列描 述並配合第2圖至第4圖之圖示。 請參考第2圖,第2圖係繪示依照本發明較佳實施例 之源極驅動器之示意圖。第2圖令之源極驅動器2〇〇由一 電源供應器202供電,且源極驅動器2〇〇至少包括複數個 通道(通道208、通道210··.)、至少一多工器(Μυχ)2ΐ2、複 數個輸出墊(輸出墊214、輸出塾216·..)經由多工器212柄 接通道、一電壓均分開關220' 一壓降偵測器204與電源供 應=202相接、以及一控制器2〇6連接至壓降偵測器2⑽。 電壓均分開關220電性連接於輸出墊214與216之間,以 在需要時,均分輸出端的電壓。電源供應器2〇2可提供高 電位之一第一供應電壓與低電位之一第二供應電壓。 θ壓降偵測器204可判別電源是否正導通或關閉,若為 則產生一重设訊號Rs。電源導通/關閉的判定是藉由偵 1379274 測從電源供應器202輪出之第一供應電壓與第二供應電壓 之其中之一者疋否不足,亦即,是否低於某些臨界值。 重設訊號RS會再送至控制器2〇6。控制器2〇6接著根 據重設訊號RS,產生—控制訊號CN,並將此控制訊號CN 傳送至電壓均分開關220,以關閉電壓均分開關22〇β此控 制訊號CN更傳送至多工器,以斷開通道與輸出墊之連接, 因此,當供電至源極驅動器之電源供應器2〇2正要導通/關 閉時,可能會不正常的資料便不會傳送至輸出墊。故,在 電源供應器導通/關閉時,顯示器會持續顯示原來的影像。 請參考第3圖,第3圖係繪示依照本發明較佳實施例 之另一源極驅動器之示意圖。第3圖中之源極驅動器3〇〇 由一電源供應器302供電,且源極驅動器3〇〇至少包括通 道308與通道310'多工器(Μυχ)312、輸出墊314與輸出 墊316、一資料匯流排318、一電壓均分開關32〇、一壓降 偵測器304與電源供應器3〇2相接、以及一控制器3〇6連 接至壓降偵測器304。輪出墊314與輸出墊316經由多工器 312耦接至通道308與通道31〇 β電壓均分開關32〇電性連 接於源極驅動器300之輸出墊314與輸出墊316之間,以 在需要時,均分輸出端的電壓。 . 各通道具有一移位暫存器(322或332)、一栓鎖單元 (323或333)、一位準移位器(328或338)、以及一數位/類比 轉換器(DAC)(330或340)。各栓鎖單元至少包括一第一栓 鎖(324或334)與一第二栓鎖(326或336)串聯。資料傳輪於 資料匯流排318上,並儲存於栓鎖單元中,更甚者,資料 先儲存在第一栓鎖中,再儲存於第二栓鎖中。 1379274 當電源供應器302正常供電至源極驅動器300時,通 道中的資料會輸入至多工器3 12,再經由輸出墊314與輸出 墊316,傳送至一顯示器(未繪示於圖中),以在顯示器上顯 示對應之影像。然而,當電源供應器3〇2正要導通或關閉 時’傳送至源極驅動器300的電壓開始不足。若電源供應 器302輸出之電壓不足,則壓降偵測器304會產生一重設 訊號RS,並將此重設訊號RS送至控制器3〇6,以根據重 設訊號RS,產生一控制訊號CN。此控制訊號CN會傳送 至電壓均分開關32〇,以關閉電壓均分開關32〇。接著,此 控制訊號CN也會傳送至資料匯流排318,以將傳輸於資料 匯机排3 18上之資料設為一預設值。更甚者,此控制訊號 CN也會傳送至栓鎖單元323與333,以維持栓鎖單元 與333開啟,藉以使資料從栓鎖單元323與333輸出◊此 控制訊號CN更會傳送至多工器312,以維持多工器312開 啟,以根據上述之資料,經由輪出墊輸出一驅動電壓。因 此,輸出墊314與輸出墊316會輸出預設的電壓至一顯示 器(未繪示於圖中故,在電源供應器導通/關閉時,顯示 器會顯示對應的黑畫面或白晝面。 值知注意的是,在本發明之其他實施例中,電壓均分 開關是選擇性的。因此’在本發明之其他實施例中,當電 原供應器302正要導通或關閉時,亦即第一供應電壓不足 時,關閉電壓均分開關之步驟亦是選擇性的。更甚者,在 本I明之幢實施财,維持栓鎖單元開啟之步驟係在維 持第一检鎖開啟。 以下將詳細說明壓降偵測器的結構與重設訊號rs的 1379274 產生。 β月參考第4圖,第4圖係繪示依照本發明較佳實施例 之壓降偵測器之示意圖。第4圖中之壓降偵測器3〇4至少 包括一第一分壓器402、一第二分壓器4〇4、一第一比較器 406、一第二比較器408、一第一反相器41〇、一第二反相 器412、一第二反相器414、一第四反相器416、一位準移 位器418' —第五反相器42〇以及一或閘426。或閘426至 少包括一反或閘422與一第六反相器424串聯。第一分壓 器402包括_聯的電阻R1至R7,而第二分壓器4〇4包括 串聯的電阻R_ll至R16。 第一分壓器402根據從電源供應器輸出之第一供應電 壓VDDA,產生一第一分壓電壓,而第二分壓器 根據從電源供應器輸出之第二供應電壓VDDD,產生一第 二分壓電壓vD1。.第一比較器406比較第一分壓電壓Vai 與臨界電壓VTH,並產生—第—比較訊號RsA。若第一分 壓電壓νΑ1小於臨界電壓Vth,則第—比較訊號隐為高 電位’表示因為電源供應器正要導通/關,所以電源供應 器的電壓不足。若第一分壓電壓Vai大於臨界電壓Vth,則 第一比較訊號RSA為低電位,表示電源供應器正常供電至 源極驅動器。 相似地,第二比較器408比較第二分壓電壓ν〇ι與臨 界電壓vTH,並產生一第二比較訊號RSD。若第二分壓電 壓vD1小於臨界電壓Vth,則第二比較訊號rsd為高電位, 表示電源供應器正要導通/關閉。若第二分壓電壓ν〇ι大於 臨界電麼vTH,則第三比較喊RSD為低電位,表示電源 10 1379274 供應器正常供電至源極驅動器β第一供應電壓vdda相較 於第二供應電壓VDDD,第一供應電壓VDDA為一高電 壓’第-比較器為-高電壓元件’而第二比較器為一低電 壓元件。第-分壓電壓vA1、第二分壓電壓ν〇ι以及臨界電 壓VTH的設定與改變皆可由使用者決定。 臨界電壓VTH.係由不會輕易受到電源供應器輸出電壓 降低影響之電路所產生,例如可為帶溝電壓產生器(Bandgap Voltage Generator) ° 第一比較訊號RSA會經由第一反相器41〇與第二反相 器412,傳送至或閘426之一輸入端。第二比較訊號RSD 會經由第二反相器414與第四反相器416,傳送至位準移位 器418 ’以移位第二比較訊號rSd之位準。位準已移位之 第二比較訊號RSD會再經由第五反相器42〇,傳送至或閘 426之另一輸入端。若第一比較訊號RSA與第二比較訊號 RSD皆為低電位,則或閘426輸出一低電位訊號,表示電 源供應器正常供電至源極驅動器,因此,重設訊號不會產 生。相反地,若第一比較訊號rSA及/或第二比較訊號RSD 為高電位,則或閘426輸出一高電位訊號,表示電源供應 器正要導通/關閉,重設訊號rS便會產生。 由上述本發明較佳實施例可知’本發明之一優點就 是’本發明可在電源供應器導通/關閉時,減少顯示於顯示 器上之不正常影像。 由上述本發明較佳實施例可知’本發明之另一優點就 是’本發明使用壓降偵測器,可偵測電源供應器是否正導 通/關閉,若為是,則產生一重設訊.號。 1J79274 p雖然本發明已以一較佳實施例揭露如上,然其並非用 •、限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍Θ ’當可作各種之更動與潤飾,因此本發明之保 δ蔓範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 ^為讓本發明之上述和其他目的、特徵、優點與實施例 忐更明顯易懂,所附圖式之詳細說明如下: 一第1圖係繪示使用於液晶顯示器之習知源極驅動器之 示意圖; 第2圖係續·示依照本發明較佳實施例之源極驅動器之 示意圖; 第3圖係繪示依照本發明較佳實施例之另一源極驅動 器之示意圖;以及 第4圖係繪示依照本發明較佳實施例之壓降偵測器之 示意 圖。 【主 要元件符號說明】 100 : 源極驅動器 306 : 控制器. 108 : 通道 308 : 通道 110 : 通道 310 : 通道 112 : 多工器 312 : 多工器 114 : 輪出墊 314 : 輸出墊 116 : 輸出墊 316 : 輸出墊 118 : 資料匯流排 318 : 資料匯流排 12 1379274According to another object of the present invention, the source driver of the JE 曰 杈 , can be powered by a power supply of 1379274. The source driver includes at least one data bus, at least two channels 'a multiplexer, at least two output pads, and a voltage drop detector. Each channel has a latching unit, and the data is transmitted on the data busbar' and stored in the latching unit. The output pad is coupled to the channel via a multiplexer. The voltage drop detector is configured to detect whether the first supply voltage of the power supply output is insufficient, and if not, generate a reset signal. If the reset signal is generated, the data transmitted on the data bus is set to a preset value of 'opening the latch unit, so that the data is output from the latch unit, and the multiplexer is turned on to The output gate outputs a drive voltage. [Embodiment] In order to make the description of the present invention more detailed and complete, reference is made to the following description and the drawings of Figs. 2 to 4 are incorporated. Please refer to FIG. 2, which is a schematic diagram of a source driver in accordance with a preferred embodiment of the present invention. The source driver 2 of the second figure is powered by a power supply 202, and the source driver 2〇〇 includes at least a plurality of channels (channel 208, channel 210·.), at least one multiplexer (Μυχ) 2ΐ2, a plurality of output pads (output pads 214, output ports 216·..) are connected to the power supply=202 via a multiplexer 212 handle channel, a voltage equalization switch 220', and a voltage drop detector 204, and A controller 2〇6 is connected to the voltage drop detector 2 (10). Voltage equalization switch 220 is electrically coupled between output pads 214 and 216 to evenly divide the voltage at the output when needed. The power supply 2 〇 2 can provide one of the first supply voltage of the high potential and the second supply voltage of the low potential. The θ voltage drop detector 204 can determine whether the power supply is being turned on or off, and if so, generates a reset signal Rs. The power-on/off determination is made by detecting 1379274 whether one of the first supply voltage and the second supply voltage that is rotated from the power supply 202 is insufficient, that is, whether it is below a certain threshold. The reset signal RS will be sent to the controller 2〇6. The controller 2〇6 then generates a control signal CN according to the reset signal RS, and transmits the control signal CN to the voltage sharing switch 220 to turn off the voltage sharing switch 22〇β, and the control signal CN is further transmitted to the multiplexer. To disconnect the channel from the output pad, therefore, when the power supply 2〇2 supplied to the source driver is about to be turned on/off, abnormal data may not be transmitted to the output pad. Therefore, when the power supply is turned on/off, the display will continue to display the original image. Please refer to FIG. 3, which is a schematic diagram of another source driver in accordance with a preferred embodiment of the present invention. The source driver 3 in FIG. 3 is powered by a power supply 302, and the source driver 3 includes at least a channel 308 and a channel 310' multiplexer 312, an output pad 314 and an output pad 316, A data bus 318, a voltage equalization switch 32A, a voltage drop detector 304 are connected to the power supply 3〇2, and a controller 3〇6 is connected to the voltage drop detector 304. The wheel 314 and the output pad 316 are coupled to the channel 308 via the multiplexer 312 and the channel 31 〇β voltage sharing switch 32 〇 electrically connected between the output pad 314 and the output pad 316 of the source driver 300 to Equalize the voltage at the output when needed. Each channel has a shift register (322 or 332), a latch unit (323 or 333), a one-bit shifter (328 or 338), and a digital/analog converter (DAC) (330). Or 340). Each latch unit includes at least a first latch (324 or 334) in series with a second latch (326 or 336). The data is transmitted to the data bus 318 and stored in the latch unit. Further, the data is first stored in the first latch and then stored in the second latch. 1379274 When the power supply 302 is normally powered to the source driver 300, the data in the channel is input to the multiplexer 3 12, and then transmitted to a display (not shown) via the output pad 314 and the output pad 316. To display the corresponding image on the display. However, when the power supply 3〇2 is about to be turned on or off, the voltage transmitted to the source driver 300 starts to be insufficient. If the voltage output from the power supply 302 is insufficient, the voltage drop detector 304 generates a reset signal RS, and sends the reset signal RS to the controller 3〇6 to generate a control signal according to the reset signal RS. CN. This control signal CN is transmitted to the voltage sharing switch 32A to turn off the voltage sharing switch 32A. Then, the control signal CN is also transmitted to the data bus 318 to set the data transmitted on the data bank 3 18 to a preset value. Moreover, the control signal CN is also transmitted to the latch units 323 and 333 to keep the latch unit and 333 open, so that the data is output from the latch units 323 and 333, and the control signal CN is transmitted to the multiplexer. 312, to maintain the multiplexer 312 on, to output a driving voltage via the wheel pad according to the above information. Therefore, the output pad 314 and the output pad 316 output a preset voltage to a display (not shown in the figure. When the power supply is turned on/off, the display will display a corresponding black or white surface. In other embodiments of the invention, the voltage sharing switch is selective. Thus, in other embodiments of the invention, when the power supply 302 is about to be turned "on" or "off", that is, the first supply When the voltage is insufficient, the step of turning off the voltage sharing switch is also optional. Moreover, in the building of the present invention, the step of maintaining the latch unit is turned on while maintaining the first lock opening. The structure of the down detector is generated by the reset signal rs 1379274. The reference is made to Fig. 4, and Fig. 4 is a schematic view of the voltage drop detector according to the preferred embodiment of the present invention. The down detector 3〇4 includes at least a first voltage divider 402, a second voltage divider 4〇4, a first comparator 406, a second comparator 408, and a first inverter 41〇. a second inverter 412, a second inverter 414, and a fourth inverse 416, a quasi-shifter 418'-the fifth inverter 42A and an OR gate 426. The gate 426 includes at least one anti-gate 422 in series with a sixth inverter 424. The first voltage divider 402 includes a resistor R1 to R7, and the second voltage divider 4〇4 includes resistors R_11 to R16 connected in series. The first voltage divider 402 generates a first according to the first supply voltage VDDA output from the power supply. Dividing the voltage, and the second voltage divider generates a second divided voltage vD1 according to the second supply voltage VDDD outputted from the power supply. The first comparator 406 compares the first divided voltage Vai with the threshold voltage VTH, And - the first comparison signal RsA is generated. If the first divided voltage ν Α 1 is smaller than the threshold voltage Vth, the first comparison signal is hidden at a high potential ' indicates that the power supply is insufficient due to the power supply being turned on/off. If the first divided voltage Vai is greater than the threshold voltage Vth, the first comparison signal RSA is low, indicating that the power supply is normally powered to the source driver. Similarly, the second comparator 408 compares the second divided voltage ν〇ι With a threshold voltage vTH and produce a second Compared with the signal RSD, if the second divided voltage vD1 is less than the threshold voltage Vth, the second comparison signal rsd is high, indicating that the power supply is about to be turned on/off. If the second divided voltage ν〇ι is greater than the critical voltage, vTH The third comparison calls RSD low, indicating that the power supply 10 1379274 is normally powered to the source driver β. The first supply voltage vdda is compared to the second supply voltage VDDD, and the first supply voltage VDDA is a high voltage 'first- The comparator is a high voltage component and the second comparator is a low voltage component. The setting and changing of the first divided voltage vA1, the second divided voltage ν〇ι, and the threshold voltage VTH can be determined by the user. The threshold voltage VTH. is generated by a circuit that is not easily affected by the output voltage drop of the power supply. For example, it can be a Bandgap Voltage Generator. The first comparison signal RSA will pass through the first inverter 41. And the second inverter 412 is coupled to one of the inputs of the OR gate 426. The second comparison signal RSD is transmitted to the level shifter 418' via the second inverter 414 and the fourth inverter 416 to shift the level of the second comparison signal rSd. The second comparison signal RSD whose level has been shifted is again transmitted to the other input of the OR gate 426 via the fifth inverter 42. If the first comparison signal RSA and the second comparison signal RSD are both low, the OR gate 426 outputs a low potential signal, indicating that the power supply is normally supplied to the source driver, and therefore, the reset signal is not generated. Conversely, if the first comparison signal rSA and/or the second comparison signal RSD are high, the OR gate 426 outputs a high potential signal indicating that the power supply is about to be turned on/off, and the reset signal rS is generated. It will be apparent from the above-described preferred embodiments of the present invention that the present invention is capable of reducing an abnormal image displayed on a display when the power supply is turned on/off. According to the preferred embodiment of the present invention, another advantage of the present invention is that the present invention uses a voltage drop detector to detect whether the power supply is being turned on/off. If so, a reset signal is generated. . 1J79274 p Although the present invention has been disclosed in a preferred embodiment as above, it is not intended to limit the invention, and any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above and other objects, features, advantages and embodiments of the present invention more obvious, the detailed description of the drawings is as follows: BRIEF DESCRIPTION OF THE DRAWINGS FIG. 2 is a schematic diagram showing a source driver in accordance with a preferred embodiment of the present invention; FIG. 3 is a schematic diagram showing another source driver in accordance with a preferred embodiment of the present invention; 4 is a schematic diagram of a voltage drop detector in accordance with a preferred embodiment of the present invention. [Main component symbol description] 100 : Source driver 306 : Controller. 108 : Channel 308 : Channel 110 : Channel 310 : Channel 112 : Multiplexer 312 : Multiplexer 114 : Wheel pad 314 : Output pad 116 : Output Pad 316: Output Pad 118: Data Bus 318: Data Bus 12 1379274

120 :電壓均分開關 320 : 122 :移位暫存器 322 : 123 ··栓鎖單元 323 : 124 :第一栓鎖 324 : 126 :第二栓鎖 326 : 128 :位準移位器 328 : 130 :數位/類比轉換器 330 : 132 :移位暫存器 332 : 133 :栓鎖單元 333 : 134 :第一栓鎖 334 : 136 :第二栓鎖 336 : 138 :位準移位器 338 : 140 :數位/類比轉換器 340 : 200 :源極驅動器 402 : 202 :電源供應器 404 : 204 :壓降偵測器 406 : 206 :控制器 408 : 208 :通道 410 : 210 :通道 412 : 212 :多工器 414 : 214 :輸出墊 416 : 216 :輸出墊 418 220 :電壓均分開關 420 300 :源極驅動器 422 302 :電源供應器 424 電壓均分開關 移位暫存器 栓鎖單元 第一栓鎖 第二栓鎖 位準移位器 數位/類比轉換器 移位暫存器 栓鎖單元 第一栓鎖 第二栓鎖 位準移位器 數位/類比轉換器 第一分壓器 第二分壓器 第一比較器 第二比較器 第一反相器 第二反相器 第三反相器 第四反相器 位準移位器 第五反相器 反或閘 第六反相器 13 1379274 426 :或閘 304 :壓降偵測器120: voltage sharing switch 320: 122: shift register 322: 123 · latching unit 323: 124: first latch 324: 126: second latch 326: 128: level shifter 328: 130: digital/analog converter 330: 132: shift register 332: 133: latch unit 333: 134: first latch 334: 136: second latch 336: 138: level shifter 338: 140: digital/analog converter 340: 200: source driver 402: 202: power supply 404: 204: voltage drop detector 406: 206: controller 408: 208: channel 410: 210: channel 412: 212: Multiplexer 414: 214: output pad 416: 216: output pad 418 220: voltage sharing switch 420 300: source driver 422 302: power supply 424 voltage sharing switch shift register latch unit first pin Lock second latch lock level shifter digit/analog converter shift register latch unit first latch lock second latch lock level shifter digit/analog converter first voltage divider second partial pressure First comparator second comparator first inverter second inverter third Phaser Fourth Inverter Level Shifter Fifth Inverter Reverse or Gate Sixth Inverter 13 1379274 426 : or Gate 304 : Voltage Drop Detector

Claims (1)

1379274 十、申請專利範圍: 一種在一電源供應器導通/關閉時,抑制一源極驅動 器輪出之雜訊之方法’該源極驅動器至少包括一資料匯流 排、複數個通道、一多工器以及複數個輸出墊,該些通道 經由該多工器耦接該些輸出墊,每一該些通道具有一栓鎖 早7L(Latch Unit) ’資料傳輸於該資料匯流排上,並儲存於 該些检鎖單元中’該源極驅動器可由該電源供應器輸出之 一第一供應電壓供電,該方法至少包括: 判別該第一供應電壓是否不足,若不足,則進行下列 步驟: 將傳輸於該資料匯流排上之該資料設為一預設 值; 維持該些栓鎖單元開啟,以使該資料從該些栓鎖 單元輸出;以及 維持該多工器開啟,以根據該資料,經由該些輸 出墊輸出一驅動電壓。 σ2·如申請專利範圍第1項所述之方法,其中該源極驅 動器更可由—第二供應電壓供電。 3’如申請專利範圍第2項所述之方法,其中該判別步 驟係判別該第-供應電壓是否小於-臨界電壓及/或該第 二供應電壓是否小於該臨界電壓。 15 1379274 4·#申mi利範圍第1項所述之方法,其t兩相鄰之 ~二輸出墊係藉由一電遷均分開關(Charge sh訂吨s witch) 相連且該方法更至少包括若該㈣步驟之結♦為是,則 關閉該電壓均分開關^ ,5·如中請專利範圍第4項所述之方法,其中該關閉該 電壓句刀開關之步帮係藉由傳送—控制訊號至該電壓均分 開關來進行’該控制訊號係根據—重設訊號⑽如^㈣) 所產生,且賴朗㈣之結果為是,料產生該重設訊 號。 6·如申請專職圍第5項所述之方法,其中該控制訊 號係由一控制器所產生。 7·如申請專利範圍第丨項所述之方法,其中該維持該 多工器開啟之步驟係藉由傳送—控制訊號至該多工器來進 行0 …8.如中請專利範_ 7項所述之方法,其中該控制訊 號係根據一重設訊號所產生,且若該判 ^別步驟之結果為 是’則會產生該重設訊號。 1如甲請專利 六丫該重設 號的產生係藉由比較一第一分壓電壓與—臨界電厘該 一分壓電壓係根據該第一供應電壓,若該筮 人 喝弟一分壓電壓 1379274 於該臨界電壓,則產生該重設訊號。1379274 X. Patent Application Range: A method for suppressing noise of a source driver wheel when a power supply is turned on/off. The source driver includes at least one data bus, a plurality of channels, and a multiplexer. And a plurality of output pads, the channels are coupled to the output pads via the multiplexer, and each of the channels has a latching 7L (Latch Unit) data transmitted to the data bus and stored in the channel In the check-lock unit, the source driver can be powered by one of the power supply outputs, the method comprising: determining whether the first supply voltage is insufficient, and if not, performing the following steps: transmitting the The data on the data bus is set to a preset value; maintaining the latch units open to output the data from the latch units; and maintaining the multiplexer to be turned on, according to the data, The output pad outputs a driving voltage. The method of claim 1, wherein the source driver is further powered by a second supply voltage. 3) The method of claim 2, wherein the determining step determines whether the first supply voltage is less than a -threshold voltage and/or whether the second supply voltage is less than the threshold voltage. 15 1379274 4·# The method described in the first item of the scope of the invention, wherein the two adjacent to the two output pads are connected by an electromigration equalization switch (Charge sh s witch) and the method is at least Including if the (4) step ♦ is YES, the voltage sharing switch is turned off, and the method described in claim 4, wherein the step of turning off the voltage knife switch is transmitted by - Control signal to the voltage sharing switch to perform 'The control signal is generated according to - reset signal (10) such as ^ (4)), and the result of Lai Lang (4) is YES, the material is generated to generate the reset signal. 6. The method of claim 5, wherein the control signal is generated by a controller. 7. The method of claim 2, wherein the step of maintaining the multiplexer is performed by transmitting a control signal to the multiplexer to perform 0...8. The method, wherein the control signal is generated according to a reset signal, and if the result of the determining step is ', the reset signal is generated. 1 such as a patent, the sixth generation of the reset number is generated by comparing a first partial voltage and a critical voltage, the partial voltage is based on the first supply voltage, if the monk is drinking a partial pressure The reset signal is generated by the voltage 1379274 at the threshold voltage. ιο·如申請專利範圍第 分壓電壓係藉由使用一第一 壓所產生。 9項所述之方法,其中該第一 分壓器,來分壓該第一供應電 籲 U·如申請專利範圍第9項所述之方法,其中該源極 驅動器更可由該電源供應器輸出之—第二供應電壓供電, =重::號的產生係藉由比較-第二分壓電壓與該臨界 電壓’該第二分壓電壓係根據該第二供 分壓電壓小於兮昨衷恭广 方邊弟一 '”亥k界電壓,則產生該重設訊號。 12.如申請專利範圍第u項所述之方1 分壓電壓係藉由偵用银 χ 八Τ透弟一 壓所產生。使用—第二分壓器,來分壓該第二供應電 單-s | 明專利範圍第1項所述之方法,其中該栓鎖 皁兀至少包括一笫— 办 ^ 存在該第4鎖中,第二栓鎖串聯,該資料先健 必於磁置再儲存於該第二栓鎖中,且該維持該 “ $汗啟之步驟係維持該第二栓鎖開啟。 驅動I i f源極驅動器’由一電源供應器供電,該源極 驅動Is至少包括: 一資料匯流排; 至少二通道,女 ^ 母一該些通道具有一栓鎖單元,資料傳 17 1379274 輸於該資料匯流排上,並儲存於該些栓鎖單元中; 一多工器; 至少二輸出墊’經由該多工器麵接該些通道;以及 一壓降偵測器,用以偵測由該電源供應器輸出之一第 一供應電壓是否不足,若不足,則產生一重設訊號; 其中,若產生該重設訊號,則將傳輸於該資料匯流排 上之該資料設為一預設值,開啟該些栓鎖單元,以使該資 料從該些栓鎖單元輸出,並開啟該多工器,以根據該資料, 經由該些輸出墊輸出一驅動電壓。 15. 如中请專利範圍第14項所述之源極驅動器,其中 該些輸出塾係、藉由-電壓均分開_連,且該源極驅動器 更至乂包括-控制器’用以根據該重設訊號,關閉該電壓 均分開關’並維持該多工器開啟β 16. 如_明專利範圍第14項所述之源極驅動器,其中 該壓降偵測器至少包括: 第—分壓器,用以根據該第一供應電壓,產生一第 一分壓電壓;以及 厭。f比較15,用以比較該第—分壓電壓與-臨界電 之一第 第-刀壓器,用以根據從該電源供應器輪出 18 1379274 二供應電壓,產生一第二分壓電壓; 第一比較斋,用以比較該第二分壓電壓與該臨界電 麼’以判別該第二供應電壓是否不足;以及 。-或閘(ORGate),具有兩輸入端分別連接至該第一比較 器/、該第—比較器之輸出端’以輸出該重設訊號。 p18·如申請專利範圍第17項所述之源極驅動器,其中 該第:供應電壓相較於該第二供應電壓,該第一供應電壓 為n電壓’該第一比較器為一高電壓元件,而該第二比 較器為一低電壓元件。 19*如申請專利範圍第18項所述之源極驅動器,其中 該壓降偵測器更至少包括—位準移位器,連接於該第二比 較器與該或閘之間。 20·如申請專利範圍第14項所述之源極驅動器,其中 該壓降偵測器更可偵測從該電源供應器輸出之一第二供應 電壓是否不足’若不足,則產生該重設訊號。Ιο· If the application of the patent range, the partial voltage is generated by using a first pressure. The method of claim 9, wherein the first voltage divider is configured to divide the first power supply. The method of claim 9, wherein the source driver is further outputtable by the power supply. The second supply voltage is supplied, and the =he:: is generated by comparing - the second divided voltage and the threshold voltage. The second divided voltage is less than the second divided voltage according to the second voltage. The Guangfang side brother's "Hekk boundary voltage" will generate the reset signal. 12. If the application method is covered by the scope of the patent, the partial voltage is based on the detection of silver χ Τ Τ Τ 一 一 一The method of claim 1, wherein the saponin comprises at least one 笫 办 存在 存在 存在 存在 存在 存在 存在 第 第 第 第 第 第 第 第 第 第 第 第 第In the lock, the second latch is connected in series, and the data is first stored in the second latch, and the step of maintaining the "Khan" is to maintain the second latch open. The drive I if source driver is powered by a power supply, and the source drive Is includes at least: a data bus; at least two channels, the female mother has a latch unit, and the data transmission is 17 1379274 The data is connected to the bus and stored in the latch units; a multiplexer; at least two output pads are connected to the channels via the multiplexer; and a voltage drop detector is used to detect Whether the first supply voltage is insufficient, and if not, generating a reset signal; wherein, if the reset signal is generated, setting the data transmitted on the data bus to a preset value The latch units are turned on to output the data from the latch units, and the multiplexer is turned on to output a driving voltage via the output pads according to the data. 15. The source driver of claim 14, wherein the output lines are separated by a voltage, and the source driver further includes a controller for Resetting the signal, turning off the voltage sharing switch 'and maintaining the multiplexer on. 16. The source driver according to item 14 of the patent scope, wherein the voltage drop detector comprises at least: a first partial pressure And generating a first voltage dividing voltage according to the first supply voltage; f comparison 15, for comparing the first partial voltage and the -critical one of the first - knife for generating a second divided voltage according to the supply voltage from the power supply 18 1379274; The first comparison fast is used to compare the second divided voltage with the critical voltage to determine whether the second supply voltage is insufficient; - OR gate (ORGate) having two inputs connected to the first comparator / the output of the first comparator to output the reset signal. The source driver of claim 17, wherein the first supply voltage is n voltage compared to the second supply voltage, and the first comparator is a high voltage component And the second comparator is a low voltage component. The source driver of claim 18, wherein the voltage drop detector further comprises at least a level shifter coupled between the second comparator and the OR gate. The source driver of claim 14, wherein the voltage drop detector further detects whether a second supply voltage from the power supply output is insufficient, if the shortage is insufficient, the reset is generated. Signal.
TW96133734A 2007-09-10 2007-09-10 Source driver and method for restraining noise thereof TWI379274B (en)

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