201113534 六、發明說明： c ,务明所屬技冬好領域;j 技術領域 本發明係關於一種電路基板及電子機器。 5 【先前技系好】 背景技術 電腦或行動電話等電子機器係組裝有電路零件。又， 多數電子機器中，印刷基板（配線基板）上組裝有一已安 裝電路零件之電路基板。 10 前述電路基板中存在會因某種原因而劣化者。又，令 電路零件之特性劣化的原因已得知有多種。且，已有提案 對應原因之處理方法（請參考例如專利文獻丨〜專利文獻 4 ) 0 習知技術文獻 15 專利文獻1 .日本專利公報特開平03 —48999號。 專利文獻2 :日本專利公報特開2〇〇5 —Μ”4號。 專利文獻3 :日本專利公報特開平〇7一23〇75〇號。 專利文獻4.日本專利公報特開平1〇_62476號。 L發明内容3 20 發明揭示 發明欲解決之課題 惟’特性劣化之電路零件令，有例如電解電容器或快 閃記憶體等，若經半年或味之長期間放置，電性特性便會 劣化者。電路基板在例如作為備用之庫存等而以單體保管 201113534 時’便容易產生長時期之保管。又，即使電路基板組裝於 電子機器後，亦可能產生上述長期間之保管。再者考慮 到鑒於技術情勢或社會情勢之今後動向，乃期望將電路基' 板或電子機器之產品壽命更長期化。 5 &，隨著長期保管所產生之電路零件劣化，可預測電 路基板及電子機器之性能會降低。而，雖然期待—可控制 上述電路零件之劣化來抑制電路基板及電子機器之性能降 低的技術，但目前並未有提案。 有鑑於此，本發明之目的在於提供一種可抑制因長期 1〇保管所產生之性能降低的電路基板及電子機器。 ’ 達成上述目的之電路基板及電子機器的&本形態係具 有配線基板及電路，該電路係設於前述配線基板上而利用 第1電源之電力動作’包含會因在無通電下之放置而產生 劣化之劣化性零件者。且，該基板形態具有：第2電源係 15搭載於前述配線基板上；及，通電控制部，係構成於前述 配線基板上’而利用前述第2電源之電力來至少使前述劣化 性零件斷續地通電者。就電子機器之基板形態而言更具 有上述第1電源。 、 發明效果 20 k根據以上說明之電路基板及電子機器之上述基本形 〜可抑制因長期保管所產生之性能降低。 圖式簡單說明 第1 ( A )、（ B )圖係顯示第i實施形態之圖。 第2圖係顯示第1實施形態之控制動作的流程圖。 201113534 第3圖係顯示副電源之通電路徑的具體例之圖。 第4圖係顯示第1實施形態之中斷處理的流程圖。 第5 (A)、（B)圖係顯示第2實施形態之圖。 第6圖係顯示第2實施形態之控制動作的流程圖。 5 第7圖係1 員示第3實施形態之圖。 第8圖係顯示第3實施形態之控制動作的流程圖。 第9圖係顯示第3實施形態之中斷處理的流程圖。 【實施冷式3 用以實施發明之最佳形態 1〇 就已針對明基本形態說明之電路基板及電子機器的具 體實施形態，以下參考圖式進行說明。 上述基本形態係利用劣化性零件斷續地通電來抑制電 路零件之劣化者。結果，電路基板或電子機器即使經長期 保管仍可抑制性能降低。以下說明第丨應用形態與第2應用 15形態，作為對上述基本形態之較佳應用形態。第1應用形態 中，上述通電控制部具有測量經過時間之計時。又，， 通電控制部亦具有經過時通電部，該經過時通電部在前迷 計時器所測出之經過時間到達預定基準時間時，會利用上 述第2電源之電力來至少使上述劣化性零件暫時通電。再 2〇者，該通電控制部具有重置部，該重置部在上述劣化性零 件利用第1或第2電源通電時，會重置上述計時器。 根據該第1應用形態，可利用由計時器等構成之簡易通 電控制部，實現對劣化性零件之定期通電。 第2應用形態中，上述通電控制部具有供給確認部，該 201113534 供給確認部係確認有無第1電源對上述電路之電力供給 者。又，該第2應用形態之上述通電控制部具有無供電時通 電部’係當上述供給確認部已確認無供給時’利用上述第2 電源之電力來至少使上述劣化性零件暫時通電者。 5 依據該第2應用形態’當已用第1電源供給電力時’會 避免用第2電源通電，因此可長保第2電源之電力。 以下參考圖式說明之第1實施形態，相當於針對上述基 本形態之具體實施形態，且亦相當於針對上述第1應用形態 及上述第2應用形態之具體實施形態。 10 第1圖係顯示第1實施形態之圖。 該第1圖之（A)部分所示之電子機器1 ’在此未特別限 疋種類，舉例言之，相當於以個人電腦或伺服器為代表之 資訊處理裝置、以通訊基地台或通訊終端為代表之通訊機 器、或者以電視或錄影機等為代表之家庭電器產品等。該 15電子機器1相當於針對基本形態所述之電子機器的具體第1 實施形態。 該電子機器1内組裝有電路基板1 〇與主電源20。主電源 20為一可由省略圖示之外部交流電源獲得電力來對電路基 板10施加直流電壓之定電壓電源。該電路基板10具有配線 20 基板17、與設於該配線基板π上之電路13。電路13包含不 通電時電性特性也不會劣化之非劣化性零件群11、以及如 電解電容器或快閃記憶體等不通電時電性特性會劣化之劣 化性零件群12。舉例言之，當長期不通電時，電解電容器 會因負責電極功能的氧化膜破裂而使氧化膜與電解液呈導 6 201113534 通之狀態。在該狀態下，若對電解電容器施加電壓，會產 生漏電流。屬於上述劣化性零件群12之零件，若電性特性 之劣化只是輕微劣化，可藉暫時通電而恢復特性。舉例言 之，電解電容器可利用通電所產生之漏電流再次形成氣化 5膜而修復破裂。屬於劣化性零件群12之零件中，有些在長 功間通電時電性特性也會劣化。舉例言之，電解電容器妙 長期通電後，電解液之性質會改變，造成作為電容器之特 陡劣化。換言之，屬於劣化性零件群12之零件雖然在不通 電時會劣化，但若持續通電則會產生其它劣化。屬於劣化 性零件群12之零件若適當地重複通電與不通電，便可長期 維持電性特性。 屬於非劣化性零件群11之零件，即使經長期不通電， 電性特性也不會劣化。反之，屬於該非劣化性零件群"之 零件中’有些會因長期通電而電性特性劣化。故，為了延 長電路基板10或電子機器1之壽命，應盡量避免對非劣化性 零件群11之通電。 而’該第1圖僅顯示電路13包含非劣化性零件群丨丨與劣 化性零件群12之概念。換言之，該第1圖並未顯示這些非劣 化性零件群11與劣化性零件群丨2在電路13中之位置關係。 2〇 _ 電路基板10之配線基板17上除了電路13外，也設有副 電源14、控制IC15、開關16、16,。具體而言，副電源14係 使用鋰電池。且’配線基板17上也設有用以連接電路基板 10與主電源2〇之連接器18。 電子機器1内也組裝有電路基板10以外的零件。該電路 201113534 基板ίο以外的零件包含不通電時也不會劣化之#劣化性零 件群30與不通電時會劣化之劣化性零件群4〇。 在此，電路基板10相當於針對基本形態所述之電路基 板的具體第1實施形態。又，配線基板17相當於上述基本形 5 態之配線基板的其中一例。主電源20相當於上述基本形態 之第1電源的其中一例。電路基板10上之電路13相當於上述 基本形態之電路的其中一例。屬於電路基板10上之劣化性 零件群12之零件相當於上述基本形態之劣化性零件的其中 一例。副電源14相當於上述基本形態之第2電源的其中一 10 例。且，控制IC15及開關16、16’構成上述基本形態之通電 控制部的其中一例。 主電源20以連接器18與電路基板10連接。且，透過該 連接器18，利用上述直流電壓對電路基板1〇上之電路13供 給電力。更詳言之，對電路13所含之非劣化性零件群丨丨與 15 劣化性零件群12兩者供給電力。已供給電力之電路13會因 該供給之電力而動作。該電路13之動作，若第1圖所示之電 子機器1為資訊處理裝置，則為資訊處理動作，若是通％機 器，則為通訊處理動作，若是家庭電器產品，則為產 動作。又，主電源20也對電路基板10外之非劣化性零件群 20 30直接供給電力。且，主電源也經由電路基板1〇對電路 基板10外之劣化性零件群40供給電力。上述主電源2〇之電 力供給可根據使用者之操作或開啟關閉訊號指示而開啟關 閉省略圖示之電源開關。 電路基板10上之副電源14對控制IC15供給電力且亦 8 201113534 經由開關16對電路基板ι〇上之劣化性零件群12與電路基板 10外之劣化性零件群4〇供給電力。屬於劣化性零件群12、 4〇之各零件利用副電源14之電力直接通電。惟，第1圖僅單 純顯示對劣化性零件群12、40供給電力之概念。劣化性零 5件群12、40之具體供給路徑將於後述。 開關16、16,利用由控制IC15輸入之控制訊號來控制開 啟關閉。藉由開關16、16’根據控制訊號而開啟關閉，可開 啟關閉副電源14對劣化性零件群12、40之電力供給。開關 Ιό、16’的其中一者開啟時另一者則關閉。且，連結於非劣 10 化性零件群11之開關16，可阻止副電源14之電力流到非劣 化性零件群u，藉此保護非劣化性零件群u。來自控制lci5 之控制訊號，係根據控制IC15監視有無由主電源2〇對電路 13等供給電力之結果而輸出。 第1圖之（B)部分顯示控制IC15之功能方塊圖。由内 15部功能來看，控制IC15具有監視部51、訊號輸出部52及計 時器53。在此，計時器53相當於上述第1應用形態之計時器 的其中一例。訊號輸出部52與開關16構成上述第1應用形熊 之經過時通電部的其中一例。訊號輸出部52與監視部51構 成上述第1應用形態之重置部的其中一例。又，監視部51相 20當於上述第2應用形態之供給確認部的其中一例。訊號輸出 部52、計時器53及開關16構成上述第2應用形態之無供電時 通電部的其中一例。 監視部51監視有無主電源20對電路13施加之直流電 壓，藉此確認有無由主電源20對電路13之電力供給。換言 201113534 之’監视部51將主電源20之直流電壓所產生的電壓訊號， 作為用以監視主電源2〇產生之電力供給的監視訊號來使 用。&視部51之監視結果會通知訊號輸出部52。計時器53 根據來自訊號輸出部52之指示開始時間測量。計時器53可 5測量始於複數開始時間之各經過時間。且，計時器53將計 時結果通知訊號輸出部52。訊號輸出部52根據監視部51之 監視結果及計時器53之計時結果，輸出使開關16' 16,開啟 關閉之控制訊號。利用上述控制訊號之輸出，如以下說明， 電路基板10會自行對劣化性零件群12、40進行通電。 10 以下，參考流程圖說明輸出控制訊號之控制動作。 第2圖係顯示第1實施形態之控制動作的流程圖。 此後之說明中，不會特別拘泥於圖號而引用第丨圖之元 件。 在第2圖所示之控制動作開始前，進行事前準備（步驟 15 S1(H、S102)。該事前準備中，利用省略圖示之設定機構來 對控制IC15設定2個時間。！個是用於對劣化性零件群& 40通電’到自動啟動為止之待機時間们。而，第⑽是以通 電來使劣化性零件群12、40之電性特性恢復所需之再新時 間T2。 2〇第2圖所示之控制動作開始後，以監視部51監視有無主 電源2〇之直流電壓。主電源20之電源開關關閉時，主電源 20之直流電壓所產生的電壓訊號（即監視訊號）會呈禁能 (de_assert)(步驟Sl〇3)。監視部51確認監視訊號之禁能 後’通知訊號輸出部52。收到該通知之訊號輸出部52會使 201113534 計時器53作為測量主電源2〇關閉狀態之持續時間的計時器 A而開始時間測量（步驟sl〇4 )。訊號輸出部與計時器 之測量時間未到達上述待機時間丁丨之期間（步驟si〇5 : NO )’使計時器53持續作為計時器A之時間測量（步驟 5 S106)。且，訊號輸出部52在計時器A之測量時間到達上述 待機時間TU夺（步驟S105:YES)，輸出使開關16開啟之控 制訊號（步驟S107)。又，訊號輸出部52會使計時器八之^ 間測量停止，並清除計時器A之測量時間（即重置計時器 A)。又，汛號輸出部52使計時器53作為測量對劣化性零件 10群12、4 〇之通電時間的計時器B而開始時間測量。藉由開關 16以控制訊號開啟，劣化性零件群12、4〇所屬之各零件會 以副電源14之電力直接通電（步驟sl〇8)。在此，暫時中斷 第2圖之流程圖說明，就劣化性零件群12、4〇之具體供給路 徑進行說明。 15 第3圖顯示副電源之通電路徑的具體例。 該第1實施形態中，利用與上述基本形態之較佳應用形 態對應的路徑進行通電。 該較佳應用形態具有將上述第1電源之電力導向上述 電路之第1電源線、將上述第2電源之電力導向上述劣化性 20零件之第2電源線。又，該應用形態中，上述通電控制部控 制上述第2電源線之開啟關閉。藉該應用形態，可利用第2 電源線確實地使劣化性零件通電。 第3圖顯示對應該較佳應用形態之路徑。在此所示之電 解電容器81為屬於劣化性零件群12之零件。訊號處理零件 201113534 84為屬於非劣化性零件群丨丨之零件。 來自主電源20之電力透過電源線80供給至電解電容器 81與訊號處理零件84兩者。訊號處理零件84利用該電力動 作’並輸出對應輸入訊號之輸出訊號。電解電容器81利用 5 該電力通電。 又’來自副電源14之電力也利用電源線80直接供給至 電解電容器81。該來自副電源丨4之電力係以第1圖所示之2 個開關16、16’的其中一者而開啟關閉。利用該開關16使來 自副電源14之電力開啟，電解電容器81便會以該電力確實 10地通電。另一方面，第1圖所示之2個開關16、16，的另一開 關16’亦具體圖示於第3圖。該開關16,在來自副電源14之電 力供給至電源線時利用控制訊號關閉，藉此防止對訊號處 理零件84通電。 在此，開關16,開啟時之電源線8〇，相當於上述應用形 15態之第1電源線的其中一例。又，開關16,關閉時之電源線 80，相當於上述應用形態之第2電源線的其中一例。 以下，回到第2圖繼續流程圖之說明。 上述步驟S108中，當副電源14之電力所進行之通電開 始後，便進入步驟S109。訊號輸出部52在計時器b之測量時 20間未到達上述再新時間T2前（步驟si〇9 : No)，使計時器 53作為計時HB繼相量時間。又。訊號輸出部η也繼續輸 出使開關關啟之控制訊號（步驟snG)。藉此在再新時 間T2之期間，維持對劣化性零件群12、4〇之通電，使各零 件之特性恢復。接著’訊號輸出部Μ在計時抓之測量時間 12 201113534 到達上述再新時間T2後（步驟S109 : Yes)輸出使開關16 關閉之控制訊號（步驟S111)。又，訊號輸出部52停止計時 器B之測量時間，並清除計時器B之測量時間（即重置計時 器B)=又’訊號輸出部52使計時器53作為計時器A開始測 量時間。接著，回到上述步驟S105，重複步驟S105後之動 作。 根據以上說明之第2圖流程圖所示之動作，電路基板1〇 會定期且自主地重複對劣化性零件群之通電。該定期之通 電會維持屬於劣化性零件群之各零件的電性特性，因此電 1〇子機器1即使未使用而長期保管時，亦可維持作為電路基板 ⑺或電子機器1之性能。又，該定期且自主之通電在電路基 板10未裝入電子機器丨而作為備用之庫存等，在以單體保管 時亦可執行。因此，即使電路基板10單獨保管時，亦可長 期維持電路基板10之性能。 15 20 第1實施形態中’在執行第2圖所示之控制動作的期 間，會定期地執行以下說明之中斷動作。 第4圖為顯示第丨實施形態之中斷處理之流程圖 第4圖所示之中斷處理，為-在第2圖所::控制動作 =定=執行之處理。該中斷處理開始後，會用監視部 Η確認有源默錄轉（步_2 之直流電壓所產生之電壓訊說（ …源20 結束該中斷處理。結束後，第2圖 ；&禁能時’ 處再開始。 第2圖所不之控制動作會由中斷 當主電源20之電 在執行第2圖所示之控制動作的期間 13 201113534 源開關開啟時，監視訊號呈致能（assert)(步驟S201 )。在 第4圖所示之中斷處理開始後，用監視部51確認該監視訊號 之致能狀態（步驟S202 : Yes)。接著，控制IC15中斷第2 圖所示之控制動作（步驟S203)。更詳言之，訊號輸出部52 5 輸出一將開關丨6關閉之控制訊號。之後，訊號輸出部52在 步驟S204 ’使計時器a及計時器B之時間測量停止，並將計 時器A及計時器B之測量時間一併清除（即重置計時器A及 計時器B)。接著’控制1C] 5回到第2圖所示之控制動作之開 始。 第4圖所示之中斷處理具有一在主電源2 〇開啟時，使副 電源14對劣化性零件群12、4〇之通電中止的作用。結果， 可避免副電源14電力的多餘浪費，因此可使副電源14之電 力增長一該避免之電力量。 以上結束第1實施形態之說明，接著說明第2實施形 15態。該第2實施形態也相當於對上述基本形態之具體形態。 又’該第2實施形態相當於對上述第Μ用形態之具體實施 形態，但並不相當於對第2應用形態之具體實施形態。 第5圖顯示第2實施形態。 20 第5圖所示之電子機器2相當於針對基本形態所述， 子機器的具體第2實施形態。她實卿態之電子細 了具有與第1實施形態不同 ^ 冤路基板60外，盥第1實〕 態之電子機器1相同。又，兮笛 圖所示之電路基板6〇: 於針對基本形態所述之電 眚fee ^ 路基板的具體第2實施形態。 貫轭形態之電路基板6〇险 除了具有與第1實施形態不同」 14 201113534 制IC61外’與第1實施形態之電路基板相同。 以下’著眼於與第1實施形態之相異點，說明第2實施 形態。 第5圖之（A )部分所示之電路基板6〇所具有的控制IC6i 5係利用來自田彳電源I4之電力而動作’藉此輸出控制訊號。 該控制訊號會輸入開關16、16’。換言之，控制訊號所控制 之對象與第1實施形態之控制對象相同。惟，該控制1(：61不 進行主電源20之直流電壓監視。因此，由控制1(：61輸出控 制訊號之時間點與第1實施形態之輸出時間點略有不同。 0 第5圖之（B)部分顯示控制〗C61之功能方塊圖。如該 功能方塊圖所示’控制IC61具有計時器53與訊號輸出部62 作為内部功能。惟，控制IC61不具有第丨實施形態之監視 部。第5圖所示之第2實施形態中，控制IC61經常定期地執 行副電源14對劣化性零件群12之通電。 15 在此’什時器相當於上述第1應用形態之計時器例。 訊號輸出部62與開關16、16’構成上述第丨應用形態之經過 時通電部的一例。訊號輸出部62相當於上述第1應用形態之 重置部例。 第6圖為顯示第2貫施形態之控制動作的流程圖。 20 第6圖所示之流程圖除了缺少步驟S103外，與第2圖所 示之流程圖相同。 在將第5圖所示之副電源14 (鍾電池）裝入電路基板 60，對控制IC61供給電力後，開始第6圖所示之流程圖的控 制動作。又，该第2貫施形態中，没有使第6圖之控制動作 15 201113534 中斷之中斷處理。故’該第2實施形態中，無論有無來自主 電源20之電力供給，只要副電源14之電力持續，便可經常 定期地執行對劣化性零件群12之通電。 上述第2實施形態中，電路基板6〇也會定期且自主地重 5複對劣化性零件群之通電。故，即使電子機器1未使用而長 期保管時’或電路基板10以單體長期保管時，亦可維持作 為電路基板10或電子機器1之性能。 接著，說明第3實施形態。該第3實施形態相當於對上 述基本形態之具體實施形態。又，該第3實施形態相當於分 10別對上述第1應用形態及第2應用形態之具體實施形態。再 者，該第3實施形態亦相當於對第3應用形態之具體實施形 態。 第3應用形態中，上述第2電源為兼具上述第〖電源之共 通電源。且，該第3應用形態具有將上述共通電源之電力導 15向前述電路之電源線，以及根據來自配線基板外之指示開 啟關閉上述電源線之開關。 第3應用形態之類型，係可在電路基板上自我供給用以 使電路基板上之電路動作的電力者。根據第3應用形態，可 將電路基板上自我供給之電力分別作為第 Μ來利用，藉此長期抑制電路基板之性能劣化m原 第7圖顯示第3實施形態。 第7圖所不之電路基板％可用電路基板川單體來發揮 電子機Θ之功能。該電路基板相當於針對基本形態 所述之電路基板的具體第3實施形態，且亦相當於針對基: 16 201113534 形態所述之電子機器之具體第3實施形態。 該電路基板7〇所1古+ π 吓昇有之要件中，對於與第1圖所示之電 路基板1所-有之要件相同之要件，係標以相同標號而省 略說明。 5 &電路基板7G所具有之電源14與第1圖所示之副電源 I4完全相同’為鐘電池，但再第3實施形態中則簡稱為「電 池」。 4電路基板70具有將電源14之電力導向電路13之電源 線71又„玄電路基板7〇亦具有可根據來自電路基板川外 1〇之指示來使電源線71開啟關閉之開關72。在此，「指示」之 具體内容並未特別受限，可為例如輸入控制電源開關72之 開啟關閉狀態之控制訊號，或是使用者之手動操作。 第3實施形態之電路基板70除了電源丨4負責第丨實施形 態之主電源20與副電源14兩者之作用外，與第1實施形態之 15電路基板丨〇大致相同。故，第3實施形態之控制IC15進行之 控制動作或中斷處理也如以下說明，與第1實施形態之控制 動作大致相同。 第8圖係顯示第3實施形態之控制動作之流程圖。 第8圖所示之流程圖中，以電源開關72將由第7圖所示 20之唯一電源14經電源線14施加至電路13之電壓關閉後，的 視訊號呈禁能（步驟Sl〇3’）。又，在步驟sl〇7，當開關w 開啟後，利用第7圖所示之唯一電源14之電力對劣化性零件 群12通電（步驟S108’）。除了這兩個步驟si〇3’、si〇8,外， 其它步驟與第2圖所示之步驟相同。又，就控制動作整體而 17 201113534 ，第8圖之流程圖所顯示之控制 程圖所顯示之控制動作相同。 作本質上與第2圖之流 第9圖係顯示第3實施形態 第9圖所示之流程圖中，第㉘所二理之流程圖。 後，監視訊號呈致能（步驟S2〇i，)。$之電源開關Μ啟 外，其它步驟與第4圖所示之步驟相除了這一個步驟幻〇1， 體而言，第9圖之流程圖· 广’就中斷處理楚 之流程圖所顯示之中斷處理相同。中斷處理本質上與第粞 】0 15 第3實施形態之電路基板7〇中， 或中斷虛拽 稭由執行上述控制動作 斷處理’可一面節約電路基板作 1長期維持電路基板7〇之性能。^―之電力’ 〜气簡單説明】 苐】 (α)、（β)圖係顯示第1實施形熊之圖。 圖係顯示第1實施形態之控制動作的流 第3岡 μ 圖係顯示副電源之通電路徑的具體例之圖。 圖係顯示第1實施形態之中斷處理的流程圖。 第5 Γ" lA)、（B)圖係顯示第2實施形態之圖。 第6圖係顯示第2實施形態之控制動作的流程圖。 第7 圖係顯示第3實施形態之圖。 圖係顯示第3實施形態之控制動作的流程圖。 【第9圖係顯示第3實施形態之中斷處理的流程圖。 &要元件符號說明】 •η電子機n 11...不通❿林會劣化之零件 ’ 電路基板 群（基板上） 20 201113534 12...不通電時會劣化之零件群 51...監視部 (基板上） 52...訊號輸出部 13...電路 53...計時器 14...副電源 60...電路基板 15...控制 1C 61...控制 1C 16,16’...開關 62…訊號輸出部 17...配線基板 70...電路基板 18...連接器 71...電源線 20...主電源 72...開關 30··.不通電時不會劣化之零件 80...電源線 群（基板外） 81...電解電容器 40...不通電時會劣化之零件群 84...訊號處理零件 (基板外） 19201113534 VI. Description of the invention: c. The field of technology is good for the future; j Technical field The present invention relates to a circuit substrate and an electronic machine. 5 [Previous Technology] Background Electronic devices such as computers and mobile phones are equipped with circuit components. Further, in many electronic devices, a circuit board on which a circuit component is mounted is mounted on a printed circuit board (wiring substrate). 10 The above circuit board may be deteriorated for some reason. Further, there are various reasons for deteriorating the characteristics of circuit components. In addition, there is a proposal for a method for the corresponding cause (refer to, for example, Patent Document 丨 to Patent Document 4). 0 Conventional Technical Document 15 Patent Document 1. Japanese Patent Laid-Open No. Hei 03-48999. Patent Document 2: Japanese Patent Laid-Open Publication No. 2-5-Μ4 No. 4 Patent Document 3: Japanese Patent Laid-Open No. Hei. No. 7-23〇75 No. Patent Document 4. Japanese Patent Publication No. 1 _62476 L. Disclosure of the Invention 3 20 The invention discloses a problem to be solved by the invention, and the circuit component of the characteristic deterioration is, for example, an electrolytic capacitor or a flash memory. If it is placed for a period of six months or a long period of time, the electrical characteristics are deteriorated. When the circuit board is stored as a spare stock, for example, 201113534, it is easy to store for a long period of time. Even after the circuit board is assembled in an electronic device, the above-mentioned long-term storage may occur. In view of the future trend of the technical situation or social situation, it is expected to extend the life of the circuit-based board or electronic equipment. 5 &, with the deterioration of circuit components caused by long-term storage, predictable circuit boards and electronic equipment The performance is reduced. However, it is expected that the technology of the above-mentioned circuit components can be controlled to suppress the deterioration of the performance of the circuit board and the electronic device. In view of the above, it is an object of the present invention to provide a circuit board and an electronic device capable of suppressing performance degradation caused by long-term storage. 'The circuit board and the electronic device that achieve the above object are in this form. A wiring board and a circuit are provided on the wiring board, and the electric power operation by the first power source includes a deteriorated component that is deteriorated by the placement without power supply. The substrate form includes: The second power supply system 15 is mounted on the wiring board; and the power supply control unit is configured to be formed on the wiring board. The electric power of the second power source is used to intermittently energize at least the deteriorated component. In the substrate form, the first power source is further provided. According to the above-described basic form of the circuit board and the electronic device described above, it is possible to suppress performance degradation due to long-term storage. Brief Description of the Drawings 1 (A) (B) shows a diagram of the i-th embodiment. Fig. 2 is a flowchart showing the control operation of the first embodiment. 4 Fig. 3 is a view showing a specific example of the energization path of the sub power source. Fig. 4 is a flowchart showing the interrupt processing of the first embodiment. Figs. 5(A) and 5(B) show the second embodiment. Fig. 6 is a flow chart showing the control operation of the second embodiment. Fig. 7 is a view showing a third embodiment. Fig. 8 is a flow chart showing the control operation of the third embodiment. Fig. 9 is a flow chart showing the interrupt processing of the third embodiment. [Following the third embodiment of the circuit board and the electronic device for explaining the basic configuration of the invention. The above-described basic configuration is to suppress deterioration of circuit components by intermittently energizing the deteriorated components. As a result, the circuit substrate or the electronic device can suppress the performance degradation even after long-term storage. The second application form and the second application form 15 will be described below as a preferred application form for the above basic form. In the first application mode, the energization control unit has a timing for measuring an elapsed time. Further, the energization control unit further includes an elapsed time-conducting unit that uses at least the degraded component by the electric power of the second power source when the elapsed time measured by the previous timer reaches a predetermined reference time. Temporarily energized. Further, the energization control unit includes a reset unit that resets the timer when the degraded component is energized by the first or second power source. According to the first application aspect, the simple energization control unit including a timer or the like can be used to periodically energize the deteriorated component. In the second aspect of the invention, the power supply control unit includes a supply confirmation unit, and the 201113534 supply confirmation unit checks whether or not the first power source is connected to the power supplier of the circuit. In addition, when the power supply control unit of the second application mode has a no-power supply period, when the supply confirmation unit confirms that there is no supply, the electric power of the second power source is used to temporarily energize at least the deteriorated component. 5 According to the second application form, when the electric power is supplied from the first power source, the second power source is prevented from being energized, so that the electric power of the second power source can be maintained. The first embodiment described below with reference to the drawings corresponds to the specific embodiment of the above-described basic embodiment, and corresponds to the specific embodiment of the first application form and the second application form described above. 10 Fig. 1 is a view showing a first embodiment. The electronic device 1' shown in part (A) of Fig. 1 is not particularly limited in this respect, and is exemplified as an information processing device represented by a personal computer or a server, a communication base station or a communication terminal. A communication device represented by a representative, or a household electrical appliance represented by a television or a video recorder. The 15 electronic device 1 corresponds to a specific first embodiment of the electronic device described in the basic form. The circuit board 1 and the main power source 20 are incorporated in the electronic device 1. The main power source 20 is a constant voltage power source that applies a DC voltage to the circuit board 10 by an electric power obtained by an external AC power source (not shown). The circuit board 10 has a wiring 20 substrate 17 and a circuit 13 provided on the wiring substrate π. The circuit 13 includes the non-degradable component group 11 in which the electrical characteristics are not deteriorated when the power is not supplied, and the deteriorated component group 12 in which the electrical characteristics are deteriorated when the power is not supplied, such as an electrolytic capacitor or a flash memory. For example, when the power is not supplied for a long period of time, the electrolytic capacitor will cause the oxide film and the electrolyte to pass through the state in which the oxide film responsible for the electrode function is broken. In this state, if a voltage is applied to the electrolytic capacitor, a leakage current is generated. In the parts belonging to the deteriorated component group 12, if the deterioration of the electrical characteristics is only slightly deteriorated, the characteristics can be restored by temporarily energizing. For example, the electrolytic capacitor can re-form the vaporized film by the leakage current generated by the energization to repair the crack. Among the components belonging to the deteriorated component group 12, some of them have deteriorated electrical characteristics when energized between long powers. For example, after the electrolysis capacitor is energized for a long time, the properties of the electrolyte change, causing a sharp deterioration as a capacitor. In other words, the parts belonging to the deteriorated component group 12 are deteriorated when they are not powered, but other deterioration occurs if the power is continuously supplied. The components belonging to the deteriorated component group 12 can maintain electrical characteristics for a long period of time if the energization and non-energization are appropriately repeated. The components belonging to the non-deteriorating component group 11 do not deteriorate in electrical properties even if they are not energized for a long period of time. On the other hand, some of the parts belonging to the non-deteriorating part group" may deteriorate in electrical characteristics due to long-term energization. Therefore, in order to extend the life of the circuit board 10 or the electronic device 1, the energization of the non-degrading component group 11 should be avoided as much as possible. The first drawing only shows the concept that the circuit 13 includes the non-degrading component group and the degraded component group 12. In other words, the first figure does not show the positional relationship between the non-deteriorating component group 11 and the deteriorated component group 在2 in the circuit 13. In addition to the circuit 13, the wiring board 17 of the circuit board 10 is provided with a sub power source 14, a control IC 15, and switches 16 and 16. Specifically, the sub power source 14 uses a lithium battery. Further, the connector board 18 for connecting the circuit board 10 and the main power source 2 is also provided on the wiring board 17. Parts other than the circuit board 10 are also incorporated in the electronic device 1. This circuit 201113534 includes components other than the substrate ίο, which are not deteriorated when the power is not supplied, and the deteriorated component group 4 that deteriorates when the power is not supplied. Here, the circuit board 10 corresponds to a specific first embodiment of the circuit board described in the basic form. Further, the wiring board 17 corresponds to one of the above-described basic form of the wiring board. The main power source 20 corresponds to one of the first power sources of the above basic form. The circuit 13 on the circuit board 10 corresponds to an example of the circuit of the above basic form. The components belonging to the deteriorated component group 12 on the circuit board 10 correspond to one of the deteriorated components of the above-described basic form. The sub power source 14 corresponds to one of the tenth power sources of the above basic configuration. Further, the control IC 15 and the switches 16 and 16' constitute an example of the energization control unit of the above-described basic configuration. The main power source 20 is connected to the circuit board 10 by a connector 18. Further, the connector 18 supplies electric power to the circuit 13 on the circuit board 1 by the DC voltage. More specifically, power is supplied to both the non-degrading component group 15 and the 15 degrading component group 12 included in the circuit 13. The circuit 13 to which power has been supplied operates due to the supplied power. When the electronic device 1 shown in Fig. 1 is an information processing device, the operation of the circuit 13 is an information processing operation. If the device is a % device, it is a communication processing operation, and if it is a home electric product, it is a production operation. Further, the main power source 20 also directly supplies electric power to the non-degradable component group 20 30 outside the circuit board 10. Further, the main power source also supplies electric power to the deteriorated component group 40 outside the circuit board 10 via the circuit board 1A. The power supply of the main power source 2〇 can be turned on and off to turn off the power switch according to the user's operation or the turn-off signal indication. The sub power source 14 on the circuit board 10 supplies electric power to the control IC 15 and also supplies power to the deteriorating component group 12 on the circuit board 10 and the degraded component group 4 outside the circuit board 10 via the switch 16. Each of the components belonging to the degraded component groups 12 and 4 is directly energized by the electric power of the sub power source 14. However, the first diagram merely shows the concept of supplying electric power to the deteriorated component groups 12 and 40. Deterioration Zero The specific supply path of the five-piece group 12, 40 will be described later. The switches 16, 16 are controlled to be turned "on" by a control signal input from the control IC 15. By turning on and off the switches 16 and 16' in accordance with the control signals, the power supply to the degraded parts groups 12, 40 by the sub power source 14 can be turned on and off. When the switch Ιό, 16' is turned on, the other is turned off. Further, the switch 16 connected to the non-degradable component group 11 prevents the power of the sub power source 14 from flowing to the non-degradable component group u, thereby protecting the non-degrading component group u. The control signal from the control lci5 is output based on the control IC 15 monitoring whether or not the main power source 2 is supplying power to the circuit 13 or the like. Part (B) of Fig. 1 shows a functional block diagram of the control IC 15. The control IC 15 has a monitoring unit 51, a signal output unit 52, and a timer 53 in view of the internal functions. Here, the timer 53 corresponds to an example of the timer of the first application mode described above. The signal output unit 52 and the switch 16 constitute an example of the energization unit at the time of passing the first application bear. The signal output unit 52 and the monitoring unit 51 constitute an example of the reset unit of the first application form described above. Further, the monitoring unit 51 is in the example of the supply confirmation unit of the second application form described above. The signal output unit 52, the timer 53, and the switch 16 constitute an example of the energization unit at the time of no power supply in the second application mode. The monitoring unit 51 monitors the presence or absence of the DC voltage applied to the circuit 13 by the main power source 20, thereby confirming the presence or absence of power supply to the circuit 13 by the main power source 20. In other words, the monitoring unit 51 of 201113534 uses the voltage signal generated by the DC voltage of the main power source 20 as a monitor signal for monitoring the power supply generated by the main power source 2〇. The monitoring result of the & view unit 51 notifies the signal output unit 52. The timer 53 starts time measurement based on the instruction from the signal output unit 52. The timer 53 can measure each elapsed time from the start of the complex number. Further, the timer 53 notifies the signal output unit 52 of the timer result. The signal output unit 52 outputs a control signal for turning on and off the switch 16'16 based on the monitoring result of the monitoring unit 51 and the result of the timer 53. By using the output of the above control signal, as will be described below, the circuit board 10 energizes the deteriorated component groups 12 and 40 by itself. 10 Hereinafter, the control action of the output control signal will be described with reference to the flowchart. Fig. 2 is a flow chart showing the control operation of the first embodiment. In the following description, the elements of the figure are not specifically limited to the figure number. Before the start of the control operation shown in Fig. 2, the preparation is performed in advance (step S1 (H, S102). In the preparatory preparation, the control IC 15 is set for two times by the setting means (not shown). In the standby time until the degraded component group & 40 is energized to the automatic start, the (10) is the renewing time T2 required to restore the electrical characteristics of the deteriorated component groups 12 and 40 by energization. After the start of the control operation shown in Fig. 2, the monitoring unit 51 monitors the presence or absence of the DC voltage of the main power source 2. When the power switch of the main power source 20 is turned off, the voltage signal generated by the DC voltage of the main power source 20 (i.e., the monitor signal) It is disabled (de_assert) (step S10). The monitoring unit 51 confirms the disable signal output unit 52 after the disable of the monitor signal. The signal output unit 52 that receives the notification causes the 201113534 timer 53 to be the main measurement unit. The power source 2 starts the time measurement with the timer A of the duration of the off state (step sl1). The measurement time of the signal output unit and the timer does not reach the period of the standby time (step si〇5: NO)' Make the timer 53 The time measurement is continued as the timer A (step 5 S106), and the signal output unit 52 reaches the standby time TU at the measurement time of the timer A (step S105: YES), and outputs a control signal for turning on the switch 16 (step S107) Further, the signal output portion 52 stops the measurement between the timers eight and clears the measurement time of the timer A (i.e., resets the timer A). Further, the nickname output portion 52 makes the timer 53 as a measurement. The time measurement is started for the timer B of the energization time of the degraded parts 10 group 12, 4, and the control signal is turned on by the switch 16, and the parts to which the degraded parts group 12, 4〇 belong are powered by the sub power source 14. Directly energized (step sl8). Here, the flow chart of Fig. 2 is temporarily interrupted, and the specific supply path of the degraded component groups 12 and 4A will be described. 15 Fig. 3 shows the specific path of the energization path of the sub power source. In the first embodiment, the power is applied to a path corresponding to the preferred application form of the basic form. The preferred application mode has a first power supply line for guiding the power of the first power source to the circuit, and the first 2 The power of the source is directed to the second power supply line of the deteriorated 20 component. In the application mode, the energization control unit controls the opening and closing of the second power supply line. With this application form, the second power supply line can be reliably used. The degraded parts are energized. Fig. 3 shows the path corresponding to the preferred application form. The electrolytic capacitor 81 shown here is a part belonging to the degraded part group 12. The signal processing part 201113534 84 is a non-degrading part group. The power from the main power source 20 is supplied to both the electrolytic capacitor 81 and the signal processing part 84 through the power line 80. The signal processing unit 84 uses the power to operate 'and outputs an output signal corresponding to the input signal. The electrolytic capacitor 81 is energized by 5 of the electric power. Further, the electric power from the sub power source 14 is directly supplied to the electrolytic capacitor 81 by the power source line 80. The power from the sub power supply unit 4 is turned on and off by one of the two switches 16, 16' shown in Fig. 1. The electric power from the sub power source 14 is turned on by the switch 16, and the electrolytic capacitor 81 is energized with the electric power. On the other hand, the other switch 16' of the two switches 16, 16 shown in Fig. 1 is also specifically shown in Fig. 3. The switch 16 is closed by a control signal when power from the secondary power source 14 is supplied to the power line, thereby preventing energization of the signal processing unit 84. Here, the switch 16 is turned on, and the power supply line 8 is equivalent to one of the first power supply lines of the above-described application form. Further, the switch 16 and the power supply line 80 at the time of closing correspond to one of the second power supply lines of the above-described application form. Hereinafter, returning to Fig. 2, the description of the flowchart will be continued. In the above step S108, when the energization by the electric power of the sub power source 14 is started, the process proceeds to step S109. The signal output unit 52 does not reach the above-mentioned refresh time T2 (step si〇9: No) 20 during the measurement of the timer b, and causes the timer 53 to be the time-lapse HB phasor time. also. The signal output unit η also continues to output a control signal for turning off the switch (step snG). Thereby, the energization of the deteriorated component groups 12 and 4 is maintained during the renewing time T2, and the characteristics of the components are restored. Then, the signal output unit outputs a control signal for turning off the switch 16 after the time lapse of the measurement time 12 201113534 reaches the renewing time T2 (step S109: Yes) (step S111). Further, the signal output unit 52 stops the measurement time of the timer B and clears the measurement time of the timer B (i.e., resets the timer B) = the signal output unit 52 causes the timer 53 to start the measurement time as the timer A. Next, returning to the above step S105, the operation after step S105 is repeated. According to the operation shown in the flowchart of Fig. 2 described above, the circuit board 1 重复 periodically and autonomously repeats the energization of the deteriorated component group. Since the regular power supply maintains the electrical characteristics of the components belonging to the deteriorated component group, the electric machine 1 can maintain the performance as the circuit board (7) or the electronic device 1 even when it is not used for a long period of time. Further, this periodic and autonomous energization can be performed when the circuit board 10 is not loaded with an electronic device as a spare stock or the like, and can be stored in a single unit. Therefore, even when the circuit board 10 is separately stored, the performance of the circuit board 10 can be maintained for a long period of time. In the first embodiment, the interruption operation described below is periodically executed during the execution of the control operation shown in Fig. 2 . Fig. 4 is a flowchart showing the interrupt processing of the second embodiment. The interrupt processing shown in Fig. 4 is - in Fig. 2: control operation = fixed = execution processing. After the interrupt processing starts, the monitoring unit Η confirms the active ram recording (the voltage signal generated by the DC voltage of step _2 (...the source 20 ends the interrupt processing. After the end, the second picture; & disable At the beginning of the time, the control signal will be interrupted. When the power of the main power source 20 is interrupted during the execution of the control operation shown in Fig. 2, the signal is enabled. (Step S201) After the interrupt processing shown in Fig. 4 is started, the monitoring unit 51 confirms the enable state of the monitor signal (step S202: Yes). Then, the control IC 15 interrupts the control operation shown in Fig. 2 ( Step S203). More specifically, the signal output unit 52 5 outputs a control signal for turning off the switch 丨 6. Thereafter, the signal output unit 52 stops the time measurement of the timer a and the timer B in step S204. The measurement time of timer A and timer B is cleared together (ie, reset timer A and timer B). Then, 'control 1C' 5 returns to the beginning of the control operation shown in Fig. 2. The interrupt processing has a function when the main power source 2 〇 is turned on The power source 14 acts to stop the energization of the deteriorated component groups 12 and 4, and as a result, unnecessary waste of the power of the sub power source 14 can be avoided, so that the power of the sub power source 14 can be increased by the amount of power avoided. In the second embodiment, the second embodiment is also equivalent to the specific embodiment of the basic embodiment. The second embodiment corresponds to the specific embodiment of the first embodiment. The present invention is not equivalent to the second embodiment. Fig. 5 shows the second embodiment. 20 The electronic device 2 shown in Fig. 5 corresponds to the second embodiment of the sub-machine described in the basic form. The electronic device of the actual state is the same as that of the electronic device 1 of the first embodiment except for the circuit board 60. Further, the circuit board shown in the whistle diagram 6〇: In the second embodiment, the circuit board 6 of the yoke type is different from the first embodiment. The circuit board of the first embodiment is different from the first embodiment. In the following description, the second embodiment will be described with a focus on the difference from the first embodiment. The control IC 6i 5 of the circuit board 6A shown in part (A) of Fig. 5 is based on the power supply I4 from the field. The power is operated to 'output the control signal. The control signal is input to the switches 16, 16'. In other words, the object controlled by the control signal is the same as the control object of the first embodiment. However, the control 1 (: 61 is not performed) The DC voltage of the main power source 20 is monitored. Therefore, the time point at which the control 1 (:61 outputs the control signal) is slightly different from the output time point of the first embodiment. 0 (B) of Figure 5 shows the function block diagram of Control C61. As shown in the functional block diagram, the control IC 61 has a timer 53 and a signal output unit 62 as internal functions. However, the control IC 61 does not have the monitoring unit of the second embodiment. In the second embodiment shown in Fig. 5, the control IC 61 periodically performs energization of the degrading component group 12 by the sub power source 14. 15 Here, the hour device corresponds to the timer example of the first application form described above. The signal output unit 62 and the switches 16 and 16' constitute an example of the elapsed time of the above-described second application mode. The signal output unit 62 corresponds to an example of a reset unit in the first application mode described above. Fig. 6 is a flow chart showing the control operation of the second embodiment. 20 The flowchart shown in Fig. 6 is the same as the flowchart shown in Fig. 2 except that step S103 is missing. When the sub power source 14 (clock battery) shown in Fig. 5 is placed in the circuit board 60, and power is supplied to the control IC 61, the control operation of the flowchart shown in Fig. 6 is started. Further, in the second embodiment, there is no interrupt processing for interrupting the control operation 15 201113534 of Fig. 6 . Therefore, in the second embodiment, regardless of the presence or absence of power supply from the main power source 20, the energization of the deteriorated component group 12 can be performed periodically as long as the power of the sub power source 14 continues. In the second embodiment described above, the circuit board 6〇 periodically and autonomously re-energizes the degraded component group. Therefore, even when the electronic device 1 is not used for a long period of time or when the circuit board 10 is stored for a long period of time, the performance as the circuit board 10 or the electronic device 1 can be maintained. Next, a third embodiment will be described. This third embodiment corresponds to a specific embodiment of the above basic form. Further, the third embodiment corresponds to a specific embodiment of the first application form and the second application form. Further, the third embodiment corresponds to a specific embodiment of the third application mode. In the third application mode, the second power source is a common power source having the above-mentioned power supply. Further, the third application mode has a power supply line for guiding the power of the common power supply to the power supply line, and a switch for turning off the power supply line in response to an instruction from the outside of the wiring board. The type of the third application mode is that the electric power for operating the circuit on the circuit board can be self-contained on the circuit board. According to the third aspect of the invention, the self-supplied electric power on the circuit board can be used as the first cymbal, thereby suppressing the performance deterioration of the circuit board for a long period of time. Fig. 7 shows the third embodiment. The circuit board % shown in Fig. 7 can be used as a function of the electronic unit by the circuit board. This circuit board corresponds to a specific third embodiment of the circuit board described in the basic form, and corresponds to a specific third embodiment of the electronic apparatus described in the above paragraph: 2011. In the circuit board 7, the same elements as those of the circuit board 1 shown in Fig. 1 are denoted by the same reference numerals and will not be described. The power source 14 of the 5 & circuit board 7G is identical to the sub-power source I4 shown in Fig. 1 as a clock battery, but in the third embodiment, it is simply referred to as a "battery". The circuit board 70 has a power supply line 71 for guiding the power of the power source 14 to the power supply circuit 13. The circuit board 71 also has a switch 72 for turning the power line 71 on and off according to an instruction from the circuit board. The specific content of the "instruction" is not particularly limited, and may be, for example, a control signal for inputting the on/off state of the control power switch 72, or a manual operation by the user. The circuit board 70 of the third embodiment is substantially the same as the circuit board 15 of the first embodiment except that the power source 丨 4 is responsible for both the main power source 20 and the sub power source 14 in the second embodiment. Therefore, the control operation or the interrupt processing performed by the control IC 15 of the third embodiment will be described as follows, and is basically the same as the control operation of the first embodiment. Fig. 8 is a flow chart showing the control operation of the third embodiment. In the flowchart shown in Fig. 8, the video signal is turned off by the power switch 72 to turn off the voltage applied to the circuit 13 via the power supply line 14 from the only power supply 14 shown in Fig. 7 (step S1〇3'). ). Further, in step sl7, when the switch w is turned on, the degrading component group 12 is energized by the electric power of the only power source 14 shown in Fig. 7 (step S108'). Except for these two steps si 〇 3', si 〇 8, the other steps are the same as those shown in Fig. 2. Further, the control actions displayed on the control chart shown in the flowchart of Fig. 8 are the same as the control operation as a whole. In essence, the flow of Fig. 2 shows the flowchart of the second embodiment in the flowchart shown in Fig. 9. After that, the monitoring signal is enabled (step S2〇i,). Except for the power switch of $, the other steps are in addition to the steps shown in Figure 4, which is the illusion of 1, and the flow chart of Figure 9 is wide. The interrupt processing is the same. In the circuit board 7 of the third embodiment, or the interruption of the dummy stalk is performed by performing the above-described control operation processing, the interrupt processing can be performed while saving the circuit board for a long period of time. ^ "The power" ~ qi simple description] 苐] (α), (β) map shows the first embodiment of the bear figure. The figure shows the flow of the control operation of the first embodiment. The third diagram shows a specific example of the energization path of the sub power source. The figure shows a flowchart of the interrupt processing in the first embodiment. The fifth Γ" lA) and (B) diagrams show the second embodiment. Fig. 6 is a flow chart showing the control operation of the second embodiment. Fig. 7 is a view showing a third embodiment. The figure shows a flowchart of the control operation of the third embodiment. [Fig. 9 is a flowchart showing the interrupt processing of the third embodiment. & description of the component symbol] • η electronic machine n 11... Parts that are not deteriorated by the forest's circuit board group (on the substrate) 20 201113534 12...Part group 51 that is degraded when not energized... Monitoring Part (on the substrate) 52...signal output unit 13...circuit 53...timer 14...sub power supply 60...circuit board 15...control 1C 61...control 1C 16,16 '...switch 62...signal output unit 17...wiring board 70...circuit board 18...connector 71...power cord 20...main power source 72...switch 30··. Parts 80 that do not deteriorate when energized... Power line group (outside the board) 81... Electrolytic capacitor 40... Parts group that deteriorates when not energized 84... Signal processing parts (outside the board) 19