TW201112298A - Over-temperature and over-current dual protection device and method of manufacturing the same - Google Patents

Over-temperature and over-current dual protection device and method of manufacturing the same Download PDF

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TW201112298A
TW201112298A TW98133170A TW98133170A TW201112298A TW 201112298 A TW201112298 A TW 201112298A TW 98133170 A TW98133170 A TW 98133170A TW 98133170 A TW98133170 A TW 98133170A TW 201112298 A TW201112298 A TW 201112298A
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fuse
substrate
manufacturing
layer
temperature coefficient
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TW98133170A
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Chinese (zh)
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TWI376713B (en
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chang-xin Yu
yi-xuan Wu
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Icp Technology Co Ltd
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  • Thermistors And Varistors (AREA)
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Abstract

This invention discloses an over-temperature and over-current dual protection device and its manufacturing method. A fuse and a positive temperature coefficient thermistor are installed in parallel in a single protection device. When the current is too large, the fuse will fuse to make the overall current flow through the thermistor to force the temperature to rise due to the increased current, and finally the current flowing through the device will be cut off completely. On the other hand, when the environmental temperature is too high, the resistance of the thermistor rises because of heat to force the overall current to flow through the fuse until the fuse fuses after the rated range is exceeded, and finally the current flows back to the thermistor to result in a complete open circuit. Therefore, the effect of dual protection can be achieved by a single passive device with a cheap unit price and the space waste can be simultaneously reduced, increasing competitiveness and acceptance in the market.

Description

201112298 六、發明說明: 【發明所屬之技術領域】 本發明係關於過電流保護之元件,特別是一種過溫 流雙保護元件及其製法。 【先前技術】 。一般電路設計時,為避免使用時發生危險或電子產品毀 損,均會在電路中增加如保險絲等電路保護元件。在各種電^ 保護元件中,一般均以保險絲作為過電流保護元件,以定201112298 VI. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to an overcurrent protection component, and more particularly to an overtemperature protection dual protection component and a method of fabricating the same. [Prior Art]. In general circuit design, in order to avoid danger or damage to electronic products during use, circuit protection components such as fuses are added to the circuit. In various electrical protection components, fuses are generally used as overcurrent protection components.

安培的保險絲為例,當固定通以丨安培的電鱗,保險絲 維持若干小時;但當電流倍增至2安培,則該保險ί將 在數私以内熔斷;若再加倍而通以4安培的電流,則該保險緣 必須在數毫_燒__電流,避免過量的糕造成嚴重 後果。 另方面,電流量並非電子產品使用安全問題的唯一 如鋰離子電鱗,常聽_使㈣財產生 度的提升而自行燃燒,此種安全風險亦不容減 利用過載電流將保險絲加熱並熔斷而達到過 於溫錢__,紐達_;4= 下間稱PTC)電_為過溫賴元件,藉由溫度箱、電阻辦 Ϊ之得溫度超過敏時’雜不魄高剌斷路 麻%件不僅作料間較長,也對於_過電流問題一籌 更進一步,亦可將部分檢測元件與控制 升反應速财錄度,但此種安全絲提升,不僅、 增,尤其她於上述解決方案都是被動元能、 ㈣賴,雛控^ 有失效之風險,亦可能造成保護功能之喪失。 201112298 因此’若有-種在不大幅提升成本的前提下即可 與過電流雙保護之被動元件,不僅無須額外耗電、亦 = 成保險絲阻斷過電流風險、以及環境溫度過高時 效’將是3¾在電子業者的-大福音! 早功 Γ發明内容】 因此’本發明之一目的,在於提供一種不僅可阻斷在田 下之降低綱電流所造成的驗,亦可聽環境溫度 二 可能產生危害之雙保護元件。 崎厅 雙保―㈣’在於提供—種更為f敏之過溫及過電流Ampere's fuse is an example. When the ampere is fixed, the fuse is maintained for several hours. However, when the current is doubled to 2 amps, the fuse will be blown within a few vacancies; if it is doubled, the current is 4 amps. , the insurance edge must be in a few milliwatts _ _ _ current, to avoid excessive cakes causing serious consequences. On the other hand, the amount of current is not the only safety issue for electronic products, such as lithium-ion scales, which often causes the self-burning of the (four) wealth generation. This safety risk cannot be reduced by using the overload current to heat and fuse the fuse. Too warm money __, Newa _; 4 = PTC next time) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The length of the material is longer, and the problem of _ overcurrent is further improved. Some of the detection components can be adjusted to the speed of control, but the safety wire is not only increased, but especially in the above solutions. Yuan Neng, (4) Lai, and the young control ^ have the risk of failure and may also result in the loss of protection function. 201112298 Therefore, if there is a passive component that can be double-protected with overcurrent without significantly increasing the cost, not only does it require no additional power consumption, but also the risk of over-current blocking the fuse and the over-temperature of the ambient temperature. It is 33⁄4 in the electronics industry - the big gospel! EMBODIMENT OF THE INVENTION Therefore, it is an object of the present invention to provide a double protection element that not only blocks the reduction of the current in the field, but also the ambient temperature. Kawasaki double protection - (four)' is to provide a more sensitive and over-current

本發明再一目的,在提供一種被動式過溫及過 元件,避免無謂耗能。 ^〇I 、、⑼t發Ϊ又—目的,在揭露製造—種可同時保障過溫及過電 抓%丨兄下電路安全的雙保護元件之方法。 所以本發明_露之—種過溫及過糕雙賴元件的製 ΐίί 2方法包含下列步驟:a)在—片基板上設置多數組包 括兩個知郃,以及並聯於該二端部間之至少一個保險絲、與至 個正溫度係數熱敏電阻的電路裝置;b)形成—層保護/層, 緣板共同形成一個至少被覆該保險絲及該正溫 度絲熱敏電阻的腔室;e)將該基板依該電路裝置之分佈切巧 成粒,d)職雜導㈣二端部、且暴露於室狀端電極。 本發明所揭露之過溫及過電流雙保護元件,包含:一個且 ^邑1及絕熱表面之基板;—組包括兩個端部,及並聯於該2 至少—個保險絲、與至少—個正溫度係數熱敏電阻的 ΐ、田層與該基板共同形成—個至少被覆該保險絲及該 正^係數熱敏電阻的腔室之保護層;及兩個導接該二端部、 且暴露於該腔室外之端電極。 難ί上所t本發赌由將鎌絲與正溫度健熱敏電阻並 Γ 一方面#正常電流流經該元件時,電流將分 抓至Μ度係數熱敏電阻與保險絲兩條路徑,確保電流正常導 201112298 通’若環境溫度過高,則正溫度係數熱敏電阻之電阻值隨溫度 1大’致使流經保險絲的分流逐漸增加’造成過電流而使並聯 ,路,的保險絲燒斷,原行經保險絲的電流反向回到正溫度係 $熱,電阻’促使流經ptc熱敏電阻的電流暴增而迅速增溫: 導致最終斷路’可達親溫之保護;另方面,當電流過大或電 =所供應之電量極不穩定,由於―次式保險絲的作動時間較 十、’過電流將於瞬間熔斷保險絲,並將所有電流集中至PTC 阻而將其加熱、並使其阻抗驟升,電流集中後之過載, 過伊之鑛關,可以_—般沉作動時間 碭冋樣達到截斷電流之目的,以提供過電流保護作用。 本鶴露之元件可賴立完成過溫與過電流雙重保 源,’有的不僅造價低廉更無須耗費額外能 【實施方式】 配人_及其他技術内容、特點與功效,在以下 所示實施例之雙保護元件係選擇採用例如圖1 不且莲雪10,由於其材質並非電或熱的良導體,因此 八導電性或‘熱性。在本例中,陶宪& 佈有複數單元,且每一單反10上以陣列狀分 11,短邊^均_為長抑彡之練單元本體 长汽化/向疋義為仃方向’長邊方向則定義為列方向。且為 構間化’在以下酬流程之圖式中,均麟示出單—單元之結 t案第-較佳實施例之製造流 =之基板單元本體η先於步驟21時圖2 彼此並聯德_ 121及正溫柄方向設置一組 險絲⑵及熱敏電阻122兩122,使各組保 在本例中,保險絲⑵之端部120,且 此時具有-間隔而並未導通,藉此:、摔:^且二2,端_ 秌1下人貝可以分別以探針 201112298 才:測保險絲121與熱敏電阻122 部環“ iiis『二m等,裝置後’為確保外 13,在本例中,隔m 刀別形成覆盍其上的隔離層 免外部的二= 層絕熱材料所製成。為避 13之上,更於步^3 影響,在各隔離層 ❿ 14與對應的基板單元本體j! $ 層丨4,每-保護層 覆其中,錢於敘述,町對麵財置密閉包 11所共_觸如為-個4與基板單元本體 電路裝置並未分離,僅在各 板10的頂面,而各保險絲12 ' 3且電路裝置均成型於基 此亦不相連。故在步驟24'時,對122 ί端部120彼 凹槽施加例如輕微敲擊使Α斷土 /σ上述行方向成型的 使該等電路織相互並如圖8所心沿著列方向 側邊切面110均被暴露。 行’各行對應各電路裝置的各 故可隨後於步驟25,請—併夹去岡〇 + 上以例如賴的K在二側邊H9’在各侧邊切面110 如滾鍍等方式將薄外的薄金屬層,再以例 於步驟26賴等行沿每—列方^兩個端電極15。最後, 分離,即完成個別元件。 °破相槽,使所有晶粒個別 既有製造成本相較於 -方面可同時具備兩種度^^敏電阻相去不遠,但 分別將晶片保險絲與晶片裀方面所佔用體積卻遠小於 201112298 電路程師,無疑是更佳的選擇。 僅為:之==領;;理解,上述陶纖 ”,、陶是、π分子、兩者之混合物、甚至金屬 Α於ίJ技術之實施。以1"將以金屬基板為例,說 另面,本案之元件也未必健於鱗列方式 衣把’即,疋單顆生產,仍屬本案之範疇。 杜吉iiij佳實侧如® 1()及®11所示,雜雙保護元 的導雷性魏^對應的金屬基板n,上,為避免金屬基板u, 9 ¥二性影響雙保護元件的運作,先於步驟20,如圖Still another object of the present invention is to provide a passive over-temperature and over-element to avoid unnecessary energy consumption. ^〇I,,(9)t Ϊ Ϊ — 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的 目的Therefore, the method of the present invention includes the following steps: a) setting a plurality of arrays on the substrate to include two knowledge, and paralleling between the two ends At least one fuse, circuit device to a positive temperature coefficient thermistor; b) forming a layer protection/layer, the edge plate together forming a chamber covering at least the fuse and the positive temperature wire thermistor; e) The substrate is cautiously granulated according to the distribution of the circuit device, d) the second end of the inter-heavy guide (4), and exposed to the chamber-end electrode. The over-temperature and over-current double protection component disclosed in the present invention comprises: a substrate of one and a heat-insulating surface; the group includes two ends, and is connected in parallel to the at least one fuse, and at least one positive The ΐ, the field layer of the temperature coefficient thermistor and the substrate together form a protective layer covering at least the cavity of the fuse and the positive coefficient thermistor; and two guiding the two ends and being exposed to the The terminal electrode outside the chamber. Difficult to get on the bet by the twisted wire and the positive temperature thermistor Γ On the one hand # normal current flowing through the component, the current will be divided into two parameters of the temperature coefficient thermistor and fuse, to ensure Current normal conduction 201112298 pass 'If the ambient temperature is too high, the resistance value of the positive temperature coefficient thermistor will increase with the temperature of 1 ', causing the shunt through the fuse to gradually increase', causing overcurrent and causing parallel, circuit, fuse to blow, The current through the fuse reverses back to the positive temperature system. The resistance 'drives the current flowing through the ptc thermistor to increase rapidly: causing the final open circuit to reach the protection of the temperature; on the other hand, when the current is too large Or electricity = the power supplied is extremely unstable, because the operation time of the "secondary fuse" is ten, 'overcurrent will blow the fuse in an instant, and concentrate all the current to the PTC resistance to heat it and make its impedance rise sharply. The overload after the current concentration, the mine clearance of Iraq, can achieve the purpose of intercepting current to provide overcurrent protection. The components of Benlulu can be used to complete the over-temperature and over-current protection. 'There are not only low cost but no extra energy. [Embodiment] Ownership and other technical contents, features and effects are implemented as shown below. For example, the double protection element is selected from, for example, Figure 1 and Lianxue 10, because its material is not a good conductor of electricity or heat, so it is eight conductive or 'thermal. In this example, Tao Xian & cloth has a complex unit, and each SLR 10 is divided into 11 by array, and the short side ^ is _ long 彡 彡 彡 单元 单元 本体 本体 本体 本体 本体 本体 本体 本体 本体 本体 本体 本体The edge direction is defined as the column direction. And in the following diagram of the following process, the lining shows the single-cell junction t-the preferred embodiment of the manufacturing flow = the substrate unit body η prior to step 21 when Figure 2 is in parallel with each other De_121 and the direction of the positive temperature handle are set a set of dangerous wires (2) and the thermistors 122 two 122, so that each group is protected in this example, the end portion 120 of the fuse (2), and at this time has - interval and is not turned on, borrowing This:, fell: ^ and two 2, the end _ 秌 1 people can be used to probe 201112298 only: test fuse 121 and thermistor 122 ring " iiis "two m, etc. after the device" to ensure the outer 13, In this example, the m-knife is formed to form a barrier layer overlying the outer layer of the second layer heat-insulating material. To avoid the above, it is more affected by the step ^3, and the corresponding layer 与 14 corresponds to The substrate unit body j! $ layer 丨 4, each - protective layer covered therein, money in the narrative, the opposite side of the town of the financial package 11 _ touch as - 4 and the substrate unit body circuit device is not separated, only in The top surface of each board 10, and the fuses 12' 3 and the circuit devices are formed without being connected to each other. Therefore, at step 24', the 122 ί end 120 The grooves are applied, for example, by a slight tap to shape the smashing soil/σ in the direction of the row so that the circuits are woven to each other and the side faces 110 are exposed along the column direction as shown in Fig. 8. The rows correspond to the respective circuit devices. For each reason, in step 25, please, and then remove the thin metal layer of the thin outer metal layer, such as the K on the two sides H9', such as barrel plating, etc. In step 26, the two end electrodes 15 are arranged along each row. Finally, the individual components are separated, and the phase-breaking grooves are made so that all the individual manufacturing costs of the crystal grains can be simultaneously compared with the two aspects. The ^^-sensitive resistance is not far away, but the volume occupied by the chip fuse and the wafer is much smaller than the 201112298 electric distance division, which is undoubtedly a better choice. Only: == collar;; understand, the above ceramic fiber ", Tao, π molecules, a mixture of the two, and even metal Α 实施 implementation of ίJ technology. Taking 1" as a case of a metal substrate, it is said that the components of this case are not necessarily robust to the scale of the clothes. That is, the production of a single piece is still within the scope of this case. Duji iiij Jiashi side as shown in ® 1() and ®11, the miscellaneous double protection element's lightning conductivity Wei ^ corresponds to the metal substrate n, on the side to avoid the metal substrate u, 9 ¥ dual-effect double protection element Operation, prior to step 20, as shown

1Ή,力’在其頂面上設置一層導電性不佳的隔絕層 S金金屬基板1Γ表面完全氧化使生成不導 ㈣感e 乂物層為例,當然、,亦可採用在基板上塗佈絕緣材 ΐ或膠等方式形成導電性與導熱性都不佳的隔絕 二考圖14,於步驟211’在金屬基板及隔絕層131, ί屬端部12G’ ’並如圖15及16所示,在端部咖 間的,絕層131,上壓印正溫度係數熱敏電阻122,。 ,後如圖17及18所示,於步驟212,在熱敏電阻122,上 方設置一層絕緣與絕熱的分隔層123,;並如圖19及2〇,在步 驟213_時’於分隔層123,上形成-個保險絲121,。如圖21及 斤不’於步驟22’則在保險絲⑵,上方設置一層隔離層U,。 ,者’如圖23及24所示之步驟23’,於隔離層13,上方再設 保護層14’’在保護層14’及金屬基板(未標號) 礤形成一腔室(未標號)。最後,於步驟25,如圖25及%所示, 在金屬基板11,的側邊形成端電極15,。 當然,上述保險絲與熱敏電阻上下重疊置時, 異位,如圖27戶斤示,在具有絕緣表面的i板 保絲1丨1 ’保險絲上方則依序是分隔層丨23”、熱敏電阻 122’、’及保護層14”,並於兩側邊形成端電極15”。本發明利用 上述並聯、·σ構设计,將電流分流至單一雙保護元件中的正溫度 係數熱敏電阻與保麟’如此,不論在過溫錢電流任一條件 201112298 —上所述者,僅為本發明實施例而已,當不能以此限 二日之範圍。即,大凡依本發明申請專利範圍及發明 ί,、二内t所作之簡單的等效變化與修飾,皆應仍屬本發明專 利涵蓋之範圍内。 【圖式簡單說明】 圖1係本案第一較佳實施例所用陶瓷基板立體示意圖;1Ή, force' is provided with a layer of poorly-performing insulating layer on the top surface of the S-gold metal substrate. The surface is completely oxidized to form a non-conductive (four)-sensitive e-layer. For example, it can also be coated on a substrate. Insulation material ΐ or glue or the like forms an isolation of poor conductivity and thermal conductivity. In step 211 ′, the metal substrate and the isolation layer 131 are at the end 12G′′ and are as shown in FIGS. 15 and 16 . In the end of the coffee room, the layer 131, the positive temperature coefficient thermistor 122 is embossed. As shown in FIGS. 17 and 18, in step 212, a layer of insulating and insulating spacers 123 is disposed over the thermistor 122; and as shown in FIGS. 19 and 2, at step 213_' in the spacer layer 123. , a fuse 121 is formed. As shown in Fig. 21 and Fig. 22, a layer of isolation layer U is disposed above the fuse (2). In the step 23' shown in Figs. 23 and 24, a protective layer 14'' is further disposed on the isolation layer 13, and a cavity (not labeled) is formed on the protective layer 14' and the metal substrate (not labeled). Finally, in step 25, as shown in Figs. 25 and %, the terminal electrodes 15 are formed on the side of the metal substrate 11. Of course, when the above-mentioned fuse and the thermistor are placed one on top of the other, the ectopic position is shown in Fig. 27, and the upper layer of the i-plate retaining wire 1 丨 1 'fuse with an insulating surface is sequentially separated by 丨 23 ”, thermal The resistors 122', 'and the protective layer 14', and the terminal electrodes 15" are formed on both sides. The present invention utilizes the above parallel, σ configuration to shunt current to the PTC thermistor in a single dual protection component And Paulin's, regardless of the conditions of the over-temperature and current, 201112298, is only the embodiment of the present invention, and cannot be limited to the scope of the two days. The simple equivalent changes and modifications made by the inventions are still within the scope of the present invention. [Fig. 1] Fig. 1 is a perspective view of a ceramic substrate used in the first preferred embodiment of the present invention. ;

圖2係本案第一較佳實施例製造方法之流程圖; 圖3至圖9係圖2實施例於不同步驟之結構示意圖; 圖10係本案第二較佳實施例製造方法之流程圖; 圖11至圖26係圖10實施例於不同步驟之結構示意圖;及 圖27係本案第三較佳實施例之側視剖面圖。 【主要元件符號說明】 10…陶瓷基板 11…基板單元本體 11…金屬基板 φ 11”…絕緣表面的基板 13、 13’·..隔離層 14、 14’、14”...保護層 15、 15’、15”.·.端電極 21 〜26、20’、211’、212,、213,、22’、23,、25,·..步驟 110…側邊切面 131’..,隔絕層 120、120’·..端部 12卜 121’、121”...保險絲 122、122’、122”...熱敏電阻 123’、123”...分隔層2 is a flow chart of the manufacturing method of the first preferred embodiment of the present invention; FIG. 3 to FIG. 9 are schematic structural views of the embodiment of FIG. 2 in different steps; FIG. 10 is a flow chart of the manufacturing method of the second preferred embodiment of the present invention; 11 to FIG. 26 are schematic structural views of the embodiment of FIG. 10 in different steps; and FIG. 27 is a side cross-sectional view of the third preferred embodiment of the present invention. [Major component symbol description] 10...ceramic substrate 11...substrate unit body 11...metal substrate φ 11"...insulating surface substrate 13,13'.. isolation layer 14, 14', 14"...protective layer 15, 15', 15".. terminal electrodes 21 to 26, 20', 211', 212, 213, 22', 23, 25, ..... Step 110... side cut surface 131'.., insulation layer 120, 120'·.. end 12 128', 121"...fuse 122, 122', 122"... thermistor 123', 123"... separate layer

Claims (1)

201112298 七、申請專利範圍: 申清專利範圍: 1.一^過溫麟電缝賴餅的觀料,包含 設ί至少一組包括兩個端部,‘_ ;=;=個保險絲、及至少-個正溫度係數熱敏 b)形成-層保護層,該保護層與該基板共同 該保險絲及該正溫度係數熱敏電阻的腔室; 夕破设 巧成兩個導接該二端部、且暴露於201112298 VII. Scope of application for patents: The scope of patent application: 1. The observation of Wenlin's electric sewed cake, including at least one set including two ends, '_;=;= a fuse, and at least a positive temperature coefficient heat sensitive b) forming a layer protective layer, the protective layer and the substrate together with the fuse and the chamber of the PTC thermistor; the outer break is set to two leads to the two ends, And exposed to 1項之製造方法,其中該步 成有其t該方法更包含在該步驟b)後’將該形 ί) 基板,依各該電路裝置之分佈分離成晶粒 3·ΐ1ΐ^1ΐ圍第2項之製造方法,其中料電職置係以上 著線方向為一列方向’該等電路裳置則以彼此沿 福[夹—角度之行方向平行配置,並於該基板上形成 後數仃之矩陣配置,且該步驟d)更包含下列次步驟: dl)將該等電路裝置沿該等列方向分軸複數行;及 d2)將該等行沿該行方向分離成個別晶粒。 Hi專利$巳圍第3項之製造方法,其中該步驟dl)係將該等 μ土板分離而成之複數行的各側邊切面暴露,供形 e)之該等端電極。 巧申。月專利範圍第1項之製造方法,更包含在該步驟&)前,在 該基板將形成該保險絲及該正溫度係數熱敏電阻處,先形成一 層隔絕層之步驟e)。 6. 如申請專概圍第丨項之製造方法,更包含在該步驟a)及步驟 b)間,形成一層隔離層之步驟幻。 7. 如申請專利範圍第卜2、3小5或6項之製造方法,其中該 步驟a)係在該基板上同時形成該保險絲及該正溫度係數熱敏 201112298 電阻。 8. 如申請專利範圍第1、2、3、4、5或6項之製造方法,其中該 步驟a)更包含下列次步驟: ~ al)在該基板上形成該保險絲;及 a2)在該保險絲上方形成該正溫度係數熱敏電阻。 9. 如申凊專利範圍第1、2、3、4、5或ό項之製造方法,其中該 步驟a)更包含下列次步驟: ^ al)在該基板上形成該正溫度係數熱敏電阻;及 a2)在該正溫度係數熱敏電阻上方形成該保險絲。The manufacturing method of the first item, wherein the step further comprises the step of: the method further comprises: after the step b), the substrate is separated into crystal grains according to the distribution of the circuit device. 3·ΐ1ΐ^1ΐ2 The manufacturing method of the item, wherein the electric power system is in the direction of the line above the line direction, and the circuits are arranged in parallel with each other along the direction of the clip-angle, and the matrix of the rear number is formed on the substrate. Configuration, and step d) further comprises the following steps: dl) dividing the circuit devices in a plurality of rows along the column direction; and d2) separating the rows into individual dies in the row direction. The manufacturing method of the third item of the Hi patent, wherein the step dl) exposes the side cuts of the plurality of rows separated by the μ soil sheets to the end electrodes of the shape e). Qiao Shen. The manufacturing method of the first aspect of the patent scope further includes the step e) of forming a barrier layer at the substrate to form the fuse and the positive temperature coefficient thermistor before the step & 6. If you apply for the manufacturing method of the general item, the step of forming a layer of isolation between the steps a) and b) is included. 7. The manufacturing method of claim 2, 3, 5 or 6 wherein the step a) simultaneously forms the fuse and the positive temperature coefficient thermal 201112298 resistor on the substrate. 8. The manufacturing method of claim 1, 2, 3, 4, 5 or 6 wherein the step a) further comprises the following steps: ~ a) forming the fuse on the substrate; and a2) The positive temperature coefficient thermistor is formed above the fuse. 9. The manufacturing method of claim 1, 2, 3, 4, 5 or 5, wherein the step a) further comprises the following steps: ^ a) forming the PTC thermistor on the substrate And a2) forming the fuse above the positive temperature coefficient thermistor. 10. —種過溫及過電流雙保護元件,包含: 一個基板; 一組包括兩個端部,及並聯於該二端部間之至少一個保險 絲、與至少一個正溫度係數熱敏電阻的電路裝置; 一層與該基板共同形成一個至少被覆該保險絲及該正溫度係 數熱敏電阻的腔室之保護層;及 又 兩個導接該二端部、且暴露於該腔室外之端電極。 11. 如申請糊細第1G項之雙紐藉,職板更包含一 體、及-層朝向該電路裝置方向形成於該本體上之;。 12. 如申請專利範圍第1G項之雙保護元件,該基板更二、曰 之一 13,申請專利範圍第⑴項之雙保護元件,其中該基板係 基板。 、 絕緣層。 陶瓷 體、及一層朝向該電路裝置方向形成於該本體上 9 15·如申請專利範圍第1G、1卜12或13項之雙保護元: 該基板上、且該正溫度係數熱敏; 16.如申請專利範圍第1〇、u、12或13 該正溫度係數熱敏電阻係形成於該基板上、且^保險絲n, 成 201112298 於該正溫度係數熱敏電阻上。10. An over-temperature and over-current dual protection component comprising: a substrate; a set of circuits comprising two ends, and at least one fuse connected in parallel between the two ends, and at least one positive temperature coefficient thermistor a device; a layer together with the substrate to form a protective layer covering at least the cavity of the fuse and the PTC thermistor; and two further terminal electrodes that are connected to the two ends and exposed to the outside of the cavity. 11. If the application of the paste of the 1G item is double-borrowed, the job board further comprises a body and a layer formed on the body toward the circuit device; 12. The dual protection element according to claim 1G of the patent scope, the substrate is further, the one of which is the dual protection element of the patent scope (1), wherein the substrate is a substrate. , Insulation. The ceramic body and a layer are formed on the body toward the circuit device. The double protection element as claimed in claim 1G, 1b, 12 or 13 is: the substrate and the positive temperature coefficient is heat sensitive; For example, the first range, u, 12 or 13 of the patent application range is formed on the substrate, and the fuse n is 201112298 on the positive temperature coefficient thermistor.
TW98133170A 2009-09-30 2009-09-30 Over-temperature and over-current dual protection device and method of manufacturing the same TW201112298A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI621146B (en) * 2014-01-15 2018-04-11 Dexerials Corp Protection circuit and control method of protection circuit
CN115483076A (en) * 2021-06-16 2022-12-16 南京泉峰科技有限公司 Fuse device suitable for battery pack, battery pack and electric tool

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI621146B (en) * 2014-01-15 2018-04-11 Dexerials Corp Protection circuit and control method of protection circuit
CN115483076A (en) * 2021-06-16 2022-12-16 南京泉峰科技有限公司 Fuse device suitable for battery pack, battery pack and electric tool
CN115483076B (en) * 2021-06-16 2024-01-19 南京泉峰科技有限公司 Fuse device suitable for battery pack, battery pack and electric tool

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