TW201108324A - A method for processing a substrate - Google Patents

A method for processing a substrate Download PDF

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Publication number
TW201108324A
TW201108324A TW099108575A TW99108575A TW201108324A TW 201108324 A TW201108324 A TW 201108324A TW 099108575 A TW099108575 A TW 099108575A TW 99108575 A TW99108575 A TW 99108575A TW 201108324 A TW201108324 A TW 201108324A
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TW
Taiwan
Prior art keywords
width
pattern
layer
substrate
etching
Prior art date
Application number
TW099108575A
Other languages
Chinese (zh)
Inventor
Hiroki Kintaka
Toshihisa Ozu
Masahiko Takahashi
Original Assignee
Tokyo Electron Ltd
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Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW201108324A publication Critical patent/TW201108324A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H01J37/32449—Gas control, e.g. control of the gas flow
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

A method for processing a substrate to form a desired pattern by an etching process after forming a mask pattern over the substrate includes the steps of: forming two layers over the substrate; measuring a width of the mask pattern or an etched pattern of one of the two layers; and adjusting a flow rate of any one of HBr and other gases, used in the etching process, based on the measured width. The two layers may include a silicon nitride layer and an organic dielectric layer.

Description

201108324 六、發明說明： 【發明所屬之技術領域】 本發明係關於半導體元件及其製造方法。更且體而 言，其係關於提供-種具有期望的臨界尺寸編 dimension)值之高解析圖案的電漿蝕刻方法。 【先前技術】 Ο Ο 在：導體製造處理中係使用微影技術來形成光阻圖 *。在微影技術中會先將光阻溶液塗佈於半 示(LCD)基板上。利用光罩來將光阻膜曝露在強光^夜= 進行顯影。因此可在半導體或LCD基板上形成期 圖案。在形成期望的光阻圖案後，t 、 半導體或IXD基板。 會細_處理以钕刻 已知即便上述的每個處理步驟皆在固 進行，但由於非理想因素的存在如基板表 = 壓力及溫度與相對濕度的變動，上述每個處理步 果可能會無法符合目標值。 、、*° 傳統上，在處理固定數目的基板後，會取出 量測許多不同的參數，並基於_ 處的實 尺寸(CD)、基本圖案斑光^匹配二線見或臨界 夕志而" 圖案的配準確度、經顯影後 之表面上的不-致性、顯影缺陷、独刻處理 寬或臨界尺寸(C取爛處理後基板表面的缺陷Γ 201108324 接著可根據基於檢測結果所作出的決定來修改每一處 理步驟的處理條件。此棘手㈣作修改可由具有經驗的操 作者來執仃。為了協助修改操作，在公開號為2〇〇2_ι9〇446 的日本專财請財建議了—種光阻®案形成處理。在此 處理中，先決定與每-特定被制參數相_—組預定修 改參數。接著根據自動檢測結果來修改該組預定修改參數。 例如，當經則後之基板的線寬或臨界尺寸(CD)被認 定是該特定被量測參數時，可修改下列修改參數而達到目 標值：（1)曝光強度；⑺加熱時間；（3)顯影時間；⑷姓刻時 間；及(5)蝕刻氣體的組成比例。然而，上述申請案並未明 確揭露氣體組成比例如何影響用以達到臨界尺 望目標值的蝕刻處理。 ）^ 又，在公開唬為2003-209093的曰本專利申請案中揭 露了-種基板處理方法，其精確地4測了 _圖案的 尺寸（CD)以在蝕刻步驟後形成期望的電路圖案。在此^法 中會先量測錄®案的臨界尺寸(CD)n將量測到的 結果前饋至調整處理條件用的蝕刻處理單元。藉由μ〜田 佳的處理條件，在蚀刻處理後可以獲得精確且 圖案。此技術提供了根據量測到的光阻膜臨界尺 = _期望圖㈣的前饋方法。然而’類似於先前的公 凊案’其亚未明確地指出用以達成期望臨界尺 刻氣體種類與其組成比例相關的特定條件。 ’ ^ 本發明係鑑於上述問題而提出。本發明提供一種利用 特定的蝕刻氣體種類及其組成比例來形成具'' 201108324 寸(CD)之高解軒圖案的方法。 【發明内容】 本第一樣態提供一種基板處理方法，其係於基 人匕案後藉由—_處理以形成期望圖案。此 友匕^ ,^驟：於基板上形成兩膜層，該兩膜層包含201108324 VI. Description of the Invention: [Technical Field to Be Invented] The present invention relates to a semiconductor element and a method of manufacturing the same. More specifically, it relates to a plasma etching method that provides a high resolution pattern of values having a desired critical dimension dimension. [Prior Art] Ο Ο In the conductor manufacturing process, lithography is used to form a photoresist pattern*. In lithography, a photoresist solution is first applied to a semiconductor (LCD) substrate. A photomask is used to expose the photoresist film to a strong light night = development. Therefore, a pattern can be formed on the semiconductor or LCD substrate. After forming the desired photoresist pattern, t, semiconductor or LCD substrate. It will be known that even if each of the above-mentioned processing steps is solid, but due to non-ideal factors such as substrate table = pressure and temperature and relative humidity changes, each of the above processing steps may not be possible. Meet the target value. ,, *° Traditionally, after processing a fixed number of substrates, many different parameters are taken and measured based on the real size (CD) at _, the basic pattern spotting ^ matching the second line or the critical temperament ; the matching accuracy of the pattern, the non-inducedness on the developed surface, the development defect, the unique processing width or the critical dimension (the defect of the substrate surface after the C-treatment) 201108324 can then be based on the test results Decided to modify the processing conditions of each processing step. This tricky (four) can be modified by an experienced operator. In order to assist in the modification of the operation, the Japanese special offer for the public number 2〇〇2_ι9〇446 is recommended - The photoresist formation process is processed. In this process, the predetermined modified parameters are determined with each specific parameter, and then the predetermined modified parameters are modified according to the automatic detection result. For example, when the process is followed by When the line width or critical dimension (CD) of the substrate is determined to be the specific measured parameter, the following modified parameters may be modified to reach the target value: (1) exposure intensity; (7) heating time; (3) development time; The engraving time; and (5) the composition ratio of the etching gas. However, the above application does not explicitly disclose how the gas composition ratio affects the etching treatment used to reach the critical dimension target value.) ^ Also, in the public order 2003- A substrate processing method is disclosed in the 209 093 patent application, which accurately measures the size (CD) of the pattern to form a desired circuit pattern after the etching step. In this method, the critical dimension (CD) of the sample is measured first. The measured result is fed forward to the etching processing unit for adjusting the processing conditions. With the processing conditions of μ~Tianjia, accurate and pattern can be obtained after the etching process. This technique provides a feedforward method based on the measured threshold of the photoresist film = _ expectation (4). However, 'similar to the previous public case' substate does not explicitly indicate the specific conditions associated with the desired critical mass class of gas and its composition ratio. The present invention has been made in view of the above problems. SUMMARY OF THE INVENTION The present invention provides a method of forming a high resolution xing pattern having a '201108324 inch (CD) using a particular type of etching gas and its compositional ratio. SUMMARY OF THE INVENTION The present first aspect provides a substrate processing method which is processed by a ___ method to form a desired pattern. The friend 匕 ^ , ^ step: forming two film layers on the substrate, the two film layers containing

日盛有機介電層；量測該遮罩圖案寬度或該兩膜 & ” 、蝕刻後圖案寬度；及根據該量測到的寬度來 «周I HBr及，、他氣體中任一氣體的流量。於該姓刻處理中 奋使用HBr及该其他氣體。 本發月之第—樣態提供提供—種基板處理方法，其係 i 土板上I成‘罩圖案後藉由—姓刻處理以形成期望圖 案。此方法包含下列步驟：於基板上形成三膜層 ，該三膜 白包3氣化石夕層、-有機介電層及一含石夕抗反射塗層；量 ^該遮罩圖案寬度或該三_其巾—層的細後圖案寬 度，及根據該量測到的寬度來調整氓及chf3中任一氣體 的流量。印及CHF3係被使用於該麵刻處理中。 【實施方式】 此後將參考附圖說明本發明之實施例，其中所示為本 發明的較佳例雜實_。接下來的朗並_以限制本 發明的範4、應雜或結構，而是提供熟知此技藝者能夠 貝知本|明之較佳例示性貫施例。應瞭解，在不脫離隨附 申請專利範财所㈣本發_神與範圍的情況下，可以 201108324 不同的形式實施本發明。 本發明大致上係關於半導體裝置與其製造處理。更具 體而言，本發明係關於提供具有期望臨界尺寸(CD)值的高 解析圖案的電聚餘刻方法。 本發明的實施例係關於用以控制矽（Si)圖案之線寬或 臨界尺寸(CD)的姓刻方法^該邦圖案係利用氮化邦叫 硬遮罩圖案所形成。而該氮化矽(SiN)硬遮罩圖案係利用三 層遮罩圖案所形成。此三層遮罩圖案包含了—有機介電層 (ODL)。為了獲得具有預定臨界尺寸(CD)值的期望砂⑸)圖 案，必須精確地控制形成在矽(Si)基板上之氮化矽（siN)硬遮 罩圖案的線寬雌界尺寸(CD)。此鋪由在圖案化有機介 電層（ODL)時於氮及氧(N2/〇2)的混合氛圍中添加漠化氫 (HBr)而達到。 、 藉由添加溴化氫(HBr)並增加其流量，由於抽出了氧( ^降低〇DL層表面上的氫(H)濃度。因此，能產生具有高 碳含量的有機介電層（0DL)。〇DL層的高碳含量會^生: 有機介電層（ODL)更加剛硬的碳_碳鍵。〇DL層的剛硬特性 藉由降低橫向蝕刻率尤其是當CD值小於目標值時的橫向 At ^率&供了用以獲得預定臨界尺寸（CD)值的較佳控制 且，ODL層的高碳含量會在0DL圖案的表面上產生複 數的溴-碳鍵。因此會有薄薄的—層溴化碳(CBrx)沈積於 0DL圖案上作為側壁保護。此會增加〇DL的臨界尺寸 201108324 根據本發_-實施例’藉由在對有機介電層(〇DL ; organic dielectric layer)進行主餘刻（ME)時調整溴化氫(HBr) 的流量，可達到期望的臨界尺寸(CD)值。藉由增加漠化氮 (HBr)的流量，0DL圖案的臨界尺寸(CD)值會傾向於增加。 根據另一實施例，ODL圖案的臨界尺寸(CD)亦可藉由 在完成主蝕刻（ME)步驟後進行過蝕刻（〇E)步驟來加以調 整。在過蝕刻（OE)步驟中，可藉由調整氮對氧的比例(N2/02) 及增加適量的溴化氫(ΗΒΓ)來達到期望的臨界尺寸（CD) 值。因此，若實際CD值與目標值間的差異較大時，可對 主蝕刻（ME; main etching)處理進行調整，當差異較小時， 可對過姓刻（OE ; over etching)處理進行調整。 在一貫施例中，可藉由將溴化氫(HBr)的流量設定為固 疋值並同時延長過麵刻時間來增加臨界尺寸(CD)值。在另 一實施例中，可藉由增加溴化氫(HBr)的流量來增加臨界尺 寸(CD)值。此使得整體氛圍中有較高的溴化氫(HBr)氣體對 其他氣體的組成比例。 根據又另一實施例，可藉由在〇DL過蝕刻（〇E)步驟中 调整氮對氧(N2/〇2)的比例並增加氯(cl2)氣來達到期望的臨 界尺寸(CD)值。 根據又另一實施例，可藉由圖案化有機介電層（ODL) 時於氮與氧(Ar/〇2)的混合氛圍中而非氮與氧(N2/02)的氛圍 中增加溴化氫(HBr)來達到期望的臨界尺寸(CD)值 。在此實 施例中’可藉由降低氧(〇2)的流量來增加〇DL層的臨界尺 寸(CD)。 7 201108324 根據本發明的另一實施例，可在圖案化含矽抗反射塗 層（Si-ARC)時得至慎有預定臨界尺寸(CD)值的期望圖案: 在此實施财，可藉由赃四氟曱麟三0烧(avcHF3) 氣體的比例來增加或減少Si_ARC的線寬或臨界尺寸。 根據又另一實施例’可藉由調整RF偏壓源的位準來得 到具有預㈣界尺寸(CD)值的期望圖案。在此實施例中， 臨界尺寸(CD)值係與所施加的RF偏壓位準（功率）成正比。 此意味著較高的RF偏壓位準可達到較大的臨界尺寸(cd) 值。相反地，較低的RF偏壓位準則導致較小的臨界尺寸(cd) 值。 在上述實施例中所欲調整的參數如〇DL圖案化步驟中 的溴化氫(HBr)流量、在Si_ARC圖案化步驟中的（CF4/cHF3) 比例及RF偏壓位準係根據光阻圖案或任何遮罩圖案的^ 界尺寸(CD)量測值所決定。 °° 一貫施例係利用在經顯影處理後的半導體基板中之光 阻圖案的量測值，來決定對膜層如相同半導體基板中之有 機介電層（ODL)或含矽抗反射塗層（Si—ARC)進彳;J接續蝕 步驟所用的適當設定條件。 ^ 另-實施例係使用在-半導體基板中之光阻圖案或有 ，介電層（ODL)或含矽抗反射塗層（Si_ARC)的蝕刻後圖案 量測值，來決定在另-半導體基板中進行敍刻步驟所用的 適當設定條件。 另-實施例係使用在-半導體基板中之有機介電層 (ODL)或含石夕抗反射塗層（si_ARC)的餘刻後圖案量測值，^ 201108324 用的適當設定條 決定在相同半導縣板巾進行網步驟所 件。 先參考圖1，其顯示了在進行電祕刻處理 實施例。如此圖中所示’目標二可 16:三二二=罩氮切(Si_ 14及-層結構 声（s^J)16b ^ 電層_L)16a、切抗反射塗 )及紐_6e。為了精確地控制最终的石夕a ceramic dielectric layer; measuring the width of the mask pattern or the width of the two films & ”, the width of the pattern after etching; and the width measured according to the amount of «week I HBr and, any gas in his gas Flow rate. Use HBr and other gases in the process of the surname. The first paragraph of this month provides a method for processing the substrate, which is processed by the i-shaped mask on the i-soil board. To form a desired pattern. The method comprises the steps of: forming a three-layer layer on the substrate, the three-film white-packed gas-leanized layer, the organic dielectric layer, and a stone-containing anti-reflective coating; The pattern width or the width of the thin pattern of the three sheets, and the width measured according to the amount, adjust the flow rate of any of the gases ch and chf3. The stamp and CHF3 are used in the etch processing. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings, which show a preferred embodiment of the present invention. The following is intended to limit the scope, structure, or structure of the present invention. A preferred exemplary embodiment of a person skilled in the art will be provided. It is to be understood that the present invention may be embodied in various forms without departing from the scope of the appended claims. The present invention relates generally to semiconductor devices and their manufacturing processes. More specifically, The invention relates to an electropolymerization method for providing a high resolution pattern having a desired critical dimension (CD) value. Embodiments of the present invention relate to a surname for controlling the line width or critical dimension (CD) of a bismuth (Si) pattern. Method ^ The state pattern is formed by using a nitride mask pattern, and the tantalum nitride (SiN) hard mask pattern is formed by using a three-layer mask pattern. The three-layer mask pattern includes - organic Dielectric layer (ODL). In order to obtain a desired sand (5) pattern with a predetermined critical dimension (CD) value, the line width of a tantalum nitride (SiN) hard mask pattern formed on a cerium (Si) substrate must be precisely controlled. Female size (CD). This shop is obtained by adding desert hydrogen (HBr) to a mixed atmosphere of nitrogen and oxygen (N2/〇2) in the patterned organic dielectric layer (ODL). Hydrogen (HBr) and increase its flow rate due to the extraction of oxygen (^ lower 〇 DL layer table The hydrogen (H) concentration on the surface. Therefore, an organic dielectric layer (0DL) having a high carbon content can be produced. The high carbon content of the 〇DL layer will be generated: the organic dielectric layer (ODL) is more rigid carbon _ Carbon bond. The rigid nature of the 〇DL layer is better controlled by reducing the lateral etch rate, especially when the CD value is less than the target value, and is used to obtain a predetermined critical dimension (CD) value. The high carbon content of the ODL layer produces a plurality of bromo-carbon bonds on the surface of the 0DL pattern. Therefore, a thin layer of carbon bromide (CBrx) is deposited on the 0DL pattern as sidewall protection. This increases the 〇DL. Critical dimension 201108324 According to the present invention, the desired criticality can be achieved by adjusting the flow rate of hydrogen bromide (HBr) while performing the main residual (ME) on the organic dielectric layer (ME). Size (CD) value. By increasing the flow rate of the desertified nitrogen (HBr), the critical dimension (CD) value of the 0DL pattern tends to increase. According to another embodiment, the critical dimension (CD) of the ODL pattern can also be adjusted by performing an over etch (〇E) step after completing the main etch (ME) step. In the overetch (OE) step, the desired critical dimension (CD) value can be achieved by adjusting the ratio of nitrogen to oxygen (N2/02) and increasing the amount of hydrogen bromide (ΗΒΓ). Therefore, if the difference between the actual CD value and the target value is large, the main etching (ME; main etching) process can be adjusted, and when the difference is small, the OE; over etching process can be adjusted. . In a consistent embodiment, the critical dimension (CD) value can be increased by setting the flow rate of hydrogen bromide (HBr) to a solid value while extending the over-etching time. In another embodiment, the critical dimension (CD) value can be increased by increasing the flow of hydrogen bromide (HBr). This results in a higher proportion of hydrogen bromide (HBr) gas to other gases in the overall atmosphere. According to yet another embodiment, the desired critical dimension (CD) value can be achieved by adjusting the ratio of nitrogen to oxygen (N2/〇2) and increasing the chlorine (cl2) gas in the 〇DL overetch (〇E) step. . According to yet another embodiment, bromination can be increased in a mixed atmosphere of nitrogen and oxygen (Ar/〇2) rather than nitrogen and oxygen (N2/02) by patterning an organic dielectric layer (ODL). Hydrogen (HBr) to achieve the desired critical dimension (CD) value. In this embodiment, the critical dimension (CD) of the 〇DL layer can be increased by reducing the flow rate of oxygen (〇2). 7 201108324 According to another embodiment of the present invention, a desired pattern of a predetermined critical dimension (CD) value can be obtained when patterning a germanium-containing anti-reflective coating (Si-ARC): The ratio of 赃tetrafluoro unicorn trioxane (avcHF3) gas increases or decreases the line width or critical dimension of Si_ARC. According to yet another embodiment, a desired pattern having a pre-fourth bound size (CD) value can be obtained by adjusting the level of the RF bias source. In this embodiment, the critical dimension (CD) value is proportional to the applied RF bias level (power). This means that a higher RF bias level can reach a larger critical dimension (cd) value. Conversely, lower RF bias bit criteria result in smaller critical dimension (cd) values. The parameters to be adjusted in the above embodiment, such as the hydrogen bromide (HBr) flow rate in the 〇DL patterning step, the (CF4/cHF3) ratio in the Si_ARC patterning step, and the RF bias level are based on the photoresist pattern. Or the size of any mask pattern (CD) measured by the value. °° consistent application utilizes the measurement of the photoresist pattern in the developed semiconductor substrate to determine the organic dielectric layer (ODL) or antimony-containing anti-reflective coating on the film layer such as the same semiconductor substrate. (Si-ARC) advance; J is the appropriate setting conditions for the etch step. ^Alternatively, the photoresist pattern in the semiconductor substrate or the etched pattern measurement of the dielectric layer (ODL) or the antimony-containing anti-reflective coating (Si_ARC) is used to determine the other semiconductor substrate. The appropriate setting conditions used in the elaboration step. Another embodiment uses an organic dielectric layer (ODL) in a semiconductor substrate or a post-detail pattern measurement value containing a shi anti-reflective coating (si_ARC), which is determined by the appropriate setting bar in the same half. Guide County board towel to carry out the network steps. Referring first to Figure 1, there is shown an embodiment in which an electro-secret processing is performed. As shown in the figure, the target 2 can be 16:32, the cover nitrogen cut (Si_ 14 and - layer structure sound (s^J) 16b ^ electric layer _L) 16a, cut anti-reflective coating) and New_6e. In order to accurately control the final Shi Xi

=上：須t確地將SiN層14的硬遮罩圖案形成於& ^ CD值工到_層Μ的硬遮罩圖案的期望形狀（包 3 CD值或線見），可利用三層結構16⑽、16b、16c)來蝕 刻§1=層14的硬遮罩圖案。更具體而言，在形成期望的光 阻圖水l6c後，接著分別對Si_ARC層16b、ODL層16a及 更遮罩氮化石夕(SiN)層14進行姓刻處理，最後以層14 的圖案作為硬遮罩來對Si基板12進行飯刻而將整個圖案 轉矛夕到石夕(Si)基板12上。目1中亦顯示了具有部分剩餘腿 圖案14的最終矽(Si)基板圖案12。 如前所述’由於非理想因素的存在如基板表面的條 件、大氣壓力及溫度與相對濕度的變動，光阻圖案l6c的 線見或臨界尺寸（CD)可能會無法符合期望的目標值。因 此’接續的蝕刻處理可能會無法提供Si-ARC ' ODL、SiN 與石夕(Si)基板12的期望目標圖案。為了評估上述點，先基 於一替代目標結構製造出一實驗樣本。接著對實驗樣本施 以傳統的電漿蝕刻處理。接下來將詳細說明在進行電漿蝕 刻處理後具有其期望目標圖案的替代目標結構。 201108324= Upper: The hard mask pattern of the SiN layer 14 must be formed in the desired shape of the hard mask pattern of the < ^ CD value to the _ layer ( (package 3 CD value or line see), three layers can be utilized Structures 16 (10), 16b, 16c) are used to etch the hard mask pattern of § 1 = layer 14. More specifically, after the desired photoresist pattern water 16c is formed, the Si_ARC layer 16b, the ODL layer 16a, and the more masked Nitride layer (SiN) layer 14 are respectively subjected to surname processing, and finally the pattern of the layer 14 is used as the layer 14 pattern. The hard mask is used to sculpt the Si substrate 12 to rotate the entire pattern onto the Si (I) substrate 12. The final bismuth (Si) substrate pattern 12 having a portion of the remaining leg pattern 14 is also shown in FIG. As described above, the line or critical dimension (CD) of the photoresist pattern l6c may fail to meet the desired target value due to non-ideal factors such as the condition of the substrate surface, atmospheric pressure, and variations in temperature and relative humidity. Therefore, the subsequent etching process may fail to provide a desired target pattern of the Si-ARC ' ODL, SiN and Si Xi (Si) substrates 12. In order to evaluate the above points, an experimental sample was first created based on an alternative target structure. The experimental sample was then subjected to a conventional plasma etching process. Next, an alternative target structure having its desired target pattern after the plasma etching process will be described in detail. 201108324

接下來參考圖2,其顯示了用 標結構的另一實施例。目標結構 ^氧化邦1〇2)層22。類似於目標結構10，三 二籌係形成於硬遮罩氮化石夕(_)層14上。在此實施 ::’光阻圖案16C的期望臨界尺寸(CD)係設定在約 4〇-45細。應瞭解，此類的蚊實施例意在說明而非限制。 在圖2巾亦概略地顯示了進行電漿侧處理後的期望目標 圖案。 ^圖2顯示了在圖案化氮化矽(SiN)層14後的實驗樣本的 橫剖面圖。如圖中所示，氮化㈣案的臨界尺寸(CD)約為 33.4nm，其係較期望的臨界尺寸(4〇_45nm)要小約〜瓜。量 測到的圖案間距約為65.7nm而量測到的圖案高度約為 49.9nm。 在傳統的電漿蝕刻處理中，大部分的遮罩材料係以稍 微等向性的方式蝕刻。這意味著蝕刻亦會稍微地以水平方 向進行。因此，當對膜層如有機介電層（〇DL)16a施以電漿 姓刻處理時’ 〇DL 16a的側向餘刻和垂直蚀刻會同時發生。 其結果為，〇DL 16a之遮罩圖案的橫剖面形狀會遠離期望 的矩形形狀而變成例如具有斜邊的形狀。接著，藉由〇DL 遮罩所飾刻後的SiN層14將不會變成原本設計的目標形 狀。在理想情況下，較佳的是在水平方向上無姓刻的方向 性儀刻。然而在實際的情況下，一般期望的是在水平方向 上具有少量蝕刻率的非等向性蝕刻。 201108324 本务月&供—種電滎過姓刻（〇E)處理來作為對抗〇DL 層l6a之橫向蝕刻並控制SiN層14的圖案臨界尺寸(CD) 的制衡手段，在此過蝕刻處理中於圖案化有機介電層 (ODL) 16a時會將適量的溴化氫(HBr)添加至氮與氧(N2/〇2) 的混合氛圍t。本案研究了與添加漠化氫(HBr)氣體相關的 各種處理條件。此些研究主要在確定〇DL侧壁的保護機制 及建立一個在蝕刻時控制臨界尺寸(CD)的處理。此些處理 q 條件的實例可包含HBr的流量、蝕刻時間、蝕刻氣體種類、 施加至基板的偏壓功率及其組成比例。 另一方面，在本發明的電漿蝕刻處理期間可使用數個 控制方法以在矽(Si)基板12上提供具有預定臨界尺寸(CD) 的高解析(精確）圖案。此些控制方法的實例可包含前饋控制 方法、後饋控制方法及動態(原位(in-situ))控制方法。在下 文中，將會詳細地單獨解釋上述的每一個控制方法。 在一實施例中’利用前饋處理控制來獲得具有預定臨 界尺寸(CD)的圖案。在此實施例中，先利用任何商業化的 Ο 裝置來量測光阻圖案16c的線寬或臨界尺寸(CD)。可採用 具有光學量測儀如散射儀的整合度量衡(IM ; integrated metrology)裝置。以下將進一步說明，在某些實施例中，線 寬(CD)量測裝置係被整合至塗佈顯影裝置，在塗佈顯影裝 置中，曝光後之光阻的潛在或顯影後CD值係於基板被傳 送至蝕刻裝置以進行後續的蝕刻處理前被量測《而在其他 實施例中，該CD量測係在開始進行實際的蝕刻處理前， 在與蝕刻裝置整合的IM裝置中進行。在另一實施例中，該 201108324 CD $測係藉由獨立的量測系統而非IM機台來進行。以下 將更進-步地詳細說明線寬或CD量騎置。在 圖案的線寬或臨界尺寸(CD)後，會_光阻圖案 2臨t尺寸(CD)是否符合其期㈣目標值。當轨圖案16c 的臨界尺寸(CD)並未符合其期望目標值時，首先決定盘 椠餘刻氣體之流量和種__適當設定條件 ^ 同的半導體基板中對該些設定條件進行觀，以對si ^ 層16b或ODL層16a進行後續的蝕刻處理。 在另一實施例中，利用後饋處理控制來獲 臨界尺寸㈣的圖案。在此另-實施例中，首、=；； Si-ARC圖案16b或〇DL層施的線寬或臨界尺寸 圖案16a邮ARC圖案⑽)的臨界尺寸㈣是否 期望目標值。當。DL圖案16a(Si_ARc圖案叫的 ^尺寸(CD)並未符合其期望目標值時，則決定與電裝钱 m流量和種類相_適當設定條件。將蚊條件傳 ^至钱縣置，接著針對另—半導縣板調整該些設定條 1以提供硬料圖案的預定臨界尺寸(CD)如邦〇基板 之SiN硬遮罩圖案14、〇DL圖案圖案 16b及光阻圖案16c的預定臨界尺寸(cD)。 在又另只施例中，可利用動態（原位)處理控制來獲得 定f界尺寸仰咖案。在此實施射，先在餘刻 j間里測0DL圖案16a或_硬遮罩圖案Μ的線寬 ^1尺寸(CD) ’並在0DL層16a或SiN層14的電漿餘 义地理期間動恶地調整與電漿姓刻氣體之流量和種類相關 201108324 的適當設定條件。在下文中，將分別詳細解釋餅刻裝置及 線寬或CD量測裝置。 蝕刻裝置： 圖3顯示了電漿處理裝置3〇之一實施例的概圖。如圖 中所示，電漿處理裝置30包含處理室120、放射線狹孔板 300、基板支撐件140及介電窗。該處理室120可包含Referring next to Figure 2, another embodiment of the marking structure is shown. Target Structure ^ Oxidation State 1〇2) Layer 22. Similar to the target structure 10, a three-two-layer system is formed on the hard mask nitride (_) layer 14. Here, the desired critical dimension (CD) of the ::' photoresist pattern 16C is set at about 4 〇 -45 fine. It will be appreciated that mosquito embodiments of this type are intended to be illustrative and not limiting. The desired target pattern after the plasma side treatment is also schematically shown in Fig. 2 . Figure 2 shows a cross-sectional view of an experimental sample after patterning the tantalum nitride (SiN) layer 14. As shown in the figure, the critical dimension (CD) of the nitride (IV) case is about 33.4 nm, which is about a small ~ melon than the desired critical dimension (4 〇 - 45 nm). The measured pattern pitch was about 65.7 nm and the measured pattern height was about 49.9 nm. In conventional plasma etching processes, most of the masking material is etched in a slightly isotropic manner. This means that the etching will also proceed slightly in a horizontal direction. Therefore, when the film layer such as the organic dielectric layer (〇 DL) 16a is subjected to plasma treatment, the lateral engraving and vertical etching of the 〇DL 16a occur simultaneously. As a result, the cross-sectional shape of the mask pattern of the 〇DL 16a is changed from a desired rectangular shape to, for example, a shape having a hypotenuse. Then, the SiN layer 14 embossed by the 〇DL mask will not become the target shape of the original design. In an ideal case, it is preferable to have no directional directionality in the horizontal direction. In the actual case, however, it is generally desirable to have an anisotropic etch having a small etch rate in the horizontal direction. 201108324 The current month & for the electrician to pass the surname (〇E) treatment as a counterbalance to the lateral etching of the 〇DL layer l6a and to control the pattern critical dimension (CD) of the SiN layer 14, where the etching process is performed An appropriate amount of hydrogen bromide (HBr) is added to the mixed atmosphere t of nitrogen and oxygen (N2/〇2) in the patterned organic dielectric layer (ODL) 16a. In this case, various treatment conditions related to the addition of desert hydrogen (HBr) gas were studied. These studies have focused on determining the protection mechanism of the 〇DL sidewall and establishing a process to control the critical dimension (CD) during etching. Examples of such processing q conditions may include the flow rate of HBr, the etching time, the type of etching gas, the bias power applied to the substrate, and the composition ratio thereof. Alternatively, several control methods can be used during the plasma etch process of the present invention to provide a high resolution (precise) pattern having a predetermined critical dimension (CD) on the cerium (Si) substrate 12. Examples of such control methods may include feedforward control methods, feedforward control methods, and dynamic (in-situ) control methods. In the following, each of the above control methods will be explained separately in detail. In an embodiment, feedforward processing control is utilized to obtain a pattern having a predetermined critical dimension (CD). In this embodiment, the line width or critical dimension (CD) of the photoresist pattern 16c is first measured using any commercially available germanium device. An integrated metrology (IM; integrated metrology) device having an optical measuring instrument such as a scatterometer can be employed. As will be further explained below, in some embodiments, a line width (CD) measuring device is integrated into a coating and developing device in which the potential or post-development CD value of the exposed photoresist is tied to The substrate is measured before being transferred to the etching apparatus for subsequent etching processing. In other embodiments, the CD measuring system is performed in an IM apparatus integrated with the etching apparatus before starting the actual etching process. In another embodiment, the 201108324 CD$ is measured by an independent measurement system rather than an IM machine. The line width or CD amount ride will be described in more detail below. After the line width or critical dimension (CD) of the pattern, the _resist pattern 2 is determined by whether the t-size (CD) meets its target value (4). When the critical dimension (CD) of the rail pattern 16c does not meet the desired target value, first determine the flow rate of the remnant gas and the condition of the setting conditions in the semiconductor substrate. Subsequent etching treatment is performed on the si^ layer 16b or the ODL layer 16a. In another embodiment, the feedthrough processing control is utilized to obtain a pattern of critical dimension (4). In this alternative embodiment, whether the target size is the desired value of the critical dimension (4) of the line width or critical dimension pattern 16a of the Si-ARC pattern 16b or the 〇DL layer. when. When the DL pattern 16a (the size of the Si_ARc pattern called CD) does not meet the desired target value, it is determined to appropriately set the condition with the electric charge m flow rate and the type. The mosquito condition is transmitted to the money county, and then In addition, the semi-conductive plate adjusts the set bars 1 to provide a predetermined critical dimension (CD) of the hard material pattern, such as a predetermined critical dimension of the SiN hard mask pattern 14, the 〇 DL pattern pattern 16b, and the photoresist pattern 16c of the bonding substrate. (cD). In another example, dynamic (in-situ) processing control can be used to obtain a fixed f-boundary size. In this implementation, the 0DL pattern 16a or _ is first tested in the remaining j. The line width of the mask pattern ^1 size (CD)' and the appropriate setting conditions of the 201108324 related to the flow and type of the plasma gas in the 0DL layer 16a or the SiN layer 14 during the plasma remnant geography In the following, the cake engraving device and the line width or CD measuring device will be explained in detail respectively. Etching device: Fig. 3 shows an overview of an embodiment of the plasma processing device 3, as shown in the figure, plasma processing The device 30 includes a processing chamber 120, a radiation slot plate 300, a substrate support 140, and a dielectric window The process chamber 120 may comprise

位於基板支撐件14〇下方的底部17及自底部以周圍向上 延伸的圓柱形側壁18。處理室12〇的上側為開口端。介電 窗160係與基板支撐件14〇呈對向且藉由〇形環2〇而密封 至處理室120的上側。電漿處理裝置3〇更包含圖中未顯示 的控制器以控制裝置3〇的處理條件及整體操作。 外部微波產生器15係藉由共軸波導24及慢波板28來 將預定頻率如2·45 GHz的微波功率供給至放射線狹孔板 300。共軸波導24可包含中央導體25及周圍導體26。接著 微波功率雜由設置在放射祕孔板上的複數狹孔29 至介電窗16〇。來自微波產生器15的微波會在介 體：f 下方產生電場，而使得處理室120内的電漿氣 的凹口 氣(罐發。設置在介電窗⑽之内側上 凹W 27此致使處理室12〇内有效地產生 電連37係藉由匹配單元38與電源電㈣而 定頻率如2611 件MG °外部高頻電源37係產生具有預 利至基板之離子扁Γ此RF_系用以控制被 ϋ A 子月匕置〇匹配單元38係使RF雷谓37的阳 抗與負載阻抗如處理室12〇 電源37的阻 Ή且抗相匹配。靜電夹頭41係 13 201108324 設置在基板支撐件140的上表面上，並籍由Dc電源奶 利用靜電吸附能量來支撐基板。 而 電漿處理裝置30更包含反應氣體供應部13。圖3中 顯不了反應氣體供應部13的放大圖。如圖中所示，反應1、 體，給部13可包含介電窗16〇内的基部注射器61，基= 射器61係相較於介電胃⑽的下表面63而位於向‘二 ^處。反應氣體供應部13更包含f穿介職⑽之厚 向以支撐基部注射器61的基部支撐件6 又方 基部注射器61的平面圖。如圖中 +亦肩不了 嗖詈力.…w 所不’複數供給孔66係 Λ 呈對向的平坦壁表面67上。複 in縣面67的巾央紅放餘方式排列。 干f應乳脱么、應部13更包含氣體導管68。如圖3中所 及介ΪΪ導^68分別自共軸波導24、放射線狹孔板300 供庫^⑽貝穿中央導體25而到達複數供應孔66。氣體 =統72係連接至形成在中央導體25之上端處的氣體 孔69。氣體供應系統72可包含開姻％及流量控制 裔71如質量流控制器。 管δΛ’可藉由設置在圓柱形側壁18上的兩個附加氣體導 體為電H氣體供應至處理室i2G中。應注意，反應氣 氣體及材料氣體巾的至少其卜1。藉由調 室12=導官68與89所供應的反應氣體流量，可在處理 主U〇中達到材料氣體的最佳解離。 線寬或CD量測裝置： 使用線寬4測裝置來量職計算光_案⑹、含石夕抗 201108324 反射塗佈層（Si-ARC)l6b、有機介電層（〇琴如或氮化石夕 層14的線寬。此裝置可為任何獨立麵、整合至塗佈 =影裝置者(稱為IM’整合度量衡儀）或整合至敍刻裝置 ^線寬《翁置被建構在塗佈顯影裝置中時，則在處 ΟA bottom portion 17 located below the substrate support member 14b and a cylindrical side wall 18 extending upwardly from the bottom portion. The upper side of the processing chamber 12A is an open end. The dielectric window 160 is opposed to the substrate support 14A and sealed to the upper side of the processing chamber 120 by a ring-shaped ring 2''. The plasma processing apparatus 3 further includes a controller not shown to control the processing conditions and overall operation of the apparatus 3A. The external microwave generator 15 supplies microwave power of a predetermined frequency such as 2·45 GHz to the radiation slot plate 300 by the coaxial waveguide 24 and the slow wave plate 28. The coaxial waveguide 24 can include a center conductor 25 and a surrounding conductor 26. The microwave power is then mixed into a plurality of slots 29 to the dielectric window 16 that are disposed on the radiopaque plate. The microwave from the microwave generator 15 generates an electric field under the mediator:f, so that the notch gas of the plasma gas in the process chamber 120 is formed. The cavity is disposed on the inner side of the dielectric window (10). The 12-inch effective generation of the electrical connection 37 is controlled by the matching unit 38 and the power supply (4). The frequency is as high as 2611 pieces. The external high-frequency power supply 37 produces an ion ridge with a pre-benefit to the substrate. This RF_ is used to control The ϋ A 匕 匕 〇 〇 〇 38 38 38 38 38 RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF RF The upper surface of the 140 is supported by the electrostatic energy of the Dc power source to support the substrate. The plasma processing apparatus 30 further includes a reaction gas supply portion 13. An enlarged view of the reaction gas supply portion 13 is shown in Fig. 3. As shown therein, the reaction 1, body, and donor portion 13 can include a base injector 61 within the dielectric window 16A, which is located at a 'two' position relative to the lower surface 63 of the dielectric stomach (10). The reaction gas supply unit 13 further includes a thicker direction of the wearer (10) to support the base. The base support 6 of the syringe 61 is also a plan view of the base syringe 61. As shown in the figure, the shoulder is not shouldered. ...w is not the 'multiple supply hole 66' on the opposite flat wall surface 67. The surface of the surface 67 is arranged in a red-retaining manner. The dry portion should be removed, and the portion 13 further includes a gas conduit 68. As shown in Fig. 3, the guiding guide 68 is respectively derived from the coaxial waveguide 24 and the radiation slit plate 300. The supply reservoir (10) passes through the central conductor 25 and reaches the plurality of supply apertures 66. The gas system 72 is connected to a gas aperture 69 formed at the upper end of the central conductor 25. The gas supply system 72 can include a % of the marriage and a flow control family of 71. For example, the mass flow controller. The tube δΛ' can be supplied to the processing chamber i2G by the two additional gas conductors disposed on the cylindrical side wall 18. It should be noted that at least the reactant gas and the material gas towel are 1. The optimum dissociation of the material gas can be achieved in the main U 处理 by the chamber 12 = the flow of the reaction gas supplied by the guides 68 and 89. Line width or CD measuring device: Using a line width 4 measuring device Quantitative calculation of light _ case (6), including Shi Xi anti-201108324 reflective coating layer (Si -ARC) l6b, organic dielectric layer (line width of the cymbal or nitriding layer 14). This device can be any independent surface, integrated into the coating = shadow device (called IM' integrated metrics) or integrated To the sculpt device ^ line width "When the Weng set is constructed in the coating and developing device, it is in the middle

Γΐί立即量測㈣影後的光阻潛在影像或光阻線寬。當 二宽，測裝置猶構在_裝置中時，則能在_前及餘 2量測出線寬。另—方面’可利用獨立量測系統來進行 ^或CD量測°在下文中，將單獨勒解釋上述的每- 貝施例。 U)整合至塗佈顯影裝置中的線寬量測裝置： ，4顯示了被整合至光阻形成裝置.A之整體結構中 裝置慨A的—實施例概圖。為了便利性而簡 ==形成裝置4〇·Α的整體結構。如圖4中所示，光阻 舒n .I的整體結構可包含㈣顯影裝置侧—Α及曝 ^置。塗佈顯影裝置徽a係連接至 曝光裂置亦可接連著連接至姓刻裝置440 光阻形成裝置4G_A可包含線寬量測裝置術_人、複數 二單戈顯影單元)4〇“及兩基板傳送單元 ，結構中於相鄰部件間載送基板的功：成又單= 結構_向上/向下及前/後移動，且;繞著= 在進行顯f彡處理後量測光阻圖㈣線寬或臨界尺寸 15 201108324 (C D)。在τ —個步驟中，根據量測_ 設定條件如蝕刻氣體的流量。接著 、田、 脾兮此力典从里接者自塗佈顯影裝置400-A 將〜適虽的§又疋條件前饋至餘刻裝置44〇。在某 中’可自塗佈顯影裝置娜A將量测到的原始數樹專 =物Γ以處理而獲得適當的_二= 測到的原始數據來計算適當的設定 ^ = 係將不同的處理條件錯存在電腦祕的記,Γ體^庫 (2)整合至蝕刻裝置中的線寬量測裝置： 其顯示了光阻形成裝置.Β之整體結構的 ^施例概圖。如此圖中所示，光阻形成裝置40-Β的整體 :: : Α之結構之處在於，線寬量測裝置4〇2·Β係整 族置一440-Β而非整合至塗佈顯影裝置中。在 例中，二種控制方法：⑴前饋控制方法；⑺後饋控 制方^及(3)動態(原位)控制方法皆可用來控制基板圖案。 歧署tiff制方法中，在將_影後的基板傳送至飯刻 ^ 後，在蝕刻裝置44〇-B中藉由線寬量測裝置 402/來量測光阻圖案的線寬’並根據量測到的線寬來計算 適虽的設定條件如钱刻氣體的流量。接著，在㈣處理用 的蝕刻裝置440-B中調整適當的設定條件。 在後镇控制方法中，藉由線寬量測農置402-B來量測 蚀，後的圖案線寬’並根據該量測到的線寬來計算適當的 σ又疋，件如餘刻氣體的流量。因此’可在適當的設定條件 下進行ϋ刻處理而最佳化另―片基板的姓刻處理。 16 201108324 旦、、目以力態(原位)控制方法中，藉由線寬量測裝置402-B來 者的後的圖案線寬，並在蝕刻處理期間動態地調整適 二、ι設定條件如蝕刻氣體的流量。應瞭解，在上述的所有 j方法中’簡由圖5中未顯示的處理條件資料庫而利 次极川的原始數據來計异適當的言史定條件，此處理條件 ^庫係將許多不_處理條件·在電腦442-B的記憶 體中。Γΐί Immediately measure (4) the potential image or photoresist line width of the photoresist after the shadow. When the width is two, the measuring device is still in the _ device, and the line width can be measured before and after the _. Another aspect can be performed using an independent measurement system or a CD measurement. In the following, each of the above-described examples will be explained. U) A line width measuring device integrated into the coating developing device: 4 shows an overview of the device integrated into the overall structure of the photoresist forming device A. For the sake of convenience, the simple structure of the device 4〇·Α is formed. As shown in Fig. 4, the overall structure of the photoresist can include (4) developing device side - Α and exposure. The coating and developing device emblem a is connected to the exposure slit, and may be connected to the last name device 440. The photoresist forming device 4G_A may include a line width measuring device _ human, a plurality of two single s developing units. Two substrate transfer units, the work of carrying the substrate between adjacent components in the structure: into a single = structure _ up / down and front / back movement, and; around = after measuring the photoresist Figure (4) Line width or critical dimension 15 201108324 (CD). In the τ-step, according to the measurement _ set conditions such as the flow rate of the etching gas. Then, Tian, spleen, this force from the inside of the self-coating development device 400-A will feed the appropriate § and 疋 conditions to the remaining device 44〇. In a certain 'self-coating and developing device Na, the raw number tree will be measured to obtain appropriate _ 2 = the measured raw data to calculate the appropriate settings ^ = the different processing conditions are mis-existing in the computer secrets, the body ^ library (2) integrated into the etching device in the line width measuring device: its display A schematic view of the overall structure of the photoresist forming device. As shown in the figure, the photoresist forming device 40-Β Overall:: : The structure of the Α is that the line width measuring device 4〇2·Β is a whole family of 440-Β instead of being integrated into the coating developing device. In the example, two control methods: (1) before The feed control method; (7) the feedforward control method and (3) the dynamic (in situ) control method can be used to control the substrate pattern. In the method of dissimilar tiff, after the substrate after the shadow is transferred to the meal, In the etching device 44A-B, the line width measuring device 402/ is used to measure the line width ' of the photoresist pattern and calculate the appropriate setting conditions such as the flow rate of the gas in accordance with the measured line width. Then, In the (4) etching device 440-B for processing, an appropriate setting condition is adjusted. In the post-town control method, the etched layer is measured by the line width measurement, and the pattern width is 'after The measured line width is used to calculate the appropriate σ and 疋, such as the flow rate of the residual gas. Therefore, the engraving process can be performed under appropriate setting conditions to optimize the surname processing of the other substrate. 16 201108324 In the force state (in situ) control method, the line width of the pattern after the line width measuring device 402-B is followed, And dynamically adjust the appropriate conditions, such as the flow rate of the etching gas during the etching process. It should be understood that in all the above j methods, the raw materials of the processing conditions not shown in FIG. The data is used to calculate the appropriate conditions of the history. This processing condition is a lot of non-processing conditions in the memory of the computer 442-B.

根據本發明的—態樣，可能需要將複數層結構連續地 1 °在此實施例中’首先量測第—經圖案化層的線寬。 耆’針對形成在第-層下方的第二層設定適當的餘刻條 件。在下一步驟中，利用最佳化的蝕刻 測第二經圖案化層的線寬，接著針對二―:定 =虽的㈣條件。此處理可持續地針對複數層結構中的複 層。在此方式下’最終地經敍刻後圖案的線寬(cd值)會 接近期望的目標值。可藉由設置在處理室外部的im模组^ 设置在處理室中的線寬量測裝置來進行線寬(CD值)的量 測。利用设置在每一處理室處的此線寬量測裝置，可在主 韻刻_)處理後量測CD’然後可針對過钮刻(〇E)處理調整 較佳的姓刻條件以精離地控制CD。 例士圖1中所示的目標結構10可被視為是複數層結 ，。為了根據上-麟所述的纽來對每—麟進行 理可參考圖6的結構來瞭解下列處理：第-，針對複 數個ΗΒΓ/〇2比例(條件，如圖12中所示)獲得每單位時間的 CD偏移值（Δα；))並儲存成表格。第二，量測&•胤膜層 17 201108324 °在第三步驟中’計算所量測之Si-ARC 線見(〇)S)與線寬目標值(cm)間的差值(cDt_c叫。最後， 根據差值（CDt-CDS)及咖層之祕 罗=比例的最佳流量’其中。见層之過㈣(時)間“ $^^=前便獲得。接著，在最佳的刪〇2流量 ^ &方式下’能獲得形狀接近目標線寬(CDt) 的取終〇DL圖案恤。應注意，當利用光阻遮罩16c來钱 ^ 虹層16b B守’係根據上述的處理來最佳化cf4/chf3 的流量比並在此最佳化的CF4/CHF3流量比下進行關。亦 在某些银刻條件(例如餘刻氣體流量)下，藉由蚀刻時間來 调正CD值。X ’藉由調整餘刻氣體的流量比(流量)及姓刻 時間兩者可改變CD值。 當目標CDt值與所量測之Si-ARC層16b上之光阻圖 案之線寬間的差值超過預定閾值（即為修正能力；trim capability)時，可對流量比（在此特定實例中為ηΒγ/〇2及 CIVCHF3的比）進行最佳化，以在完成Si_ARc及〇dl層兩 者時皆能獲得目標CDt值。當熟知此項技藝者在開始蝕刻 耵比較所量測之光阻CD與目標CD而預估無法在si ARc 蝕刻處理結束時達到目標值時，可達到預定的閾值量。在 此方式下，在兩連續層Si_ARC與〇DL的蝕刻處理完成時 便可達到線寬的目標值。在此實施例中，考量各種參數如 I虫刻時間及每一個別膜層的蝕刻形狀來決定CF4/CHF3的流 量比例。在此實施例中，係事先提供si_ARC線寬的目標值 及ODL線寬的目標值。 18 201108324 (3)獨立的線寬量測裝置 圖7顯示了光阻形成裝置4〇_c之整體結構的獨立線寬 量測裝置402-C的一實施例概圖。如此圖中所示，光阻形 成裝置40-C的整體結構不同於4〇_A及4〇_B的結構之處在 於，線寬量測裝置402-C並非整合至任何裝置，而是具有 獨立量測裝置的功能。其他元件基本上係與你A的結^相 同。在此實施例中，使用了圖7中並未顯示的基板容器（一 般被稱為FOUP)。可利用例如自動導向載具（AGV ; automated guided vehicle)來將顯影處理後或蝕刻處理後的 每一片基板傳送至該容器，並傳送至線寬量測裝置4〇2_c。 在每一基板中，先量測每一基板的線寬，接著計算適當的 设疋條件。所量測到之CD值及適當的設定條件會被傳送 到蚀刻裝置440。 實驗樣本： 為了評估溴化氫(HBr)在側壁保護機制上的效果，且亦 為了建立控制臨界尺寸(CD)的處理，而製作具有圖1或圖2 〇 中所述之相同目標結構的數個實驗樣本。接著使此些實驗 樣本接受根據本發明的電漿蝕刻處理’其中係於有機介電 層（〇见)的過韻刻（OE)步驟期間將適當量的漠化氫(ΗΒΓ)添 加至氮與氧(NVO2)的混合氛圍中。在下文中將詳細地解 此些評估的結果。 夢考圖8,其顯示了在進行電漿蝕刻處理後兩實驗樣本 之^標結構之每一特定膜層的橫剖面圖。第一實驗樣本的 特徵在於稠密(dense)或套疊(nested)的陣列圖案’而第二實 19 201108324 驗樣本的特徵則在於孤立(isolated)圖案。在圖8的上與下 側为別顯示了兩圖案的橫剖面圖。如圖中所示，橫剖面圖 是在對每一遮罩層進行蝕刻步驟後所擷取。對於兩實驗樣 本而言’此些橫剖面圖的1-5行係分別對應至光阻圖案、 Si-ARC圖案、〇dl主餘刻（ME)圖案、0DL·過触刻（〇E)圖 案及硬遮罩SiN圖案。表I總結了施加至每一遮罩層的蝕 刻條件。 表1 :實驗樣本所使用之蝕刻條件 壓力 n2 〇2 HBr cf4 chf3 MW RF _ ------- 時間 (mTorr) (seem) (seem) (seem) (seem) (seem) (W) (W) (秒） Si-ARC 100 - - - 180 180 2000 300 15 ODL(ME) 10 400 20 - 3000 200 36 ODL(OE) 10 400 4 60 3000 200 — 一 3〇 SiN 70 - - --— 150 170 2000 300 ——— 28 如圖8中所示，臨界尺寸(CD)在Si_ARC及〇DL主蝕 刻（ME)步驟中為減少。藉由在〇DL層的過蝕刻（〇E)步驟期 間將溴化氫(HBr)添加至氮及氧的混合氛圍中，則可 增加稠密及孤立圖案兩者的臨界尺寸。如圖8中所示，在 〇DL過蝕刻（0E)層中稠密陣列圖案的臨界尺寸(cd)約為46 職’但相同層中孤立圖案的臨界尺寸(CD)則約為115邮。 本發明人認為此臨界尺寸的增加係由於薄祕碳(CBr〇層 201108324 的沈積，此薄溴化碳具有保護侧壁不受蝕刻影響的功能。 在進行硬遮罩SiN蝕刻步驟後，稠密圓案的最終臨界 尺寸(CD)為40 nm，而孤立圖案的最終臨界尺寸(CD)則為 119^1^1。修正能力係藉由調整氣體流量條件（氣體比例、總 流量等)來進行蝕刻步驟後，遮罩層的臨界尺寸變厚或變薄 的範圍。圖8顯示了稠密（套疊）圖案與孤立圖案的CD值皆 改變。 Q 接下來要研究每一參數對ODL層之臨界尺寸(CD)的效 果’例如HBr流量、過蝕刻（〇E)步驟的時間相依性、蝕刻 氣體種類與組成比例。為此，在不同的蝕刻條件下形成了 具有稠密（套疊）及孤立圖案的各種實驗樣本。除非另外指 出，否則使用下列I虫刻條件來圖案化每一實驗樣本的〇DL 層·（1)主巍刻（ME)條件為1〇 mTorr的壓力、400 sccm/20 seem的NVO2流量、3 kW的微波功率、200 W的RF功率 及40秒的主银刻（ME)期間；（2)過蝕刻（〇E)條件為i〇 mT〇rr 的壓力、400 sccm/4 sccm的沁/〇2流量、3 kw的微波功率 〇 及200 w的RF功率。 為了評估臨界尺寸(CD)對過蝕刻時間的相依性，製作 了兩組實驗樣本。在每一組中形成有三個具有相同遮罩圖 案的實驗樣本。類似於前述實例，第一組實驗樣本的特徵 在於稠密陣列圖案，而第二組實驗樣本的特徵在於孤立圖 案。在電漿處理裝置30中進行ODL·層的主蝕刻(ME)與過 蝕刻（OE)。用來圖案化〇dl層的主餘刻(ME)與過蝕刻（〇E) 條件係與上述段落所述之條件相同。為了此評估，將HBr 21 201108324 流量設定至60 SCCm 又’在每—組中，在下列的過蝕刻（〇E) 時間下圖案化三個實驗樣本：〇、2〇及40秒。 圖9係顯示實驗樣本的橫剖面圖及其臨界尺寸的 過蝕刻（OE)時間函數。如此圖中所示，藉由延長過蝕刻（〇E) 時間可使臨界尺寸（CD)更大。本發明人認為其主要是因為 過钱刻（OE)時間的延長會增加〇DL圖帛上的反應性副產物 如溴化碳(CBrx)之沈積。 接下來參考圖1 〇，其係顯示實驗樣本的橫剖面圖及其 臨界尺寸(CD)的版流量函數。_於前面的實施例而形 成有兩組實驗樣本，每—組樣本係具有三個具有類似圖案 的樣本。第一組實驗樣本的特徵在於稠密（套疊）陣列圖案， 而第二組實驗樣本的特徵則在於孤立圖案。在電漿處理裝 ，30中進<丁 0DL層的主韻刻(ME)與過姓刻(沉）。用來圖 术化ODL層的主韻刻（ME)與過韻刻（〇E)條件係上述段落 所，之條件相同。為了此評估’將過勒刻（⑽)時間條件全 部没疋在20秒。又，立^ ,, 一又在母一組中，在下列的ΗΒι·流量條件 刀’圖案化每—組的三個實驗樣本：〇8識、6〇3隨及 120 seem 〇 而祕!圖1〇中所不，臨界尺寸(CD)會隨著HBr流量的增加 的:二ΐ發，人認為用來控制0DL層之臨界尺寸(CD) ，舰/丨知猎由在氮與氧(N2/〇2)的混合氛圍中添加漠化 ί Γηη貝^(Η)會還原胍層之表面中的綱。另言 右古讲人旦认層擷取了氧(〇)原子。結果便會產生表面中具 3里、有機介電層（〇DL)。因此，碳-碳鍵便會增加， 22 201108324 該碳-碳鍵結能量使有機介電層（ODL)更加剛硬e 〇DL層的 剛性具有侧壁保護的功能，故能避免韻刻。 另一方面，本發明人認為ODL層的高碳含量亦會增加 ODL圖案表面附近的漠-礙鍵。亦可說，沈積在〇dl圖案 上的溴化碳(CBrx)薄層具有侧壁保護的功能，故能避免韻 刻。错由增加、/臭化氣(HBr)的流量，Br物種的增加會使淳化 碳(CBrx)的沈積增加’因此導致了 〇dl之臨界尺寸(CD)的 增加。另一方面，藉由減少HBr流量，則CD的變寬會減 小。在此方式下，可達到獲得預定臨界尺寸(CD)值的更佳 控制能力。 ^ 〇DL層的臨界尺寸(CD)可利用其他種類的蝕刻氣體如 氯氣(C12)來加以控制。為了評估另一種蝕刻氣體如何影響 臨界尺寸(CD)的控制能力，而製作了兩組實驗樣本。在每 二組中形成有具有相同遮罩圖案的兩個實驗樣本。類似於 剞面的只％例，第一組實驗樣本的特徵在於稠密陣列圊 案，而第二組實驗樣本的特徵則在於孤立圖案。在每一組 中，第一與第二實驗樣本係先在與上述段落所述之相同的 蝕刻條件下進行主蝕刻（ME)步驟。接著每一組的第一實驗 ，本會進行在氮與氧(N2/〇2)混合物中添加了溴化氫(HBr) ，體，過__)步驟。而每—組的第二實驗樣本則會進 =在亂與氧(N2/〇2)混合物中添加了氣(cl2)的過茲刻(〇e)步 為了此卉估，將UBr及（¾兩者的流量皆設定至6〇 Cm又，在每一貫驗組中將過餘刻（OE)時間條件設定至 23 201108324 圖11顯示了各種蝕刻氣體種類之實驗樣本的橫剖面 圖如此圖中所示，對於兩種蝕刻氣體種類(HBr及CU)而 3，ODL層在過蝕刻步驟中的臨界尺寸(CD)相較於主 ^刻_)步驟中的臨界尺寸(CD)為增加。雖然在氣氣(Ch) 情況下控制ODL層臨界尺寸(CD)的真實機制不明，但卻獲 f工類似臨界尺寸仰)增加的結果。然而，纟此實施例中 觀察到了一些其他的不利效果。例如，下方的硬遮罩氮化 矽（SiN)層會被削掉一些而導致其遮罩高度減少（且有斜邊 的形狀）。 ’、 在另一貫施例中，藉由在氬與氧(Ar/〇2)的混合氛圍中 添加溴化氫(HBr)則能達到期望的臨界尺寸(CD)。在此另一 κ知例中利用氬氧(Ar/HBr/〇2)系列來進行〇dl主蚀刻 (M=)步驟°類似於前面的實施例係形成有兩組實驗樣本， t、組中包含了具有相同圖案的三個實驗樣本。第一組實 ，樣本㈣徵在於稠密陣列圖案’而第二組實驗樣本的特 徵則在於孤立圖案。更具體而言，在此實驗中使用了具有 圖1所示結構之基板的一小塊(基板切片，亦稱為矽阻障片 (coupon))。虽進行&_ARC與〇DL主蝕刻（me)時，將矽阻 障片黏附至完全受光阻塗覆的—基板上。當進行皿過姓 刻_時，則將雜障片黏附至完全受氮化邦叫覆蓋的 另-基板上:表ΙΪ總結了 Si_ARC與qDl層處的蚀刻條件 本所使用之蝕刻條件 MW RF —------| 時間 (W) (W) (秒）In accordance with the present invention, it may be desirable to continuously measure the line width of the first patterned layer by successively 1 ° in this embodiment.耆' sets an appropriate residual condition for the second layer formed below the first layer. In the next step, the line width of the second patterned layer is measured using an optimized etch, followed by a (4) condition for the second: This process is sustainable for complex layers in a complex layer structure. In this mode, the line width (cd value) of the pattern after the final elaboration will approach the desired target value. The measurement of the line width (CD value) can be performed by the line width measuring device provided in the processing chamber by the im module provided outside the processing chamber. By using the line width measuring device disposed at each processing chamber, the CD can be measured after the main rhyme processing, and then the better surname condition can be adjusted for the over-cut (〇E) processing to fine-tune Control the CD. The target structure 10 shown in FIG. 1 can be regarded as a complex layer. In order to refer to the structure of Fig. 6 according to the neon of the above-mentioned Lin-Lin, the following processing can be understood: -, for each of the ΗΒΓ/〇2 ratios (conditions, as shown in Fig. 12) The CD offset value (Δα;) per unit time is stored in a table. Second, the measurement & • 胤 film layer 17 201108324 ° in the third step 'calculate the measured Si-ARC line see (〇) S) and the line width target value (cm) difference (cDt_c called Finally, according to the difference (CDt-CDS) and the secret of the coffee layer = the optimal flow rate of the ratio 'where. See the layer before (four) (time) between the "$^^= before getting. Then, at the best Delete 2 flow ^ & mode to get the final 〇 DL pattern shirt with the shape close to the target line width (CDt). It should be noted that when using the photoresist mask 16c to the money ^ rainbow layer 16b B keep 'system according to the above The process is optimized to optimize the flow ratio of cf4/chf3 and is controlled at the optimized CF4/CHF3 flow ratio. Also in some silver engraving conditions (such as residual gas flow), the etching time is used to adjust Positive CD value. X ' can change the CD value by adjusting the flow ratio (flow rate) of the residual gas and the time of the last name. When the target CDt value is compared with the line of the photoresist pattern on the measured Si-ARC layer 16b When the difference between the widths exceeds a predetermined threshold (ie, trim capability), the flow ratio (the ratio of ηΒγ/〇2 and CIVCHF3 in this particular example) can be optimized to The target CDt value can be obtained when both the Si_ARc and 〇dl layers are completed. It is estimated that the skilled person can achieve the target at the end of the si ARc etching process after starting the etching and comparing the measured photoresist CD with the target CD. When the value is reached, a predetermined threshold amount can be achieved. In this manner, the target value of the line width can be reached when the etching process of the two successive layers Si_ARC and 〇DL is completed. In this embodiment, various parameters such as I insect engraving are considered. The time and the etching shape of each individual film layer determine the flow ratio of CF4/CHF3. In this embodiment, the target value of the si_ARC line width and the target value of the ODL line width are provided in advance. 18 201108324 (3) Independent line Wide Measuring Device FIG. 7 shows an overview of an embodiment of the independent line width measuring device 402-C of the overall structure of the photoresist forming device 4〇_c. As shown in this figure, the photoresist forming device 40-C The overall structure is different from that of 4〇_A and 4〇_B in that the line width measuring device 402-C is not integrated into any device, but has the function of an independent measuring device. Other components are basically with you. The junction of A is the same. In this embodiment, Figure 7 is used. A substrate container (generally referred to as a FOUP) is not shown. Each substrate after development processing or etching may be transferred to the container by, for example, an automated guided vehicle (AGV) and transferred to the container. Line width measuring device 4〇2_c. In each substrate, the line width of each substrate is measured first, and then the appropriate setting conditions are calculated. The measured CD value and appropriate setting conditions are transmitted to the etching. Device 440. Experimental sample: In order to evaluate the effect of hydrogen bromide (HBr) on the sidewall protection mechanism, and also to establish a control critical dimension (CD) process, the number of the same target structure as described in Figure 1 or Figure 2 is produced. Experimental samples. The experimental samples are then subjected to a plasma etching process according to the present invention, wherein an appropriate amount of desert hydrogen (ΗΒΓ) is added to the nitrogen during the over-etching (OE) step of the organic dielectric layer (see 〇). Oxygen (NVO2) in a mixed atmosphere. The results of these evaluations are explained in detail below. Dream Figure 8, which shows a cross-sectional view of each specific film layer of the two experimental samples after the plasma etching process. The first experimental sample is characterized by a dense or nested array pattern and the second sample is characterized by an isolated pattern. A cross-sectional view of the two patterns is shown on the upper and lower sides of Fig. 8. As shown in the figure, the cross-sectional view is taken after the etching step for each mask layer. For the two experimental samples, the 1-5 rows of the cross-sectional views correspond to the resist pattern, the Si-ARC pattern, the 〇 dl main-detail (ME) pattern, and the 0DL· over-touch (〇E) pattern. And a hard mask SiN pattern. Table I summarizes the etching conditions applied to each of the mask layers. Table 1: Etching conditions used for the experimental sample Pressure n2 〇2 HBr cf4 chf3 MW RF _ ------- Time (mTorr) (seem) (seem) (seem) (seem) (seem) (W) ( W) (seconds) Si-ARC 100 - - - 180 180 2000 300 15 ODL(ME) 10 400 20 - 3000 200 36 ODL(OE) 10 400 4 60 3000 200 — A 3-inch SiN 70 - - --- 150 170 2000 300 ——— 28 As shown in Figure 8, the critical dimension (CD) is reduced in the Si_ARC and 〇DL main etch (ME) steps. By adding hydrogen bromide (HBr) to the mixed atmosphere of nitrogen and oxygen during the overetch (〇E) step of the 〇DL layer, the critical dimensions of both dense and isolated patterns can be increased. As shown in Fig. 8, the critical dimension (cd) of the dense array pattern in the 〇DL overetch (0E) layer is about 46 Å but the critical dimension (CD) of the isolated pattern in the same layer is about 115 Å. The inventors believe that this increase in critical dimension is due to the deposition of a thin carbon (CBr 〇 layer 201108324, which has the function of protecting the sidewall from etching). After the hard mask SiN etching step, the dense circle The final critical dimension (CD) is 40 nm, while the final critical dimension (CD) of the isolated pattern is 119^1^1. The correction capability is etched by adjusting the gas flow conditions (gas ratio, total flow, etc.). After the step, the critical dimension of the mask layer becomes thicker or thinner. Figure 8 shows that the CD values of the dense (stacked) pattern and the isolated pattern are changed. Q Next, the critical dimension of each parameter to the ODL layer should be studied. (CD) effects such as HBr flow rate, time dependence of the over-etching (〇E) step, etching gas type and composition ratio. For this reason, dense (stacked) and isolated patterns are formed under different etching conditions. Various experimental samples. Unless otherwise indicated, the following worm conditions were used to pattern the 〇DL layer of each experimental sample. (1) The main engraving (ME) condition was 1 〇 mTorr, 400 sccm/20 seem NVO2 flow, 3 kW Microwave power, 200 W RF power and 40 seconds of main silver (ME) period; (2) Over-etching (〇E) conditions are i〇mT〇rr pressure, 400 sccm/4 sccm 沁/〇2 flow 3 kw microwave power 〇 and 200 w RF power. To evaluate the critical dimension (CD) dependence on overetch time, two sets of experimental samples were made. Three in each group were formed with the same mask pattern. Experimental Samples. Similar to the previous examples, the first set of experimental samples is characterized by a dense array pattern, while the second set of experimental samples is characterized by an isolated pattern. The main etching (ME) of the ODL·layer is performed in the plasma processing apparatus 30. Overetch (OE). The conditions of the main residual (ME) and overetch (〇E) used to pattern the 〇dl layer are the same as those described in the previous paragraph. For this evaluation, the HBr 21 201108324 flow rate is set to 60. SCCm also 'in each group, three experimental samples were patterned under the following overetch (〇E) time: 〇, 2〇 and 40 seconds. Figure 9 shows the cross-sectional view of the experimental sample and its critical dimensions. Over-etching (OE) time function. As shown in this figure, by extending the etch The engraving (〇E) time can make the critical dimension (CD) larger. The inventors believe that it is mainly because the extension of the OE time increases the reactive by-products such as bromide on the 〇DL map ( Next, reference is made to Figure 1 〇, which shows a cross-sectional view of the experimental sample and its critical dimension (CD) plate flow function. _In the previous example, two sets of experimental samples were formed, each group The sample has three samples with similar patterns. The first set of experimental samples is characterized by a dense (stacked) array pattern, while the second set of experimental samples is characterized by an isolated pattern. In the plasma processing equipment, 30 into the "Ding 0DL layer of the main rhyme (ME) and the surname (sink). The conditions of the main rhyme (ME) and the rhyme engraving (〇E) used to map the ODL layer are the same as those in the above paragraph. For this evaluation, the time conditions for the engraving ((10)) will not be met for 20 seconds. Also, stand ^,, and in the parent group, in the following ΗΒι·flow condition knife's patterning each of the three experimental samples: 〇8, 6〇3, and 120 seem 〇 秘! In 1〇, the critical dimension (CD) will increase with the increase of HBr flow: the second burst, which is considered to be used to control the critical dimension (CD) of the 0DL layer, and the ship/negative hunting is performed by nitrogen and oxygen (N2). /〇2) Adding desertification ί Γηη贝^(Η) in the mixed atmosphere will restore the outline of the surface of the enamel layer. In other words, in the ancient times, the human layer recognized the oxygen (〇) atom. As a result, there is a 3-inch, organic dielectric layer (〇DL) in the surface. Therefore, the carbon-carbon bond will increase, 22 201108324 The carbon-carbon bond energy makes the organic dielectric layer (ODL) more rigid. The rigidity of the 〇 DL layer has the function of sidewall protection, so that rhyme can be avoided. On the other hand, the inventors believe that the high carbon content of the ODL layer also increases the moisture barrier near the surface of the ODL pattern. It can also be said that the thin layer of carbon bromide (CBrx) deposited on the 〇dl pattern has a side wall protection function, so that rhyme can be avoided. By increasing the flow rate of /, stinky gas (HBr), an increase in Br species increases the deposition of deuterated carbon (CBrx), thus resulting in an increase in the critical dimension (CD) of 〇dl. On the other hand, by reducing the HBr flow rate, the CD widening is reduced. In this manner, better control of the predetermined critical dimension (CD) value can be achieved. ^ The critical dimension (CD) of the 〇DL layer can be controlled by other kinds of etching gases such as chlorine (C12). In order to evaluate how another etching gas affects the critical dimension (CD) control capability, two sets of experimental samples were made. Two experimental samples having the same mask pattern were formed in each of the two groups. Similar to the only example of the facet, the first set of experimental samples is characterized by a dense array of artifacts, while the second set of experimental samples is characterized by an isolated pattern. In each set, the first and second experimental samples were subjected to a main etch (ME) step under the same etching conditions as described in the above paragraph. Following the first experiment in each group, a hydrogen bromide (HBr), bulk, __) step was added to the nitrogen and oxygen (N2/〇2) mixture. The second experimental sample of each group will be added to the mixture of gas (cl2) in the mixture of oxygen and oxygen (N2/〇2). For this evaluation, UBr and (3⁄4) will be used. The flow rate of both is set to 6〇Cm, and the excess OE time condition is set to 23 201108324 in each consistent inspection group. Figure 11 shows the cross-sectional view of the experimental sample of various etching gas types. It is shown that for the two etching gas species (HBr and CU), 3, the critical dimension (CD) of the ODL layer in the overetching step is increased compared to the critical dimension (CD) in the main etching step. Although the true mechanism for controlling the critical dimension (CD) of the ODL layer in the case of gas (Ch) is unknown, it is the result of an increase in the similar critical dimension. However, some other adverse effects have been observed in this embodiment. For example, the underlying hard mask nitride (SiN) layer will be cut off resulting in a reduced mask height (and a beveled shape). In another embodiment, the desired critical dimension (CD) can be achieved by adding hydrogen bromide (HBr) in a mixed atmosphere of argon and oxygen (Ar/〇2). In this another example, an argon-oxygen (Ar/HBr/〇2) series is used for the 〇dl main etching (M=) step. Similar to the previous embodiment, two sets of experimental samples are formed, t, in the group. Three experimental samples with the same pattern were included. The first set of real, sample (d) is characterized by a dense array pattern' and the second set of experimental samples is characterized by an isolated pattern. More specifically, a small piece (substrate slice, also referred to as a coupon) having a substrate having the structure shown in Fig. 1 was used in this experiment. While the &_ARC and 〇DL main etch (me) were performed, the bismuth barrier film was adhered to the substrate completely coated with the photoresist. When the dish is pasted, the mask is adhered to the other substrate completely covered by the nitride: the surface summarizes the etching conditions at the Si_ARC and qDl layers. The etching conditions used by the MW RF — ------| Time (W) (W) (seconds)

Ar (seem) 24 201108324Ar (seem) 24 201108324

Si-ARC 100 - - 150 210 2000 300 ODL(ME) 10 100 150 50 — - 1500 200 在進行了 Si-ARC與〇DL主蝕刻（ME)步驟後，利用電 漿處理裝置30來進行過蝕刻（0E)步驟。每一組的第―、第 二及第三實驗樣本的過蝕刻（〇 E)步驟係分別在下列條件下 進行：Ar/HBr/02 流量為 1〇〇/15〇/2〇、100/150/10 及 1〇〇/i5〇/5 ◎ seem ° 接下來參考圖12，其係顯示實驗樣本的橫剖面圖及其 臨界尺寸（CD)的HBr/〇2比例函數。如此圖中所示，〇dl 層的臨界尺寸(CD)會隨著HBr/02比例的增加而增加。換言 之’當氧(〇2)流量減少時則ODL層的臨界尺寸(CD)會增加。 在^知的電聚独刻處理中一直有一個問題：在進行餘 刻處理後總存在著圖案形狀的某種程度變異。為了避免圖 案形狀的變異’考慮了完成蝕刻後的圖案尺寸變異而設計 出一種微影用途的遮罩。然而，此解決方案仍無法完全避 〇 免上述的問題。 本發明的電漿蝕刻處理針對上述問題而提供—種解決 方案。藉由在凡/〇2或Ar/02的混合物中添加漠化氫(jjBr)， 本發明人認為氫(Η)會還原odl層表面中的氧(〇)。換言 之’會自ODL層擷取氧(0)原子。結果便能產生表面中具 有高碳含量的有機介電層（ODL)。因此碳-碳鍵便會增加， 該碳-碳鍵能使有機介電層（ODL)更加剛硬。ODL層的剛性 具有側壁保護的功能，故能避免蝕刻。 25 201108324 此外’本發明人亦認為ODL層的高碳含量會增加ODL 圖案表面附近的複數〉臭_碳鍵。因此會有薄薄的一層漠化碳 (CBrx)沈積於〇DL圖案上以作為側壁保護。因此，〇DL的 側向餘刻會受到抑制。又，藉由增加漠化氫(HBr)流量，由 於ΒΓ物種增加而增加了溴化石炭(CBrx)的沈積，此會增加 〇DL的臨界尺寸(CD)。另-方面，藉由減少HBr流量，則 CD的變寬會減小。在此方式下，藉由選擇適當的脸流量 則可達到獲得預定臨界尺寸(CD)值的較佳控制能力。 為了評估圖案形狀的變異及其臨界尺寸均勻度，製作 〇 了兩組κ驗樣本’每一組皆具有不同的圖案(稠密圖案（亦稱 為套疊圖案)及孤立圖案）。表m總結了在實驗樣本的每一 遮罩層中所用的蝕刻條件。 樣本所用的姓刻條件Si-ARC 100 - - 150 210 2000 300 ODL (ME) 10 100 150 50 - - 1500 200 After the Si-ARC and 〇DL main etching (ME) steps are performed, the plasma processing apparatus 30 is used for over etching ( 0E) Steps. The overetching (〇E) steps of the first, second, and third experimental samples of each group were performed under the following conditions: Ar/HBr/02 flow rate was 1〇〇/15〇/2〇, 100/150 /10 and 1〇〇/i5〇/5 ◎ seem ° Next, referring to Fig. 12, it shows a cross-sectional view of the experimental sample and its HBr/〇2 proportional function of the critical dimension (CD). As shown in this figure, the critical dimension (CD) of the 〇dl layer increases as the ratio of HBr/02 increases. In other words, the critical dimension (CD) of the ODL layer increases as the oxygen (〇2) flow rate decreases. There has always been a problem in the electro-polymerization process of the known one: there is always some variation in the shape of the pattern after the residual processing. In order to avoid variations in the shape of the pattern, a mask for lithography is designed in consideration of the variation in pattern size after etching. However, this solution still cannot completely avoid the above problems. The plasma etching process of the present invention provides a solution to the above problems. By adding desert hydrogen (jjBr) to a mixture of Van/〇2 or Ar/02, the inventors believe that hydrogen (Η) will reduce oxygen (〇) in the surface of the od layer. In other words, oxygen (0) atoms are extracted from the ODL layer. As a result, an organic dielectric layer (ODL) having a high carbon content in the surface can be produced. Therefore, the carbon-carbon bond is increased, and the carbon-carbon bond makes the organic dielectric layer (ODL) more rigid. The rigidity of the ODL layer has the function of sidewall protection, so etching can be avoided. 25 201108324 Furthermore, the inventors have also considered that the high carbon content of the ODL layer increases the complex > odor-carbon bond near the surface of the ODL pattern. Therefore, a thin layer of desertified carbon (CBrx) is deposited on the 〇DL pattern to protect it as a sidewall. Therefore, the lateral remnant of 〇DL is suppressed. Moreover, by increasing the flow of desert hydrogen (HBr), the deposition of brominated fossil carbon (CBrx) is increased by the increase in strontium species, which increases the critical dimension (CD) of 〇DL. On the other hand, by reducing the HBr flow rate, the CD widening is reduced. In this manner, a better control of the predetermined critical dimension (CD) value can be achieved by selecting the appropriate face flow. In order to evaluate the variation of the shape of the pattern and its critical dimension uniformity, two sets of κ test samples were produced. Each group has a different pattern (dense pattern (also called a nested pattern) and an isolated pattern). Table m summarizes the etching conditions used in each mask layer of the experimental sample. The condition of the surname used in the sample

Ar HBr 〇2 n2 cf4 chf3 壓力 MW RF (seem) (seem) (seem) (seem) (seem) (seem) (mTorr) (W) (W) Si-ARC - -------- - - 180 180 100 3000 引發 - 180 —— — 一 180 100 2000 300 1 ODL 250」 」5〇 40 - . 10 3000 -Ά 引發 (ME) 250 150 40 - 10 2000 250 ODL -—----- 60 4 400 • 10 3000 引發 (OE) 60 ------ 4 400 -- L·· 10 3000 200 針對此實驗，將Si_ARC及〇DL主 刻時間分別設定在16及40 8秒。在過餘刻(〇e)步驟^，將 26 201108324 -實驗樣本的敍刻時間設定為2G秒，㈣ 蝕刻時間設定為40秒。 只驗樣本的 圖13顯示了實驗樣本 針對每—實驗樣本分別沿著基板的中央與邊緣^寸(: 「中央」及「邊緣」）擷取橫剖面圖H圖^ Ο ◎ 性。此外，檢視奶（）白，、祕刻（0E)時間無關聯 | 青況。卜W過所有樣本後並未觀察到圖案形狀變異的 圖14顯示了每—遮罩層的微波功率、r 壓的㈣函數。糾代表處理時間，左縱 ϋ偏功率’而右縱軸代表RF偏壓。圖14中二之此 只驗數f表示在電漿處理裝置3。之相同處理室二 續地進订多層結構之蝴步㈣㈣。應 理步驟的起始處細叫 ^在每一處 率以引發電聚生成處理。式來知加上微波功 RF偏壓(較低(Lower)Vpp)係自電漿 ：140 ° ^ -制被弓I至基板的離子能量。如_ 14中所*， 進行至下一遮罩層時，偏壓會下降。藉此，；:= 朝向下層的遮罩層前進時，則接觸基板_子能量=降 、又’在1知電聚_處理中所觀察到的另 . 取決於圖案為孤立或稠密(套疊）的區域 不= 地被形成。換言之，取決於光阻_是否句 糙)或套®(亦稱為精細），圖案形狀中會存在著些(許變2粗 27 201108324 為了避免粗糙及精細形狀的變異，考慮了此些變異而巧^十 出一種微影用途的光罩。然而，上述的問題仍無法完全由 此解決方案所避免。本發明人亦觀察到在控制臨界尺寸(CD) 時會發生粗糙及精細形狀的變異。 本發明之方法可在圖案化含矽抗反射塗層（Si_ARC)時 避免粗糙及精細形狀的變異。在此實施例中，藉由調整四 氟甲烷對三氟曱烷（cf4/chf3)的氣體比例，則能經由 Si-ARC層來控制最終圖案(；如硬遮罩SiN)的線寬或臨界尺 寸(CD)。藉由在Si-ARC蝕刻步驟中調整CF4/CHF3的比例， 則可增加或減少Si-ARC圖案的臨界尺寸，而使得最終臨界 尺寸（CD)能被控制在大約nm至+ 10 nm的範圍内。Ar HBr 〇2 n2 cf4 chf3 Pressure MW RF (seem) (seem) (seem) (seem) (seem) (seem) (mTorr) (W) (W) Si-ARC - -------- - - 180 180 100 3000 Trigger - 180 —— — 180 100 2000 300 1 ODL 250” ”5〇40 - . 10 3000 -Ά Trigger (ME) 250 150 40 - 10 2000 250 ODL ------- 60 4 400 • 10 3000 Trigger (OE) 60 ------ 4 400 -- L·· 10 3000 200 For this experiment, the Si_ARC and 〇DL mastering times were set at 16 and 40 8 seconds, respectively. In the excess (〇e) step ^, 26 201108324 - the sample time of the experimental sample is set to 2G seconds, and (4) the etching time is set to 40 seconds. Only the sample of the sample is shown in Figure 13. The experimental sample is taken for each of the experimental samples along the center and edge of the substrate (: "central" and "edge") to obtain a cross-sectional view H ^ ◎ ◎. In addition, the inspection of milk () white, secret engraved (0E) time is not associated | No pattern shape variation was observed after all samples. Figure 14 shows the (four) function of the microwave power and r-voltage of each mask layer. The correction represents the processing time, the left vertical ϋ bias power ' and the right vertical axis represents the RF bias. The only test number f in Fig. 14 is shown in the plasma processing apparatus 3. The same processing chamber continuously orders the steps of the multi-layer structure (4) (4). The beginning of the processing step is called ^ at each rate to initiate the electricity generation process. It is known that the microwave bias (lower Vpp) is from the plasma: 140 ° ^ - the ion energy of the substrate I to the substrate. As in _14, when going to the next mask layer, the bias voltage will drop. By this, when the film layer is advanced toward the lower layer, the substrate is contacted with the sub-energy = drop, and the other is observed in the process of the electro-polymerization process. Depending on whether the pattern is isolated or dense (clip) The area is not = ground is formed. In other words, depending on whether the photoresist is rough or the set (also known as fine), there will be some in the shape of the pattern (change 2 and thick 27 201108324) In order to avoid variations in roughness and fine shape, these variations are considered. A reticle for lithography is used. However, the above problems cannot be completely avoided by this solution. The inventors have also observed that coarse and fine shape variations occur when controlling the critical dimension (CD). The method of the present invention can avoid variations in roughness and fine shape when patterning the antimony-containing antireflective coating (Si_ARC). In this embodiment, by adjusting the gas of tetrafluoromethane to trifluorodecane (cf4/chf3) In proportion, the line width or critical dimension (CD) of the final pattern (such as hard mask SiN) can be controlled via the Si-ARC layer. By adjusting the ratio of CF4/CHF3 in the Si-ARC etching step, it can be increased Or reducing the critical dimension of the Si-ARC pattern such that the final critical dimension (CD) can be controlled in the range of about nm to + 10 nm.

Si-ARC圖案主要是由矽（Si)及碳(C)原子所構成。本發 明人認為Si-ARC層的碳含量能幫助在Si-ARC層表面上產 生許多碳-氟鍵。因此，藉由調整Si-ARC層中的CF4/CHF3 比例’由於CF4氣體與CHF3間的鍵結能量差異，因此在 Si-ARC圖案的上方會沈積薄薄的一層CFx系膜層。因此， 根據本發明之方法，藉由調整Si-ARC蝕刻步驟中的 CFVCHF3比例，則可抑制si_ARC層的橫向蝕刻方向並增 加Si-ARC圖案的臨界尺寸(cd)。 為了評估經由Si-ARC層之蝕刻步驟來控制臨界尺寸 (CD)的控制能力’且亦研究粗糙及精細形狀的變異，而製 作了各種實驗樣本。類似於前述實施例係形成有兩實驗樣 本’每一樣本皆具有不同的圖案（稠密圖案及孤立圖案）。表 IV總結了在實驗樣本之每一遮罩層中所用的蝕刻條件。針 28 201108324 對此實驗，將Si-ARC、ODL主蝕刻（MR)步驟、ODL過蝕 刻（OR)步驟、SiN及灰化步驟的蝕刻時間分別設定為177、 4〇·8、20 及 3〇^秒。又，將 CF4/CHF3 的比例設定為 1(180/180)。 用的钮刻條件The Si-ARC pattern is mainly composed of yttrium (Si) and carbon (C) atoms. The inventors believe that the carbon content of the Si-ARC layer can help produce many carbon-fluorine bonds on the surface of the Si-ARC layer. Therefore, by adjusting the CF4/CHF3 ratio in the Si-ARC layer, due to the difference in bonding energy between the CF4 gas and the CHF3, a thin layer of the CFx-based film layer is deposited over the Si-ARC pattern. Therefore, according to the method of the present invention, by adjusting the ratio of CFVCHF3 in the Si-ARC etching step, the lateral etching direction of the si_ARC layer can be suppressed and the critical dimension (cd) of the Si-ARC pattern can be increased. Various experimental samples were prepared in order to evaluate the control ability of the critical dimension (CD) through the etching step of the Si-ARC layer and also to study the variation of the roughness and the fine shape. Two experimental samples were formed similar to the previous examples. Each sample has a different pattern (dense pattern and isolated pattern). Table IV summarizes the etching conditions used in each mask layer of the experimental sample. Needle 28 201108324 For this experiment, the etching times of the Si-ARC, ODL main etch (MR) step, ODL over etch (OR) step, SiN and ashing steps were set to 177, 4 〇 · 8, 20 and 3 分别, respectively. ^ seconds. Also, set the ratio of CF4/CHF3 to 1 (180/180). Button condition

參考圖 15 7^ΓΤ~ζ一 --L-J—一^ , 係顯示實驗樣本的橫剖面圖及其臨界尺寸 (LD)。如圖 15 + Ο Ο 登拉< Τ所不’在所有的實驗樣本中垂直輪廓係养 吊接近90度，复Ss _ ,.^ '、顒不了粗糙及精細形狀中幾乎沒有變異。 此外，在所有的杏 (CD)與期望的曰汽扭驗樣本中顯示了 Si_ARC圖案的臨界尺寸 〇·盘目標圖案有極小的差異（±0 nm至±2 nm)。在 此貫驗中，：J思户 进、及孤立圖案的期望目標圖案分別設定為45 nm 及 75 nm。 亦研九了改變每—實驗樣本之CF4/CHF3比例時，經由 29 201108324Referring to Figure 15 7^ΓΤ~ζ一 --L-J—一^, shows the cross-sectional view of the experimental sample and its critical dimension (LD). Figure 15 + Ο 登 登 & Τ 在 在 在 在 在 在 在 在 在 在 在 在 在 在 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直 垂直In addition, the critical dimensions of the Si_ARC pattern are shown in all of the apricots (CD) and the desired samples of the xenon test. The disc target pattern has a very small difference (±0 nm to ±2 nm). In this test, the desired target patterns of the JS and the isolated patterns are set to 45 nm and 75 nm, respectively. Also studied nine times to change the ratio of CF4/CHF3 per experimental sample, via 29 201108324

Si-ARC層之蝕刻步驟來控制臨界尺寸(CD)之控制能力以 及粗糙及精細形狀的變異。再次製作兩組實驗樣本，每一 組具有不同的圖案（稠密圖案及孤立圖案）。在每一組中形成 有三個實驗樣本。實驗樣本之每一遮罩層中所使用的蝕刻 條件係與表IV中所列式者相同。但在每一組實驗樣本中， 係分別將第一、第二及第三實驗樣本的CF4/CHF3比例設定 為(210/150)、（180/180)及（150/210)。 接下來參考圖16 ’其係顯示實驗樣本的橫剖面圖及其 臨界尺寸(CD)。如此圖所示，在所有的實驗樣本中垂直輪 廓係非常接近90度，其顯示了粗糙及精細形狀中幾乎沒有 變異。此外，在所有的實驗樣本中顯示了 Si_ARC圖案的臨 界尺寸（CD)與初始的目標圖案有極小的差異（_3 nm至+ 12 nm)。圖案的最大差異為+2 nn^在此實驗中，稠密及孤立 圖案的初始目標圖案係分別被設定為45 nm及75 nm。 本申請案主張申請於2009年3月24日的美國專利臨 時申清案第61/210,990號、申請於2〇〇9年3月31日的美 國專利臨時申請案第61/211，573號及申請於2〇〇9月3月21 曰的美國專利臨時申請案第61/211，614號作為優先權母 案，上述三申請案之案名皆為「電漿蝕刻方法」，特將上述 三申請案之所有内容援用於此作為參考。 雖然上面已揭露了特定設備/裝置及方法相關的原 理，但應瞭解，此揭露内容意只在作為本發明的實例而非 限制本發明的範圍。 30 201108324 【圖式簡單說明】 圖1係概略地顯示電漿飾刦泠田、仓>、， 標結構的實施例。 _處理進傾與進行後的目 圖2係概略地顯示在圖案化氮化石夕(sm)膜層後之一實 驗樣本的目標結構與橫剖面圖的另一實施例。 貫 圖3係顯示電漿處縣置之—實施例的概圖。The etching step of the Si-ARC layer controls the control capability of the critical dimension (CD) and the variation of the coarse and fine shapes. Two sets of experimental samples were made again, each with a different pattern (dense pattern and isolated pattern). Three experimental samples were formed in each group. The etching conditions used in each mask layer of the experimental sample were the same as those listed in Table IV. However, in each set of experimental samples, the CF4/CHF3 ratios of the first, second, and third experimental samples were set to (210/150), (180/180), and (150/210), respectively. Referring next to Fig. 16', a cross-sectional view of the experimental sample and its critical dimension (CD) are shown. As shown in this figure, the vertical profile is very close to 90 degrees in all experimental samples, showing little variation in the rough and fine shapes. In addition, the critical dimension (CD) of the Si_ARC pattern was shown to be slightly different from the original target pattern (_3 nm to + 12 nm) in all experimental samples. The maximum difference in pattern is +2 nn^ In this experiment, the initial target pattern for dense and isolated patterns was set to 45 nm and 75 nm, respectively. This application claims the application of U.S. Patent Provisional Application No. 61/210,990, filed on March 24, 2009, and U.S. Patent Provisional Application No. 61/211,573, filed on March 31, 2009. Application No. 61/211,614 of the US Patent Provisional Application No. 61/211,614, which was filed on March 21, 2002, as the priority case, the names of the above three applications are all "plasma etching methods", especially the above three All content of the application is hereby incorporated by reference. Although the principles of the particular apparatus/apparatus and method are disclosed above, it is to be understood that the disclosure is intended to be illustrative only and not limiting the scope of the invention. 30 201108324 [Simplified description of the drawings] Fig. 1 is a view schematically showing an embodiment of a plasma robbing field, a warehouse, and a standard structure. _Processing the tilting and proceeding is shown in Fig. 2 as a schematic representation of another embodiment of the target structure and cross-sectional view of one of the experimental samples after the patterned nitrite (sm) film layer. Figure 3 is a schematic view showing an embodiment of a plasma station.

圖4係顯示將線寬量測裝置整合至 施例的概圖。 圖5係顯示將線寬量測裳置整合至餘刻裝置 與 施例的概圖。 Λ 圖6係顯示钕刻複數膜層時調整線寬之方法的實施 圖7係顯示單-線寬量測裝置的另一實施例的概圖。 圖8係顯示在每一特定膜層處進行電裝餘理 您圖案與孤立圖案的實驗樣本横剖面圖。 曼稠 圖9係顯不實驗樣本的横剖面圖及其臨 過蝕刻（ΟΕ)時間函數。 了叫)的 圖10係顯示實驗樣本的橫剖面圖及其臨界 的HBr流量函數。 圖11為實雜本的橫剖關，錢顯林不同姓刻氣 體種類下的稠密圖案與孤立圖案。 圖12係顯示實驗樣本的橫剖面圖及其臨界尺寸(cd 的Ar/HBr/〇2流量函數。 圖13係顯示實驗樣本的橫剖面圖及其臨界尺寸(cd)。 圖14係顯示每一遮罩層的微波功率、RF功率&rf電 31 201108324 壓的時間函數。 圖15係顯示實驗樣本的橫剖面圖及其臨界尺寸(CD)。 圖16係顯示實驗樣本的橫剖面圖及其臨界尺寸（CD)。 【主要元件符號說明】 10 目標結構 12 矽（Si)基板 13 反應氣體供應部 14 硬遮罩氮化矽(SiN)層 15 微波產生器 16 三層結構 16a :有機介電層（ODL) 16b :含矽抗反射塗層（Si-ARC) 16c :光阻圖案 17 :底部 18 :圓柱形側壁 20 :目標結構 20 : Ο形環 22 :二氧化矽（Si02)層 24 :共轴波導 25 :中央導體 26 :周圍導體 27 :凹陷部 28 :慢波板 32 201108324 29 :狹孔 30 :電漿處理裝置 37 :外部高頻電源 38 :匹配單元 3 9 .電源電極 40-A :光阻形成裝置 40-B :光阻形成裝置 40-C :光阻形成裝置 ^ 41 :靜電夾頭 46 : DC電源 61 :基部注射器 63 :下表面 64 :基部支撐件 66 :複數供給孔 6 7 :平坦壁表面 68 :氣體導管 Q 69氣體入口孔 70 :開-關閥 71 :流量控制器 72 :氣體供應系統 89 :附加氣體導管 120 :處理室 140 :基板支撐件 160 :介電窗 33 201108324 300 :放射線狹孔板 400-A :塗佈顯影裝置 402-A :線寬量測裝置 402-B :線寬量測裝置 402-C :線寬量測裝置 404-A :複數處理單元 406-A :兩基板傳送單元 420 :曝光裝置 440 :蝕刻裝置 440-B :蝕刻裝置 442 :電腦 442-B :電腦 34Figure 4 is an overview showing the integration of the line width measuring device into the embodiment. Fig. 5 is a schematic view showing the integration of the line width measuring device into the residual device and the embodiment. Figure 6 is a diagram showing a method of adjusting the line width when engraving a plurality of layers. Fig. 7 is a schematic view showing another embodiment of the single-line width measuring device. Figure 8 is a cross-sectional view of an experimental sample showing the pattern of your pattern and isolated pattern at each specific layer. Manning Figure 9 shows a cross-sectional view of the experimental sample and its function as an etch time. Figure 10 shows a cross-sectional view of the experimental sample and its critical HBr flow function. Fig. 11 is a cross-sectional view of a real miscellaneous book. Qian Xianlin has a dense pattern and an isolated pattern under different gas types. Figure 12 is a cross-sectional view showing the experimental sample and its critical dimension (Ar/HBr/〇2 flow function of cd. Figure 13 is a cross-sectional view showing the experimental sample and its critical dimension (cd). Figure 14 shows each The microwave power of the mask layer, the RF power &rf power 31 201108324 pressure time function. Figure 15 shows the cross-sectional view of the experimental sample and its critical dimension (CD). Figure 16 shows the cross-sectional view of the experimental sample and its Critical dimension (CD) [Main component symbol description] 10 Target structure 12 矽 (Si) substrate 13 Reaction gas supply portion 14 Hard mask yttrium nitride (SiN) layer 15 Microwave generator 16 Three-layer structure 16a: Organic dielectric Layer (ODL) 16b: antimony-containing anti-reflective coating (Si-ARC) 16c: photoresist pattern 17: bottom 18: cylindrical sidewall 20: target structure 20: Ο ring 22: cerium oxide (SiO 2 ) layer 24: Coaxial waveguide 25: center conductor 26: surrounding conductor 27: recessed portion 28: slow wave plate 32 201108324 29: slot 30: plasma processing device 37: external high frequency power supply 38: matching unit 3 9. power supply electrode 40-A : photoresist forming device 40-B: photoresist forming device 40-C: photoresist forming device ^ 41: static Electric chuck 46: DC power source 61: Base syringe 63: Lower surface 64: Base support 66: Multiple supply holes 6 7: Flat wall surface 68: Gas conduit Q 69 Gas inlet hole 70: On-off valve 71: Flow control 72: gas supply system 89: additional gas conduit 120: processing chamber 140: substrate support 160: dielectric window 33 201108324 300: radiation slot plate 400-A: coating developing device 402-A: line width measuring device 402-B: line width measuring device 402-C: line width measuring device 404-A: complex processing unit 406-A: two substrate transfer unit 420: exposure device 440: etching device 440-B: etching device 442: computer 442-B: Computer 34

Claims (1)

201108324 七、申請專利範圍·· 1. 一種基板處理方法，其係於基板上形成遮罩圖案後藉 由一蝕刻處理以形成期望圖案，此方法包含下列步驟： 於基板上形成兩膜層，該兩膜層包含氮化矽層及 一有機介電層； 量測該遮罩圖案寬度或該兩膜層其中一層的餘刻 後圖案寬度；及 根據該量測到的寬度來調整HBr及其他氣體中任 一氣體的流量，於該蝕刻處理中係使用HBr及該其他 氣體。 2. 如申請專利範圍第1項之基板處理方法，其中更包含 下列步驟： 在根據該量測到的遮罩圖案寬度所調整之流量 下，來對相同基板之該兩膜層中的一層進行姓刻。 3. 如申請專利範圍第1項之基板處理方法，其中更包含 下列步驟： 在根據該量測到的遮罩圖案寬度或蝕刻後圖案寬 度所調整之流量下，來對另一基板之該兩膜層中的一 層進行触刻。 4. 如申請專利範圍第1項之基板處理方法，其中更包含 下列步驟： 在根據該量測到的蝕刻後圖案寬度所調整之流量 下，來對相同基板之該兩膜層中的一層進行蝕刻，其 中係於該蝕刻處理期間進行該量測步驟及該調整步 35 201108324 驟。 5. 如申請專利範圍第1項之基板處理方法，其中該調整 步驟包含： 當該量測到的寬度小於期望寬度時，增加HBr對 其他氣體的流量比；當該量測到的寬度大於期望寬度 時，減少HBr對其他氣體的流量比。 6. 如申請專利範圍第2項之基板處理方法，其中該有機 介電層係在該蝕刻步驟中被蝕刻。 7. 如申請專利範圍第6項之基板處理方法，其中該調整 步驟包含： 當該量測到的寬度小於期望寬度時，增加蝕刻時 間；當該量測到的寬度大於期望寬度時，減少該蝕刻 時間。 8. 如申請專利範圍第6項之基板處理方法，其中該蝕刻 步驟包含一主蝕刻及該主蝕刻後的一過蝕刻，且於該 過蝕刻中係使用HBr。 9. 如申請專利範圍第8項之基板處理方法，其中該調整 步驟包含： 當該量測到的寬度小於期望寬度時，增加過蝕刻 時間；當該量測到的寬度大於期望寬度時，減少該過 蝕刻時間。 10. 如申請專利範圍第1項之基板處理方法，其中該調整 步驟包含： 當該量測到的寬度小於期望寬度時，增加施加至 36 201108324 該基板的RF偏壓；當該量測到的寬度大於期望寬度 時，減少施加至該基板的RF偏壓。 11 ·如申請專利範圍第1項之基板處理方法，其中該其他 氣體包含沁及02。 12. 如申請專利範圍第1項之基板處理方法，其中該其他 氣體包含Ar及〇2。 13. —種基板處理方法，其係於基板上形成遮罩圖案後藉 由一蝕刻處理以形成期望圖案，此方法包含下列步驟：201108324 VII. Patent Application Range 1. A method for processing a substrate, which is formed by forming an etched pattern on a substrate to form a desired pattern by an etching process, the method comprising the steps of: forming two film layers on the substrate, The two film layers comprise a tantalum nitride layer and an organic dielectric layer; measuring the width of the mask pattern or the remaining pattern width of one of the two film layers; and adjusting the HBr and other gases according to the measured width The flow rate of any of the gases is HBr and the other gases used in the etching process. 2. The substrate processing method of claim 1, further comprising the steps of: performing one of the two layers of the same substrate under a flow rate adjusted according to the measured width of the mask pattern; The surname is engraved. 3. The substrate processing method of claim 1, further comprising the steps of: ???the two substrates of the other substrate under the flow rate adjusted according to the measured mask pattern width or the etched pattern width; One layer in the film layer is inscribed. 4. The substrate processing method of claim 1, further comprising the steps of: performing one of the two layers of the same substrate under a flow rate adjusted according to the measured width of the etched pattern; Etching, wherein the measuring step and the adjusting step 35 201108324 are performed during the etching process. 5. The substrate processing method of claim 1, wherein the adjusting step comprises: increasing a flow ratio of HBr to other gases when the measured width is less than a desired width; and when the measured width is greater than desired At width, reduce the flow ratio of HBr to other gases. 6. The substrate processing method of claim 2, wherein the organic dielectric layer is etched in the etching step. 7. The substrate processing method of claim 6, wherein the adjusting step comprises: increasing an etching time when the measured width is less than a desired width; and reducing the width when the measured width is greater than a desired width Etching time. 8. The substrate processing method of claim 6, wherein the etching step comprises a main etching and an over etching after the main etching, and HBr is used in the over etching. 9. The substrate processing method of claim 8, wherein the adjusting step comprises: increasing an overetching time when the measured width is less than a desired width; and decreasing when the measured width is greater than a desired width This overetch time. 10. The substrate processing method of claim 1, wherein the adjusting step comprises: increasing an RF bias applied to the substrate of 36 201108324 when the measured width is less than a desired width; When the width is greater than the desired width, the RF bias applied to the substrate is reduced. 11. The substrate processing method of claim 1, wherein the other gas comprises ruthenium and 02. 12. The substrate processing method of claim 1, wherein the other gas comprises Ar and 〇2. 13. A substrate processing method for forming a mask pattern on a substrate and then etching to form a desired pattern, the method comprising the steps of: 於基板上形成三膜層，該三膜層包含氮化矽層、 一有機介電層及一含^夕抗反射塗層； 量測該遮罩圖案寬度或該三膜層其中一層的蝕刻 後圖案寬度；及 根據該量測到的寬度來調整CF4及CHF3中任一 氣體的流量，於該蝕刻處理中係使用CF4及CHF3。 14. 如申請專利範圍第13項之基板處理方法，其中更包含 下列步驟： 在根據該量測到的遮罩圖案寬度所調整之流量 下，來對相同基板之該三膜層中的一層進行餘刻。 15. 如申請專利範圍第13項之基板處理方法，其中更包含 下列步驟： 在根據該量測到的遮罩圖案寬度或蝕刻後圖案寬 度所調整之流量下，來對另一片基板之該三膜層中的 一層進行餘刻。 16. 如申請專利範圍第13項之基板處理方法，其中更包含 37 201108324 下列步驟： 下，ίϊΓ該量測到的餘刻後圖案寬度所調整之流量 中係於目同基板之該三膜層中的一層進行餘刻，其 驟亥餘刻處理期間進行該量測步驟及該調整步 17·如申請專利範圍第13項之基板處理方法，1中更包含 下列步驟： 八甲更已3 在根據該量測到的遮罩圖案寬度所 下’來對該切抗反射塗層進行_。之^ I 利範圍第13項之基板處理方法，其中該調整 步驟包含： 當該量測到的寬度大於期望寬度時，辦加CF對 CHF3的流量比例；#該量_的寬度小於^望寬^ 時，減少CF4對CHF3的流量比例。 又 19.如申請專利範圍帛13項之基板處理方法， 步驟包含： ' ° 當該量測到的寬度小於期望寬度時，增加施加到 絲板的RF偏Μ ;當該量測到的寬度大於期望寬度 時’減少施加到該基板的RF偏壓。 王又 38Forming a three-layer layer on the substrate, the three-layer layer comprising a tantalum nitride layer, an organic dielectric layer, and an anti-reflective coating; measuring the width of the mask pattern or etching of one of the three layers The pattern width; and the flow rate of any of CF4 and CHF3 is adjusted according to the measured width, and CF4 and CHF3 are used in the etching process. 14. The substrate processing method of claim 13, further comprising the steps of: performing one of the three layers of the same substrate under a flow rate adjusted according to the measured width of the mask pattern; All the time. 15. The substrate processing method of claim 13, further comprising the steps of: treating the other substrate with a flow rate adjusted according to the measured mask pattern width or the etched pattern width; A layer in the film layer is left in place. 16. The substrate processing method of claim 13 further comprising: 37 201108324 the following steps: ??? The first layer is subjected to the remaining step, and the measuring step and the adjusting step are performed during the processing of the remaining time. The substrate processing method according to claim 13 of the patent application, the first step further comprises the following steps: The cut anti-reflective coating is subjected to _ according to the measured width of the mask pattern. The substrate processing method of item 13, wherein the adjusting step comprises: adding a flow ratio of CF to CHF3 when the measured width is greater than a desired width; #的量_ has a width smaller than a desired width When ^, reduce the flow ratio of CF4 to CHF3. 19. The substrate processing method of claim 13, wherein the step comprises: '° increasing the RF bias applied to the silk plate when the measured width is less than the desired width; when the measured width is greater than When the width is desired, the RF bias applied to the substrate is reduced. Wang Zao 38
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