TW201103171A - Light emitting chip package structure - Google Patents

Light emitting chip package structure Download PDF

Info

Publication number
TW201103171A
TW201103171A TW98123570A TW98123570A TW201103171A TW 201103171 A TW201103171 A TW 201103171A TW 98123570 A TW98123570 A TW 98123570A TW 98123570 A TW98123570 A TW 98123570A TW 201103171 A TW201103171 A TW 201103171A
Authority
TW
Taiwan
Prior art keywords
chip package
package structure
illuminating
disposed
magnetic element
Prior art date
Application number
TW98123570A
Other languages
Chinese (zh)
Inventor
Rong Xuan
Chao-Wei Li
Hung-Lieh Hu
Mu-Tao Chu
Chih-Hao Hsu
Jenq-Dar Tsay
Original Assignee
Ind Tech Res Inst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ind Tech Res Inst filed Critical Ind Tech Res Inst
Priority to TW98123570A priority Critical patent/TW201103171A/en
Publication of TW201103171A publication Critical patent/TW201103171A/en

Links

Landscapes

  • Led Device Packages (AREA)

Abstract

A light emitting chip package structure including a carrier, at least one light emitting chip and a magnetic device is provided. The light emitting chip is disposed on the carrier. The shortest distance between the magnetic device and the light emitting chip is small than or equal to 5 centimeters and is larger than 0 centimeter.

Description

201103171 m 穴uwOTW 31320twf.doc/d 六、發明說明： 【發明所屬之技術領域】 關於 本發明是有關於一種晶片封裝結構，且特別3 一種發光晶片封裝結構。 疋 【先前技術】 與一般藉由產生熱而發光之螢光燈或白 是’發光二極體（led)等半導體發光晶片封 用半導體的特性來發光，這類發光晶片封裝結弋利 光被稱作冷發光（cold luminescence)。這類發光a ^辭的 結構具有使財命長、重量輕和功率消耗低的優= 其可運用在多種領域上，諸如光學顯示器、交通信，=得 資料存儲設備、通信裝置、照明設備和f療器材、 如何乓進奄光晶片封裝結構的發光效率是這個 個重要問題。 圖1緣示傳統發光晶片封裝結構中的發曰 圖。請參照目1 ,發光晶4 100是一個垂直式二、剖面 (咖）晶片，其包括電極110、120、第一捧雜體 第-推雜層140和位於第—摻雜層13Q與第二 之間的一半導體發光層15〇以及一透明：曰1:0 (Transparent Conductive Layer > TCL) 160 > ^ 電層160配置於第—摻雜層⑽上，電極u〇位= 電層160上，且電極12〇位於第二摻雜層14〇上卞= 電極110* m的距離增力口，電流密度的分佈會处考/、 201103171 ^iy«uu4uiW 31320iwf.doc/d 如圖1所示，較密的線表示高電流密度，而具有最 的區域位於電極11G與⑽之間。然而，由於發光效率最 :的區域僅集中在電極110與12〇之間，故發 ：〇 的總發光效率偏低。 圖2繪示傳統發光晶片封裝結構中的 2’發光是—個水平式LE；:晶片= i=2i〇:=。由於電流會通過電阻最低的路徑傳 電机在度的主要集中在電極21〇與22〇之 中心路控’故發光晶片的總發級率偏低。曰的 【發明内容】 光效ί發明提供—種發光^㈣結構，其具有較佳的發 少—3 = 封f構包括一承栽器、至 器上。第-磁性元件'曰：：。發光晶片配置於承載 於5公分且大於Q公^ ^日日片之_最小間距為小於等 在本發明之一會 構、至少一塊狀結二中’第-磁性元件為-環狀結 在本發明之二t至少-條狀結構。 構時，發光晶片位二=:槿:第-磁性元件為-環狀結 件為多個塊狀結構日:狀、H開对，當第—磁性元 性元件為多個條狀c環繞發光晶片，當第-,兹 在本發明之t構時，條狀結構環繞發光晶片。 具知例中，當第一磁性元件為一環狀、会士201103171 m hole uwOTW 31320twf.doc/d VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a chip package structure, and particularly to a light-emitting chip package structure.疋[Prior Art] Light-emitting lamps that are generally illuminated by heat generation or white are the characteristics of a semiconductor light-emitting chip-sealing semiconductor such as a light-emitting diode (LED), and such a light-emitting chip package is known as a light-emitting device. For cold luminescence. This type of illuminating structure has the advantages of long life, light weight and low power consumption. It can be used in various fields, such as optical displays, communication, data storage devices, communication devices, lighting devices, and The therapeutic efficiency of how to poke into the calender chip package structure is an important issue. Figure 1 is a perspective view of a conventional light emitting chip package structure. Referring to item 1, the illuminating crystal 4 100 is a vertical two-section (coffee) wafer including electrodes 110, 120, a first hand-wound-thick layer 140, and a first doped layer 13Q and a second A semiconductor light-emitting layer 15〇 and a transparent: 曰1:0 (Transparent Conductive Layer > TCL) 160 > ^ The electrical layer 160 is disposed on the first doped layer (10), and the electrode u is clamped = the electrical layer 160 Above, and the electrode 12〇 is located on the second doping layer 14〇 卞= electrode 110* m distance increasing port, the current density distribution will be tested /, 201103171 ^ iy «uu4uiW 31320iwf.doc / d as shown in Figure 1 It is shown that the denser line indicates a high current density and the most area is between the electrodes 11G and (10). However, since the region with the highest luminous efficiency is concentrated only between the electrodes 110 and 12, the total luminous efficiency of 发 is low. 2 illustrates that the 2' luminescence in a conventional luminescent wafer package structure is a horizontal LE; wafer = i = 2i 〇: =. Since the current passes through the path of the lowest resistance, the motor is mainly concentrated in the center of the electrodes 21〇 and 22〇, so the total emission rate of the light-emitting chip is low.发明 发明 【 光 光 光 光 光 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 发明 。 。 。 。 。 。 。 。 。 。 The first magnetic element '曰::. The illuminating wafer is disposed at 5 cm and larger than the Q ^ 日 片 _ 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 最小 ' ' ' ' ' ' ' ' The second embodiment of the present invention is at least a strip structure. At the time of construction, the illuminating wafer bit is two =: 槿: the first magnetic element is - the annular connecting member is a plurality of block-shaped structures: a shape, a H-opening, when the first magnetic element is a plurality of strips The wafer, when first, is in the configuration of the present invention, the strip structure surrounds the light-emitting wafer. In a known example, when the first magnetic element is a ring, the Fellow

201103171 JL ^ L· \J \J \J201103171 JL ^ L· \J \J \J

iOTW 31320twf.doc/d 構時，發光晶片封裝結構更包括一螢光材料，其配置於開 口中，並覆蓋發光晶片。 在本發明之一實施例中，發光晶片封裝結構，其中第 一磁性元件與發光晶片皆配置於承載器的一表面上，發光 晶片封裝結構更包括一光學膜層，其覆蓋第一磁性元件。 在本發明之一實施例中，光學膜層包括一吸光層或一 反射層。 在本發明之一實施例中，第一磁性元件配置於承載器 上，發光晶片封裝結構更包括一封裝膠體，其覆蓋發光晶 片，且第一磁性元件配置於封裝膠體的邊緣。 在本發明之一實施例中，發光晶片封裝結構灵包括一 第二磁性元件，其配置於承載器上，封裝膠體覆蓋第二磁 性元件，且發光晶片與第二磁性元件之間的最小間距小於 發光晶片與第一磁性元件之間的最小間距。 在本發明之一實施例中，第一磁性元件配置於承載器 上，發光晶片封裝結構更包括一封裝膠體，其全面覆蓋發 光晶片與第一磁性元件。 在本發明之一實施例中，承載器具有一凹槽，發光晶 片配置於凹槽中。 在本發明之一實施例中，第一磁性元件配置於承載器 上並位於凹槽内，第一磁性元件配置於發光晶片的周邊且 與凹槽的一内壁之間存在一間距。 在本發明之一實施例中，發光晶片封裝結構更包括一 第二磁性元件，其配置於承載器的一側壁上。 201103171 J^Mysuuwnv 3l320twf.doc/d 第三磁性元件，均己置:P贫无晶片封裳結構更包技一 性元件貼附凹槽的-内=载器上並位於凹槽内，第三磁 磁 第二磁性之::例中’發光晶片封裝結構更包拉-性元件貼附在凹槽==上並位於凹槽内’第;' 、，在本發明之一實施例中，第一磁性元件配置於承載器 上並位於凹槽内，第一磁性元件貼附在凹槽的〆闪赞上。 在本發明之一實施例中，第一磁性元件配置於承载器 的一側壁上。 在本發明之—實施例中，發光晶片封裝結構更包括一 第一磁性元件，其配置於承載器上並位於凹槽内，第/磁 性元件貼附在凹槽的一内壁上。 在本發明之一實施例中，承載器包括一陶瓷基板、 石夕基板、一叙基板、一銅基板、一高導熱基板或一線 在本發明之一實施例中，承載器包括一導線架。 在本發明之—實施例中，導線架包括彼此獨立的一第 —引腳與一第二引腳，發光晶片配置於第一引腳上並電性 連接至第二弓丨卿，磁性元件配置於第一引腳或第二引腳 上，發光晶片封骏結構更包括一封裝膠體，其包覆發光晶 片、磁性元件、部分第一引腳以及部分第二引腳。 ★在本發明之〜實施例中，承載器包括一基底、一殼體、 —第一引腳與〜第二引腳，殼體覆蓋部分基底、部分第一 引腳與部分第二弓|腳，且分隔基底、第一引腳與第二引腳， 201103171 JL κ y mw 31320twf.doc/d 發光晶片配置於基底之未被殼體所覆蓋的部分上。 在本發明之一實施例中，基底的材質為一高導熱係數 的材料，高導熱係數的材料的導熱係數為21。 在本發明之一實施例中，基底的材質為金屬。 在本發明之一實施例中，基底具有一凹槽，且發光晶 片配置於凹槽中。 在本發明之一實施例中，第一磁性元件配置於基底的 一側壁上。 在本發明之一實施例中，第一磁性元件配置於凹槽 内，且磁性元件貼附凹槽的一内壁。 在本發明之一實施例中，發光晶片封裝結構更包括一 第二磁性元件，其配置於該基底的一側壁上。 在本發明之一實施例中，第一磁性元件配置於凹槽 内，且磁性元件與凹槽的一内壁之間存在一間距。 在本發明之一實施例中，發光晶片封裝結構更包括一 第二磁性元件，其配置於凹槽内，且第二磁性元件貼附在 凹槽的·一内壁上。 在本發明之一實施例中，發光晶片封裝結構更包括一 第三磁性元件，其配置於基底的一側壁上。 在本發明之一實施例中，發光晶片封裝結構更包括一 第二磁性元件，其配置於基底的一侧壁上。 在本發明之一實施例中，發光晶片配置於基底的一第 一表面，第一磁性元件配置於基底之相對於第一表面的一 第二表面上。 iW 3i32〇twf.doc/d 201103171 lyovvHv 在本發明之1施财，第-磁性元件_於基底中。 在本發明之-實_中’發Μ片封錢構括一 第二磁性元件配置於第一引腳或第二引腳上。 在本發明之-實施例中，當第—磁性元件鄉 工配置於承=〜表面上時，第—磁性元件具;‘發 =二度’斜面的法向量與表面的法向量的 在本發明之一實施例中，發光晶片封裝沾 反射層配置於斜面上，以反射發光晶片所發出 括一 在本發t-實施例中’當第—磁性元件為—環料 構’且發光曰曰片位於環形結構的一開口中時 : 與發光晶片的寬度的比值大於i且小於等於i 5。 '見又 料。在本發明之-實_中，磁性元件的材質包括硬磁材 在本發明之一實施例中，第一磁性元件與 間的紅間距為小於等於3公分且大於〇公分:日日 在本發明之一實施例中，發光晶片配置:承 第一表面上，第一磁性元件配置於承載 日口0 面的-第二表面上。 之相對於第一表 封裝'=作時’提高發光晶片中的電流分 舉實=二，下文特 31320twf.doc/d 201103171In the case of iOTW 31320twf.doc/d, the light emitting chip package structure further includes a phosphor material disposed in the opening and covering the light emitting chip. In an embodiment of the invention, the light emitting chip package structure, wherein the first magnetic element and the light emitting chip are disposed on a surface of the carrier, the light emitting chip package structure further comprises an optical film layer covering the first magnetic element. In one embodiment of the invention, the optical film layer comprises a light absorbing layer or a reflective layer. In one embodiment of the invention, the first magnetic component is disposed on the carrier, and the light emitting chip package further includes an encapsulant covering the luminescent wafer, and the first magnetic component is disposed at an edge of the encapsulant. In an embodiment of the invention, the illuminating chip package structure comprises a second magnetic component disposed on the carrier, the encapsulant covering the second magnetic component, and the minimum spacing between the illuminating wafer and the second magnetic component is less than The minimum spacing between the luminescent wafer and the first magnetic element. In one embodiment of the invention, the first magnetic component is disposed on the carrier, and the light emitting chip package structure further includes an encapsulant that completely covers the light emitting chip and the first magnetic component. In one embodiment of the invention, the carrier has a recess in which the luminescent wafer is disposed. In one embodiment of the invention, the first magnetic element is disposed on the carrier and located within the recess, the first magnetic element being disposed at a periphery of the light emitting wafer and having a spacing from an inner wall of the recess. In an embodiment of the invention, the light emitting chip package structure further includes a second magnetic component disposed on a sidewall of the carrier. 201103171 J^Mysuuwnv 3l320twf.doc/d The third magnetic component, all set: P-poor, no-wafer-sleeve structure, more packaged, one element, attached to the groove - inside = carrier and located in the groove, third Magnetic magnetic second magnetic: In the example, the 'light-emitting chip package structure is further attached to the groove== and is located in the groove'; in one embodiment of the present invention, A magnetic element is disposed on the carrier and located in the recess, and the first magnetic element is attached to the recess of the recess. In an embodiment of the invention, the first magnetic element is disposed on a side wall of the carrier. In an embodiment of the invention, the light emitting chip package structure further includes a first magnetic component disposed on the carrier and located in the recess, the magnetic/magnetic component being attached to an inner wall of the recess. In an embodiment of the invention, the carrier comprises a ceramic substrate, a stone substrate, a substrate, a copper substrate, a highly thermally conductive substrate or a wire. In one embodiment of the invention, the carrier comprises a lead frame. In an embodiment of the invention, the lead frame includes a first pin and a second pin that are independent of each other, and the light emitting chip is disposed on the first pin and electrically connected to the second bow, the magnetic component is configured On the first pin or the second pin, the light emitting chip sealing structure further comprises an encapsulant covering the light emitting chip, the magnetic component, the partial first pin and the partial second pin. In the embodiment of the present invention, the carrier includes a base, a housing, a first pin and a second pin, the housing covers a portion of the base, a portion of the first pin and a portion of the second bow | And separating the substrate, the first pin and the second pin, 201103171 JL κ y mw 31320twf.doc/d The illuminating wafer is disposed on a portion of the substrate that is not covered by the housing. In one embodiment of the invention, the material of the substrate is a material having a high thermal conductivity, and the material having a high thermal conductivity has a thermal conductivity of 21. In an embodiment of the invention, the substrate is made of metal. In an embodiment of the invention, the substrate has a recess and the luminescent wafer is disposed in the recess. In an embodiment of the invention, the first magnetic element is disposed on a sidewall of the substrate. In one embodiment of the invention, the first magnetic element is disposed within the recess and the magnetic element is attached to an inner wall of the recess. In an embodiment of the invention, the light emitting chip package structure further includes a second magnetic component disposed on a sidewall of the substrate. In one embodiment of the invention, the first magnetic element is disposed within the recess and there is a spacing between the magnetic element and an inner wall of the recess. In an embodiment of the invention, the light emitting chip package structure further includes a second magnetic component disposed in the recess, and the second magnetic component is attached to an inner wall of the recess. In an embodiment of the invention, the light emitting chip package structure further includes a third magnetic component disposed on a sidewall of the substrate. In an embodiment of the invention, the light emitting chip package structure further includes a second magnetic component disposed on a sidewall of the substrate. In one embodiment of the invention, the luminescent wafer is disposed on a first surface of the substrate, and the first magnetic component is disposed on a second surface of the substrate opposite the first surface. iW 3i32〇twf.doc/d 201103171 lyovvHv In the first aspect of the invention, the first magnetic element is in the substrate. In the present invention, the second magnetic element is disposed on the first pin or the second pin. In the embodiment of the present invention, when the first magnetic element is disposed on the surface of the substrate, the first magnetic element has a normal vector of the 'two degrees' bevel and the normal vector of the surface in the present invention. In one embodiment, the light-emitting chip package is disposed on the inclined surface to reflect the light-emitting chip, and in the present embodiment, the first magnetic element is a ring material and the light-emitting chip is When located in an opening of the annular structure: the ratio to the width of the luminescent wafer is greater than i and less than or equal to i5. 'See also expect. In the present invention, the material of the magnetic element comprises a hard magnetic material. In one embodiment of the invention, the red distance between the first magnetic element and the distance between the first magnetic element is less than or equal to 3 centimeters and greater than 〇 cm: day in the present invention. In one embodiment, the illuminating wafer is disposed on the first surface, and the first magnetic element is disposed on the second surface carrying the surface of the day port 0. Compared with the first table package '=time', the current distribution in the light-emitting chip is increased=2, the following is 31320twf.doc/d 201103171

r j j.7 〇uu40TW 【實施方式】r j j.7 〇uu40TW [Embodiment]

霍爾效應(Hall Effect)為眾多物理現象中的一種，其 在電流流過一導線時對電流施加一外部磁場，外部磁 垂直於電流流向的分量會對電流產生羅倫= (F=q*V*B)，而羅倫兹力（L咖z，s w)會使電流 產生棱向偏移。本發明即利用霍_效應的現象來改變 晶片（例如發光二極體晶片或雷射二極體晶片）中的 路徑，以提升發光晶片中的電流分佈的均勻度，進= 發光晶片封裝結構的出光均勻度與總發光效率。 具，而言’本發明是在發光晶片封裝結構中加入磁 兀件以提供發光晶#封裝結射的發光^ _磁場， 性地描述磁場對於發光晶片中的電流路徑的影響^ 圖3繪示本發明—實施例之發光 光晶片的剖面圖。請參照圖3，發光晶片： 式發光二極體晶片，其包括二電極31G、320、二第 ㈣ο，ί:—發光層350 “及-透㈣ 70其中發光層35〇位於 :ί/4。之間’透明導電㈣位於第一:=二 =於透明導電層37^二_ 氧化錮=可導電且為—翻膜層，其可由 ㈣g J ⑸如，IT〇)、和AIZnO算 雜層和N摻雜^摻雜層330和第二摻雜層34G可為P掺 201103171 rjjyouuHui'W 31320twf.doc/d —發光晶# 300位於一磁場中，磁場36〇是由本實 關^發光晶片封裝結構中的—磁性元件（未繪示），產生， 且磁场360心向紙面。由磁場感應而生的羅儉兹力會推動 電子’而使得電流向左偏移。電流密度的主要分佈（由電 子流線表示）可從電極310與32〇之間的區域移至光出射 平面（__〇Utplane) 332下方的區域，這就表示磁場360 可有效提向電流密度的均勻度’且可實質上提高發光晶片 3〇〇的總發光效率。上文或下文中所述的光出射平面说 係疋義為第一摻雜層330上未被電極31〇覆蓋的表面。在 _ 此需強調的是，只要有磁場的分量垂直於發光晶片内 部電流的流動方向’便會感應出羅倫兹力以使電流產生漂 移’而能夠提高發光效率。 在另一實施例中，圖4繪示本發明一實施例之發光晶 片封裝結構中的發光晶片的俯視圖。請參照圖4，發光晶 片400例如為水平式發光二極體晶片。與前面的實施例類 似由磁场430感應而生的羅偷兹力會推動電子，而使得 位於發光晶片400的電極410、420之間的電流向左偏移。 如此-來，電流路徑可擴展到更大區域（左部區域），巾 琴 形成更均勻的電流分佈。Hall Effect is one of many physical phenomena that applies an external magnetic field to a current as it flows through a wire. A component perpendicular to the direction of current flow produces a Lorent to the current = (F=q* V*B), and the Lorentz force (L caz, sw) causes the current to be angularly offset. The invention utilizes the phenomenon of Huo-effect to change the path in a wafer (such as a light-emitting diode wafer or a laser diode wafer) to improve the uniformity of current distribution in the light-emitting chip, and to enter the structure of the light-emitting chip package. Light uniformity and total luminous efficiency. In the present invention, the present invention is to add a magnetic element in an illuminating chip package structure to provide a luminescent field of the luminescent crystal package, and to describe the influence of the magnetic field on the current path in the illuminating wafer. A cross-sectional view of a luminescent optical wafer of the present invention. Referring to FIG. 3, an illuminating wafer: a luminescent diode chip includes two electrodes 31G, 320, two (four) ο, ί: - luminescent layer 350 "and - transparent (four) 70 wherein the luminescent layer 35 〇 is located at: ί / 4. Between the 'transparent conductive (four) is located at the first: = two = in the transparent conductive layer 37 ^ two 锢 锢 = conductive and - reticle layer, which can be (4) g J (5), such as IT 〇), and AIZnO domino layer and The N doping layer 330 and the second doping layer 34G may be P doped 201103171 rjjyouuHui'W 31320twf.doc / d - the illuminating crystal # 300 is located in a magnetic field, and the magnetic field 36 〇 is formed by the actual light emitting chip package structure Medium-magnetic element (not shown), generated, and the magnetic field 360 is directed to the paper surface. The Rosie force generated by the magnetic field induces the electron 'and shifts the current to the left. The main distribution of current density (by electron The streamline representation can be moved from the area between the electrodes 310 and 32〇 to the area below the light exit plane (__〇Utplane) 332, which means that the magnetic field 360 can effectively improve the uniformity of the current density' and can be substantially Increasing the total luminous efficiency of the light-emitting wafer 3〇〇. The light exiting flat described above or below It is said that the surface of the first doped layer 330 is not covered by the electrode 31. In this case, it is emphasized that as long as the component of the magnetic field is perpendicular to the flow direction of the current inside the light-emitting chip, Loren is induced. In another embodiment, FIG. 4 is a top view of a light emitting chip in an illuminating chip package structure according to an embodiment of the invention. Referring to FIG. 4, the illuminating wafer 400 is illustrated. For example, a horizontal light-emitting diode wafer. Similar to the previous embodiment, the sneak force induced by the magnetic field 430 pushes the electrons, causing the current between the electrodes 410, 420 of the light-emitting wafer 400 to shift to the left. In this way, the current path can be extended to a larger area (left area), and the towel body forms a more uniform current distribution.

圖5繪示本發明一實驗例之對發光晶片施加的磁場強 度與發光晶片的發光效率的關係曲線圖。圖5繪示9組發 光晶片於磁場中的發光效率的實驗值（虛線），以及一模 擬曲線（實線）。 S 由圖5可知，對發光晶片施加磁場確實可有效提升發 10 201103171 ^ tOTW 31320twf.d〇c/ci 光晶片的發光效率，且卷 片的發光效率達到最大=%為—特定值時，可使發光 至於漂移電流的擴散妒 理，而用於朗外部磁下即推導出相關原 在物理學中=何影響電流密度。 上的力。粒子將受:；=是指電磁場中施加在帶電粒子 以繼的力%電=，，形成的力。磁 算： 、了通過下面的維倫茲力方程式來計 ^ = -^(£ + Ινχ^), B = BX+By+Bz > 二=Vx+\+Vz， 1 = EX+Ey+Ez。 其申，只為羅倫茲力，五為恭妒β 電荷，ν為電子的瞬時速度，磁場，0粒子 輿電場咖的線性方向上加速= 二電子係在 時速度向量ν和磁場,的;向康=价其將 在靜I電場中广/數為零，因此漂移速度如下： {Ex+~^vy~zy-vz) » 晶Fig. 5 is a graph showing the relationship between the magnetic field intensity applied to the light-emitting wafer and the luminous efficiency of the light-emitting wafer in an experimental example of the present invention. Fig. 5 is a graph showing experimental values (dashed line) of luminous efficiencies of nine groups of illuminating wafers in a magnetic field, and an analog curve (solid line). S It can be seen from FIG. 5 that the application of a magnetic field to the illuminating wafer can effectively improve the luminous efficiency of the optical film of the 10 201103171 ^ tOTW 31320 twf.d 〇 c/ci, and the luminous efficiency of the winding reaches a maximum value of % = a specific value. The luminescence is caused by the diffusion of the drift current, and the external physics is used to derive the relevant original physics = what influences the current density. The force on it. The particle will be subjected to:; = is the force that is applied to the charged particle in the electromagnetic field. The magnetic calculation is calculated by the following Velence force equation ^ = -^(£ + Ινχ^), B = BX+By+Bz > 2 = Vx+\+Vz, 1 = EX+Ey+Ez. Its application is only for Lorentz force, five for Christine's charge, ν for electron's instantaneous velocity, magnetic field, zero particle 舆 electric field for linear acceleration = two electrons for velocity vector ν and magnetic field; Kang = price will be wide/number zero in the static I electric field, so the drift speed is as follows: {Ex+~^vy~zy-vz) » Crystal

V y v z m ex ——— m er ‘ ~ 一 m ~K~^vz) c c成今Vx—bV y v z m ex ——— m er ‘ ~ a m ~K~^vz) c c into the present Vx-b

A 其令w為電子的有效質量。 基於前述絲式，M轉“子是料靜磁場万 201103171 r J I 7〇υυ^υ i'W 3 1320twf.d〇c/d 軸向，以角速度wc=沾/mc在螺旋路徑中漂移。舉例而言， 為了將漂移電流擴展至負X軸方向’需要增加磁場在Z軸 (瓦）上的分量，並減小磁場在3；轴（A)上的分量。此 外，當外部電流在少轴方向上的速度增加時，電流在尤軸 方向上的速度也會增加，從而提高電流的均勻性。在此需 強調的是’只要有磁場的分量垂直於LED内部電流的流動 方向，即會感應出電磁力以使電流產生漂移，從而提高發 光效率。 在向發光晶片施加外部磁場的情況下，不僅改變了電 流路牷，而且也改變了半導體中載子密度的均勻性。因此， 即使在注入電流的量保持不變的情況下，發光晶片仍具有 更南的光電子轉換效率。 θ值得注意的是，本發明的發光晶片上所施加之外部磁 場的強度係大於0.01特斯拉，並且可為定值、隨時間變化 的值（time-varying value )或呈梯度變化的值 (gradient-varying value )，但並不限於這些情況。此外， 磁場方向與發光方向之間的角度為0至360度。再者，此 磁場疋由磁鐵、磁性薄膜、電磁鐵或任何其他類型的磁性 材料來提供，且磁源的數目可超過一個。 基於前述的結論，在實際應用中，發光晶片可通過各 式與磁性封料組合，諸如通過環氧樹脂（ep〇Xy)、金 ‘建 5 (metal bonding)、晶片鍵合（wafer bonding)、 外延耿入（epitaxyembeding)及塗布。此外，磁性材料可 5至务光日日片本身’且可製作為基底、基台（submount)、 12 201103171 rjLyouunOTW 31320twf.doc/d 電磁鐵、金屬塊（slug)、保持器或磁性散熱片（magnetic heat sink)，或者生產為磁膜、磁塊或磁環以便提供作為 發光晶片的磁場。發光晶片可為垂直式或水平式的發光: 極體晶片或雷射二極體晶片。 以下將分別介紹本發明之多種發光晶片封装結構的實 施例，但以下僅為舉例說明，並非用以限定本發明。此外， 以下不同的實施例的技術特徵可任意組合。 圖6A繪示本發明一實施例之發光晶片封裝結構的剖 面圖，圖6B繪示圖6A的俯視圖’其中圖6A為沿圖6B 中Ι-Γ線段的剖面圖。圖6C〜圖6M繪示圖6A的發光晶 片封裝結構的多種變化。值得注意的是，為簡化說明，圖 6D〜圖6M省略繪示封裝膠體。 請同時參照圖6A與圖6B，本實施例之發光晶片封裝 結構600包括一承載器61〇、一發光晶片62〇、—磁性元件 630以及一封裝膠體64〇。發光晶片62〇配置於承載器 的一平面612上，承載器610例如為一陶瓷基板、一矽基 板 紹基板、一銅基板、一向導熱基板或—線路板。由 於磁性元件630施加在發光晶片62〇上的磁場大小與距離 成反比，因此，磁性元件630與發光晶片62〇之間的最小 間距D為小於寺於5公分且大於〇公分，在本實施例中， 磁〖生元件630與發光晶片620之間的最小間距d為小於等 於3公分且大於〇公分。值得注意的是，在本實施例中， 磁性元件630與發光晶片620之間的最小間距D是指磁性 兀件630的表面（即侧壁）與發光晶片62〇的表面（即側 13 201103171 nyeuuwfV/ 3l320t\vf.doc/d 壁）之間的間距的最小值。 值得注意的是’纟於本實關的雖元件㈣是位於 發光晶片620的周邊，故磁性元件㈣可對發光晶片⑽ 施加一磁場，以於發光晶片封裝結構6〇〇運作時，提高發 光晶片62G中的電流分佈的均勾度。如此—來，磁性元件 630可有助於提高本實施例之發光晶片封裝結構6〇〇的總 發光效率以及出光的均勻度。 “ 在本實施例中，磁性元件630為一環狀結構，且發光 晶片620位於磁性元件63〇的一開口 632中。為使磁性元 件630能更有效地反射發光晶片620所發出的光，磁性元 件630可具有朝向發光晶片620的上方的一斜面634 (如 圖6C所示）’斜面634的法向量N1與承載器610的平面 612的法向量N2的夾角Θ小於90度，並可在斜面634上 配置一反射層650，以反射發光晶片620所發出的光。在 本實施例中，封裝膠體640覆蓋發光晶片620，且磁性元 件630配置於封裝膠體640的邊緣。 在本實施例中，磁性元件630可為圓環狀。在其他實 • . 施例中，磁性元件630亦可選擇性地為三角形環狀（圖 6〇)、方形環狀（圖6E)、六邊形環狀（圖6F)、其他 多邊形環狀或者是其他不規則形環狀。此外，在其他實施 例中，磁性元件630還可為一塊狀結構（圖6G)、多個塊 狀結構（圖6H與圖61)，或者是一或多個條狀結構（圖 6J與圖6K)。 當磁性元件630為多個塊狀結構630a時，塊狀結構 14 201103171 ΐΌΐ^ουυ40Τψ 31320twf.doc/d 630a可選擇性地位於發光晶片620的相對二侧（圖6Η)， 或者是選擇性地環繞發光晶片620 (圖61)。當磁性元件 630為多個條狀結構630b時，條狀鲒構630b可選擇性地 位於發光晶片620的相對二側（圖6J)，或者是選擇性地 環繞發光晶片620 (圖6K)。 在本實施例中，磁性元件630的材質包括磁性材料， 磁性材料例如為硬磁材料。此外，磁性材料亦可為鐵磁材 料，諸如 Rb、Ru ' Nd、Fe、Pg、Co、Ni、Mn、Cr、Cu、A Let w be the effective mass of the electron. Based on the above-mentioned wire type, the M-turn "sub-material static magnetic field million 201103171 r JI 7〇υυ^υ i'W 3 1320twf.d〇c/d axial direction, with angular velocity wc = dip / mc drift in the spiral path. In order to extend the drift current to the negative X-axis direction, it is necessary to increase the component of the magnetic field on the Z-axis (Watt) and reduce the component of the magnetic field at 3; the axis (A). In addition, when the external current is on the axis When the speed in the direction increases, the speed of the current in the direction of the special axis also increases, thereby increasing the uniformity of the current. It is emphasized here that 'as long as the component of the magnetic field is perpendicular to the flow direction of the internal current of the LED, it will sense Electromagnetic force is generated to cause current to drift, thereby improving luminous efficiency. In the case of applying an external magnetic field to the light-emitting wafer, not only the current path is changed, but also the uniformity of the carrier density in the semiconductor is changed. Therefore, even in the injection The illuminating wafer still has a more souther photoelectron conversion efficiency while the amount of current remains unchanged. θ It is noted that the intensity of the external magnetic field applied to the luminescent wafer of the present invention is greater than 0.01 Tesla. And it can be a fixed value, a time-varying value or a gradient-varying value, but is not limited to these cases. In addition, the angle between the magnetic field direction and the light-emitting direction is 0. Up to 360 degrees. Further, the magnetic field is provided by a magnet, a magnetic film, an electromagnet or any other type of magnetic material, and the number of magnetic sources may exceed one. Based on the foregoing conclusions, in practical applications, the light-emitting wafer may be By various combinations with magnetic sealing materials, such as by epoxy resin (ep〇Xy), gold metal bonding, wafer bonding, epitaxy embedding, and coating. Can be 5 to the light day of the film itself' and can be made into a substrate, a submount, 12 201103171 rjLyouunOTW 31320twf.doc / d electromagnet, slug, retainer or magnetic heat sink Or produced as a magnetic film, magnetic block or magnetic ring to provide a magnetic field as a light-emitting wafer. The light-emitting chip can be vertical or horizontal light: a polar body wafer or a laser diode wafer. The embodiments of the various light-emitting chip package structures of the present invention will be separately described, but the following are merely illustrative and are not intended to limit the present invention. Further, the technical features of the following different embodiments may be arbitrarily combined. FIG. 6A illustrates a first embodiment of the present invention. FIG. 6A is a cross-sectional view of the illuminating chip package structure of FIG. 6A. FIG. 6C is a cross-sectional view of the illuminating chip package structure of FIG. 6A. FIG. A variety of changes. It should be noted that, for simplicity of explanation, FIG. 6D to FIG. 6M omit the encapsulant. Referring to FIG. 6A and FIG. 6B, the illuminating chip package structure 600 of the present embodiment includes a carrier 61 〇, an illuminating chip 62 〇, a magnetic component 630, and an encapsulant 64 〇. The light-emitting chip 62 is disposed on a plane 612 of the carrier. The carrier 610 is, for example, a ceramic substrate, a substrate, a copper substrate, a conductive substrate or a circuit board. Since the magnitude of the magnetic field applied by the magnetic element 630 on the light-emitting chip 62 is inversely proportional to the distance, the minimum spacing D between the magnetic element 630 and the light-emitting chip 62 is less than 5 cm and greater than 〇 cm, in this embodiment. The minimum distance d between the magnetic element 630 and the light-emitting chip 620 is 3 cm or less and greater than 〇 cm. It should be noted that in the present embodiment, the minimum spacing D between the magnetic element 630 and the luminescent wafer 620 refers to the surface (ie, the sidewall) of the magnetic element 630 and the surface of the luminescent wafer 62 ( (ie, the side 13 201103171 nyeuuwfV The minimum value of the spacing between /3l320t\vf.doc/d wall). It is worth noting that although the component (4) is located at the periphery of the light-emitting chip 620, the magnetic component (4) can apply a magnetic field to the light-emitting chip (10) to improve the light-emitting chip when the light-emitting chip package structure 6 is operated. The uniformity of the current distribution in 62G. As such, the magnetic member 630 can contribute to the improvement of the total luminous efficiency and uniformity of light emission of the light-emitting chip package structure 6 of the present embodiment. In the present embodiment, the magnetic element 630 is a ring-shaped structure, and the light-emitting chip 620 is located in an opening 632 of the magnetic element 63. In order to enable the magnetic element 630 to more effectively reflect the light emitted by the light-emitting chip 620, the magnetic The element 630 can have a slope 634 (shown in FIG. 6C) toward the upper side of the light-emitting wafer 620. The angle Θ of the normal vector N1 of the slope 634 and the normal vector N2 of the plane 612 of the carrier 610 is less than 90 degrees, and can be on the slope A reflective layer 650 is disposed on the 634 to reflect the light emitted by the light-emitting chip 620. In the embodiment, the encapsulant 640 covers the light-emitting chip 620, and the magnetic element 630 is disposed on the edge of the encapsulant 640. In this embodiment, The magnetic element 630 can be annular. In other embodiments, the magnetic element 630 can also be selectively triangular (Fig. 6A), square (Fig. 6E), and hexagonal ( Figure 6F), other polygonal rings or other irregularly shaped rings. Further, in other embodiments, the magnetic element 630 may also be a piece-like structure (Fig. 6G), a plurality of block structures (Fig. 6H and 61), or one or more Structure (Fig. 6J and Fig. 6K) When the magnetic element 630 is a plurality of block structures 630a, the block structure 14 201103171 ΐΌΐ^ουυ40Τψ 31320twf.doc/d 630a can be selectively located on opposite sides of the light emitting chip 620 (Fig. 6Η), or selectively surrounds the light-emitting wafer 620 (FIG. 61). When the magnetic element 630 is a plurality of strip-shaped structures 630b, the strip-shaped structures 630b are selectively located on opposite sides of the light-emitting wafer 620 (FIG. 6J). Or in the embodiment, the material of the magnetic element 630 includes a magnetic material, and the magnetic material is, for example, a hard magnetic material. In addition, the magnetic material may also be a ferromagnetic material. Such as Rb, Ru ' Nd, Fe, Pg, Co, Ni, Mn, Cr, Cu,

eh、Pt、Sm、Sb、Pt或其合金。磁性材料還可以是陶瓷 材料’諸如Mn、Fe、Co、Cu和V的氧化物，Cr2〇3、CrS、Eh, Pt, Sm, Sb, Pt or alloys thereof. The magnetic material may also be a ceramic material such as oxides of Mn, Fe, Co, Cu and V, Cr2〇3, CrS,

MnS、MnSe、MnTe、Μη、Fe、Co 或 Ni 的氟化物，v、Fluoride of MnS, MnSe, MnTe, Μη, Fe, Co or Ni, v,

Cr、Fe、Co、Ni和Cu的氯化物，Cu的溴化物、、Chloride of Cr, Fe, Co, Ni and Cu, bromide of Cu,

MnAs、MnBi、α-Μη、MnCl2 · 4H20、MnBr2 · 4H2〇、CuQ . 2H20、C〇(NH4)x(S04)xCI2 . 6H2〇、FeC〇3 和 FeC〇 2 2MgC03。 3 另外，在本實施例中，當磁性元件63〇的N極伽盘 S極638為垂直排列時，則磁性元件㈣可㈣ 施加-接近垂直的磁場(圖⑹，而當磁性元 == 極636與S極638為水平排列時，則磁性元件63(^ = 光晶片620施加一接近水平的磁場（圖。 '七MnAs, MnBi, α-Μη, MnCl2 · 4H20, MnBr2 · 4H2〇, CuQ . 2H20, C〇(NH4)x(S04)xCI2 . 6H2〇, FeC〇3 and FeC〇 2 2MgC03. In addition, in the present embodiment, when the N-pole Galvanic S pole 638 of the magnetic element 63 is vertically aligned, the magnetic element (4) can (4) apply a near-vertical magnetic field (Fig. (6), and when the magnetic element == pole When the 636 and S poles 638 are horizontally arranged, the magnetic element 63 (^ = the optical wafer 620 applies a magnetic field close to the horizontal (Fig. 'Seven

圖Μ緣不本發明一實施例之發光晶 面圖，圖7B繪圖為7A之發光晶片封 边、‘，。構的。1J 圖7C ^ 7B之發光^難結_俯_ 圖7C中11-11，線段的剖面圖。 ㈡圖7β為沿 201103171 toiysuuwi'W 31320twf.doc/d 請參照圖7A，本實施例之發光晶片封裝結構700與圖 6A的發光晶片封裝結構600大致相同，差異只在於發光晶 片封裝結構700的封裝膠體710是全面覆蓋磁性元件 720。在本實施例中’當磁性元件72()為一環狀結構時，磁 性元件720的開口 722的寬度wi與發光晶片62〇的寬度 W2的比值例如大於1且小於等於丨.5，且可選擇性地在開 口 722中填入一螢光材料730，螢光材料730覆蓋發光晶 片 620。 另外，在本實施例中，可在開口 722的内壁722a上形 成一光學膜層740，光學膜層740可為一反射層或是一吸 光層。當光學膜層740為反射層時，反射層可反射發光晶 片620照辦至開口 722的内壁722a的光線’以提升發光晶 片620的光線利用率。當光學膜層74〇為吸光層時，吸光 層可吸收發光晶片620照射至開口 722的内壁722a的光 線，以使發光晶片封裝結構7〇〇的出光方向統一。 此外，發光晶片封裝結構700還可結合圖6A中的磁 性兀件630而制圖7B與圖7C巾的發光晶片封裝 施，且發光晶片域結構700a中的發光晶片62〇與磁性 元件，之間的最小間距D1可小於發光晶片620與磁性 元件630之間的最小間距。 圖8A緣示本發明一實施例之發光晶 圖-、圖心會…發光晶片封裝= 請參照® 8A，本實施例之發光晶片封裝結構_包括 16 201103171 31320twf.doc/d 一承載器810、一發光晶片82〇、一磁性元件830以及—封 裝膠體840，其中承載器81〇例如為一板狀結構。承載器 810可具有一凹槽812，且發光晶片82〇配置於凹槽812 中。磁性元件830可選擇性地配置於承載器810上並位於 凹槽812内，且磁性元件83〇位於發光晶片82〇的周邊且 與凹槽812的一内壁812a之間存在一間距D3。在本實施 例中，磁性元件830例如為一環狀結構，且發光晶片82〇 位於磁性元件830的一開口 832中。此外，為調整發光晶 片封裝結構800所發出的光的顏色，可在磁性元件83〇的 開口 832内填入一螢光材料85〇，螢光材料85〇覆蓋發光 晶片820。封裝膠體840可形成在螢光材料85〇上，以作 為一光學透鏡。 在其他實施例中，凹槽812的内壁（未繪示）可為一 朝向發光晶片820的上方的斜面。如此一來，發光晶片82〇 所發出的光可經前述斜面反射而朝向大致相同的方向前 進’進而可提rlj發光晶片封裝結構的光指向性以及出光強 度。換&之，當凹槽的内壁上未貼附磁性元件時，凹槽的 内壁可為一朝向發光晶片的上方的斜面。 睛參照圖8B ’本貫施例之發光晶片封裝結構8〇〇a的 結構大致上與圖8A的發光晶片封裝結構8〇〇相似，兩者 的差異之處在於發光晶片封裝結構8〇〇a的一磁性元件 830a是貼附在凹槽812的内壁上。 在其他實施例中，磁性元件83〇a可具有朝向發光晶片 820的上方的一斜面（未繪示）。如此—來，發光晶片82〇 17 201103171 FSiySOO^OLW 3L320twf.doc/d 所發出的光可經前述斜面反射而朝向大致相同的方向前 進’進^可提高發光晶片封裝結構的綠向性以及出光強 度。換&之，當發光晶片與磁性元件皆配置於承載器的凹 槽中且磁性元件在里後座度璧^，磁性元件可具有 朝向發光晶片上方的一斜面。 清参照® 8C ’本實施例之發光晶片封農結構8_的 結構大致上與® 8A的發光⑸縣結構_相似，兩者 的差異之處在於發光晶片封裝結構8〇〇b的一磁性元件 830b是配置於承載器810的一诞璧_814上。 圖9A〜圖9D分別繪示圖8A〜圖8C的四種變化結 請參關9A，本實施例之發光晶片封裳結構_的結 構相似於圖8A與圖8B的發光晶片封裳結構8〇〇、， 差異之處僅在於發光晶片封裝結構9⑼同粗有二磁性元 件_、920，其中磁性元件910的配置位置相同於圖δΑ 中的磁性元件㈣的配置位置，雜元件％㈣配置位置 相同於圖8Β中的磁性元件83〇a的配置位置。在本♦施例 中’發光晶片820與磁性元件910之間的最小間距戸以小 於發光晶片820與磁性元件920之間的最小間距出。具體 :言’在本實施例中，磁性元件910是 二 與磁性元件920之間。 請參㈣9B，本實施例之發光晶片封 結構相似於圖8A與圖8C的發光晶片封襄結構『⑻、麵， 差異之處僅在於發光晶片封裝結構_a Μ具有二磁性 18 201103171 rjiy〇uu40TW 31320twf.doc/dThe light-emitting crystallographic view of an embodiment of the present invention is not shown in Fig. 7B, and the light-emitting chip edge of 7A is shown in Fig. 7B. Constructed. 1J Figure 7C ^ 7B illuminating ^ difficult knot _ _ _ 11C in Figure 7C, a sectional view of the line segment. (b) FIG. 7β is along 201103171 toiysuuwi'W 31320twf.doc/d. Referring to FIG. 7A, the light emitting chip package structure 700 of the present embodiment is substantially the same as the light emitting chip package structure 600 of FIG. 6A except that the package of the light emitting chip package structure 700 is different. The gel 710 is a full cover magnetic element 720. In the present embodiment, when the magnetic member 72 is a ring-shaped structure, the ratio of the width wi of the opening 722 of the magnetic member 720 to the width W2 of the light-emitting chip 62A is, for example, greater than 1 and less than or equal to 丨.5, and may be A phosphor material 730 is selectively filled in the opening 722, and the phosphor material 730 covers the light emitting wafer 620. In addition, in this embodiment, an optical film layer 740 may be formed on the inner wall 722a of the opening 722. The optical film layer 740 may be a reflective layer or a light absorbing layer. When the optical film layer 740 is a reflective layer, the reflective layer can reflect the light ray of the luminescent wafer 620 to the inner wall 722a of the opening 722 to enhance the light utilization efficiency of the luminescent wafer 620. When the optical film layer 74 is a light absorbing layer, the light absorbing layer can absorb the light of the light-emitting chip 620 irradiated to the inner wall 722a of the opening 722 to unify the light-emitting direction of the light-emitting chip package structure 7A. In addition, the light emitting chip package structure 700 can also be combined with the magnetic element 630 of FIG. 6A to form the light emitting chip package of FIG. 7B and FIG. 7C, and between the light emitting chip 62〇 and the magnetic element in the light emitting wafer domain structure 700a. The minimum spacing D1 may be less than the minimum spacing between the luminescent wafer 620 and the magnetic element 630. FIG. 8A shows an illuminating crystal image of an embodiment of the present invention, and a luminescent wafer package. Referring to FIG. 8A, the illuminating chip package structure of the present embodiment includes 16 201103171 31320 twf.doc/d a carrier 810, A light-emitting chip 82A, a magnetic element 830, and an encapsulant 840, wherein the carrier 81 is, for example, a plate-like structure. The carrier 810 can have a recess 812 and the light emitting wafer 82 is disposed in the recess 812. The magnetic member 830 is selectively disposed on the carrier 810 and located within the recess 812, and the magnetic member 83 is located at the periphery of the illuminating wafer 82A and has a spacing D3 from an inner wall 812a of the recess 812. In the present embodiment, the magnetic member 830 is, for example, a ring structure, and the light emitting chip 82 is located in an opening 832 of the magnetic member 830. In addition, in order to adjust the color of the light emitted by the light-emitting wafer package structure 800, a phosphor material 85 is filled in the opening 832 of the magnetic member 83, and the phosphor material 85 is covered with the light-emitting chip 820. The encapsulant 840 can be formed on the phosphor material 85A as an optical lens. In other embodiments, the inner wall (not shown) of the recess 812 can be a slope that faces upward of the light emitting wafer 820. In this way, the light emitted from the light-emitting chip 82A can be reflected in the substantially same direction by the oblique reflection, thereby improving the light directivity and the light-emitting intensity of the light-emitting chip package structure. For example, when the magnetic member is not attached to the inner wall of the recess, the inner wall of the recess may be a slope facing upward of the light-emitting wafer. Referring to FIG. 8B, the structure of the light-emitting chip package structure 8A of the present embodiment is substantially similar to that of the light-emitting chip package structure 8A of FIG. 8A, and the difference between the two is that the light-emitting chip package structure 8A A magnetic member 830a is attached to the inner wall of the recess 812. In other embodiments, the magnetic element 83A may have a bevel (not shown) that faces above the luminescent wafer 820. In this way, the light emitted by the light-emitting chip 82〇17 201103171 FSiySOO^OLW 3L320twf.doc/d can be advanced in the substantially same direction through the aforementioned oblique reflection to improve the greenness and light intensity of the light-emitting chip package structure. . For the same, when the illuminating chip and the magnetic element are disposed in the recess of the carrier and the magnetic element is in the rear seat, the magnetic element may have a slope facing the upper surface of the illuminating wafer. Clear Reference® 8C 'The structure of the luminescent wafer sealing structure 8_ of the present embodiment is substantially similar to the illuminating (5) county structure _ of 8A, and the difference between the two is a magnetic element of the light emitting chip package structure 8〇〇b 830b is disposed on a birthday _814 of the carrier 810. 9A to 9D respectively illustrate the four variations of FIG. 8A to FIG. 8C, and the structure of the luminescent wafer sealing structure _ is similar to that of the luminescent wafer sealing structure of FIGS. 8A and 8B. 〇, the difference is only that the light-emitting chip package structure 9 (9) is the same as the thick two magnetic elements _, 920, wherein the magnetic element 910 is disposed at the same position as the magnetic element (four) in the figure δ ,, and the miscellaneous component % (four) is disposed at the same position The arrangement position of the magnetic member 83〇a in Fig. 8A. In the present embodiment, the minimum spacing between the luminescent wafer 820 and the magnetic element 910 is less than the minimum spacing between the luminescent wafer 820 and the magnetic element 920. Specifically, in the present embodiment, the magnetic member 910 is between the two and the magnetic member 920. Referring to (4) 9B, the light-emitting chip package structure of this embodiment is similar to the light-emitting chip package structure of FIG. 8A and FIG. 8C. (8), the difference is only in the light-emitting chip package structure _a Μ has two magnetic 18 201103171 rjiy〇uu40TW 31320twf.doc/d

元件910a、920a，其中磁性元件910a的配置位置相同於 圖8A中的磁性元件830的配置位置，磁性元件92如二； 置位置相同於圖8C中的磁性元件830b的配置位¥。+配 實施例中’發光晶片820與磁性元件91〇a之間的最小門距 D6小於發光晶片820與磁性元件92〇a之間的最小卩\距 D7。具體而言，在本實施例中，磁性元件9l〇a是位二= 光晶片820與磁性元件920a之間。 ' X φ 請參照圖9C，本實施例之發光晶片封裝結構900b的 結構相似於圖8A〜圖8C的發光晶片封裝結構8〇〇、8〇〇a、 800b ’差共之處僅在於發光晶片封裝結構9〇〇b是同時具有 三磁性元件910b、920b、930b ’其中磁性元件9i〇b的配 置位置相同於圖8A中的磁性元件830的配置位置，磁性 元件920b的配置位置相同於圖8B中的磁性元件83〇a的 配置位置’磁性元件930b的配置位置相同於圖gc中的磁 性元件830b的配置位置。在本實施例中，磁性元件92〇b 是位於磁性元件910b與磁性元件930b之間，且磁性元件 • 910b最接近發光晶片82〇。 請參照圖9D ’本貫施例之發光晶片封農結構9〇〇c的 結構相似於圖8B與圖8C的發光晶片封裝結構、 800b，差異之處僅在於發光晶片封裝結構900c同時具有二 磁性元件910c、920c ’其中磁性元件91〇c的配置位置相 同於圖8B中的磁性元件830a的配置位置，磁性元件92〇c 的配置位置相同於圖8C中的磁性元件83%的配置位置。 圖10A繪示本發明一貫施例之發光晶片封裝結構的剖 19 201103171 ινΰυυ^υ fW 31320twf. doc/d 面圖，圖10B〜圖l〇F繪示圖l〇A之發光晶片封裝結構的 五種變化。 請參照圖10A，本實施例之發光晶片封裝_結構1〇〇〇 包括一承載器1010、一發光晶片1020、一磁性元件1〇3〇 與一封裝膠體1040，其中承載器1010包括一基底1〇12、 一殼體1014、一第一引腳1016與一第二引腳ίο”，其中 基底1012的材質為高導熱係數的材料（例如金屬），前述 高導熱係數的材料的導熱係數為23。 殼體1014的材質為絕緣材料，且殼體ι〇14覆蓋部分 基底1012、部分第一引腳1016與部分第二引腳，並 分隔基底1012、第一引腳1016與第二引腳low。發光晶 片1020配置於基底1012之未被殼體1014所覆蓋的表面 1012a上’發光晶片1020於運作時所產生的熱可通過基底 1012而傳遞至外界環境，進而達到快速散熱的效果。磁性 元件1030配置於基底1〇12的表面l〇]_2a上並位於發光晶 片1020的周邊。封裝膠體1〇4〇可選擇性地覆蓋發光晶片 1020與磁性元件1〇3〇。 在本實施例中，由於磁性元件1030可對發光晶片1〇2〇 施加一磁場（侧向磁力），而基底1012可有助於發光晶片 1020散熱，且發光晶片1〇2〇可電性連接至第一引腳low 與第二引腳1018，因此，第一、第二引腳1〇16、1〇18、基 底1012與磁性元件1〇3〇分別與發光晶片1〇2〇之間存在有 電、熱、磁三種關係。在本實施例中，由於第―、第二引 腳1016、1018、基底1012與磁性元件1〇3〇皆為獨立運作 20 201103171 1J ^ουυη0Ί w 31.320(wf.d〇c/d 而不需透過彼此，因此，私朵曰y私壯7 ,The elements 910a, 920a, wherein the magnetic element 910a is disposed at the same position as the magnetic element 830 in Fig. 8A, the magnetic element 92 is in the same position as the magnetic element 830b in Fig. 8C. In the embodiment, the minimum gate distance D6 between the luminescent wafer 820 and the magnetic member 91A is smaller than the minimum 卩/D distance D7 between the luminescent wafer 820 and the magnetic member 92A. Specifically, in the present embodiment, the magnetic element 91a is a bit two = between the optical wafer 820 and the magnetic element 920a. 'X φ Referring to FIG. 9C, the structure of the light-emitting chip package structure 900b of the present embodiment is similar to that of the light-emitting chip package structures 8A, 8A, 800b of FIGS. 8A to 8C. The package structure 9〇〇b has three magnetic elements 910b, 920b, 930b at the same time, wherein the arrangement position of the magnetic elements 9i〇b is the same as that of the magnetic element 830 in FIG. 8A, and the arrangement position of the magnetic element 920b is the same as that of FIG. 8B. The arrangement position of the magnetic element 83A in the 'magnetic element 930b' is the same as the arrangement position of the magnetic element 830b in Fig. gc. In the present embodiment, the magnetic element 92 〇 b is located between the magnetic element 910b and the magnetic element 930b, and the magnetic element 910b is closest to the luminescent wafer 82 〇. Referring to FIG. 9D, the structure of the light-emitting chip enclosure structure 9〇〇c of the present embodiment is similar to that of the light-emitting chip package structure of FIG. 8B and FIG. 8C, 800b, except that the light-emitting chip package structure 900c has two magnetic properties at the same time. The elements 910c, 920c' in which the arrangement position of the magnetic element 91〇c are the same as the arrangement position of the magnetic element 830a in Fig. 8B, the arrangement position of the magnetic element 92〇c is the same as the arrangement position of the magnetic element 83% in Fig. 8C. 10A is a cross-sectional view of a light emitting chip package structure according to a preferred embodiment of the present invention, and FIG. 10B to FIG. Kind of change. Referring to FIG. 10A, the illuminating chip package _ structure 1 of the present embodiment includes a carrier 1010, an illuminating chip 1020, a magnetic component 1 〇 3 〇 and an encapsulant 1040, wherein the carrier 1010 includes a substrate 1 〇12, a housing 1014, a first pin 1016 and a second pin ίο", wherein the substrate 1012 is made of a material having a high thermal conductivity (for example, metal), and the thermal conductivity of the high thermal conductivity material is 23 The material of the housing 1014 is an insulating material, and the housing ι 14 covers a portion of the substrate 1012, a portion of the first pin 1016 and a portion of the second pin, and separates the substrate 1012, the first pin 1016 and the second pin low. The illuminating wafer 1020 is disposed on the surface 1012a of the substrate 1012 that is not covered by the housing 1014. The heat generated by the illuminating wafer 1020 during operation can be transmitted to the external environment through the substrate 1012, thereby achieving a rapid heat dissipation effect. 1030 is disposed on the surface of the substrate 1 〇 12 and located at the periphery of the luminescent wafer 1020. The encapsulant 1 〇 4 〇 can selectively cover the luminescent wafer 1020 and the magnetic element 1 〇 3 〇. In this embodiment, The magnetic element 1030 can apply a magnetic field (lateral magnetic force) to the luminescent wafer 1 〇 2 ,, while the substrate 1012 can help the illuminating wafer 1020 to dissipate heat, and the luminescent wafer 1 〇 2 〇 can be electrically connected to the first lead low And the second pin 1018, therefore, the first and second pins 1〇16, 1〇18, the substrate 1012 and the magnetic element 1〇3〇 respectively exist with the light-emitting wafer 1〇2〇 with electric, thermal, magnetic In the present embodiment, since the first and second pins 1016 and 1018, the substrate 1012, and the magnetic element 1〇3〇 are independently operated, 20 201103171 1J ^ουυη0Ί w 31.320 (wf.d〇c/d No need to pass through each other, therefore, private 曰 y private 7

九日日片封裝結構1000 熱、磁分離的封裝結構。 在其他實施例十，磁性元件卿可具有朝向發 =S Γ的一:面(未繪示Ο。如此—來，發光€:片I0 =發出的光可經前述斜面反射而朝向大致相同的方向前 進而可提南發光晶料裝結構的光指向性以及出光強 度。9-day solar package structure 1000 thermal and magnetic separation package structure. In other embodiments, the magnetic element may have a face facing the hair=S ( (not shown Ο. So, illuminate €: the film I0 = the emitted light may be reflected by the aforementioned slope to face in substantially the same direction The light directivity and the light output intensity of the south light-emitting crystal package structure can be further improved.

言月參照圖腦’本實_之發光日日以封裝結構麵a 的結構相似於圖10A的發光晶片封裝結構1〇〇〇,兩者的差 異之處在於發光晶片封裝結構i_a的磁性元件麵a較 接近發光晶片1020 ’因此，當磁性元件1Q3Q 時’磁性元件口觀可絲定義表面1012a 的螢光材料塗佈區域。在本實施例中，可在開口 1032内填 入一螢光材料1050，螢光材料105〇覆蓋發光晶片1〇2〇了 封裝膠體1040可覆蓋發光晶片1〇2〇、螢光材料1〇5〇與磁 性元件1030a。 凊參照圖ioc，本實施例之發光晶片封裝結構i〇〇〇b 的結構相似於圖10A的發光晶片封裝結構1〇〇〇，兩者的差 異之處在於發光晶片封裝結構l〇〇〇b的磁性元件l〇3〇b是 配置於基底1012之相對於表面1012&的一表面1012b上。 換言之’基底1012位於發光晶片1020與磁性元件i〇3〇b 之間，且磁性元件1030b會對發光晶片1020產生一正向磁 力。在本實施例中’磁性元件l〇30b的磁力線需穿過基底 1012才能對發光晶片1〇2〇施加一磁場，而基底1012需透 21 201103171 ^My»uu4ui'W 31320twf.d〇c/d 過磁性元件l〇3〇b才能將熱傳遞至外界環境，且第一、 二引腳1016、1018可獨立於磁性元件1〇3%盥美底咖 而運作’故本實施狀發光晶片封裝結構丨嶋^二孰磁 合一且電分離的封裝結構。 … 請參照圖10D，本實施例之發光晶片封&结構麵c 的結構相似於圖10A的發光晶片封裝結構1〇〇〇,兩者的差 異之處在於發光晶片封裝結構1000c的磁性元件i〇3〇c是 配置在第一引腳1016與第二引腳1018上。磁性元件1〇3= 可對电光aa片1020產生一側向磁力。由前述可知，第一、 第二引腳1016、1018需透過磁性元件1030c才能與發光晶 片1020電性連接，且基底1〇12可獨立於磁性元件i〇3〇c 以及第一、第二引腳1016、1018而將熱傳遞至外界環境， 故Ίδ光Ba片封裝結構1 〇〇〇c為·一電磁洽—且熱分離的封誓 結構。 請參照圖10E，本實施例之發光晶片封裝結構1 〇⑻d 的結構相似於圖10A的發光晶片封裝結構1〇〇〇,兩者的差 異之處在於發光晶片封裝結構l〇〇〇d具有二磁性元件 1030d、1030e，其中磁性元件1030d是配置在第一、第二 引腳1016、1018上，磁性元件1030e是配置在基底1012 之相對於表面1012a的一表面1012b上。磁性元件i〇3〇d 可對發光晶片1020產生一側向磁力，且磁性元件i〇3〇e 可對發光晶片1020產生一正向磁力。詳細而言，在本實施 例中，部分磁性元件l〇30e是内埋於基底1012中。 在本實施例中，由於第一、第二引腳1016、1018需透 22 201103171 urw 31320twf.cloc/d 過磁性元件1030d才能與發光晶片1〇2〇電性連接，且磁性 元件1030e的磁力線需穿過基底1012才能對發光晶片 1020施加一磁場，而基底1〇12需透過磁性元件1〇3〇e才 能將熱傳遞至外界環境，故發光晶片封裝結構1〇〇〇(11 一 電磁合一且熱磁—的封裝結構。 睛參照圖10F，本實施例之發光晶片封裝結構1〇〇〇e 的結構相似於圖10A與圖10C中的發光晶片封裝結構 1000、1000b，差異之處在於發光晶片封裝結構1〇〇(^^有 二磁性元件1030f、1030g，其中磁性元件1〇3〇f的配^位 置相同於圖10A中的磁性元件1〇3〇的配置位置，磁性元 件1030g的配置位置相同於圖10C中的磁性元件1〇3%的 配置位置。如此一來，磁性元件l〇3〇f可對發光晶片 產生一側向磁力，磁性元件1030g可對發光晶片1〇2〇產生 一正向磁力。 圖11A繪示本發明一實施例之發光晶片封裝結構的剖 面圖，圖11B與圖11C繪示圖11A之發光晶片封裝結構 的二種變化。 請參照圖11A，本實施例之發光晶片封裝結構11〇〇 的結構相似於圖10A的發光晶片封裝結構1000,兩者的差 異之處在於發光晶片封裝結構1100的基底1112具有一凹 槽1112a’且發光晶片1120位於凹槽1112&中，磁性元件 1130貼附基底1Π2的一側壁1112b並位於發光晶片112〇 的周邊。 在其他實施例中’凹槽1112a的内壁（未繪示）可為 23 201103171 FMysuuwrW 31320twf.doc/d 凹 一朝向發光晶片1120的上方的斜面。如此—來，發 1120所發出的光可經前述斜面反射而朝向大致::片 向前進’進而可提高發光晶片域結構的光指向性^方 光強度。換言之，當凹槽的内壁上未貼附磁性元件日±，出 槽的内壁可為一朝向發光晶片的上方的斜面。 ^ a 請參照圖11B’本實施例之發光晶片封裝結構 的結構相似於圖11A的發光晶片封裝結構u⑻，The structure of the package structure surface a is similar to that of the light-emitting chip package structure 1A of FIG. 10A, and the difference between the two is the magnetic element surface of the light-emitting chip package structure i_a. a is closer to the illuminating wafer 1020'. Therefore, when the magnetic element 1Q3Q, the magnetic element mouth can define the phosphor coating area of the surface 1012a. In this embodiment, a fluorescent material 1050 can be filled in the opening 1032, and the fluorescent material 105 covers the light-emitting chip 1〇2, and the encapsulant 1040 can cover the light-emitting chip 1〇2〇, the fluorescent material 1〇5. 〇 and magnetic element 1030a. Referring to FIG. 1c, the structure of the light emitting chip package structure i〇〇〇b of the present embodiment is similar to that of the light emitting chip package structure of FIG. 10A, and the difference between the two is that the light emitting chip package structure l〇〇〇b The magnetic element 10 〇 3 〇 b is disposed on a surface 1012 b of the substrate 1012 opposite to the surface 1012 & In other words, the substrate 1012 is located between the light-emitting wafer 1020 and the magnetic element i〇3〇b, and the magnetic element 1030b generates a positive magnetic force to the light-emitting wafer 1020. In the present embodiment, the magnetic lines of the magnetic element 10b need to pass through the substrate 1012 to apply a magnetic field to the light-emitting chip 1〇2, and the substrate 1012 needs to pass through 21 201103171 ^My»uu4ui'W 31320twf.d〇c/d The magnetic element l〇3〇b can transfer heat to the external environment, and the first and second pins 1016 and 1018 can operate independently of the magnetic element 1〇3%.丨嶋^孰 孰 孰 且 且 and electrically separated package structure. Referring to FIG. 10D, the structure of the light-emitting chip package & structure surface c of the present embodiment is similar to that of the light-emitting chip package structure of FIG. 10A, and the difference between the two is the magnetic element i of the light-emitting chip package structure 1000c. 〇3〇c is disposed on the first pin 1016 and the second pin 1018. The magnetic element 1〇3= can generate a side magnetic force to the electro-optical aa piece 1020. As can be seen from the foregoing, the first and second pins 1016 and 1018 need to pass through the magnetic component 1030c to be electrically connected to the light emitting chip 1020, and the substrate 1〇12 can be independent of the magnetic component i〇3〇c and the first and second leads. The feet 1016, 1018 transfer heat to the external environment, so the Ίδ光Ba sheet package structure 1 〇〇〇c is an electromagnetically-and thermally separated swearing structure. Referring to FIG. 10E, the structure of the illuminating chip package structure 〇(8)d of the present embodiment is similar to that of the illuminating chip package structure of FIG. 10A, and the difference is that the illuminating chip package structure 〇〇〇d has two Magnetic elements 1030d, 1030e, wherein magnetic element 1030d is disposed on first and second pins 1016, 1018, and magnetic element 1030e is disposed on a surface 1012b of substrate 1012 opposite surface 1012a. The magnetic element i 〇 3 〇 d can generate a lateral magnetic force to the luminescent wafer 1020 , and the magnetic element i 〇 3 〇 e can generate a forward magnetic force to the luminescent wafer 1020. In detail, in the present embodiment, part of the magnetic elements 10e are embedded in the substrate 1012. In this embodiment, since the first and second pins 1016 and 1018 need to pass through the 22 201103171 urw 31320 twf.cloc/d magnetic element 1030d, the first and second pins 1016 and 1018 can be electrically connected to the light-emitting chip 1〇2, and the magnetic lines of the magnetic element 1030e are required. A magnetic field is applied to the illuminating wafer 1020 through the substrate 1012, and the substrate 1 〇 12 needs to pass through the magnetic element 1 〇 3 〇 e to transfer heat to the external environment, so that the illuminating chip package structure 1 11 The structure of the illuminating chip package structure 〇〇〇e of the present embodiment is similar to that of the illuminating chip package structures 1000 and 1000b of FIGS. 10A and 10C, and the difference lies in the illuminating. The chip package structure 1〇〇 has two magnetic elements 1030f and 1030g, wherein the arrangement positions of the magnetic elements 1〇3〇f are the same as those of the magnetic elements 1〇3〇 in FIG. 10A, and the configuration of the magnetic element 1030g The position is the same as the arrangement position of the magnetic element of FIG. 10C of 1〇3%. Thus, the magnetic element 10〇3〇f can generate a side magnetic force to the light emitting wafer, and the magnetic element 1030g can generate the light emitting chip 1〇2〇. Positive magnetic force 11A is a cross-sectional view showing an illuminating chip package structure according to an embodiment of the present invention, and FIG. 11B and FIG. 11C are two variations of the illuminating chip package structure of FIG. 11A. Referring to FIG. 11A, the illuminating chip package structure of the present embodiment is shown in FIG. The structure of 11 turns is similar to the light emitting chip package structure 1000 of FIG. 10A, and the difference is that the substrate 1112 of the light emitting chip package structure 1100 has a recess 1112a' and the light emitting wafer 1120 is located in the recess 1112& 1130 is attached to a side wall 1112b of the substrate 1Π2 and located at the periphery of the light emitting chip 112〇. In other embodiments, the inner wall (not shown) of the groove 1112a may be 23 201103171 FMysuuwrW 31320twf.doc/d concave toward the light emitting chip 1120 The upper bevel. In this way, the light emitted by the hair 1120 can be reflected by the inclined surface toward the substantially:: sheet forward', thereby improving the light directivity of the light-emitting wafer domain structure. In other words, when the groove The magnetic wall is not attached to the inner wall, and the inner wall of the groove may be a slope facing the upper side of the light-emitting chip. ^ a Please refer to FIG. 11B for the light-emitting chip of the embodiment. Configuration means a configuration of FIG. 11A is similar to the structure of the light emitting chip package u⑻,

異之處在於發光晶片封裝結構ll〇〇a的磁性元件β 位於凹槽1112a中並貼附於凹槽m2a的—内壁1上。&是 在其他實施例中，磁性元件113〇a可具有朝向發 片1120的上方的一斜面（未繪示）。如此—來，發光晶= 1120所發出的光可經前述斜面反射而朝向大致相同的方 向前進，it而可提高發光晶片封裝結構的光指向性以及出 光強度。換&之，當發光晶片與磁性元件皆配置於基底的 凹槽中且磁性元件貼附在凹槽的内壁上時’磁性元二可具 有朝向發光晶片上方的一斜面。The difference is that the magnetic element β of the light-emitting chip package structure 11a is located in the groove 1112a and is attached to the inner wall 1 of the groove m2a. & In other embodiments, the magnetic element 113a may have a bevel (not shown) that faces upwardly of the hair piece 1120. In this way, the light emitted by the luminescent crystal = 1120 can be reflected in the substantially same direction by the oblique reflection, thereby improving the light directivity and the light intensity of the light emitting chip package structure. For the same, when the light-emitting chip and the magnetic element are disposed in the recess of the substrate and the magnetic element is attached to the inner wall of the recess, the magnetic element 2 may have a slope facing the upper surface of the light-emitting wafer.

請參照圖11C，本實施例之發光晶片封裝結構11〇〇b 的結構相似於圖11A的發光晶片封裝結構11〇〇，兩者的差 異之處在於發光晶片封裝結構l100b的磁性元件u3〇b是 位於凹槽1112a中並與凹槽m2a的内壁I之間存在一間 距D8。當磁性元件ll30b為環狀結構時，磁性元件113〇b 的一開口 1132b可定義出一螢光材料塗佈區。 圖12A〜圖12D繪示圖ΠΑ〜圖11(：的四種變化。 請參照圖12A，本實施例之發光晶片封裝結構12〇〇 24 201103171 rw 31320twf.doc/d 的結構相似於圖11B與圖11C的發光晶片封裝結構 1100a、ll〇〇b，差異之處在於發光晶片封裝結構1200具有 二磁性元件1232、1234，且磁性元件1232、1234是位於 基底1112的凹槽1112a中。磁性元件1232貼附於凹槽 1112a的内壁I上，且磁性元件1234與凹槽1112a的内壁 Ϊ之間存在一間距D9，其中磁性元件1234位於發光晶片 1120與磁性元件1232之間。 請參照圖12B ’本實施例之發光晶片封裝結構i.20〇a 的結構相似於圖11A與圖11C的發光晶片封裝結構11〇〇、 ll〇〇b，差異之處在於發光晶片封裝結構12〇〇a具有二磁性 元件1232a、1234a’且磁性元件1232a是位於基底m2 的側壁1112b並位於發光晶片1120的周邊，磁性元件 1234a是位於凹槽1112a中並與凹槽1112a的内壁I之間存 在一間距D10。 請參照圖12C，本實施例之發光晶片封裝結構12〇〇b 的結構相似於圖11A〜圖11C的發光晶片封裝結構u〇〇、 1100b、1100c，差異之處在於發光晶片封裝結構i2〇〇b具 有三磁性元件1232b、1234b、1236b，其中磁性元件1232b 是位於凹槽1112a中並與凹槽m2a的内壁I之間存在一 間距D11，磁性元件1234b是位於凹槽ii12a中並貼附於 凹槽1112a的内壁I上，磁性元件1236b是位於基底m2 的側壁1112b。磁性元件1234b是位於磁性元件i232b與 磁性元件1236b之間，且磁性元件1232b、1234b、1236b 皆位於發光晶片1120的周邊。 25 201103171 ι^ουυπυ i'W 31320twf.doc/d 請參照圖12D，本實施例之發光晶片封裝結構12〇〇c 的結構相似於圖11A與圖11B的發光晶片封裝結構11〇〇、 1100a，差異之處在於發光晶片封裝結構i2〇〇c具有二磁性 元件1232c、1234c ’且磁性元件1232c的配置位置相同於 圖11B中的磁性元件1130a的配置位置，磁性元件 的配置位置相同於圖11A中的磁性元件i13〇的配置位置。 圖13繪示本發明一實施例之發光晶片封裝結構的剖 面圖。. - 請參照圖13，本實施例之發光晶片封裝結構ι3⑻包 括一承載裔1310、一發光晶片1320、一磁性元件1330與 一封裝膠體1340，其中承載器1310可為—導線架，且導 線架可包括彼此獨立的二引腳1312、1314，而磁性元件 1330可為杯狀結構並配置於引腳1312上。磁性元件1330 具有一開口 1332，開口 1332暴露出部分引腳12。發光 晶片1320配置於引腳1312上並位於開口 1332中，且發光 晶片1320電性連接引腳1312、1314。此外，為調整發光 晶片封裝結構1300所發出的光的顏色，可在凹槽1332内 填入一螢光材料1350,且螢光材料1350覆蓋發光晶片 1320。封裝膠體Π40包覆發光晶片1320、磁性元件1330、 螢光材料1350與部分的引腳1312、1314。 由前述多個實施例可知，只要將磁性元件配置在發光 晶片的周邊即可達到對發光晶片施加磁場的效果（亦即磁 性元件可以配置在發光晶片封裝結構之内或是發光晶片封 裝結構之外）’因此，磁性元件可任意放在發光晶片的上 26 201103171Referring to FIG. 11C, the structure of the light emitting chip package structure 11b of the present embodiment is similar to that of the light emitting chip package structure 11A of FIG. 11A, and the difference between the two is the magnetic element u3〇b of the light emitting chip package structure l100b. There is a distance D8 between the groove 1112a and the inner wall I of the groove m2a. When the magnetic member 1130b has a ring structure, an opening 1132b of the magnetic member 113b defines a phosphor coating region. 12A to 12D illustrate four variations of FIG. 11 to FIG. 11 (refer to FIG. 12A, the structure of the light emitting chip package structure 12〇〇24 201103171 rw 31320twf.doc/d of the present embodiment is similar to that of FIG. 11B and FIG. The light emitting chip package structure 1100a, 11b of FIG. 11C differs in that the light emitting chip package structure 1200 has two magnetic elements 1232, 1234, and the magnetic elements 1232, 1234 are located in the recess 1112a of the substrate 1112. The magnetic element 1232 Attached to the inner wall I of the recess 1112a, and there is a distance D9 between the magnetic element 1234 and the inner wall 凹槽 of the recess 1112a, wherein the magnetic element 1234 is located between the illuminating wafer 1120 and the magnetic element 1232. Please refer to FIG. 12B The structure of the light emitting chip package structure i.20〇a of the embodiment is similar to the light emitting chip package structure 11〇〇, 11〇〇b of FIG. 11A and FIG. 11C, the difference is that the light emitting chip package structure 12〇〇a has two magnetic properties. The elements 1232a, 1234a' and the magnetic element 1232a are located on the side wall 1112b of the substrate m2 and located at the periphery of the luminescent wafer 1120. The magnetic element 1234a is located in the recess 1112a and exists between the inner wall I of the recess 1112a. D10. Referring to FIG. 12C, the structure of the light emitting chip package structure 12b of the present embodiment is similar to that of the light emitting chip package structure u〇〇, 1100b, 1100c of FIG. 11A to FIG. 11C, and the difference lies in the light emitting chip package structure i2. 〇〇b has three magnetic elements 1232b, 1234b, 1236b, wherein the magnetic element 1232b is located in the recess 1112a and has a spacing D11 from the inner wall I of the recess m2a, and the magnetic element 1234b is located in the recess ii12a and attached On the inner wall I of the recess 1112a, the magnetic element 1236b is located on the side wall 1112b of the substrate m2. The magnetic element 1234b is located between the magnetic element i232b and the magnetic element 1236b, and the magnetic elements 1232b, 1234b, 1236b are located at the periphery of the light emitting chip 1120. 25 201103171 ι^ουυπυ i'W 31320twf.doc/d Referring to FIG. 12D, the structure of the light emitting chip package structure 12〇〇c of the present embodiment is similar to the light emitting chip package structure 11〇〇, 1100a of FIGS. 11A and 11B. The difference is that the light emitting chip package structure i2〇〇c has two magnetic elements 1232c, 1234c' and the magnetic element 1232c is disposed at the same position as the magnetic element 1130a in FIG. 11B. The arrangement position of the magnetic element is the same as the arrangement position of the magnetic element i13' in Fig. 11A. Fig. 13 is a cross-sectional view showing the structure of the light emitting chip package according to an embodiment of the present invention. Referring to FIG. 13, the light emitting chip package structure ι3 (8) of the present embodiment includes a carrier 1310, an illuminating chip 1320, a magnetic component 1330 and an encapsulant 1340, wherein the carrier 1310 can be a lead frame and a lead frame The two pins 1312 and 1314 independent of each other may be included, and the magnetic element 1330 may be a cup-shaped structure and disposed on the pin 1312. The magnetic element 1330 has an opening 1332 that exposes a portion of the pin 12. The light emitting chip 1320 is disposed on the lead 1312 and located in the opening 1332, and the light emitting chip 1320 is electrically connected to the pins 1312 and 1314. In addition, in order to adjust the color of the light emitted by the light emitting chip package structure 1300, a fluorescent material 1350 may be filled in the recess 1332, and the fluorescent material 1350 covers the light emitting wafer 1320. The encapsulant 40 encases the luminescent wafer 1320, the magnetic element 1330, the phosphor material 1350, and portions of the pins 1312, 1314. It can be seen from the foregoing various embodiments that the magnetic element can be disposed in the periphery of the light-emitting chip to achieve the effect of applying a magnetic field to the light-emitting chip (that is, the magnetic element can be disposed in the light-emitting chip package structure or outside the light-emitting chip package structure. ) 'Thus, the magnetic component can be placed arbitrarily on the light-emitting chip 26 201103171

^40TW 31320twf.doc/d 方、下方、側邊等發光晶片的周邊區域中，且可同時配置 多個不同位置的磁性元件’以加強對發光晶片施加磁場的 效果。 另外，前述多個實施例的發光晶片的數量可以是多 個，且在這些發光晶片中，最靠近磁性元件的—發光晶片 與磁性兀件之_最小間距是大於Q公分並小於等於$公 分。 、^40TW 31320twf.doc/d In the peripheral region of the light-emitting wafer such as square, lower side, and side, and a plurality of magnetic elements at different positions can be simultaneously disposed to enhance the effect of applying a magnetic field to the light-emitting wafer. Further, the number of the light-emitting wafers of the foregoing various embodiments may be plural, and among these light-emitting wafers, the minimum distance between the light-emitting wafer and the magnetic element which is closest to the magnetic element is greater than Q cm and less than or equal to $ cm. ,

系示上所述 件^ 在科W _邊配置磁性元 件’故可猎由磁性元件對發光晶片施加一磁場，以於發光 :片=結:運作時，提高發光晶片中的電流分佈的均勻 f二如此—來，雜元件可如於提高本發明之發光曰曰片 封衣結構的總發光效率以及出光的均勾产。 日曰 雖然本發明已以實施彳丨規 又 本發明，任何所屬心常=非 本發明之精神和範_ 一 ；；f心知識者，在不脫離The above-mentioned member is arranged to arrange the magnetic element on the side of the section, so that a magnetic field can be applied to the light-emitting wafer by the magnetic element to emit light: sheet = junction: during operation, the uniformity of the current distribution in the light-emitting wafer is improved. Secondly, the hybrid component can improve the total luminous efficiency of the luminescent film sealing structure of the present invention and the light-emitting property. Although the present invention has been implemented in accordance with the invention, any of the intrinsic = non-inventive spirits and norms of the invention;

發明之保護當視^些許之更動與潤飾，故本 申睛專利範圍所界定者為準。 【圖式簡單說明】 圖。^ ΘΤ傳'、錢光晶片封裝結構中的發光晶片的剖面 圖。Q2、會不傳統發光晶片封裝結構中的發光晶片的俯視 圖3續'示本發明—麻> 光晶片的剖面圖。 歹之發光晶片封裝結構中的發 201103171 rj W 31320twf.doc/d 圖4綠示本發明一實施例之發光晶片封裝結構中的發 光晶片的俯視圖。 圖5繪示本發明一實驗例之對發光晶片施加的磁場強 度與發光晶片的發光效率的關係曲線圖。 圖6A繪示本發明一實施例之發光晶片封 面圖:圖6B #會示圖6A的俯視圖，其中圖6A為;^^ 中Ι-Γ線段的剖面圖，圖6C〜圖6M繪示圖6a的發θ光晶 片封裝結構的多種變化。 χ曰曰 圖7Α繪示本發明一實施例之發光晶片封 面圖，圖7Β繪圖7Α之發光晶片封裝結構的—種=的“ 7C為圖7β之發光晶片封裝結構的俯視圖，圖7 7C中ΙΗΙ，線段的剖面圖。 马、心圖 圖8Α繪示本發明一實施例之發光晶片封裝結構的叫 =，圖8Β、圖SC繪® 8Α之發光晶片封褒結構的二種 構 圖9Α〜圖9D分別繪示圖8Α〜圖8C的四 種變化結 圖10Α繪示本發明一實施例之發光晶片封裝結 面圖，圖10Β〜圖10F繪示圖10Α之發光晶片封 五種變化。 衣、、、。構的 圖11Α繪示本發明一實施例之發光晶片封裝妹 为 面圖’圖11Β與圖11C繪示@ 11Α之發光晶片U = 的二種變化。 T展、、、。構 圖12A〜圖12D繪示圖11A〜圖11C的四種變化 28 201103171 \〇ΎΨ 31320twf.doc/d 圖13繪示本發明一實施例之發光晶片封裝結構的剖 面圖。 【主要元件符號說明】 100、200、300、400、620、820、1020、1120、1320 : 發光晶片 110、120、210、220、310、320、410、420 :電極 130、330 :第一摻雜層 胃 140、340:第二摻雜層 150 :半導體發光層 160、370 :透明導電層 332 :光出射平面 360、430 :磁場 600、700、700a、800、800a、800b、 900、900a、900b、900c、1000、1000a、1000b、1000c、 1000d、1000e、1100、ll〇〇a、ll〇〇b、1200、1200a、1200b、 1200c、1300 :發光晶片封裝結構 • 610、810、1010、1310 :承載器 612 :平面 630、720、830、830a、830b、910、920、910a、910b、 910c、920a、920b、920c、930b、1030、1030a、1030b、 1030c、1030d、1030e、1030f、1030g、1130、1130a、1130b、 1232、1232a、1232b、1232c、1234、1234a、1234b、1234c、 1236b、1330 :磁性元件 630a :塊狀結構 29 201103171 ΐ"3ΐνδυυ^υι W 31320twf.doc/d 630b :條狀結構 632、722、832、1032、1132b、1332 :開口 634 :斜面 636 : N 極 638 : S 極 640、710、840、1040、1340 :封裝膠體 650 :反射層 722a、812a、I :内壁 730、850、1050、1350 :螢光材料 740 :光學膜層 812、1112a :凹槽 814、1112b :側壁 1012、1112 :基底 1012a、1012b :表面 1014 :殼體 1016 :第一引腳 1018 :第二引腳 1312、1314 :引腳 D、D卜 D2、D3、D4、D5、D6、D7、D8、D9、D10、 D11 :間距The protection of the invention is to be regarded as a slight change and refinement. Therefore, the scope defined by the scope of this application is subject to the definition. [Simple diagram of the diagram] Figure. ^ ΘΤ传', a cross-sectional view of a light-emitting wafer in a Qianguang chip package structure. Q2. A top view of an illuminating wafer in a conventional illuminating chip package structure. Fig. 3 is a cross-sectional view showing the optical wafer of the present invention. 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Fig. 5 is a graph showing the relationship between the magnetic field intensity applied to the light-emitting wafer and the luminous efficiency of the light-emitting wafer in an experimental example of the present invention. 6A is a top view of an illuminating wafer according to an embodiment of the present invention: FIG. 6B is a plan view of FIG. 6A, wherein FIG. 6A is a cross-sectional view of a Ι-Γ line segment in FIG. 6C, and FIG. 6C to FIG. Various variations of the θ optical chip package structure. FIG. 7 is a front view of a light-emitting chip package structure according to an embodiment of the present invention, and FIG. 7 is a plan view of the light-emitting chip package structure of FIG. 7β, and FIG. 7C is a top view of the light-emitting chip package structure of FIG. FIG. 8 is a diagram showing the two types of light-emitting chip package structures of the light-emitting chip package structure according to an embodiment of the present invention. FIG. 8A and FIG. The four variations of the light-emitting chip package of the embodiment of the present invention are shown in FIG. 10A to FIG. 10F, and FIG. 10A to FIG. 10F show five variations of the light-emitting chip package of FIG. Figure 11 is a diagram showing a two-dimensional variation of the light-emitting chip package U of the light-emitting chip package of the embodiment of the present invention. Figure 11 and Figure 11C show the two variations of the light-emitting chip U = @ T., T., Figure 12A~ FIG. 12D is a cross-sectional view showing a light emitting chip package structure according to an embodiment of the present invention. FIG. 13 is a cross-sectional view showing a light emitting chip package structure according to an embodiment of the present invention. , 300, 400, 620, 820, 1020, 1120, 1320: Wafers 110, 120, 210, 220, 310, 320, 410, 420: electrodes 130, 330: first doped layer stomach 140, 340: second doped layer 150: semiconductor light emitting layer 160, 370: transparent conductive layer 332 : light exit planes 360, 430: magnetic fields 600, 700, 700a, 800, 800a, 800b, 900, 900a, 900b, 900c, 1000, 1000a, 1000b, 1000c, 1000d, 1000e, 1100, ll〇〇a, ll〇 〇b, 1200, 1200a, 1200b, 1200c, 1300: light emitting chip package structure • 610, 810, 1010, 1310: carrier 612: planes 630, 720, 830, 830a, 830b, 910, 920, 910a, 910b, 910c , 920a, 920b, 920c, 930b, 1030, 1030a, 1030b, 1030c, 1030d, 1030e, 1030f, 1030g, 1130, 1130a, 1130b, 1232, 1232a, 1232b, 1232c, 1234, 1234a, 1234b, 1234c, 1236b, 1330 : Magnetic element 630a: Block structure 29 201103171 ΐ"3ΐνδυυ^υι W 31320twf.doc/d 630b: strip structure 632, 722, 832, 1032, 1132b, 1332: opening 634: bevel 636: N pole 638 : S pole 640, 710, 840, 1040, 1340: encapsulant 650: reflective layer 722a, 812a, I: inner wall 730, 850, 1050, 1350: fluorescent material 740: optical film layer 812, 1112a: grooves 814, 1112b: side walls 1012, 1112: substrate 1012a, 1012b: surface 1014: housing 1016: first pin 1018: Two pins 1312, 1314: Pin D, D Bu D2, D3, D4, D5, D6, D7, D8, D9, D10, D11: Spacing

Nl、N2 :法向量 Wl、W2 :寬度 Θ :夾角Nl, N2: normal vector Wl, W2: width Θ: angle

Claims (1)

201103171+uTW 31320t.wf.doc/d 七、申請專利範圍： 1. 一種發光晶片封裝結構，包括： 一承載器； 至少一發光晶片，配置於該承載器上；以及 一第一磁性元件，與該發光晶片之間的最小間距為小 於等於5公分且大於0公分。 2. 如申請專利範圍第1項所述之發光晶片封裝結構， 其中該第一磁性元件為一環狀結構、至少一塊狀結構或至 少一條狀結構。 3. 如申請專利範圍第2項所述之發光晶片封裝結構， 其中當該第一磁性元件為一環狀結構時，該發光晶片位於 該環狀結構的一開口中，當該第一磁性元件為多個塊狀結 構時，該些塊狀結構環繞該發光晶片，當該第一磁性元件 為多個條狀結構時，該些條狀結構環繞該發光晶片。 4. 如申請專利範圍第1項所述之發光晶片封裝結 構，其中該第一磁性元件與該發光晶片皆配置於該承載器 的一表面上，該發光晶片封裝結構更包括： 一光學膜層，覆蓋該第一磁性元件。 5. 如申請專利範圍第4項所述之發光晶片封裝結構， 其中該光學膜層包括一吸光層或一反射層。 6. 如申請專利範圍第1項所述之發光晶片封裝結 構，更包括： 一封裝膠體，覆蓋該發光晶片，且該第一磁性元件配 31 201103171 s. l y w τ v/ * W ^ 1320twf.d〇c/(j 置於該封裝膠體的邊緣。 7·如申請專利範圍第6項所述之發光晶片封裝結 構，更包括： -第二磁性元件，配置於該承載器上，該封裝膠體覆 蓋該第二磁性元件，且該發光晶片與該第二磁性元件之間 的最小間距小於該發光晶片與該第—磁性元件之間的最小 間距。 8·如申明專利Ιϋΐ)第1項所述之發光晶片封裝結構， 其中該第-磁性元件配置於該承載器上，該發光晶片縣 # 結構更包括： -封裝勝體’全面覆蓋該發光晶片與該第一磁性元件。 9. 如申请專利範圍第8項所述之發^^日日片封裝結構， 其中當該第一磁性元件為一環狀結構時，該發光晶片封裝 結構更包括： 一螢光材料，配置於該環狀結構的—開口中，並覆蓋 該發光晶片。 10. 如申請專利範圍第1項所述之發光晶片封裝結 · 構’其中該承載益具有一凹槽，該發光晶片配置於該凹槽 中〇 11. 如申請專利範圍第10項所述之發光晶片封裝結 構，其中該第一磁性元件配置於該承載器上並位於該凹槽 内，該第一磁性元件配置於該發光晶片的周邊且與該凹槽 的一内壁之間存在一間距。 12. 如申請專利範圍第u項所述之發光晶片封裝結 32 201103171 rji^〇^40TW 31320twf.doc/d 構，更包括： 一第二磁性元件，配置於該承載器的一側壁上。 13. 如申請專利範圍第12項所述之發光晶片封裝結 構，更包括： 一第三磁性元件，配置於該承載器上並位於該凹槽 内，該第三磁性元件貼附在該凹槽的一内壁上。 14. 如申請專利範圍第11項所述之發光晶片封裝結 構，更包括： 一第二磁性元件，配置於該承載器上並位於該凹槽 内，該第二磁性元件貼附在該凹槽的一内壁上。 15. 如申請專利範圍第10項所述之發光晶片封裝結 構，其中該第一磁性元件配置於該承載器上並位於該凹槽 内，該第一磁性元件貼附在該凹槽的一内壁上。 16. 如申請專利範圍第10項所述之發光晶片封裝結 構，其中該第一磁性元件配置於該承載器的一侧壁上。 17. 如申請專利範圍第16項所述之發光晶片封裝結 構，更包括： 一第二磁性元件，配置於該承載器上並位於該凹槽 内，該第二磁性元件貼附在該凹槽的一内壁上。 18. 如申請專利範圍第1項所述之發光晶片封裝結 構，其中該承載器包括一陶瓷基板、一矽基板、一鋁基板、 一銅基板或一線路板。 19. 如申請專利範圍第1項所述之發光晶片封裝結 構，其中該承載器包括一導線架。 201103171 u八…W ji320twf.doc/d 20.如申請專利範圍第19項所述之發光晶片封裝結 構’其中該導線架包括彼此獨立的一第一引腳與一第二引 腳’該發光晶片配置於該第一引腳上並電性連接至該第二 引腳’該磁性元件配置於該第一引腳或該第二引腳上，該. 發光晶片封裝結構更包括： 一封裝膠體’包覆該發光晶片、該磁性元件、部分該 第一引腳以及部分該第二引腳。 21·如申請專利範圍第1項所述之發光晶片封裝結 構，其中δ亥承載器包括一基底、一殼體、一第一引腳與一 第二引腳’該殼體覆蓋部分該基底、部分該第一引腳與部 分該第二引腳，且分隔該基底、該第一引腳與該第二引腳， 該發光晶片配置於該基底之未被該殼體所覆蓋的部分上。 22·如申請專利範圍第21項所述之發光晶片封裝結 構，其中該基底的材質為一高導熱係數的材料，該高導熱 係數的材料的導熱係數為23。 23·如申請專利範圍第21項所述之發光晶片封裝結 構’其中該基底的材質為金屬。 24.如申請專利範圍第21‘項所述之發光晶片封裝結 構’其中該基底具有一凹槽，且該發光晶片配置於該凹样 中〇 25. 如申請專利範圍第24項所述之發光晶片封敦結 構’其中該第一磁性元件配置於該基底的一側壁上。 26. 如申請專利範圍第24項所述之發光晶片封|結 構，其令該第一磁性元件配置於該凹槽内，且該磁性元件 34 201103171 ινδυυ^ΟΊ W 31320twf.doc/d 貼附在該凹槽的一内壁上。 27. 如申請專利範圍第26項所述之發光晶片封裝結 構，更包括： 一第二磁性元件，配置於該基底的一側壁上。 28. 如申請專利範圍第項所述之發光晶片封裝結 構，其中該第一磁性元件配置於該凹槽内，且該磁性元件 與該凹槽的一内壁之間存在_間距。 29. 如申請專利範圍第28項所述之發光晶片封裂結 構，更包括： 一第二磁性元件，配置於該凹槽内，且該第二磁性元 件貼附在該凹槽的一内壁上。 30. 如申清專利範圍第29項所述之發光晶片封裝么士 構，更包括： ''σ 一第三磁性元件，配置於該基底的一侧壁上。 31. 如申請專利範圍第28項所述之發光晶片封裝社 構，更包括： 一第二磁性元件，配置於該基底的一側壁上。 32. 如申請專利範圍第21項所述之發光晶片封裝結 ，其中該發光晶片配置於該基底的一第一表面，該第— 性兀件配置於該基底之相對於該第—表面的—第二表 上。 叫 处如申請專利範圍第32項所述之發光晶片封裝結 ’其中部分該第-磁性元件内埋於該基底中。 別.如申請專利範圍第32項所述之發光晶片封裝結 35 201103171 ---------- W 31320twf.doc/d 構，更包括： 一第二磁性元件，配置於該第〆弓丨腳或該第二引腳上。 35. 如申請專利範圍第21項所述之發光晶片封裝結 構，其中該第一磁性元件配置於該第一引腳或該第二引腳 上。 36. 如申請專利範圍第1項所述之發光晶片封裝結 構，其中當該第一磁性元件與該發光晶片皆配置於該承载 器的一表面上時，該第一磁性元件具有朝向該發光晶片的 上方的一斜面，該斜面的法向量與該表面的法向量的夾角 小於90度。 37. 如申請專利範圍第36項所述之發光晶片封裝結 構，更包括： 一反射層，配置於該斜面上，以反射該發光晶片所發 出的光。 38. 如申請專利範圍第1項所述之發光晶片封裝結 構，其中當該第一磁性元件為一環形結構，且該發光晶片 位於該環形結構的一開口中時，該開口的寬度與該發光晶 片的寬度的比值大於1且小於等於；[5。 39. 如申請專利範圍第丨項所述之發光晶片封裝結 構，其中該磁性元件的材質包括硬磁材料。 40. 如申請專利範圍第1項所述之發光晶片封裴結 構，其中該第一磁性元件與該發光晶片之間的最小間距為 小於等於3公分且大於〇公分。 41. 如申請專利範圍第丨項所述之發光晶片封裝結 36201103171+uTW 31320t.wf.doc/d 7. Patent application scope: 1. A light-emitting chip package structure comprising: a carrier; at least one light-emitting chip disposed on the carrier; and a first magnetic component, and The minimum spacing between the luminescent wafers is less than or equal to 5 cm and greater than 0 cm. 2. The light emitting chip package structure of claim 1, wherein the first magnetic element is a ring structure, at least one piece structure or at least one piece structure. 3. The light emitting chip package structure of claim 2, wherein when the first magnetic element is a ring structure, the light emitting chip is located in an opening of the ring structure, when the first magnetic element When the plurality of block structures are, the block structures surround the light emitting chip, and when the first magnetic element has a plurality of strip structures, the strip structures surround the light emitting chip. 4. The illuminating chip package structure of claim 1, wherein the first magnetic element and the illuminating chip are disposed on a surface of the carrier, the illuminating chip package further comprising: an optical film layer Covering the first magnetic element. 5. The light emitting chip package structure of claim 4, wherein the optical film layer comprises a light absorbing layer or a reflective layer. 6. The illuminating chip package structure of claim 1, further comprising: an encapsulant covering the illuminating chip, and the first magnetic component is provided with a 31 201103171 s. lyw τ v/ * W ^ 1320 twf.d 〇c/(j is placed on the edge of the encapsulant. 7. The illuminating chip package structure of claim 6, further comprising: - a second magnetic component disposed on the carrier, the encapsulant covering a second magnetic element, and a minimum spacing between the illuminating wafer and the second magnetic element is less than a minimum spacing between the illuminating wafer and the first magnetic element. 8. As claimed in claim 1 The light emitting chip package structure, wherein the first magnetic element is disposed on the carrier, the light emitting chip county structure further comprises: - a package body omnidirectionally covering the light emitting chip and the first magnetic element. 9. The luminary package structure of claim 8, wherein when the first magnetic component is a ring structure, the illuminating chip package further comprises: a fluorescent material disposed on The annular structure is in the opening and covers the luminescent wafer. 10. The illuminating chip package structure of claim 1, wherein the accommodating benefit has a recess, the illuminating wafer is disposed in the recess 〇11. As described in claim 10 An illuminating chip package structure, wherein the first magnetic component is disposed on the carrier and located in the recess, the first magnetic component being disposed at a periphery of the illuminating wafer and having a spacing from an inner wall of the recess. 12. The illuminating chip package junction of the invention of claim 5, wherein the second magnetic component is disposed on a side wall of the carrier. 13. The illuminating chip package structure of claim 12, further comprising: a third magnetic component disposed on the carrier and located in the recess, the third magnetic component being attached to the recess On the inside wall. 14. The illuminating chip package structure of claim 11, further comprising: a second magnetic component disposed on the carrier and located in the recess, the second magnetic component being attached to the recess On the inside wall. 15. The illuminating chip package structure of claim 10, wherein the first magnetic component is disposed on the carrier and located in the recess, the first magnetic component being attached to an inner wall of the recess on. 16. The illuminating chip package structure of claim 10, wherein the first magnetic element is disposed on a sidewall of the carrier. 17. The illuminating chip package structure of claim 16, further comprising: a second magnetic component disposed on the carrier and located in the recess, the second magnetic component being attached to the recess On the inside wall. 18. The light emitting chip package structure of claim 1, wherein the carrier comprises a ceramic substrate, a germanium substrate, an aluminum substrate, a copper substrate or a wiring board. 19. The light emitting chip package structure of claim 1, wherein the carrier comprises a lead frame. The illuminating chip package structure of the invention of claim 19, wherein the lead frame comprises a first pin and a second pin that are independent of each other. And being disposed on the first pin and electrically connected to the second pin. The magnetic component is disposed on the first pin or the second pin. The light emitting chip package structure further comprises: an encapsulant colloid The light emitting chip, the magnetic component, a portion of the first pin, and a portion of the second pin are covered. The illuminating chip package structure of claim 1, wherein the δH carrier comprises a substrate, a casing, a first pin and a second pin, the casing covering a portion of the substrate, A portion of the first pin and a portion of the second pin separate the substrate, the first pin and the second pin, and the light emitting chip is disposed on a portion of the substrate that is not covered by the housing. The illuminating chip package structure of claim 21, wherein the material of the substrate is a material having a high thermal conductivity, and the material having the high thermal conductivity has a thermal conductivity of 23. The illuminating chip package structure as described in claim 21, wherein the material of the substrate is metal. The illuminating chip package structure as described in claim 21, wherein the substrate has a recess, and the illuminating wafer is disposed in the embossing 〇 25. The illuminating according to claim 24 The wafer sealing structure 'where the first magnetic element is disposed on a sidewall of the substrate. 26. The luminescent wafer package structure of claim 24, wherein the first magnetic component is disposed in the recess, and the magnetic component 34 201103171 ινδυυ^ΟΊ W 31320twf.doc/d is attached An inner wall of the groove. 27. The illuminating chip package structure of claim 26, further comprising: a second magnetic element disposed on a sidewall of the substrate. 28. The illuminating chip package structure of claim 1, wherein the first magnetic element is disposed in the recess and there is a _ spacing between the magnetic element and an inner wall of the recess. 29. The luminescent wafer chipping structure of claim 28, further comprising: a second magnetic component disposed in the recess, the second magnetic component being attached to an inner wall of the recess . 30. The illuminating chip package structure as claimed in claim 29, further comprising: '' σ a third magnetic element disposed on a side wall of the substrate. The illuminating chip packaging structure of claim 28, further comprising: a second magnetic element disposed on a side wall of the substrate. 32. The illuminating chip package of claim 21, wherein the illuminating wafer is disposed on a first surface of the substrate, and the erroneous element is disposed on the substrate relative to the first surface. On the second table. An illuminating chip package as described in claim 32, wherein a part of the first magnetic element is buried in the substrate. </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Bow the foot or the second pin. The illuminating chip package structure of claim 21, wherein the first magnetic component is disposed on the first pin or the second pin. The light emitting chip package structure of claim 1, wherein the first magnetic element and the light emitting chip are disposed on a surface of the carrier, the first magnetic element has a light emitting chip facing the light emitting chip A slope above the slope, the normal of the slope and the normal of the surface is less than 90 degrees. 37. The illuminating chip package structure of claim 36, further comprising: a reflective layer disposed on the slope to reflect light emitted by the illuminating wafer. 38. The illuminating chip package structure of claim 1, wherein the width of the opening and the illuminating when the first magnetic element is a ring structure and the illuminating chip is located in an opening of the ring structure The ratio of the width of the wafer is greater than 1 and less than or equal to; [5. 39. The illuminating chip package structure of claim 2, wherein the material of the magnetic element comprises a hard magnetic material. 40. The luminescent wafer package structure of claim 1, wherein a minimum spacing between the first magnetic element and the luminescent wafer is less than or equal to 3 centimeters and greater than 〇 cm. 41. The illuminating chip package as described in the scope of claim 2
TW98123570A 2009-07-10 2009-07-10 Light emitting chip package structure TW201103171A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW98123570A TW201103171A (en) 2009-07-10 2009-07-10 Light emitting chip package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW98123570A TW201103171A (en) 2009-07-10 2009-07-10 Light emitting chip package structure

Publications (1)

Publication Number Publication Date
TW201103171A true TW201103171A (en) 2011-01-16

Family

ID=44837761

Family Applications (1)

Application Number Title Priority Date Filing Date
TW98123570A TW201103171A (en) 2009-07-10 2009-07-10 Light emitting chip package structure

Country Status (1)

Country Link
TW (1) TW201103171A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI658611B (en) * 2018-01-24 2019-05-01 欣興電子股份有限公司 Light emitting diode structure, method for manufacturing light emitting diode structure, and pixel structure of microdisplay

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI658611B (en) * 2018-01-24 2019-05-01 欣興電子股份有限公司 Light emitting diode structure, method for manufacturing light emitting diode structure, and pixel structure of microdisplay

Similar Documents

Publication Publication Date Title
JP5564129B2 (en) Light emitting device in a magnetic field
TWI550915B (en) Light emitting device package and lighting system using the same
US20120168801A1 (en) Light emitting device and package structure thereof
JP5523747B2 (en) Improved bond pad design to enhance light derivation from LED chips
US7598531B2 (en) Electronic device contact structures
US20140175498A1 (en) Led chip unit with current baffle
TW201203620A (en) Light emitting device package
TWI266428B (en) Semiconductor chip package and application device thereof
TW201241990A (en) Light emitting diode
TW201214771A (en) Light emitting device, light emitting device package, and lighting device
US8698166B2 (en) Light emitting chip package module and light emitting chip package structure and manufacturing method thereof
CN108198933A (en) A kind of LED chip, preparation method and LED wafer
CN211629134U (en) LED chip and packaging structure
US20090179216A1 (en) Light eitting device with magnetic field
TW201336116A (en) Light emitting diode unit and flip-chip light emitting diode packaging unit
CN102593292B (en) Light-emitting device
TW200843134A (en) Light emitting diode structure
TW201103171A (en) Light emitting chip package structure
TWI622189B (en) Light-emitting device
TW201133933A (en) Light emitting diode chip and making method thereof
TW200933826A (en) Light emitting diode package
TW201123564A (en) Semiconductor package
US20230231093A1 (en) Optoelectronic Semiconductor Chip
TW595017B (en) Light-emitting diode with high thermal conductivity and its manufacturing method
TW201003857A (en) Light emitting device package