201101016 六、發明說明： 特別涉及—種_於可携式電子裝置之 【發明所屬之技術領域】 本發明涉及一種電路， CPU之啟動電路。 【先前技術】 =科技之不斷發展及妙，行動魏等可檇式軒裝置於生活 中付到廣泛應用。而處理器（Ce咖processingunit，CPU)係可携式 電子裝置之—卩件，可喊電计置各部分之管理等均離不開CPU €)之統-、協調指揮’其CPU性能決定了該可搞式電子裝置之整體性能。 習知之可搞式電子裝置開機時，其CPU 一般需要一啟動電路來啟 動，如圖！ ’該啟動電路主要包括一主電源，一電源管理單元（p〇而201101016 VI. Description of the Invention: In particular, the present invention relates to a circuit, a startup circuit of a CPU. [Prior Art] = The continuous development and technology of technology, Action Wei and so on can be widely used in life. The processor (Ce coffee processing unit, CPU) is the portable electronic device - the components, the management of the various parts of the computer can not be separated from the CPU.)) - Coordination command 'its CPU performance determines The overall performance of the splicable electronic device. When the conventional electronic device is turned on, its CPU generally needs a startup circuit to start up, as shown in the figure! The startup circuit mainly includes a main power supply and a power management unit (p〇
Managementunit ’PMU)，—_電毅―倾按钮。該主電源用於 給該PMU供電。該PMU輸出一重定訊號(Reset signai，RS)和一狀態 訊號(State Signa卜SS)給CPU。該備用電源用於給該cpu㈣之時鐘 電路及PMU供電，同時給該重定訊號Rs及狀態訊號％提供上拉電 ❹壓。當該CPU進人-睡賴式*使其畴電路處轉餘態時，開啟 該喚醒按納·韻CPU 正常工作㈣。該CPU王作原理為：當 檢測到該重疋机號RS為㊄電平時，該CPU内部電路正常卫作；當檢 測到重定訊號RS為低電平時，該CPU進行復位動作，即使其内部電 路恢復到-預先設置之初始狀態。當檢測到該狀態訊號ss為高電平 時，該CPU通過該信號得知該主電源正常工作，當檢測到該狀態訊號 S s為低電平時’ CPU可得知該主電源已移除或電量不足，此時該咖 進入睡眠模式以賴降低祕及省電之目的。該啟動電路存在之問題 有：當移除主電源或者主電源電量不足時，會直接導致該重定訊號Rs 4 201101016 為低電平，從而強制該CPU復位， 行錯誤操作，也可以提_相容性能。同=^=之指令、氣 態訊號SS之管腳呈現-高阻狀態，但由於該備份電^輪出該狀 .屢給該管腳，與該管腳之高阻狀態配合，將會導致=供了一上拉電 電平，即該狀態訊號SS仍然為高電平 二腳之電屋為高 誤提示，使CPU判定其主電源 ”犯給该cpu -個錯 ο 導致該α>υ不正常啟動，並消耗掉備景響轉 正常工作。 κ电1影響該CPU之 【發明内容】 鑒於前述情況，有必要提供一種於可 :::::刪，贿贿_撕版^=. 醒心種啟動電路，用於啟動—CPU，其包括—電源管理單元、一喚 醒電路、-重定電路、-主電源及電源，該喚醒電路及琴電源 〇 分顺触魏紐雜令姐及妓電路分別與該、 n原賴t接’該電源f理單元、喚醒電路及蚊電路分別提供 cpi/Γ域、—唤醒訊號及'"妓訊號給該CPU，該狀態訊號向該 =提示触電源之供電㈣，該倾峨蚊是否重新啟動該 5亥重定訊號決定是否重定該cpu。 與習知技術相比，本發明提供之啟動電路中之重定訊號、狀態訊 t喚醒峨均不受㈣社影響，即使將主電縣除或者該主電源 *量不足時’該CPU仍能正常工作，不會出現其不正常啟動及其内部 電路進行不必要之重定之情況。 201101016 【實施方式】 本發明公開了一種啟動電路，其適用於行動電話、pDA等可檇 式電子裝Ϊ之CPU。在本實施例巾以將啟動電路應肖於ρχΑ3χχ系 * 列CPU為例加以說明。 請參賴2 ’本發雜佳實補提供之啟動電路则於啟動該 CPU20，該啟動電路1〇包括一 PMU12、一唤醒電路14、一重定電 路16、一主電源17及一備用電源18。該主電源17可以是現有之可 用於可贼電子裝置供電之電池。該PMU12及糾_路14分別 與該主電源17電性連接。該喚醒電路14與該重定電路16分別與備 用電源18電性連接。該PMU12、唤醒電路14及該重定電路16分 別給〇>腳提供-狀態訊號ss、一唤醒訊號ws及一重定訊雖咖Managementunit ’PMU), —_电毅- 倾 button. This main power source is used to power the PMU. The PMU outputs a reset signal (RS) and a status signal (State Signa SS) to the CPU. The backup power supply is used to supply power to the clock circuit and the PMU of the CPU (4), and to provide pull-up voltage for the re-signal Rs and the status signal %. When the CPU enters the human-sleeping mode*, the domain circuit is turned into a state of rest, and the wake-up is turned on. The rhyme CPU works normally (4). The principle of the CPU king is: when detecting that the re-machine number RS is five-level, the internal circuit of the CPU is normally operated; when detecting that the re-signal RS is low, the CPU performs a reset action even if its internal circuit Restore to - the initial state of the preset. When detecting that the status signal ss is high, the CPU knows that the main power supply works normally by the signal, and when the status signal S s is detected to be low level, the CPU can know that the main power has been removed or the power is removed. Insufficient, at this time the coffee enters the sleep mode to reduce the secret and save power. The startup circuit has problems: when the main power supply is removed or the main power supply is insufficient, the re-signal signal Rs 4 201101016 is directly caused to be low, thereby forcing the CPU to reset, performing an error operation, and also providing _ compatible performance. With the instruction of =^=, the pin of the gaseous signal SS is in a high-resistance state, but since the backup electric power wheel is out of the shape, the pin is repeatedly given, and the high-resistance state of the pin is matched, which will result in = For a pull-up level, that is, the status signal SS is still a high-level two-legged electric house is a high-error prompt, so that the CPU determines that its main power supply "offends the cpu - a mistake ο causes the α > Start up, and consume the standby scene to turn to normal work. κ电1 affects the CPU [invention content] In view of the foregoing, it is necessary to provide a kind of::::: delete, bribery_tear version ^=. Start-up circuit for starting-CPU, which comprises - power management unit, a wake-up circuit, - re-determining circuit, - main power supply and power supply, the wake-up circuit and the piano power supply are respectively adapted to the Wei Nuo miscellaneous sister and the 妓 circuit respectively The power source unit, the wake-up circuit, and the mosquito circuit respectively provide a cpi/Γ field, a wake-up signal, and a '" signal to the CPU, and the status signal is directed to the power source. Power supply (4), whether the cockroach mosquito restarts the 5 hai re-signal to decide whether to reset the cpu. Compared with the known technology, the reset signal and the state signal wake-up in the startup circuit provided by the present invention are not affected by the (four) society, and the CPU can still work normally even if the main power county is removed or the main power supply is insufficient. There is no abnormal startup and its internal circuit is not required to be reset. 201101016 [Embodiment] The present invention discloses a startup circuit suitable for a CPU of a mobile phone, a pDA, and the like. The embodiment of the present invention is described by taking the startup circuit as an example of a CPU. Please refer to 2 'The startup circuit provided by the present invention is activated by the CPU 20, and the startup circuit 1 includes a PMU12. a wake-up circuit 14, a reset circuit 16, a main power supply 17, and a backup power supply 18. The main power supply 17 can be a battery that can be used to supply power to the thief electronic device. The PMU 12 and the correction circuit 14 are respectively associated with the main The power supply 17 is electrically connected. The wake-up circuit 14 and the resetting circuit 16 are respectively electrically connected to the backup power supply 18. The PMU 12, the wake-up circuit 14 and the resetting circuit 16 respectively provide a - state signal ss to the foot of the 〇 > Ws wake-up signal and a re-hearing, although coffee
Slgna；l ’ RS)。該CPU20藉由該狀態訊號％之電壓狀態來判斷該主 電源Π是否存在’藉由喚醒訊號ws之電壓狀態來決定c_是 否重新啟動。藉由重定訊號奶之電壓狀態來決定cpu2〇是否復位， 即決定是否使其内部電路均進入一預先設置之初始狀態，即還原該 ❹可檇式電子裝置之默認參數。 ’、 併參關3，該PMU12可以為ΜΑχ議或者具有相 之:他PMU，其包括一電源輸入端122及一輪出端丄 原 ^入端⑵與主電源17電性連接，該輸 = 2=_觸17彻義伽^ 2 ^電、^7 Γ (圖未示）之分壓將不同之電壓供給PMU12。· 電源Π之輸出電壓大於3.5V時，該pMul2正 田 端124輪屮夕a丄 ^工作’其輪出 〜汛唬SS為尚電平。當該主電源17之f » Mim將無法正f工作，並導致其如之狀態訊號 201101016 ss為高阻狀態。# CP檢測到該狀態訊號％為高電平時，該 CPU2〇判斷該主電源π正常工作，此時該cpU2〇正常工作。當檢 .測到雜態職SS為低f平時，該CPU20觸社電源17已移除 *或電量不足，此時該CP測進入睡眠模式而使其内部電路處於掉: 狀態以達到降低功耗及省電之目的。 包 該唤醒電路14包括—電壓檢測晶片142、—第—電阻R1、 -電阻R2及-第三電阻R3。該主魏17 #由串聯之該第一電阻 R1及該第二電阻R2連接至接地點GNd。該喚醒晶片⑷可以 MAX6775或者具有相同特性之其他姐晶片，其具體包括五個管 腳其中，5亥電壓檢測晶片142之第—接地管腳⑽及第二接地管 腳14a均電性連接至接地點GND。該電壓檢測晶片142之第一電源 輸入管腳14c電性連接至第—電阻R1與—第二電阻R2之間。該第 二電源輸入管腳14e與該備用電源18電性連接。該輸出管腳⑷用 於輸出該喚醒訊號ws給CPU20。當該CPU2〇正常工作時不論該 喚醒訊號ws之電壓狀態如何，均不會重新啟動該cpu2Q，只5 〇該CPU20進入-睡眠模式，即該狀態訊號％魏電平且該喚醒訊 號ws之電壓由低電平變為高電平時，才會使該cp咖重新啟動。 另’該輪出管腳⑽與輪出端I24之間還設置有一第三電阻汜，該 第三電阻R3用於拉高該狀態訊號ss的電平。 請-併參閱圖4，該重定電路16包括一重定晶片162、一電阻 R4及-電容α。該重定晶片162可以為随2或者具有相同特性 的其他重定晶片，其具體包括四個管腳。其中，該電源輸入管腳他 與備，電源18電性連接^重定晶片162的接地f腳⑽接地。該 接電容管腳16c通過-電容C1接地，利用該電容α之週期充放電 7 201101016 特性，藉由於設計製造時調整C1之參數，可設定cpu之復位週期。 該重定晶片16之重定訊號輸出管腳16d用於輸出該重定訊號咫給 -CPU20 ’且該重定訊號輸出管腳16d還藉由—電阻R4電性連接至1 •備用電源18，用於拉高該重定訊號RS的電平。該備㈣源18 Μ 壓範圍約為2.4V_3.6V，當其電壓高於2.1¥時，該重定電路16正常 工作’輸出之奴訊號RS為高電平，該cpu2Q之内部電路正常工 作。當該制獅18之電壓低於2.1V時，該剌魏Μ將驅動該 重定電路16輸出之重定訊號RS為低電平，導致該cpu2〇之内部電 〇路均進入-預先設置之初始狀態’即還原其中儲存之該可攜式電子 裝置之初始狀態默認參數。 該啟動電路10開始工作前，首先將該主電源17分別與該麵Η 的輸入端！22及喚醒電路14電性連接，將備用電源18與該喚醒電 ^之第二電源輸入管腳14e及該重定電路之電源輸入管腳他 ^連接:然:後分別將輸出該狀態訊號ss、喚醒訊號呢及重定訊 说RS之官腳電性連接至Cpu2〇上。 〇 源17之賴大於3.5V時，與其紐連接之該正 承作」使得mm2驅動其輸出端124為高電平，即該狀 ss為而電平。該CPU2〇通過該信號可以得知該 :徒 電路14與該主電源17電性連接，故該喚 高，==:狀:電平’即喚― 14源17移除或者其賴低於3·2ν時，將驅動該喚醒電路 , ws ^ 亥CPU20重新啟動。同時，因為該主電源Π之移除或其 8 201101016 電量不足’導_ PMU12無法正f 阻狀態。雖然該輪出端124與該喚醒電路14中:=:^ '接入了-上拉電_，惟，該喚醒訊號ws二官=: 輸出，電壓拉高，仍然會使該輸出端124輪 樣悲《SS為低電平，給cp卿以 =^ 資訊提示，使〇>咖進人睡_式 2域里不足之 低雷单鑤盔古發丁士 惕式此日[、有虽该唤醒訊號WS由 _電千變為同電平時才會使該CPU2G重新啟動。 ❹二重L電路16只與該備用電源_^^ 產生什肺_ 無論触電源17存在與否，或其電壓 ，之變化’該重定電路16均不會受到轉，健能正常工 $。即雜出之重定訊號RS仍然為高電平，這樣該⑶獅不會重 2即其内部電路正常工作’不會進人—預先㈣的初始狀態。只 二備用電源18的電壓低於2.1V時，該重^電路16才會使輸出之 重疋訊號RS之電壓為低電平，導致該cpu2()重定，使其内部電路 進入仏預先&置之初始狀態’即還原該可檇式電子裝置之默認參數。 〇 、給主電源17充電時，當主電源17之充電電壓低於3.2V，該 P1V^J12、唤醒電路14及重定電路16之工作過程與主電源17移除或 電里不足時之工作過程—樣。即狀_號ss為低電平’該喚醒訊號 WS為低電平’重定賴;Rs為高電平，該⑶腦進人睡眠模式。 田充電電壓達到3.2V時，該喚醒訊號ws為高電平，這時將使該 CRJ20重新啟動，即自動開機並顯示充電狀態。當主電源17之電壓 充至3.5V時’其PMU12、喚醒電路14及重定電路16之工作過程與 主電源17之電壓大於3.5V之工作過程一致，即狀態訊號SS為高電 平，給該CPU20 —該主電源17存在之資訊提示，該喚醒訊號ws 9 201101016 為高電平，重定訊號RS為高電平，使得該咖2〇正常工作。 顯然，藉由將原有之啟動電路進行改進，使其重定訊號肪 '態訊號％及重定訊號RS之輸出均不受主電源17之影響，即 -電源U移除或者該主電源電量不足時，該CP·仍能正常工作 不會出現不正常啟動及該CPU20進行不必要之重定之情況， 該喚醒訊號WS並非藉由原有之按紐手動發出，而是由—喚醒 14自動產生，當充電達到-定電壓時便能使該cpu2〇自動開 示充電狀態，更加自動化及人性化。 機：並顯 【圖式簡單說明】 圖1為現有技術啟動電路之功能方框圖； 圖2為本發明啟動電路較佳實施例之功能方框圖； 圖3為本發明啟動電路較佳實施例中重定電路之電路圖. 圖4位元本發明啟動電路較佳實施例中唤醒電路之電路圖。 【主要元件符號說明】 啟動電路 10 PMU 12 ο喚醒電路 14 重定電路 16 主電源 17 備用電源 18 CPU 20 電源輸入端 122 輸出端 124 電壓檢測晶片 142 第一電阻 R1 第二電阻 R2 第三電阻 R3 第一接地管腳 14b 第二接地管腳 14a 第一電源輪入管腳 14c 201101016 輸出管腳 14d 第二電源輸入管腳 14e 重定晶片 162 電源輸入管腳 16a . 接地管腳 16b 接電容管腳 16c 重定訊號輸出管腳 16d 電阻 R4 電容 ClSlgna; l ’ RS). The CPU 20 determines whether or not the main power supply is present by the voltage state of the status signal % to determine whether c_ is restarted by the voltage state of the wake-up signal ws. By resetting the voltage state of the signal milk to determine whether the cpu2 is reset, that is, whether to make its internal circuit enter a preset initial state, that is, to restore the default parameters of the ❹ 电子 electronic device. ', and participate in the 3, the PMU12 can be discussed or have the same: his PMU, which includes a power input terminal 122 and a round-out terminal (2) electrically connected to the main power source 17, the output = 2 =_ Touch 17 义 伽 ^ ^ ^ ^, ^ 7 Γ (not shown) divided voltage will supply different voltage to PMU12. · When the output voltage of the power supply is greater than 3.5V, the pMul2 is at the end of the 124th round of the 丄 a 丄 ^ work 'its turn out ~ 汛唬 SS is still level. When the main power supply 17 f » Mim will not work properly, and cause it to be as high as the state signal 201101016 ss. # CP detects that the status signal % is high, the CPU2 determines that the main power supply π is working normally, and the cpU2 is working normally. When the detection of the miscellaneous job SS is low f level, the CPU 20 touches the power source 17 has been removed * or the battery is insufficient, at this time the CP test enters the sleep mode and the internal circuit is turned off: the state to achieve the power consumption reduction And the purpose of saving electricity. The wake-up circuit 14 includes a voltage detecting chip 142, a first resistor R1, a resistor R2, and a third resistor R3. The main conductor 17 is connected to the ground point GNd by the first resistor R1 and the second resistor R2 connected in series. The wake-up wafer (4) may be MAX6775 or other sister wafers having the same characteristics, and specifically includes five pins, wherein the first grounding pin (10) and the second grounding pin 14a of the 5th voltage detecting chip 142 are electrically connected to each other. Location GND. The first power input pin 14c of the voltage detecting chip 142 is electrically connected between the first resistor R1 and the second resistor R2. The second power input pin 14e is electrically connected to the backup power source 18. The output pin (4) is used to output the wake-up signal ws to the CPU 20. When the CPU 2 is in normal operation, regardless of the voltage state of the wake-up signal ws, the cpu2Q will not be restarted, and only the CPU 20 enters the sleep mode, that is, the state signal % Wei level and the voltage of the wake-up signal ws The cp coffee will be restarted when it changes from low level to high level. A third resistor 还 is further disposed between the wheel pin (10) and the wheel terminal I24, and the third resistor R3 is used to raise the level of the state signal ss. Please - and referring to FIG. 4, the re-routing circuit 16 includes a reset wafer 162, a resistor R4 and a capacitor a. The re-set wafer 162 can be other re-set wafers with or having the same characteristics, including specifically four pins. Wherein, the power input pin is electrically connected to the power supply 18, and the grounding f pin (10) of the chip 162 is grounded. The capacitor pin 16c is grounded through the capacitor C1, and is charged and discharged by the period of the capacitor α. The characteristics of the C1 can be set by adjusting the parameters of the C1 during design and manufacture. The re-signal output pin 16d of the re-set wafer 16 is used to output the re-signal signal to the CPU 20' and the re-signal output pin 16d is also electrically connected to the standby resistor 16 through a resistor R4 for pulling up The level of the re-signal RS. The standby (4) source 18 voltage range is about 2.4V_3.6V. When the voltage is higher than 2.1¥, the reset circuit 16 works normally. The output slave signal RS is high level, and the internal circuit of the cpu2Q works normally. When the voltage of the lion 18 is lower than 2.1V, the 剌 Wei Wei will drive the re-signal RS outputted by the re-setting circuit 16 to a low level, so that the internal electric circuit of the cpu2 进入 enters into a preset initial state. 'Restore the initial state default parameters of the portable electronic device stored therein. Before the start-up circuit 10 starts working, the main power source 17 is first connected to the input end of the face !! 22 and the wake-up circuit 14 is electrically connected, and the backup power source 18 is connected to the second power input pin 14e of the wake-up power supply and the power input pin of the reset circuit: after: the status signal ss is outputted separately, Awaken the signal and re-determine that the RS's official foot is electrically connected to the Cpu2. When the source 17 is greater than 3.5V, the connection with the button is such that the mm2 drives its output 124 to a high level, i.e., the state ss is at a level. The CPU 2 〇 can know that the circuit 14 is electrically connected to the main power source 17 , so the call height is high, ==: shape: the level 'is called ― 14 source 17 is removed or it is lower than 3 • When 2ν, the wake-up circuit will be driven, and ws ^ CPU20 will restart. At the same time, because the main power supply is removed or its 8 201101016 power is insufficient, the PMU12 cannot be in the positive f resistance state. Although the round-out terminal 124 and the wake-up circuit 14 are: -: ^ 'accessed - pull-up _, but the wake-up signal ws second-level =: output, the voltage is pulled high, still causes the output terminal 124 round Sorrow "SS is low, give cp Qing with =^ information tips, make 〇> 咖 入 入 _ _ 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 The CPU 2G is restarted when the signal WS changes from the _ electric kilometer to the same level. The double L circuit 16 and the standby power source _^^ generate a lung _ regardless of the presence or absence of the power source 17, or its voltage, the change 'the reset circuit 16 will not be rotated, the health normal. That is, the mixed re-signal RS is still at a high level, so that the (3) lion will not be heavy 2, that is, its internal circuit works normally 'will not enter the human-pre- (four) initial state. When only the voltage of the standby power supply 18 is lower than 2.1V, the voltage circuit 16 will make the voltage of the output re-signal RS low, causing the cpu2() to be reset, so that its internal circuit enters the pre-amp; The initial state is set to restore the default parameters of the portable electronic device. 〇 When the main power source 17 is charged, when the charging voltage of the main power source 17 is lower than 3.2V, the working process of the P1V^J12, the wake-up circuit 14 and the resetting circuit 16 and the main power source 17 are removed or the power is insufficient. -kind. That is, the _ ss is low level 'the wake-up signal WS is low level' re-determined; Rs is high level, and the (3) brain enters the sleep mode. When the charging voltage reaches 3.2V, the wake-up signal ws is high, and the CRJ20 will be restarted, that is, it will automatically turn on and display the charging state. When the voltage of the main power source 17 is charged to 3.5V, the operation process of the PMU 12, the wake-up circuit 14 and the resetting circuit 16 is the same as the working process of the voltage of the main power source 17 being greater than 3.5V, that is, the state signal SS is at a high level, CPU20 - The information of the main power source 17 indicates that the wake-up signal ws 9 201101016 is at a high level, and the re-signal RS is at a high level, so that the coffee machine 2 works normally. Obviously, by modifying the original startup circuit, the output of the re-determined signal state and the re-signal RS is not affected by the main power source 17, that is, when the power source U is removed or the main power source is insufficient. The CP can still work normally without abnormal startup and the CPU 20 performs unnecessary resetting. The wake-up signal WS is not manually issued by the original button, but is automatically generated by the wake-up 14 When the charging reaches a constant voltage, the cpu2 can automatically display the charging state, which is more automatic and user-friendly. Figure 1 is a functional block diagram of a prior art start-up circuit; Figure 2 is a functional block diagram of a preferred embodiment of the start-up circuit of the present invention; Figure 3 is a re-set circuit in a preferred embodiment of the start-up circuit of the present invention Circuit diagram. Figure 4 is a circuit diagram of a wake-up circuit in a preferred embodiment of the startup circuit of the present invention. [Main component symbol description] Startup circuit 10 PMU 12 ο Wake-up circuit 14 Re-routing circuit 16 Main power supply 17 Backup power supply 18 CPU 20 Power input terminal 122 Output terminal 124 Voltage detection chip 142 First resistor R1 Second resistor R2 Third resistor R3 A ground pin 14b a second ground pin 14a a first power turn-in pin 14c 201101016 an output pin 14d a second power input pin 14e re-set the chip 162 power input pin 16a. The ground pin 16b is connected to the capacitor pin 16c to re-sign the signal Output pin 16d resistor R4 capacitor Cl
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