TW201044366A - Source driver and driving method thereof - Google Patents

Source driver and driving method thereof Download PDF

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Publication number
TW201044366A
TW201044366A TW98119733A TW98119733A TW201044366A TW 201044366 A TW201044366 A TW 201044366A TW 98119733 A TW98119733 A TW 98119733A TW 98119733 A TW98119733 A TW 98119733A TW 201044366 A TW201044366 A TW 201044366A
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Taiwan
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channel
odd
data
period
polarity
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TW98119733A
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Chinese (zh)
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TWI497475B (en
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Meng-Tse Weng
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Himax Tech Ltd
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Abstract

A source driver includes a plurality of first data channel pairs, a plurality of second data channel pairs, a first switch group, a second switch group, a third switch group, and a fourth switch group. Each of the first data channel pairs includes a first odd channel and a first even channel, and each of the second data channel pairs includes a second odd channel and a second even channel. The above-described channels outputting voltages having the same polarity are short circuited together through the above-described switch groups during a charge sharing period. As a result, the swings of the voltages of the data lines coupled the corresponding channel are reduced, and further power consumption in the source driver could be reduced.

Description

201044366 ttivi-zuu6-uuol-TW 29808twf.doc/n 六、發明說明: 【發明所屬之技術領域】 本發明疋有關於-種源極驅動器及其驅動方法,且特 別是有關於-種·電荷分享功能來減少其功率消耗 極驅動器及其驅動方法。 【先前技術】 趨於ί:配ΐ現代生活模式,視訊或影像裝置之體積曰漸 極射線顯示_),雖然仍有ί 而佔*門疋且電子腔的結構,使得顯示器體積龐大 ::工間,且顯不吩仍有輻射線傷眼等問題。因此,配人201044366 ttivi-zuu6-uuol-TW 29808twf.doc/n VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a source driver and a driving method thereof, and particularly relates to a kind of charge sharing Function to reduce its power consumption driver and its driving method. [Prior Art] Tendency: ΐ Modern life mode, the size of the video or video device, the gradual ray display _), although there are still ί and the structure of the electronic cavity, making the display bulky: There are still problems such as radiation damage to the eyes. Therefore, with people

Pand Display),例如液日Υ發展之千面式顯不益㈣ 示写r〇TPnw 液 器(LCD)、有機發光顯 。(ED)或是電漿顯示器(ρι_ 财),已逐漸成為顯示器產品之主流。 掃示器的解析度及更新醉不斷提高,使得 =;::=快,而這方面的要求又與系統 智•剞雷* 乂:糸、冼用%的設計互相衝突。因此,就有了 〜圖1:二旱(Wt Charge Sharing)的技術發展出來。 技術二亍;1f是所之習知之電荷分享(Charge Sharing) 請先參照圖1A,在顯示請中,包括了 有複數條♦和顯不面板130。其中,顯示面板130具 極驅動器:〇 t〜DLm ’其耦接源極驅動器110。在源 資料通道包括—相j了多個貢料通道也1〜chm ’而每一 才對應的輸出放大器。例如,資料通道chl 201044366 HM-2UU8-0061-TW 29808twf.doc/n 包括其輸出放大器A1 ’資料通道ch2包括其輸出放大器 A2。每一資料通道經由耦接相對應的輪出放大器輸出端來 耗接至相對應的資料線。另外,此源極驅動器1 1〇更包括 多個開關SW1〜SWm-1,其用來連接相鄰的兩條資料線。 例如,開關SW1是連接相鄰的資料線DL1和DL2。在圖 1A中,每一資料線都可視為對應之輪出放大器的電阻R 電容C負載總和。 〇 圖1C是說明圖1B中一偶資料線與一奇資料線之訊號時 序圖。在源極驅動器110驅動顯示面板13〇之前,每一對 相鄰的資料線’其中一條資料線之電壓高於共同電壓 Vcom’另一條資料線之電壓低於共同電壓vcom(圖ic所 繪不之電壓VI為資料線D1的電壓,電壓V2為資料線 D2的電壓)。此時,開關SW1〜^❿丨都在關閉(tum_〇ff) 狀態。如圖1B所繪示,當源極驅動器11〇在一電荷分享 期間tl時,開始驅動顯示面板130,開關SW1〜SWm-1都 切換至打開(turn-on)狀態。在此時,所有的放大器Al〜Am Ο 都在非致能(disable)狀態以避免損耗電流。然而,此時開 關SW1〜SWm-1都仍在打開(turn_on)狀態而導致一電流從 電壓高於共同電壓Vcom的資料線流到電壓低於共同電壓 Vcom的資料線,其電流路徑如圖1B之箭頭符號所示。電 荷藉此產生電性中合。電性中合之後,在一正常驅動期間 t2時,開關SW1〜SWm-1都回到關閉(turn_0ff)狀態,此時 源極驅動益110正常驅動顯示面板正常驅動期間(2 結束後進入電荷分享期間t3,源極驅動器110的内部電路 201044366 HM-^UUS-uubl-TW 29808twf.doc/n 又開·^進行電荷分享的操作,如此週而復始。 综上所述,電荷分享技術的運作原理 資料線内的能量(電荷)重新分配,並且I需耗用電力^ 嫩其最終數值的一半。然而,當使用行反轉 ^(Column Inversion Method)^^^il7,s^ 13〇 旦面,#料線D1的電壓V1不需要擺動低於共同電 eom°相對地’資料線说的電壓 同電壓彻_ 1D來制纽崎 ersion Method)來驅動顯示面板13〇時,圖m中Pand Display), for example, the development of the solar eclipse is not beneficial (4) The r〇TPnw liquid crystal (LCD), organic light-emitting display. (ED) or plasma display (ρι_财) has gradually become the mainstream of display products. The resolution and update of the scanner are constantly increasing, making =;::= fast, and the requirements in this area conflict with the design of the system, the 剞, 糸, 冼, 冼%. Therefore, there is a ~ Figure 1: Wt Charge Sharing technology developed. Technical second; 1f is the well-known charge sharing (Charge Sharing) Please refer to Figure 1A first, in the display please include a plurality of ♦ and display panel 130. The display panel 130 has a polarity driver: 〇 t DLm ' coupled to the source driver 110. In the source data channel, there are a plurality of tributary channels, also 1~chm', and each corresponds to an output amplifier. For example, the data channel chl 201044366 HM-2UU8-0061-TW 29808twf.doc/n includes its output amplifier A1' data channel ch2 including its output amplifier A2. Each data channel is coupled to the corresponding data line via a corresponding output of the wheel-out amplifier. In addition, the source driver 1 1 further includes a plurality of switches SW1 SWSWm-1 for connecting adjacent two data lines. For example, the switch SW1 is connected to adjacent data lines DL1 and DL2. In Figure 1A, each data line can be considered as the sum of the resistance R capacitance C load of the corresponding wheel-out amplifier. 〇 Figure 1C is a timing diagram illustrating the signal of an even data line and an odd data line of Figure 1B. Before the source driver 110 drives the display panel 13〇, the voltage of one of the adjacent data lines 'one of the data lines is higher than the common voltage Vcom', and the voltage of the other data line is lower than the common voltage vcom (not depicted by the figure ic) The voltage VI is the voltage of the data line D1, and the voltage V2 is the voltage of the data line D2. At this time, the switches SW1 to ❿丨 are all in the off (tum_〇ff) state. As shown in Fig. 1B, when the source driver 11 is turned on during the charge sharing period t1, the display panel 130 is started to be driven, and the switches SW1 to SWm-1 are all switched to the turn-on state. At this time, all of the amplifiers A1 to Am are in a disabled state to avoid loss of current. However, at this time, the switches SW1 SWSWm-1 are still in the turn-on state, causing a current to flow from the data line having the voltage higher than the common voltage Vcom to the data line having the voltage lower than the common voltage Vcom, and the current path thereof is as shown in FIG. 1B. The arrow symbol is shown. The charge thereby generates an electrical neutral. After the electrical neutralization, during a normal driving period t2, the switches SW1 SWSWm-1 are returned to the off (turn_0ff) state, at which time the source driving benefit 110 normally drives the display panel during normal driving (2 after entering the charge sharing) During the period t3, the internal circuit of the source driver 110 201044366 HM-^UUS-uubl-TW 29808twf.doc/n and the operation of the charge sharing operation, so repeated. In summary, the operation principle data line of the charge sharing technology The energy (charge) inside is redistributed, and I need to use the power to ^ half of its final value. However, when using the Column Inversion Method ^^^il7, s^ 13〇面,#料The voltage V1 of the line D1 does not need to be oscillated lower than the common electric eom° relative to the voltage of the data line and the voltage is the same as the voltage _ 1D to drive the display panel 13 ,, in the figure m

St奇資料線之訊號時序圖。由圖①可以發現,此時ΐ 5二J ’產生更多的功率耗損。所以此種電荷分享技術在 仃 方法時並不適合。這種情況下勢必需要設計一個 適合的驅動裝絲解決此問題。 【發明内容】 法明之實施例提供一種源極驅動器及其驅動方 /藉由控制其電荷分享功能,以減少顯示器的功 並降低=軸II紅作溫度。 一次4本$明之實施例提供一種源極驅動器’其包括多個第 君、,貝!^道對、多個第二資料通道對、第-開關群、第二開關 f *弟二開關群及第四開關群。每一第一資料通道對包括一第 一及—第—偶通道,而第一奇通道及第一偶通道於一第 'B刀別用以輪出具有一第一極性或一第二極性之驅動電 }查〇 —兹—少 而 貧料通道對包括一第二奇通道及一第二偶通道, 一11通道及第二偶通道於第一期間分別用以輸出具有第 201044366 HM-2008-0061-TW 29808twf.doc/n ΟSignal timing diagram of St odd data line. It can be seen from Fig. 1 that at this time, ΐ 5 2 J ′ produces more power loss. Therefore, this charge sharing technique is not suitable for the 仃 method. In this case, it is necessary to design a suitable drive wire to solve this problem. SUMMARY OF THE INVENTION Embodiments of the present invention provide a source driver and its driver/by controlling its charge sharing function to reduce the power of the display and reduce the temperature of the axis II red. The embodiment of the present invention provides a source driver that includes a plurality of squadrons, a pair of channels, a plurality of second data channel pairs, a first switch group, a second switch f*di two switch groups, and The fourth switch group. Each of the first data channel pairs includes a first and a first even channel, and the first odd channel and the first even channel are used to rotate a first polarity or a second polarity The driving circuit is 〇 〇 兹 兹 兹 兹 兹 兹 兹 兹 兹 兹 兹 兹 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫 贫0061-TW 29808twf.doc/n Ο

一極性或第二極性之驅動電壓。第一開關群及第二開關群耦接 第一資料通道對,並於一第二期間依據一水平同步訊號分別使 第一奇通道及第一偶通道彼此導通。第三開關群及第四開關群 耦接第二資料通道對,並於第二期間依據水平同步訊號分別使 第二奇通道及第二偶通道彼此導通。其中’第一資料通道對與 第二資料通道對交錯排列’並分別接收一第一極性控制訊號及 一第二極性控制訊號,以決定第一奇通道、第一偶通道、第二 奇通道及第二偶通道之驅動電壓的極性。 本發明之實施例提供一種源極驅動器的驅動方法,其 步驟如下。首先,提供一源極驅動器,其包括多個第一資料 通道對與多個第二資料通道對,其中每一第一資料通道對包括 一第一奇通道及一第一偶通道,而每一第二通道對包括一第二 奇通,及一第二偶通道。接著,藉由第一奇通道及第二偶通道 於一第一期間以具有一第一極性的驅動電壓驅動一 板,以及藉由第一偶通道及第二奇通道於第一期二 二極性的驅動電壓驅動顯示面板。之後,依據一水平同步訊 號,於一第二期間分別使第一奇通道、第一偶通道、第二奋诵 道及第二偶通道彼此導通。 ⑶基ϋ上?,於本發明之實施例中’藉由控制源極驅動 器的電荷分享魏’以減少顯示_功率損耗並降低源極 驅動器的工作溫度。 —為讓本發明之上述特徵和優點能更明顯易懂,下文特兴 貫施例,並配合所附圖式作詳細說明如下。 、牛 【實施方式】 7 201044366 mvi-zuue-uuol-TW 298〇8twf.doc/n 圖2為本發明-實施例之顯示器的電路方塊圖 照圖本實施例之顯示器雇包括閘極驅動器⑽、源極 驅動器220、顯示面板230及時序控制器24〇。其中,顯示 面板230包括晝素陣列25〇,而時序控制$ 用以控: 源極驅動器220與閘極驅動器210。 源極驅動器220包括多個第一資料通道對、多個第二資 料通道對、第一開關群SW卜第二開關群SW2、第三開 SW3及第四開關群SW4。在本實施例中,第一奇通道cM丨與 其相鄰的第一偶通道chl2組成多個第一資料通道對中的1中 之一。同樣地’第二奇通道ch21與其相鄰的第二偶通道此22 組成多個弟二資料通道對中的其中之—。此外,第一開關群 SW1與弟一開關群SW2耗接弟一貧料通道對,而第三開關群 SW3與弟四開關群SW4编接第二貧料通道對。舉例而言,如 圖2所示’第一開關群SW1中的每一個開關SW1耦接第一奇 通道chll及其鄰近的第一奇通道chll。同樣地,第四開關群 SW4中的每一個開關SW4耦接第二偶通道Ch22及其鄰近的 第二偶通道ch22。 在本實施例中’源極驅動器220以行反轉的驅動方式 來驅動顯示面板230。源極驅動器220接收時序控制器240 所提供的第一極性控制訊號POL1及第二極性控制訊號 POL2。而且,第一資料通道對中的每一第一奇通道chll及 第二資料通道對中的每一第二偶通道ch22會依據第一極性控 制訊號POL1,在驅動期間輸出具有正極性之驅動電壓。 同樣地,第一資料通道對中的每一第一偶通道chl2及第二資 201044366 HM-ZUU5-006I-TW 29808twf.doc/n 料通道對中的每一第二奇通道ch21會根據第二極性控制訊 號POL2 ’在驅動期間輸出具有負極性之驅動電壓。在本實 施例中’顯示面板230依上述驅動方式來驅動。 在電荷分旱期間,第一奇通道chll、第一偶通道chi2、 第二奇通道ch21及第二偶通道Ch22依據水平同步訊號τρι 分別藉由弟一開關群SW1、第二開關群SW2、第三開關群SW3 及第四開關群SW4彼此導通。也就是說,輸出相同極性驅動 0 電壓之第一奇通道chn在電荷分享期間内彼此短路,藉以致 能電荷分享功能。同樣地,當第一偶通道chl2、第二奇通道 ch21及第一偶通道ch22分別在電荷分享期間内彼此短路時, 可致能電荷分享功能。 圖3為圖2中資料線的訊號時序圖。請同時參照圖2 及圖3,晝素陣列250包括多個資料線,其分別耦接至源 極驅動器220中相對應的通道。例如,資料線见丨丨、^^〗、 DL21及DL22分別耦接至相對應的第一奇通道chu、第一 偶通道cM2、第二奇通道及第二偶通道也22。圖3分 〇 別繪示資料線DL11、DL12、DL21及DL22之電壓V3、 V4、V5及V6的波形圖。 在源極驅動器220驅動顯示面板230之前,電壓V3、 V6高於共同電壓Vcom,而電壓V4、.V5低於共同電壓 Vcom。同時,第一開關群SWls、第二開關群SW2s、第三 開關群SW3s及第四開關群sw4s皆處於關閉(turn-off)狀 態。之後,當源極驅動器220在電荷分享期間t4内開始驅 動顯示面板230時,第一開關群Swis、第二開關群SW2s、 9 201044366 HM-^UU8-UU61-TW 29808twf.doc/n 第三開關群SW3s及第四開關群SW4s依據水平同步訊號τρι 而被切換至開啟(tum-on)狀態。此時,所有通道皆處^焚能 (disable)狀態’因而沒有消耗電流。因此,電荷分別在 $ 通道dm、第-偶通道ehl2、第二奇通道_及第二偶通^ ch22之間彼此分享。接著,在電荷分享期間t4結束後 入正常驅動期間t5,此時第一開關群SWls、 懸、第三開關群SW3s及第四開關群_皆::; (turn-off)狀態。當正常驅動期間t5結束後,進入電农又古 期間t6,此時源極驅動器220之内部電路再次進行 享操作,其動作如同重覆前1荷分享期間t4之摔^乍。刀 由圖3所緣示之訊號時序圖可知,電壓%的擺 SWA3、電壓V4的擺幅SWA4、電壓%的擺幅撕八5 ^ 小於圖ic與圖則電壓的擺 田,就疋況’在電荷分享期間t4與t“夺,輸出相同極 =麼的歧彼此短路,使得#料線上電㈣擺幅縮小, 也進一步減少了源極驅動器22〇的功率損耗。 圖^林發明之—實施_顯示器、彻之電路 圖。請蒼照圖4,本實例之顯示器_ ‘ 顯示器200,惟兩者之門爭幸敢】貝轭例之 400 ^ 可右蛩朴八口此,猎由電壓產生器460的作動, ^何 内提供顯示器預充電功能。在本 =列中’電壓產生器偏包括多個第五開關$奶,发分 =接相對應的資料線。每—第五開關_用以導通相 應的貢料線與電壓產生器楊,使相對應的資料線在電^ 10 o ◎ 201044366 hm-zuu»-0061-TW 29808twf.doc/n 分享期間内接收電壓產生器偏產生的正極性預充電電壓 =pre+或負,性預充電電壓Vpj>e_。例如,減至第一奇通 運chi 1之資料線及輕接至第二偶通道他π之資料線接收 電J產生H偏輸出之正極性預充電電壓v_,而耗接 ❹-偶通道chl2之資料線與轉接至第二奇通道此21之 ^料線接收電壓產生器輸出之負極性預充電電盧 Vpre- ° 圖5緣示圖4中的資料線dlu、dli2 dl2 d 的訊號時序圖。請參昭圖4 22 η戸… 圖在電荷分享期間口、 弟開關群SW3s皆處於開啟狀態 DL11、DL22藉由篦二p弓明被。心 貝t十深 輸出之正極性預充ί;:Γ 收·產生器460 料笛-門t Pre而資料線DL12、DL21 猎由第二開關群s W3 s接收電壓產生器 預充電電壓Vpre_。因此,為雷—八古 輪出之負極性 πτ 11 άΑ ^ r- 電何刀旱期間口、t9 ’資料绩 则的電壓V7與資料線DL22 :枓, 性預充電電壓Vpre+。同樣地,^^在正極 資料線DU2的電㈣與 $刀予期間口與t9 ’ 在負極性預充雷1 V ㈣壓%都固定 孭兄罨包壓Vpre-。如此—來, ::、设’可縮小資料電壓的擺幅,以進一H二刀旱期間 器420的功率損耗。 v減^源極驅動The driving voltage of one polarity or the second polarity. The first switch group and the second switch group are coupled to the first data channel pair, and the first odd channel and the first even channel are respectively turned on according to a horizontal synchronization signal during a second period. The third switch group and the fourth switch group are coupled to the second data channel pair, and the second odd channel and the second even channel are respectively turned on according to the horizontal synchronization signal during the second period. Wherein the 'first data channel pair and the second data channel pair are staggered' and respectively receive a first polarity control signal and a second polarity control signal to determine the first odd channel, the first even channel, the second odd channel, and The polarity of the driving voltage of the second even channel. Embodiments of the present invention provide a method of driving a source driver, the steps of which are as follows. First, a source driver is provided, including a plurality of first data channel pairs and a plurality of second data channel pairs, wherein each of the first data channel pairs includes a first odd channel and a first even channel, and each The second channel pair includes a second odd pass and a second even channel. Then, the first odd channel and the second even channel drive a board with a driving voltage of a first polarity during a first period, and the first period of the second period by the first even channel and the second odd channel The drive voltage drives the display panel. Then, according to a horizontal synchronization signal, the first odd channel, the first even channel, the second channel and the second channel are respectively turned on in a second period. (3) Based on the above? In the embodiment of the invention, 'by controlling the charge sharing of the source driver' to reduce display_power loss and lower the operating temperature of the source driver. In order to make the above features and advantages of the present invention more comprehensible, the following detailed description is given in conjunction with the accompanying drawings.牛牛 [Embodiment] 7 201044366 mvi-zuue-uuol-TW 298〇8twf.doc/n FIG. 2 is a circuit block diagram of a display according to the embodiment of the present invention. The display device of the present embodiment includes a gate driver (10), The source driver 220, the display panel 230, and the timing controller 24A. The display panel 230 includes a pixel array 25A, and the timing control $ is used to control: the source driver 220 and the gate driver 210. The source driver 220 includes a plurality of first data channel pairs, a plurality of second data channel pairs, a first switch group SW, a second switch group SW2, a third open SW3, and a fourth switch group SW4. In this embodiment, the first odd channel cM丨 and the adjacent first even channel chl2 constitute one of the plurality of first data channel pairs. Similarly, the second odd channel ch21 and its adjacent second even channel 22 constitute one of a plurality of pairs of data channel pairs. In addition, the first switch group SW1 and the first switch group SW2 consume the pair of lean channel pairs, and the third switch group SW3 and the fourth switch group SW4 are coupled to the second lean channel pair. For example, as shown in FIG. 2, each of the switches SW1 of the first switch group SW1 is coupled to the first odd channel ch11 and its adjacent first odd channel ch11. Similarly, each of the switches SW4 of the fourth switch group SW4 is coupled to the second even channel Ch22 and its adjacent second even channel ch22. In the present embodiment, the source driver 220 drives the display panel 230 in a row inversion driving manner. The source driver 220 receives the first polarity control signal POL1 and the second polarity control signal POL2 provided by the timing controller 240. Moreover, each of the first odd channel ch11 and the second data channel pair of each of the first data channel pair according to the first polarity control signal POL1 outputs a driving voltage having a positive polarity during driving. . Similarly, each of the first even channel chl2 and the second resource 201044366 HM-ZUU5-006I-TW 29808 twf.doc/n channel pair of each of the first data channel pairs will be according to the second The polarity control signal POL2' outputs a driving voltage having a negative polarity during driving. In the present embodiment, the display panel 230 is driven in the above-described driving manner. During the subdivision of the charge, the first odd channel ch11, the first even channel chi2, the second odd channel ch21, and the second even channel Ch22 are respectively controlled by the horizontal synchronization signal τρι by the first switch group SW1 and the second switch group SW2. The three switch group SW3 and the fourth switch group SW4 are electrically connected to each other. That is to say, the first odd channel chn outputting the same polarity driving 0 voltage is short-circuited to each other during the charge sharing period, thereby enabling the charge sharing function. Similarly, when the first even channel ch12, the second odd channel ch21, and the first even channel ch22 are short-circuited to each other during the charge sharing period, respectively, the charge sharing function can be enabled. FIG. 3 is a signal timing diagram of the data line of FIG. 2. Referring to FIG. 2 and FIG. 3 simultaneously, the pixel array 250 includes a plurality of data lines respectively coupled to corresponding channels in the source driver 220. For example, the data lines see 丨丨, ^^〗, DL21 and DL22 are respectively coupled to the corresponding first odd channel chu, the first even channel cM2, the second odd channel and the second even channel 22 are also. Figure 3 is a diagram showing the waveforms of the voltages V3, V4, V5 and V6 of the data lines DL11, DL12, DL21 and DL22. Before the source driver 220 drives the display panel 230, the voltages V3, V6 are higher than the common voltage Vcom, and the voltages V4, .V5 are lower than the common voltage Vcom. At the same time, the first switch group SWls, the second switch group SW2s, the third switch group SW3s, and the fourth switch group sw4s are all in a turn-off state. Thereafter, when the source driver 220 starts driving the display panel 230 during the charge sharing period t4, the first switch group Swis, the second switch group SW2s, 9 201044366 HM-^UU8-UU61-TW 29808twf.doc/n, the third switch The group SW3s and the fourth switch group SW4s are switched to the tum-on state in accordance with the horizontal sync signal τρι. At this point, all channels are in the "disable state" and thus no current is consumed. Therefore, the electric charges are shared between the channel dm, the first-even channel ehl2, the second odd channel_, and the second even channel ^ch22, respectively. Then, after the end of the charge sharing period t4, the normal driving period t5 is entered, and at this time, the first switch group SWls, the suspension, the third switch group SW3s, and the fourth switch group_ are all in the (turn-off) state. When the normal driving period t5 ends, the electrician and the old period t6 are entered. At this time, the internal circuit of the source driver 220 performs the operation again, and the action is the same as the fall of the previous sharing period t4. The knives are shown in the signal timing diagram shown in Fig. 3. It can be seen that the swing of the voltage SWA3, the swing of the voltage V4, the swing SWA4, and the voltage % of the swing are less than 5^, which is smaller than the ic of the graph ic and the graph voltage. During the charge sharing period t4 and t, the outputs of the same pole = the short-circuit of each other, so that the electric (four) swing of the #-line is reduced, which further reduces the power loss of the source driver 22 。. _ display, complete circuit diagram. Please see the picture 4, the display of this example _ 'monitor 200, but the two are fighting for the courage to dare] Bay yoke example 400 ^ can be right-handed eight mouth, hunting by voltage generator 460 actuation, ^ provides display pre-charging function. In this = column 'voltage generator bias includes a plurality of fifth switch $ milk, send points = corresponding to the data line. Each - fifth switch _ used The corresponding tributary line and the voltage generator Yang are turned on, so that the corresponding data line is positively generated during the sharing period of the voltage generator in the sharing period of 10 10 ◎ 201044366 hm-zuu»-0061-TW 29808twf.doc/n Precharge voltage = pre+ or negative, sexual precharge voltage Vpj > e_. For example, reduced to The data line of Chi Qiyun chi 1 and the data line connected to the second even channel of his π data line receive the positive pre-charging voltage v_ of the H-bias output, and the data line and the transfer of the ❹-even channel chl2 To the second odd channel, the 21 line of the receiving line voltage generator output negative polarity pre-charged electricity Vpre- ° Figure 5 shows the signal timing diagram of the data lines dlu, dli2 dl2 d in Figure 4. Please refer to the map 4 22 η戸... In the charge sharing period, the mouth and the younger switch group SW3s are all in the open state. DL11 and DL22 are punctured by the p2p bow. The positive polarity pre-charge of the ten-deep output of the heart-bee is: Γ收·产生The 460 flute-gate t Pre and the data line DL12, DL21 are hunted by the second switch group s W3 s to receive the voltage generator pre-charge voltage Vpre_. Therefore, the negative polarity of the Ray-Bagu round is πτ 11 άΑ ^ r- The voltage V7 of the data and the data line DL22: 枓, the pre-charge voltage Vpre+. Similarly, ^^ in the positive data line DU2 (four) and the $ knife period port and t9 ' Negative pre-charged pre-charged Ray 1 V (four) pressure % are fixed 孭 孭 罨 罨 V V V V V V - - - - - - - Expected voltage swing, to H into a dry two knives during power loss of 420. V ^ Save source driver

準位設定為與共同電心_相同之3電:X 次考,可以將 201044366 HM-2008-006l-TW 29808twf.doc/n 正極性預充電電壓vpre+設定為與正極性Ga_ 壓其中-個參考電射目同之準位,吨貞紐縣電= Vpre-設定為與負極性Gamma參考電壓1 二埜 相同之準位。又或者,可謂正姉社 設定為掃描線SL1〜SLm上之最小正極性驅動電壓t 負極性預充電電壓vpre-為設定為掃插線SLl〜s , 大負極性驅動電壓。 "^最 於本發明實施例中使用之顯示面板具有許多種類 圖2至圖4中的資料線訊號時序圖與顯示器之電路方= 僅供树明所屬技術賴巾具有通常知識者时實= 明的貫施例,並非用以限定本發明。 毛 本發明除了以上的顯示器以外,也提供一 驅動器的鶴綠。此方法可以由以上實施例之敘述中原, 致足夠的教示、建議與實施朗,因此不再贅述。^ #综上所述’於本發明之實施例中,在電荷 耩由多個開關群使得輸出電壓具有相同極性的通道彼曰 此’在電荷分享期_,可減小_ = 的電壓翻,以進―步減少源極驅動㈣功率損耗讀線 雖然、本發明已以實施例揭露如上,然其並非用 本叙明,任何所屬技術領域中具有通 义、 t發明之精神和内,當可作些許之更^與潤傅不= =Γ;=Γ後附之申請專利範圍所界定者為準。 圖1Α與圖1Β是習知之—種電荷分享技術的電路方塊 12 201044366 nm-ζυυ 〇-0061 -TW 29808twf.doc/nThe level is set to the same as the common core _ 3: X times test, can be set 201044366 HM-2008-006l-TW 29808twf.doc / n positive pre-charge voltage vpre+ and positive polarity Ga_ pressure one - reference The electric shooting is the same as the standard, and the ton 贞 New County electricity = Vpre- is set to the same level as the negative gamma reference voltage 1 second field. Alternatively, it can be said that the minimum positive polarity driving voltage t set on the scanning lines SL1 to SLm is the negative polarity pre-charging voltage vpre- set to the scanning line SL1 to s and the large negative polarity driving voltage. "^ The display panel used in the embodiment of the present invention has many kinds of data line timing diagrams of FIG. 2 to FIG. 4 and the circuit side of the display=only when the technical subsistence of the technology belongs to the general knowledge = The examples are not intended to limit the invention. In addition to the above displays, the present invention also provides a crane green. This method can be adequately taught, suggested, and implemented by the above description of the embodiments, and therefore will not be described again. ^ In summary, in the embodiment of the present invention, in the charge 耩 by a plurality of switch groups, the output voltages have the same polarity of the channel, and this is in the charge sharing period _, which can reduce the voltage flip of _=, To further reduce the source drive (four) power loss read line, although the present invention has been disclosed in the above embodiments, but it is not described in this description, any of the technical fields of the art have the spirit and the spirit of the invention. Make a few more ^ and Run Fu not = = Γ; = Γ Γ Γ 申请 申请 申请 。 。 。 。 。 。 。 。 。 。 。 。 Figure 1A and Figure 1 are conventional circuit blocks for charge sharing technology. 12 201044366 nm-ζυυ 〇-0061 -TW 29808twf.doc/n

铒緣 圖1C與圖ID是圖1B中〆偶資料緩 訊號時序圖。 奇資 圖2為本發明一實施例之顯示器的電 圖3為圖2中資料線的訊號時序圖。方%_ o铒 图 Figure 1C and Figure ID are the timing diagrams of the 资料 资料 data buffer in Figure 1B. 2 is an electrical diagram of a display according to an embodiment of the present invention. FIG. 3 is a timing diagram of signals of the data line of FIG. Square%_ o

圖4為本發明一實施例中〆顯示器的電袼 圖5繪示圖4中的資料線的訊號時序圖。方境圖。 【主要元件符號說明】 100、200、400 :顯示器 110 ' 220 ' 420 =源極驅動器 130、230 ' 430 :顯示面板 chi〜chm :資料通道 A1〜Am :放大器 SW1〜SWm-1 :開關 DL1〜DLm :資料線 R :電阻 C :電容 210、410 :閘極驅動器 240、440 :時序控制器 250、450 :晝素陣列 chll〜chn :資料通道 POL1 :第一極性控制訊號 POL2 :第二極性控制訊號 TP1 :水平同步訊號 13 201044366 ΗΜ-^υυδ-υυο 1 -TW 29808twf.doc/n SWls :第一開關群 SW2s :第二開關群 SW3s :第三開關群 SW4s :第四開關群 DL11〜DLn :資料線 SL1〜SLm :掃描線 Pll、P21 :晝素單元 460 :電壓產生器 SW5 :第五開關 Vpre+ :正極性預充電電壓 Vpre-:負極性預充電電壓 14FIG. 4 is a diagram showing the signal timing of the data line of FIG. 4 according to an embodiment of the present invention. FIG. Horizon map. [Description of main component symbols] 100, 200, 400: Display 110 '220 ' 420 = Source driver 130, 230 ' 430 : Display panel chi ~ chm : Data channel A1 ~ Am : Amplifier SW1 ~ SWm-1 : Switch DL1 ~ DLm: data line R: resistor C: capacitor 210, 410: gate driver 240, 440: timing controller 250, 450: pixel array chll~chn: data channel POL1: first polarity control signal POL2: second polarity control Signal TP1: horizontal synchronization signal 13 201044366 ΗΜ-^υυδ-υυο 1 - TW 29808twf.doc/n SWls: first switch group SW2s: second switch group SW3s: third switch group SW4s: fourth switch group DL11 to DLn: Data lines SL1 to SLm: scan lines P11, P21: halogen unit 460: voltage generator SW5: fifth switch Vpre+: positive precharge voltage Vpre-: negative precharge voltage 14

Claims (1)

201044366 ΗΜ-ζυυδ-0061-TW 29808twf.doc/n 七、申請專利範圍: 1· 一種源極驅動器,包括: 多個第一資料通道對,每一第一資料通道對包括一第一奇 通,及Hit道,崎絲_奇通道及該些第—偶通道於 -第-期間分別用以輪出具有—第—極性或—第二極性之驅 動電壓; 多個=二資料通道對,每一第二資料通道對包括一第二奇 0 通返及一第二偶通道’而該些第二奇通道及該些第二偶通道於 該第-期間分別用以輪出具有該第一極性或該第二極性之驅 動電壓; 一第一開關群,耦接該些第一資料通道對,該第一開關群 於一第二期間依據一水平同步訊號使該些第一奇通道彼此導 通; 一第二開關群,輕接該些第一資料通道對,該第二開關群 於該第二期間依據該水平同步訊號使該些第一偶通道彼此導 通; ❹ 一第三開關群,耦接該些第二資料通道對,該第三開關群 於該第二期間依據該水平同步訊號使該些第二奇通道彼此導 通;以及 一第四開關群,耦接該些第二資料通道對,該第四開關群 於該第二期間依據該水平同步訊號使該些第二偶通道彼此導 通, 其中該些第一資料通道對與該些第二資料通道對交錯排 列’並分別接收一第—極性控制訊號及一第二極性控制訊號, 15 201044366 η.ινι-^,υυ〇-υυ61 -TW 29808twf.doc/n -奇通道及 ‘弟 以決定該些第一奇通道、該也第一偶道、 該些第二偶通道之驅動電 丄如/請專利範圍第1項所述之源極驅動器,更包括 —電壓產生器,該電壓產生器於該第二_提供-第―預充ί 電壓至-顯示面板之多條第—資料線,而該 = 該些第一奇通道及該也第-俚ϋ 女貝枓線耦接 期門接供Mi 賴產生11於該第二 d服供U充電電駐錢示面板 :而該些第二資亀接該些第一偶通道及該些 3.如申請專利範圍第2項所述之源極 =生=多個第五開關,該些第五開關分_接該= 應的弟-貝料線及該些對應的第二資 -資料線及該些對應的第二資料線 控繼輯應㈣—龍線及該魏應的第二資 =於韻二期間接收該第—預充電電壓或該第二預充電電 …4.如申°月專利範圍第1項所述之源極驅動器,其中該 2極性控制訊號及該第二極性控制訊號由—時序控制 提供。 5.如中凊專利㈣第1項所述之源極驅動器,其中當 该些第二奇通道、該些第—偶通道、該些第二奇通道及該些第 偶通ιϋ於该第二期間彼此導通時,該源極驅動器之一 -电荷分享功能被致能。 6. 種源極驅動器的驅動方法,包括: 16 201044366 ΗΛα-2υυδ~0061 -TW 29808twf.doc/n 提供一源極驅動器,其包括多個第一資料通道對與多個 第二資料通道對,其中每一第一資料通道對包括一第一奇通道 及一第一偶通道’而每一第二通道對包括一第二奇通道及一第 二偶通道; 藉由該些第一奇通道及該些第二偶通道於一第一期間以 具有一第一極性的驅動電壓驅動一顯示面板; 藉由該些第一偶通道及該些第二奇通道於該第一期間以 具有一第二極性的驅動電壓驅動該顯示面板; 依據一水平同步訊號’於一第二期間使該些第一奇通道彼 此導通; 依據該水平同步訊號’於該第二期間使該些第一偶通道彼 此導通; 依據該水平同步訊號,於該第二期間使該些第二奇通道彼 此導通;以及 依據該水平同步訊號,於該第二期間使該些第二偶通道彼 此導通。 7. 如申請專利範圍第6項所述之驅動方法,在驅動該 顯示面板之前,接收一第一極性控制訊號及一第二極性控制訊 唬,以決定該些第一奇通道、該些第一偶通道、該些第二奇通 道及該些第二偶通道之驅動電壓的極性。 8. 如申請專利範圍第6項所述之驅動方法,更包括: 藉由一電壓產生器於該第二期間提供一第一預充電電壓 至该顯示面板之多條第一資料線,而該些第一資料線耦接該些 第一奇通道及該些第二偶通道;以及 17 201044366 v/VV51-TW 29808twf.doc/n ^由錢壓纽II於該第二朗提供—第二預充電 至U不面板之多絲二龍線,猶些第 楚 第一偶通道及該些第二奇通道。 升、、泉耦接该些 9.如申請專利範圍第8項所述之驅動方法, 4子應的 產生器包括多轉五開關’該絲五關分顺接該^電麼 第一資料線及該些對應的第二資料線。 10.如申請專利範圍第9項所述之驅動方法,更包括: 藉由該些第五開關於該第二期間,使該些對應的第—資 線及該些對應的第二資料線與該電壓產生器導通,藉以控制該 些對應的弟一 ^料線及該些對應的第二資料線於該第二期門 接收該第一預充電電壓或該第二預充電電壓。 ’B 11_如申請專利範圍第6項所述之驅動方法,其中該第— 極性控制訊號與該第二極性控制訊號由一時序控制器產生。 12.如申請專利範圍第6項所述之驅動方法,其中當該此 第一奇通道、該些第一偶通道、該些第二奇通道及該些第二偶 通道分別於該第二期間彼此導通時,致能該源極驅動器之一 電荷分享功能。 18201044366 ΗΜ-ζυυδ-0061-TW 29808twf.doc/n VII. Patent application scope: 1. A source driver, comprising: a plurality of first data channel pairs, each of the first data channel pairs including a first odd pass, And the Hit channel, the Sin _ odd channel and the first-even channels in the -first period are respectively used to rotate the driving voltage having the -first polarity or the second polarity; the plurality of = two data channel pairs, each The second data channel pair includes a second odd 0 pass and a second even channel ' and the second odd channel and the second even channels are respectively used to rotate with the first polarity or a driving voltage of the second polarity; a first switch group coupled to the first data channel pair, wherein the first switch group turns on the first odd channels according to a horizontal synchronization signal in a second period; The second switch group is connected to the first data channel pair, and the second switch group is connected to the first even channels according to the horizontal synchronization signal during the second period; ❹ a third switch group coupled to the Some second data channel pairs, the third opening The second switch channel is coupled to each other according to the horizontal synchronization signal; and a fourth switch group is coupled to the second data channel pair, the fourth switch group is configured according to the second period The horizontal synchronization signal causes the second even channels to be electrically connected to each other, wherein the first data channel pairs are alternately arranged with the second data channel pairs and respectively receive a first polarity control signal and a second polarity control signal, 15 201044366 η.ινι-^,υυ〇-υυ61 -TW 29808twf.doc/n - odd channel and 'different to determine the first odd channel, the first even channel, the second even channel drive The source driver according to the first aspect of the patent, further comprising a voltage generator, wherein the voltage generator is in the second_providing - the first pre-charge voltage to the plurality of first data lines of the display panel And the = the first odd channel and the also - 俚ϋ 枓 枓 枓 耦 耦 耦 耦 耦 Mi Mi Mi Mi Mi Mi Mi Mi Mi Mi Mi Mi 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于The second capital is connected to the first even channels and the 3. The source according to item 2 of the range 2 = raw = a plurality of fifth switches, and the fifth switches are connected to the corresponding - the second line - the data line and the corresponding Corresponding second data line control succession (4) - Long line and the second capital of the Wei Ying = Yu Yun II during the reception of the first pre-charge voltage or the second pre-charged electricity ... 4. Such as the patent range The source driver of claim 1, wherein the 2 polarity control signal and the second polarity control signal are provided by a timing control. 5. The source driver of claim 1, wherein the second odd channel, the first even channel, the second odd channel, and the second even channel are in the second One of the source drivers - charge sharing function is enabled when they are turned on each other. 6. A method for driving a source driver, comprising: 16 201044366 ΗΛα-2υυδ~0061 - TW 29808twf.doc/n providing a source driver comprising a plurality of first data channel pairs and a plurality of second data channel pairs, Each of the first data channel pairs includes a first odd channel and a first even channel ', and each second channel pair includes a second odd channel and a second even channel; The second even channels drive a display panel with a driving voltage having a first polarity during a first period; and the first even channels and the second odd channels have a second during the first period The driving voltage of the polarity drives the display panel; the first odd channels are turned on according to a horizontal synchronization signal according to a horizontal synchronization signal; and the first even channels are electrically connected to each other according to the horizontal synchronization signal And according to the horizontal synchronization signal, the second odd channels are electrically connected to each other during the second period; and the second even channels are electrically connected to each other during the second period according to the horizontal synchronization signal. 7. The driving method of claim 6, wherein before driving the display panel, receiving a first polarity control signal and a second polarity control signal to determine the first odd channel, the first The polarity of the driving voltage of an even channel, the second odd channel, and the second even channels. 8. The driving method of claim 6, further comprising: providing a first pre-charge voltage to the plurality of first data lines of the display panel during the second period by a voltage generator, and The first data lines are coupled to the first odd channels and the second even channels; and 17 201044366 v/VV51-TW 29808twf.doc/n ^ is provided by the second button II - the second pre- Charging to the multi-wire two-dragon line of the U-panel, the first channel of the Chu and the second odd channel. The liter, the spring is coupled to the 9. The driving method described in claim 8 of the patent application, the generator of the 4 sub-requires includes a multi-turn five switch 'the five-point switch is connected to the first data line And the corresponding second data lines. 10. The driving method of claim 9, further comprising: using the fifth switches to enable the corresponding first line and the corresponding second data lines in the second period The voltage generator is turned on to control the corresponding first line and the corresponding second data line to receive the first pre-charge voltage or the second pre-charge voltage in the second period gate. The driving method of claim 6, wherein the first polarity control signal and the second polarity control signal are generated by a timing controller. 12. The driving method of claim 6, wherein the first odd channel, the first even channel, the second odd channel, and the second even channels are respectively in the second period When turned on each other, one of the source drivers is enabled for charge sharing. 18
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TWI469118B (en) * 2012-07-16 2015-01-11 Raydium Semiconductor Corp Display device and source driver thereof

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KR100698983B1 (en) * 2004-03-30 2007-03-26 샤프 가부시키가이샤 Display device and driving device
KR100688538B1 (en) * 2005-03-22 2007-03-02 삼성전자주식회사 Display panel driving circuit capable of minimizing an arrangement area by changing the internal memory scheme in display panel and method using the same
TWI292145B (en) * 2005-07-19 2008-01-01 Au Optronics Corp Method for driving flat panel display
US8786535B2 (en) * 2006-04-19 2014-07-22 Sharp Kabushiki Kaisha Liquid Crystal display device and driving method thereof, television receiver, liquid crystal display program computer-readable storage medium storing the liquid crystal display program, and drive circuit
WO2008007480A1 (en) * 2006-07-14 2008-01-17 Sharp Kabushiki Kaisha Active matrix substrate and display device with the same

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CN102779492A (en) * 2011-10-08 2012-11-14 北京京东方光电科技有限公司 Liquid crystal display drive method and drive device
CN102779492B (en) * 2011-10-08 2014-10-29 北京京东方光电科技有限公司 Liquid crystal display drive method and drive device
TWI469118B (en) * 2012-07-16 2015-01-11 Raydium Semiconductor Corp Display device and source driver thereof

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