201036051 六、發明說明： 【發明所屬之技術領域】 - 發明領域 本發明係有關於—種將晶圓形成預定厚度之晶圓加工 方法a®係於以在基板表面排列成格子狀之複數切割 道劃分之複數個區域具有形成有元件之元件區域及圍繞該 凡件區域之外周剩餘區域，並於該元件區域之基板埋設有 電極。 Ο 『 發明背景 在半導體7L件製程中，以於略呈圓板狀之半導體晶圓 ‘ I面㈣祕子狀之稱為㈣道的分割預定線劃分複數個 - 區域’於此劃分之區域形成1C、LSI等it件。如此形成之半 導體晶圓-般藉使用切削裝置，沿著切割道切斷，分割成 諸個元件，而廣泛地利用於電力機器。 Ο 另方面，近年來，為謀求電力機器之小聖化，積層 有諸個元件之積層元件已實用化。積層有諸個元件之積層 元件之製造方法揭示於下述專利文獻卜揭示於下述專利文 獻1之積層元件之製造方法係將晶圓之裡面研磨，形成預定 厚度，將如此業經研磨裡面之複數個晶圓表面與裡面相 對，接合成相互之切割道—致，形成積層晶圓後，以切削 裝置等切割裝置將積層晶圓沿著切割道切斷，藉此，形成 積層元件。 先行技術文獻 3 201036051 專利文獻 【專利文獻1】曰本專利公報第3646720號 【發明内容】 發明概要 發明欲解決之課題 於是，積層有諸個元件之積層元件厚度增厚，謀求小 型化及輕量化有界限。即，由於當研磨晶圓裡面，將晶圓 厚度形成50μιη以下時’剛性降低，故後步驟之處理困難。 又，為將元件積層’需使埋設於各元件之電極從晶圓之裡 面突出’而在電極從裡面突出之狀態下，將元件積層時， 有於元件間產生空間，元件破損之問題。 本發明即是鑑於上述事實而發明者，提供一種即使使 晶圓之厚度薄，處理仍容易，並且可在不破損下形成積層 元件之晶圓加工方法。 用以欲解決課題之手段 為解决上述主要技術課題，根據本發明，提供一種晶 方法sa圓係於以在基板表面排列成格子狀之複數 刀割道劃分之複數個區域具有形成有元件之元件區域及圍 X件區域之外周剩餘區域並於元件區域之基板埋設 2極者’其特徵在於，該晶圓之加工方法具有裡面研磨 ㈣'樹脂層被覆步驟、及樹脂層車削步 的裡：里=步驟係研磨晶圓之基板之對應於元件區域 匚域蝴狀補強部者;該裡面 二: 201036051 裡面研磨步驟之晶圓之基板裡面，而使該電極從基板之對 應於凡件區域之裡面突出者；該樹脂層被覆步驟係於已執 -行該裡面餘刻步驟之晶圓之基板中對應於元件區域的裡面 被覆樹脂層’而使從基板之對應於元件區域之裡面突出之 電極埋沒者；該樹脂層車削步驟係將被覆在晶圓之基板之 對應於元件區域之裡面的樹脂層車削，而使電極之端面露 出者。 0 於執行上述樹脂層車削步驟後，執行將晶圓沿著切割 道切斷’而分割成諸個元件之晶圓分割步驟。 於執行上述樹脂層車削步驟後，執行將晶圓積層複數 個’形成積層晶圓’將該積層晶圓沿著切割道切斷，而分 . 割成諸個積層元件之晶圓分割步驟。 發明效果 根擄:本發明’由於執行研磨晶圓之基板之對應於元件 區域的裡面’而形成預定厚度，並且於對應於外周剩餘區 Q 域之區域形成環狀補強部之裡面研磨步驟，故即使將元件 區域之厚度形成極薄，環狀補強部仍殘存，而確保了剛性， 故之後之處理不致困難。因而，由於可使裝置區域之厚度 薄’故可獲得即使積層多層，全體厚度仍薄之積層元件。 又’根據本發明，執行蝕刻已執行裡面研磨步驟之晶 圓之基板的裡面’而使電極從基板之對應於元件區域之裡 面突出的裡面姓刻步驟，執行於晶圓之基板之對應於元件 區域的裡面被覆樹脂層，而使從基板裡面突出之電極埋沒 之樹脂層被覆步驟後，將被覆在晶圓之基板之對應於元件 5 201036051 區域之裡面的樹脂層車削，而使電極之端面露出之樹脂層 車削步驟，故由於於元件之裡面被覆有樹脂層，故即使將 凡件積層，亦不致於元件間產生空間，故元件不致破損。 圖式簡單說明 ' 第1圖係作為以本發明之晶圓加工方法分割成諸個晶 圓之晶圓的半導體晶圓之立體圖。 第2圖係將第1圖所示之半導體晶圓之主要部份放大顯 示的截面圖。 第3圖係顯示於第丨圖所示之半導體晶圓表面貼附有保 護構件之狀態的立體圖。 第4圖係顯示用以執行本發明晶圓加工方法之裡面研 磨步驟之研磨裝置主要部份的立體圖。 第5圖係以第4圖所示之研磨裝置執行之裡面研磨步驟 的說明圖。 第6圖係業經執行第5圖所示之裡面研磨步驟之半導體 晶圓的截面圖。 第7圖係用以執行本發明晶圓加工方法之裡面触刻步 驟之電漿蝕刻裝置的截面圖。 第8圖係業經執行弟7圖所示之裡面姓刻步驟之半導體 晶圓的截面圖。 第9圖係本發明晶圓加工方法之樹脂層被覆步驟之說 明圖。 第W圖係業經執行第9圖所示之樹脂層被覆步驟之半 導體晶圓的截面圖。 201036051 第11圖係用以執行本發明晶圓加工方法之樹脂層車削 步驟之車削裝置主要部份的立體圖。 第12圖係以第11圖所示之車削裝置執行之樹脂層車削 步驟的說明圖。 第13圖係業經執行第12圖所示之樹脂層車削步驟之半 導體晶圓的截面圖。 第14(a)圖〜第14(b)圖係本發明晶圓加工方法之晶圓支 撐步驟之說明圖。 第15圖係用以執行本發明晶圓加工方法之晶圓分割步 驟之切削裝置的主要部份立體圖。 第16(a)圖〜第16(b)圖係本發明晶圓加工方法之晶圓分 割步驟之說明圖。 第17圖係以第16圖所示之晶圓分割步驟分割半導體晶 圓之裝置的立體圖。 第18(a)圖〜第18(b)圖係本發明晶圓加工方法之晶圓積 層步驟之說明圖。 第19 (a)圖〜第19 (b)圖係本發明晶圓加工方法之環狀補 強部去除步驟之說明圖。 第20(a)圖〜第20(b)圖係本發明晶圓加工方法之第2晶 圓積層步驟之說明圖。 第21(a)圖〜第21(b)圖係本發明晶圓加工方法之基盤晶 圓研磨步驟之說明圖。 第22圖係本發明晶圓加工方法之晶圓支撐步驟之另一 實施形態的說明圖。 7 201036051 第23圖係本發明晶圓加工方法之晶圓分割步驟之另一 實施形態的說明圖。 第24圖係業經以第23圖所示之晶圓分割步驟分割積層 晶圓之積層元件的立體圖。 用以實施發明之形態 以下，就本發明之晶圓加工方法之較佳實施形態參 照圖式，詳細說明。 於第1圖顯示作為以本發明晶圓加工方法加工之晶圓 之半導體晶圓的立體圖。第1圖所示之半導體晶圓2係複數 切割道21於厚度7〇〇μη1之矽基板2〇的表面2〇&排列成格子 狀，並且，於以該複數切割道21劃分之複數個區域形成ic、 LSI等元件22。如第2圖所示，此半導體晶圓2具有配設於元 件22表面之概個焊墊23，並且，具树接於此焊塾23， 由埋設於魏板2G之銅等金屬材構成之電極24。如此構成 之半導體晶圓2具有形成有元件22之元件區域細及圍繞該 元件區域220之外周剩餘區域23〇。 在本發明之晶圓加工方法，執行裡面研磨步驟，該裡 面研磨步驟係研磨上述第！圖及第2圖所示之半導體晶圓2 之石夕基板20之對應於元件區域22⑽裡面，而形成預定厚 度，並且，於對應於㈣_區域23()之區域形成環狀補強 部者，在此之前’如第3圖所示，於半導體2之碎基板默 表面施貼附用以保護元件22之保護構件3(保護構件貼附 步驟）。因而，半導體晶圓2呈♦基板2()之禮面施露出之形 201036051 態。 田執行保護構件貼附步驟後，執行裡面研磨步驟，該 裡面研磨步驟係研磨半導體晶圓2之矽基板2〇裡面2〇b之對 應於TL件區域22G的區域’而形成預定厚度，並且，於對應 於外周剩餘㈣咖之H域職環狀補強部者 。此裡面研磨 步驟以第4圖所示之研磨裝置執行。第4圖所示之研磨裝置4 八有保持作為被加工物之晶圓之吸盤台41、將保持在該吸 盤台4丨之晶圓之加工面研磨的研磨裝備42。吸盤41構造成 將晶圓吸引保持至作為上面之保持面，並使其於第4圖以箭 號41a顯示之方向旋轉。研磨裝備42具有心軸殼421、旋轉 自如地支樓於g玄心軸设421 ’並以圖中未示之旋轉驅動機構 使其旋轉之旋轉心軸422、裝設於該旋轉心軸422之下端之 固定機423、安裝於該固定機423下面之研磨輪424。此研磨 輪424由圓板狀基台425及以環狀裝設於該基台425下面之 磨石426構成’基台425安裝於固定機423下面。 要使用上述研磨裝置4，執行裡面研磨步驟，係將以圖 中未示之晶圓搬入裝備搬送之上述半導體晶圓2之保護構 件3側載置於吸盤台41之上面（保持面），藉使圖中未示之吸 引裝備作動，將半導體晶圓2吸引保持於吸盤台41上。在 此，就保持在吸盤台41之半導體晶圓2與構成研磨輪424之 環狀磨石426之關係，參照第5圖來說明。吸盤台41之旋轉 中心P1與環狀磨石426之旋轉中心P2為偏心，環狀磨石426 之外徑設定成小於半導體晶圓2之元件區域220與外周剩餘 區域230之分界線240的直徑，並大於分界線240之半徑之尺 9 201036051 寸，環狀磨石426通過吸盤台41之旋轉中心pi(半導體晶圓2 之中心）。 接著，如第4圖及第5圖所示，一面使吸盤台41於箭號 41a顯不之方向以3OOrpm之旋轉速度旋轉，一面使研磨輪 424於以箭號424a顯示之方向以6000rpm之旋轉速度旋轉， 並且，將研磨輪424移動至下方，使磨石426與半導體晶圓2 之矽基板20之裡面20b接觸。然後，將研磨輪424以預定研 磨進給速度於下方研磨進給預定量。結果，半導體晶圓2之 石夕基板20之裡面如第6圖所示’研磨去除對應於元件區域 220之區域，而形成圓形凹部221 ’並於外周剩餘區域23〇形 成環狀補強部231。然後，形成有圓形凹部221之元件區域 220厚度形成3〇μηι，在其裡面220b，電極24之端面露出。 如此’半導體晶圓2由於元件區域220之厚度即使形成極薄 3〇μιη，環狀補強部231仍殘留，而確保了剛性，故之後之 處理不致困難。 當執行上述裡面研磨步驟後，執行裡面蝕刻步驟，該 裡面蝕刻步驟係蝕刻半導體晶圓2之裡面，使電極2 4從半導 體晶圓2之矽基板2〇之對應於元件區域22〇之裡面22仳突出 者。此裡面蝕刻步驟在圖中所示之實施形態中，使用第7圖 所示之電D裝置來執行。第7圖所示之電料刻裝置5 具有裝置殼51、在該裝置殼51内社下方向彳目對配設之下 部電極52、上部電極53。下部電極52由圓盤狀被加工物保 持部切、從該被加工物保持部521之下面中央部突出而形 成之圓柱狀支撐部522構成。於被加工物保持部521之上面 10 201036051 配設有以多孔質陶瓷材形成之吸附吸盤52la，於此吸附吸 盤521a上載置業經執行上述裡面研磨步驟之半導體晶圓 - 2，藉使圖中未示之吸引機構作動來吸引保持。又，於支撐 部522連接於馬頻電壓施加裝備54。 上述上部電極53由圓盤狀氣體喷出部53卜從該氣體噴 出部531之上面中央部突出而形成之圓柱狀支撐部532構 成。如此由氣體噴出部531及圓柱狀支撐部532構成之上部 0 電極53之氣體噴出部531與構成下部電極52之被加工物保 持部521相對配設。於構成上部電極53之圓盤狀氣體噴出部 531设有於下面開口之複數個噴出口531&。此複數個噴出口 531a藉由形成於氣體喷出部531之連通路徑5311?及形成於 ' 支撐部532之連通路徑532a，連通於氣體供給裝備55。氣體 供給裝備55供給以六氟化硫(SF6)等氟系氣體為主體之電毅 產生用混合氣體。 要使用如以上構成之電漿蝕刻裝置5，執行上述蝕刻步 Ο 驟，係將貼附在業經執行上述裡面研磨步驟之半導體晶圓2 之矽基板20表面的保護帶3側載置於構成下部電極52之被 加工保持部521上’使圖中未示之吸引裝備作動，將半導體 曰曰圓2吸引保持於被加工物保持部521上。因而，吸引保持 在被加工物保持部521上之半導體晶圓2之矽基板20之裡面 作為上側。 接著，使氣體供給裝備55作動，將電漿產生用氣體供 給至上部電極53。從氣體供給裝備55供給之電漿產生用氣 體羞由形成於支撐部532之連通路徑532a及形成於氣體喷 11 201036051 下邱雷之連通路&531b，從複數個喷出a531a朝向保持在 附保持構件521上之半導體晶_面（上 雷题# *此在供給電漿產生用氣體之狀態下，從高頻 '&加裝備54 ’將高頻電壓施加至下部電極52與上部電 “]藉此’於下部電極52與上部電極53間之空間產生 ^由於以此電漿產生之活性物質作用於半導體晶圓2之 裡面’故可關半導體晶圓2之絲板觀裡面。201036051 VI. OBJECTS OF THE INVENTION: FIELD OF THE INVENTION The present invention relates to a wafer processing method a® for forming a wafer to a predetermined thickness in a plurality of dicing streets arranged in a lattice on the surface of a substrate. The divided plurality of regions have an element region in which the component is formed and a remaining region around the periphery of the component region, and electrodes are buried in the substrate of the component region. 『 『Inventive background In the semiconductor 7L process, the semiconductor wafer is slightly rounded. The surface of the semiconductor wafer is divided into a plurality of sub-areas. 1C, LSI, etc. The semiconductor wafer thus formed is generally used in an electric machine by cutting using a cutting device, cutting it along a scribe line, and dividing it into components. Ο On the other hand, in recent years, in order to seek for the sanctification of electric machines, laminated elements with various components have been put into practical use. A method of manufacturing a laminated element in which a plurality of elements are laminated is disclosed in the following patent document. The manufacturing method of the laminated element disclosed in the following Patent Document 1 is to polish the inside of the wafer to form a predetermined thickness, and the plurality of layers are thus ground. The wafer surfaces are opposed to the inside and joined to each other to form a laminated wafer. After the stacked wafer is formed, the laminated wafer is cut along the dicing street by a cutting device such as a cutting device, thereby forming a laminated device. CITATION LIST OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION The thickness of a laminated element in which a plurality of layers are laminated is increased, and the size and weight are reduced. There are boundaries. That is, since the rigidity is lowered when the thickness of the wafer is 50 μm or less when the inside of the wafer is polished, the subsequent steps are difficult to handle. Further, in order to laminate the elements, it is necessary to cause the electrodes embedded in the respective elements to protrude from the inner surface of the wafer, and when the electrodes are protruded from the inside, when the elements are laminated, there is a problem that a space is generated between the elements and the elements are damaged. The present invention has been made in view of the above circumstances, and provides a wafer processing method which is easy to handle even if the thickness of the wafer is thin, and which can form a laminated element without damage. Means for Solving the Problem In order to solve the above-mentioned main technical problems, according to the present invention, there is provided a crystal method in which a sa-circle is formed in a plurality of regions divided by a plurality of knives arranged in a lattice shape on a surface of a substrate, and has elements formed with components. The area and the remaining area around the X-element area are embedded in the substrate of the element area. The method for processing the wafer has the inside polishing (four) 'resin layer coating step, and the resin layer turning step: The step is to polish the wafer substrate corresponding to the component region, and the inside of the substrate is: The resin layer coating step is performed by burying the electrode protruding from the inside of the substrate corresponding to the inside of the element region in the substrate of the wafer in which the remaining step is performed, corresponding to the inner resin layer of the element region The resin layer turning step is to cover the resin layer of the substrate of the wafer corresponding to the inside of the element region, and the end surface of the electrode is exposed. Out. After performing the above-described resin layer turning step, a wafer dividing step of dividing the wafer into dicing lines and dividing them into pieces is performed. After performing the above-described resin layer turning step, a wafer dividing step of dividing the plurality of wafers into a stacked wafer to cut the laminated wafer along the scribe line and dividing the laminated wafer into a plurality of laminated elements is performed. Advantageous Effects of Invention: The present invention has a predetermined thickness formed by performing "the inner surface corresponding to the element region of the substrate on which the wafer is polished", and the inner grinding step of forming the annular reinforcing portion in the region corresponding to the peripheral region of the outer peripheral region Q, Even if the thickness of the element region is extremely thin, the annular reinforcing portion remains, and rigidity is ensured, so that subsequent processing is not difficult. Therefore, since the thickness of the device region can be made thin, it is possible to obtain a laminated component in which the entire thickness is thin even if a plurality of layers are laminated. And 'in accordance with the present invention, performing etching on the inside of the substrate of the wafer on which the inner polishing step has been performed', and causing the electrode to protrude from the inside of the substrate corresponding to the inside of the element region, the step of performing on the substrate of the wafer corresponding to the element The inside of the region is covered with a resin layer, and after the resin layer covering step of the electrode protruding from the inside of the substrate is covered, the resin layer covering the inside of the region of the substrate 5 201036051 of the wafer is turned, and the end surface of the electrode is exposed. Since the resin layer is subjected to the turning step, since the inside of the element is covered with the resin layer, even if a layer is laminated, no space is formed between the elements, so that the element is not damaged. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a perspective view of a semiconductor wafer which is divided into wafers of wafers by the wafer processing method of the present invention. Fig. 2 is a cross-sectional view showing an enlarged main portion of the semiconductor wafer shown in Fig. 1. Fig. 3 is a perspective view showing a state in which a protective member is attached to the surface of the semiconductor wafer shown in Fig. 。. Fig. 4 is a perspective view showing the main part of a polishing apparatus for carrying out the inside grinding step of the wafer processing method of the present invention. Fig. 5 is an explanatory view of the inner grinding step performed by the polishing apparatus shown in Fig. 4. Fig. 6 is a cross-sectional view showing a semiconductor wafer which is subjected to the inside grinding step shown in Fig. 5. Figure 7 is a cross-sectional view of a plasma etching apparatus for performing the inner touch step of the wafer processing method of the present invention. Figure 8 is a cross-sectional view of a semiconductor wafer in which the internal engraving step is performed as shown in Figure 7. Fig. 9 is an explanatory view showing a resin layer coating step of the wafer processing method of the present invention. The Fig. W is a cross-sectional view of a semiconductor wafer in which the resin layer coating step shown in Fig. 9 is performed. 201036051 Fig. 11 is a perspective view of a main part of a turning device for performing a resin layer turning step of the wafer processing method of the present invention. Fig. 12 is an explanatory view showing a resin layer turning step performed by the turning device shown in Fig. 11. Fig. 13 is a cross-sectional view showing a semiconductor wafer which is subjected to the resin layer turning step shown in Fig. 12. Figs. 14(a) to 14(b) are explanatory views of the wafer supporting step of the wafer processing method of the present invention. Fig. 15 is a perspective view showing a main part of a cutting apparatus for performing a wafer dividing step of the wafer processing method of the present invention. 16(a) to 16(b) are explanatory views of the wafer dividing step of the wafer processing method of the present invention. Fig. 17 is a perspective view showing a device for dividing a semiconductor wafer by the wafer dividing step shown in Fig. 16. Fig. 18(a) to Fig. 18(b) are explanatory views of the wafer lamination step of the wafer processing method of the present invention. 19(a) to 19(b) are explanatory views showing a step of removing the annular reinforcing portion of the wafer processing method of the present invention. 20(a) to 20(b) are explanatory views of the second crystal lamination step of the wafer processing method of the present invention. 21(a) to 21(b) are explanatory views of the substrate crystal grinding step of the wafer processing method of the present invention. Fig. 22 is an explanatory view showing another embodiment of the wafer supporting step of the wafer processing method of the present invention. 7 201036051 Fig. 23 is an explanatory view showing another embodiment of the wafer dividing step of the wafer processing method of the present invention. Fig. 24 is a perspective view showing the laminated element of the laminated wafer by the wafer dividing step shown in Fig. 23. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, preferred embodiments of the wafer processing method of the present invention will be described in detail with reference to the drawings. Fig. 1 is a perspective view showing a semiconductor wafer as a wafer processed by the wafer processing method of the present invention. The semiconductor wafer 2 shown in FIG. 1 is a plurality of dicing streets 21 which are arranged in a lattice shape on the surface 2〇& of the substrate 2〇 having a thickness of 7〇〇μη1, and are plurally divided by the plurality of dicing streets 21. The area forms an element 22 such as an ic or an LSI. As shown in FIG. 2, the semiconductor wafer 2 has a plurality of pads 23 disposed on the surface of the element 22, and is connected to the pad 23, and is made of a metal such as copper embedded in the plate 2G. Electrode 24. The semiconductor wafer 2 thus constructed has an element region in which the element 22 is formed and is thin and surrounds the peripheral remaining region 23 of the element region 220. In the wafer processing method of the present invention, the inner grinding step is performed, and the inner grinding step is to polish the above-mentioned first! The figure and the semiconductor wafer 2 of the semiconductor wafer 2 shown in FIG. 2 correspond to the inside of the element region 22 (10) to form a predetermined thickness, and the annular reinforcing portion is formed in a region corresponding to the (four)-region 23 (), Prior to this, as shown in FIG. 3, the protective member 3 for protecting the member 22 is attached to the surface of the broken substrate of the semiconductor 2 (protective member attaching step). Therefore, the semiconductor wafer 2 is in the form of the surface of the substrate 2 (). After the field performing the protective member attaching step, the inner grinding step is performed, and the inner grinding step is to form a predetermined thickness by grinding the region 〇b of the semiconductor wafer 2 corresponding to the TL member region 22G inside the substrate 2', and forming a predetermined thickness, and It is the one that corresponds to the rest of the peripheral (four) coffee. The inner grinding step is carried out by the grinding apparatus shown in Fig. 4. The polishing apparatus 4 shown in Fig. 4 has a chucking station 41 that holds a wafer as a workpiece, and a polishing apparatus 42 that polishes the processing surface of the wafer held by the chucking station. The chuck 41 is configured to attract and hold the wafer to the upper holding surface and to rotate it in the direction indicated by the arrow 41a in Fig. 4. The grinding equipment 42 has a spindle housing 421, a rotatably slidable building 421', and a rotating spindle 422 that is rotated by a rotary driving mechanism (not shown) and mounted on the lower end of the rotating spindle 422 The fixing machine 423 is mounted on the grinding wheel 424 under the fixing machine 423. The grinding wheel 424 is constituted by a disk-shaped base 425 and a grindstone 426 which is annularly mounted on the lower surface of the base 425. The base 425 is attached to the lower surface of the fixing machine 423. In order to use the above-described polishing apparatus 4, the inside polishing step is performed, and the side of the protective member 3 of the semiconductor wafer 2 that is carried by the wafer (not shown) is placed on the upper surface of the chuck table 41 (holding surface). The attraction device (not shown) is actuated to attract and hold the semiconductor wafer 2 on the chuck table 41. Here, the relationship between the semiconductor wafer 2 held by the chuck table 41 and the ring grindstone 426 constituting the grinding wheel 424 will be described with reference to Fig. 5. The rotation center P1 of the chuck table 41 and the rotation center P2 of the ring grindstone 426 are eccentric, and the outer diameter of the ring grindstone 426 is set to be smaller than the diameter of the boundary line 240 between the element region 220 of the semiconductor wafer 2 and the peripheral remaining region 230. And the ruler 9 is larger than the radius of the boundary line 240, 201036051 inch, and the ring grindstone 426 passes through the rotation center pi of the chuck table 41 (the center of the semiconductor wafer 2). Next, as shown in Figs. 4 and 5, while the chuck table 41 is rotated at a rotational speed of 300 rpm in the direction in which the arrow 41a is displayed, the grinding wheel 424 is rotated at 6000 rpm in the direction indicated by the arrow 424a. The speed is rotated, and the grinding wheel 424 is moved downward to bring the grindstone 426 into contact with the inner surface 20b of the tantalum substrate 20 of the semiconductor wafer 2. Then, the grinding wheel 424 is ground to feed a predetermined amount at a predetermined grinding feed rate. As a result, the inside of the substrate 20 of the semiconductor wafer 2 is 'polished as shown in FIG. 6' to remove the region corresponding to the element region 220, and a circular recess 221' is formed, and an annular reinforcing portion 231 is formed in the peripheral remaining region 23? . Then, the element region 220 in which the circular recess 221 is formed is formed to have a thickness of 3 μm, and in the inner portion 220b, the end surface of the electrode 24 is exposed. Thus, the semiconductor wafer 2 is formed so that the thickness of the element region 220 is extremely thin, and the annular reinforcing portion 231 remains, thereby ensuring rigidity, so that subsequent processing is not difficult. After performing the above-mentioned inner polishing step, an inner etching step is performed, and the inner etching step etches the inside of the semiconductor wafer 2 so that the electrode 24 is formed from the tantalum substrate 2 of the semiconductor wafer 2 corresponding to the inner portion 22 of the element region 22仳 outstanding. This inner etching step is carried out in the embodiment shown in the drawing using the electric D device shown in Fig. 7. The electric material engraving device 5 shown in Fig. 7 has a device casing 51, and a lower electrode 52 and an upper electrode 53 are disposed in the lower direction of the casing 51. The lower electrode 52 is formed of a cylindrical support portion 522 which is formed by a disk-shaped workpiece holding portion and protrudes from a central portion of the lower surface of the workpiece holding portion 521. On the upper surface 10 201036051 of the workpiece holding portion 521, an adsorption chuck 52la formed of a porous ceramic material is disposed, and the semiconductor wafer 2 on which the inner polishing step is performed is placed on the adsorption chuck 521a, but the figure is not The attraction attracts institutions to attract and maintain. Further, the support portion 522 is connected to the horse frequency voltage applying device 54. The upper electrode 53 is formed of a cylindrical support portion 532 which is formed by a disk-shaped gas discharge portion 53 projecting from the upper center portion of the gas discharge portion 531. The gas ejecting portion 531 which constitutes the upper portion 0 electrode 53 by the gas ejecting portion 531 and the columnar supporting portion 532 is disposed to face the workpiece holding portion 521 constituting the lower electrode 52. The disk-shaped gas ejecting portion 531 constituting the upper electrode 53 is provided with a plurality of ejection ports 531 & The plurality of discharge ports 531a communicate with the gas supply device 55 via a communication path 5311 formed in the gas discharge portion 531 and a communication path 532a formed in the support portion 532. The gas supply device 55 supplies a mixed gas for generating electricity, mainly composed of a fluorine-based gas such as sulfur hexafluoride (SF6). To perform the etching step described above using the plasma etching apparatus 5 constructed as above, the protective tape 3 attached to the surface of the substrate 20 of the semiconductor wafer 2 subjected to the above-described inner polishing step is placed on the lower portion. The processing holding portion 521 of the electrode 52 is operated by a suction device (not shown) to suck and hold the semiconductor dome 2 on the workpiece holding portion 521. Therefore, the inside of the substrate 20 of the semiconductor wafer 2 held by the workpiece holding portion 521 is sucked as the upper side. Next, the gas supply device 55 is operated to supply the plasma generating gas to the upper electrode 53. The plasma generating gas supplied from the gas supply device 55 is shy by the communication path 532a formed in the support portion 532 and the communication path & 531b formed under the gas jet 11 201036051, and is kept attached from the plurality of discharges a531a. The semiconductor crystal surface on the holding member 521 (the upper ray head # * this is in the state of supplying the plasma generating gas, the high frequency voltage is applied from the high frequency '& equipment 54' to the lower electrode 52 and the upper portion" By this, the space between the lower electrode 52 and the upper electrode 53 is generated by the active material generated by the plasma acting on the inside of the semiconductor wafer 2, so that the inside of the wire substrate of the semiconductor wafer 2 can be closed.
上述裡面_錢Μ下之條件進行。 高頻電壓施加裝備54 : 2000W 之輸出殼51内之壓力：80Pa 電漿產生用氣體 蝕刻時間 :令六氟化硫(SF6)為76ml/分、 令氦(He)15ml/分、氧(〇2)為 27ml/分 或 :令六敦化硫(SF6)為76ml/分、 令三氟甲烷（CHF3)15ml/ 刀、氣（〇2)為27ml/分 或 :令六氟化硫(SF6)為76ml/分、 々氮(N2)為15ml/分、氧(〇2) 為27ml/分 :3分 藉以上述加工條件執行裡面蝕刻步驟，可將構成半導 體2之矽基板20之裡面蝕刻10μιη。結果，如第8圖所示，電 12 201036051 極24從半導體2之矽基板20之對應於元件區域2〇〇之裡面 220b突出ΙΟμηι。此外，藉執行裡面蝕刻步驟，在上述裡面 研磨步驟，可去除於矽基板20之裡面生成之研磨變形。 此外，在上述裡面蝕刻步驟，顯示了使用以氟系氣體 為主體之電漿產生用氣體之電漿蝕刻執行的例子，裡面蝕 刻步驟亦可以使用由硝酸及氫氟酸之混合液構成之蝕刻液 的濕姓刻來執行。 當執行上述裡面蝕刻步驟後，執行樹脂層被覆步驟， 該樹脂層被覆步驟係將樹脂層被覆於構成半導體晶圓2之 矽基板20之對應於元件區域220之裡面220b，使從對應於矽 基板20之元件區域220之裡面220b突出的電極24埋沒。此樹 脂層被覆步驟亦可將底部填充膠配設於對應於元件區域22 〇之裡面220b，就如第9圖所示，使用旋轉塗佈機6來執行之 例作說明。旋轉塗佈機6具有具吸引保持裝備之吸盤台61、 配置於該吸盤台61之中心部上方之喷嘴62。將貼附於業經 執行上述裡面蝕刻步驟之半導體晶圓2表面之保護構件3載 置於此旋轉塗佈機6之吸盤台61上，使圖中未示之吸引機構 作動，將半導體晶圓2吸引保持在吸盤61上。因而，半導體 晶圓2之裡面作為上側。接著，從喷嘴62將預定量液狀樹脂 25滴下至構成半導體晶圓2之矽基板20之對應於元件區域2 20的裡面220b ’使吸盤台61於以箭號61a所示之方向旋轉。 結果’液狀樹脂25因離心力流動至構成半導體晶圓2之矽基 板20之元件區域220的外周部。如此進行，在構成半導體晶 圓2之矽基板20之對應於元件區域220之裡面220b上流動至 13 201036051 外周部的樹脂隨時間變化而硬化，而如第ίο圖所示，樹脂 層250被覆於矽基板20之對應於元件區域220之裡面220b， 而呈埋設從對應於元件區域220之裡面220b突出之電極24 的狀態。此外，樹脂層250之厚度可為20〜30μπι。 當執行上述樹脂層被覆步驟後，執行樹脂層車削步 驟，該樹脂層車削步驟係將被覆在構成半導體晶圓2之矽基 板20之對應於元件區域220之裡面220b的樹脂層250車削， 使電極24之端面露出者。此樹脂層車削步驟使用第u圖所 示之車削裝置來執行。第11圖所示之車削裝置7具有可移動 地裝設在設於裝置殼71之後端部，在上方延伸的直立壁711 前面於上下方向配設之一對引導軌道7lla、711a，作為車 削機構之車削單元72。車削單元72具有移動基台73及安裝 於該移動基台73之刀具工具裝設構件74。移動基台73於後 面兩側設有於上下方向延伸之1對腳部731、731，於此1對 腳部731、731形成有可與上述一對引導軌道711a、711a滑 動地卡合之被引導溝731a、731a。如此，於可滑動地裝設 在設於直立壁711之1對引導軌道7Ua、711a之移動基台73 刖面女裝刀具工具裝設構件74。於此刀具工具裝設構件74 設有於上下方向貫穿之刀具安裝孔741，並且設有從與此刀 具安裝孔741對應之前端面到達刀具安裝孔741之陰螺紋孔 742。於如此構成之刀具工具裝設構件74之刀具安裝孔741 插入刀具工具75之刀具本體751，將鎖固螺栓76螺合鎖固於 陰螺紋孔742，藉此，刀具工具75可裝卸地裝設於刀具工具 裝設構件74。此，刀具工具75在圖中所示之實施形態中， 14 201036051 使用以以超鋼合金等工具鋼形成棒狀之刀具本體75ι、及以 _ 設於該刀具本體751前端部之鑽石等形成之切刀752構成 - 者。 第11圖所示之車削裝置7具有使上述車削單元72沿著i 對引導軌道711a、711a於上下方向（與後述吸盤台之保持面 垂直之方向）移動之車削單元進給機構77。此車削單元進給 機構77具有於直立壁711前側於上下方向配設之陽螺桿 〇 771。此陽螺桿771之上端部及下端部以安裝在直立壁了丨之 軸承構件772及773旋轉自如地支撐。於上侧之軸承構件772 配設有用以將陽螺桿771旋轉驅動，作為驅動源之脈衝馬達 774，此脈衝馬達774之輸出軸傳動連結於陽螺桿771。此 ^卜’於㈣基台73之後面亦形成有從其寬度方向中央部突 出至後方之連結部（圖中未示）’於此連結部形成有於錯直方 向延伸之貫穿陰螺紋孔，使上述陽螺桿7<71螺合於此陰螺紋 。因而，當脈衝馬達774正轉時，移動基台73、亦即車削 〇 早兀72下降、亦即前進，當脈衝馬達774逆轉時，移動基台 73、亦即車削單元72上升、亦即後退。 又’第11圖所示之車削裝置7具有配設於裝置殼71之加 工作業部710之吸盤台78。吸盤台故上面具有由諸如多孔 質陶竞般適當之多孔性材料構成的吸附吸盤781，此吸附吸 盤781連接於圖中未示之吸弓丨裝備。因而，藉»加工㈣ 置於為吸附吸盤781之上面的保持面，藉使圖中未示之吸引 裳備作動，而將被加工物吸弓I保持於吸附吸盤781上。此 外，吸盤台78可以圖中未示之旋轉驅動機構構造成可旋 15 201036051 轉同N· w圖中未不之吸盤台移動機構於箭號m8b 所示之方向移動。 要使用上述車削裝置7，執行樹脂層車削步驟 ，係將貼 附在業經執行上述樹脂層被覆步驟之半導體晶圓2表面之 保。蔓構件3側載置於吸盤台78上，使圖中未示之吸引裝備作 動’而將半導體晶圓2吸引保持於吸盤台78上。因而，保持 在吸盤口 78上之半導體晶圓2之裡面為上側。如此進行，當 將半導體晶圓2吸引保持在吸盤台78上後，使圖中未示之吸 盤台移動機構作動，使吸盤台78移動至車削單元72所在之 加工區域’如第12圖所示’使被覆在構成保持在吸盤台78 之半導體晶圓2之矽基板2〇之對應於元件區域22〇之裡面 220b的樹脂層250右側位於刀具工具乃之正下方。接著，一 面使及盤台78於以箭號780所示之方向以2000rpm之旋轉速 度旋轉，一面使上述車削單元進給機構77作動，使旋轉削 單元72移動至下方，使刀具工具75切入進給。此刀具工具 乃之切入位置設定於到達埋設在構成半導體晶圓2之矽基 板20之元件區域220之電極24端面的位置。如此進行，當切 入進給至預定位置後，使上述車削單元進給機構77作動， 當刀具工具75之切刀752之車削寬度為20數μηι時，從在第 12圖以實線所示之位置於以箭號78a所示之方向以〇.6inm/ 秒之進給速度移動。然後，在第12圖，如2點差線所示，移 動至吸盤台78之旋轉中心到達刀具工具75為止，藉此，以 刀具工具75之切刀752將被覆在構成半導體晶圓2之矽基板 20之對應於元件區域200之裡面220b的樹脂層250及電極24 201036051 車削’而如第13圖所示，使電極24之端面露出。此外由 於電極24以刀具工具75旋轉研磨，故即使以銅等有黏性之 金屬形成’亦不致產生溢料。 Ο 當執行上述樹脂層車削步驟後，如第Μ⑷圖及第u⑻ 圖所示，將業經執行樹脂層相步驟之半導體晶圓2之裡面 20b裝設於環狀框架F，而將之_於切割膠帶τ(晶圓支撐 步驟）。因而，如第14(b)圖所示， 半導體晶圓2之表面20a形成上側 (保護構件剝離步驟）。 貼附在切割膠帶丁表面之 。然後，將保護構件3剝離The above conditions are carried out under the _ money. High-frequency voltage application equipment 54: 2000W output housing 51 pressure: 80Pa plasma generation gas etching time: sulfur hexafluoride (SF6) is 76ml / min, helium (He) 15ml / min, oxygen (〇 2) 27ml/min or: make Liudun Sulfur (SF6) 76ml/min, trifluoromethane (CHF3) 15ml/knife, gas (〇2) 27ml/min or: sulphur hexafluoride (SF6) The inside of the substrate 20 constituting the semiconductor 2 can be etched by 10 μm at 76 ml/min, argon nitrogen (N2) of 15 ml/min, and oxygen (〇2) of 27 ml/min: 3 minutes by performing the inner etching step under the above processing conditions. As a result, as shown in Fig. 8, the electric pole 12 201036051 is protruded from the inner surface 220b of the substrate 20 of the semiconductor 2 corresponding to the element region 2〇〇. Further, by performing the etching step inside, the polishing process generated in the inside of the ruthenium substrate 20 can be removed in the above-described inner polishing step. Further, in the above-described inner etching step, an example of plasma etching using a plasma generating gas mainly composed of a fluorine-based gas is shown, and an etching solution composed of a mixture of nitric acid and hydrofluoric acid may be used in the etching step. The wet surname is engraved to perform. After performing the above-described inner etching step, a resin layer coating step of coating the resin layer on the inner surface 220b of the germanium substrate 20 constituting the semiconductor wafer 2 corresponding to the element region 220 so as to correspond to the germanium substrate is performed. The electrode 24 protruding from the inside 220b of the element region 220 of 20 is buried. This resin layer coating step may also be performed by disposing the underfill in the inner portion 220b corresponding to the element region 22, as illustrated in Fig. 9, using a spin coater 6 for execution. The spin coater 6 has a chuck table 61 having suction holding means, and a nozzle 62 disposed above the center portion of the chuck table 61. The protective member 3 attached to the surface of the semiconductor wafer 2 subjected to the above-described inner etching step is placed on the chuck table 61 of the spin coater 6, and the suction mechanism (not shown) is actuated to drive the semiconductor wafer 2 The attraction is held on the suction cup 61. Therefore, the inside of the semiconductor wafer 2 serves as the upper side. Next, a predetermined amount of the liquid resin 25 is dropped from the nozzle 62 to the inner surface 220b' corresponding to the element region 220 of the tantalum substrate 20 constituting the semiconductor wafer 2, and the chuck table 61 is rotated in the direction indicated by the arrow 61a. As a result, the liquid resin 25 flows to the outer peripheral portion of the element region 220 of the base sheet 20 constituting the semiconductor wafer 2 by centrifugal force. In this manner, the resin flowing to the outer peripheral portion of the 13 201036051 on the inner surface 220b of the tantalum substrate 20 constituting the semiconductor wafer 2 corresponding to the element region 220 is hardened with time, and as shown in Fig. 8, the resin layer 250 is covered. The substrate 20 corresponds to the inner surface 220b of the element region 220, and is buried in a state of the electrode 24 protruding from the inner surface 220b corresponding to the element region 220. Further, the resin layer 250 may have a thickness of 20 to 30 μm. After performing the above-described resin layer coating step, a resin layer turning step of turning the resin layer 250 corresponding to the inner surface 220b of the element region 220 constituting the semiconductor wafer 2 to the electrode layer 250 of the semiconductor wafer 2 is performed, so that the electrode is turned The end of the 24 is exposed. This resin layer turning step is performed using the turning device shown in Fig. u. The turning device 7 shown in Fig. 11 is movably mounted at an end portion provided at the rear end of the device casing 71, and a pair of guide rails 7lla and 711a are disposed in the vertical direction in front of the upright wall 711 extending upward as a turning mechanism. Turning unit 72. The turning unit 72 has a moving base 73 and a tool tool mounting member 74 attached to the moving base 73. The moving base 73 is provided with a pair of leg portions 731 and 731 extending in the vertical direction on the rear sides, and the pair of leg portions 731 and 731 are formed to be slidably engaged with the pair of guiding rails 711a and 711a. The grooves 731a and 731a are guided. Thus, the visor tool set member 74 is slidably mounted on the moving base 73 of the pair of guide rails 7Ua, 711a provided on the upright wall 711. The tool tool mounting member 74 is provided with a tool mounting hole 741 penetrating in the up-and-down direction, and a female screw hole 742 extending from the front end surface corresponding to the tool mounting hole 741 to the tool mounting hole 741 is provided. The tool mounting hole 741 of the tool tool mounting member 74 thus constructed is inserted into the tool body 751 of the tool tool 75, and the locking bolt 76 is screwed to the female screw hole 742, whereby the tool tool 75 is detachably mounted. The tool tool is mounted on the tool 74. In the embodiment shown in the drawings, 14 201036051 is formed by forming a rod-shaped tool body 75ι with a tool steel such as a super-steel alloy, and a diamond provided at the front end portion of the tool body 751. The cutter 752 constitutes -. The turning device 7 shown in Fig. 11 has a turning unit feeding mechanism 77 that moves the turning unit 72 along the i-direction guide rails 711a and 711a in the vertical direction (the direction perpendicular to the holding surface of the chuck table to be described later). This turning unit feed mechanism 77 has a male screw 771 disposed in the vertical direction on the front side of the upright wall 711. The upper end portion and the lower end portion of the male screw 771 are rotatably supported by bearing members 772 and 773 attached to the upright wall. The upper bearing member 772 is provided with a pulse motor 774 for rotationally driving the male screw 771 as a driving source, and the output shaft of the pulse motor 774 is coupled to the male screw 771. The rear surface of the base plate 73 is also formed with a connecting portion (not shown) that protrudes from the center portion in the width direction to the rear portion. The connecting portion is formed with a through-threaded hole extending in the wrong direction. The male screw 7 <71 is screwed to the female screw. Therefore, when the pulse motor 774 is rotating forward, the moving base 73, that is, the turning 〇 72 is lowered, that is, advanced. When the pulse motor 774 is reversed, the moving base 73, that is, the turning unit 72 is raised, that is, retracted. . Further, the turning device 7 shown in Fig. 11 has a suction table 78 disposed in the working portion 710 of the casing 71. The suction cup has an adsorption chuck 781 composed of a porous material such as a porous ceramic material, and the adsorption chuck 781 is connected to a suction bow device not shown. Therefore, by the processing (4) placed on the holding surface above the suction chuck 781, the suction of the workpiece is held on the suction chuck 781 by the suction movement which is not shown in the drawing. Further, the suction table 78 can be configured to be rotatable by a rotary drive mechanism (not shown). The movement of the suction table movement mechanism in the N·w diagram is moved in the direction indicated by the arrow m8b. To perform the resin layer turning step using the above-described turning device 7, it is adhered to the surface of the semiconductor wafer 2 which has been subjected to the above-described resin layer coating step. The side of the vine member 3 is placed on the chuck table 78 so that the attraction device is not shown, and the semiconductor wafer 2 is attracted and held by the chuck table 78. Therefore, the inside of the semiconductor wafer 2 held on the chuck opening 78 is the upper side. In this manner, after the semiconductor wafer 2 is sucked and held on the chuck table 78, the chuck table moving mechanism (not shown) is actuated to move the chuck table 78 to the processing region where the turning unit 72 is located as shown in Fig. 12. The right side of the resin layer 250 covering the inner surface 220b of the substrate 2, which constitutes the semiconductor wafer 2 held by the chuck table 78, is located directly under the tool tool. Next, while the disk table 78 is rotated at a rotational speed of 2000 rpm in the direction indicated by the arrow 780, the turning unit feed mechanism 77 is actuated to move the rotary cutting unit 72 downward, and the tool tool 75 is cut into the machine tool 75. give. The tool position is set to a position at which the end face of the electrode 24 embedded in the element region 220 of the base substrate 20 constituting the semiconductor wafer 2 is reached. In this way, when the cutting feed is advanced to the predetermined position, the turning unit feeding mechanism 77 is actuated, and when the turning width of the cutter 752 of the tool tool 75 is 20 μm, the solid line is shown in FIG. The position is moved at a feed rate of 〇.6 inm/sec in the direction indicated by arrow 78a. Then, in Fig. 12, as shown by the two-dot line, the movement center of the chuck table 78 is reached until the tool tool 75 is reached, whereby the cutter 752 of the tool tool 75 is covered after the semiconductor wafer 2 is formed. The resin layer 250 of the substrate 20 corresponding to the inner surface 220b of the element region 200 and the electrode 24 201036051 are turned "as shown in Fig. 13, and the end faces of the electrodes 24 are exposed. Further, since the electrode 24 is rotationally ground by the cutter tool 75, even if it is formed of a viscous metal such as copper, no flash is generated. Ο After performing the above-described resin layer turning step, as shown in the drawing (4) and the u(8), the inner surface 20b of the semiconductor wafer 2 subjected to the resin layer phase step is mounted on the annular frame F, and is cut Tape τ (wafer support step). Therefore, as shown in Fig. 14(b), the surface 20a of the semiconductor wafer 2 is formed on the upper side (protective member peeling step). Attached to the surface of the dicing tape. Then, the protective member 3 is peeled off
+當執行上述晶圓支撐步驟及保護構件剝離步驟後，執 灯藉將半導體晶圓2沿著魏個蝴道叫靖，而分割成諸 個元件22之晶圓分割步驟。此晶圓分割步驟使用第Μ圖所 不之切削裝置來執行。第15 ®所示之糊|置8具有保持被 加工物之吸盤台8卜具切削葉片821之切職備82、及拍攝 裝備83。吸盤台81構造成吸引保持被加工物，以圖中未示 之切削進給裝備於第15圖以箭號X顯示之切削進給方向= 動’以圖中未示之分度進給裝備於以箭號γ顯示之分度進給 方向移動。此外，如第16⑷圖所示，於吸盤台81之:面开^ 成有供形成於上述半導體晶圓2裡面之圓形凹部221嵌合: 段部811。要以此切削裝置8執行晶圓分割步驟，係將貼附 有半導體晶圓2之裡面20b之切割膠帶τ側載置於吸盤台w 上。然後，藉使圖中未示之吸引裝備作動，將半導體晶圓2 保持於吸盤台81上。因而，吸引保持於吸盤台81上之半導 體晶圓2之表面20a為上側。此外，在第16圖中，省略顯示 17 201036051 裝設有_卿了之職㈣F，^㈣聰胁配設在吸 盤台81之適當框架保持裝備。 -如此進行，吸引保持有半導體晶圓2之吸盤台81以圖中 未不之切削進給裝備而就位於拍攝裝備似正下方。當吸 盤。81魏於拍攝裝細之正下料，執行以拍攝裝備幻 及圖中未示之控制裝備檢測半導體晶圓2之要切削之區域 的對準作業。#，拍攝裝備83及圖中未示之控制裝備執行 用以進仃形成於半導體晶圓2之預定方向之切割道2】與切 削葉片821之對位的圖形匹配等圖像處理而完成切削區域 之=準(對準步驟）。又’對形成於半導體晶圓2，於與上述 預疋方向垂直相交之方向延伸之切割道則樣地完成切削 區域之對準。 田如以上進行，進行保持在吸盤台81上之半導體晶圓2 之切削區域的對準後，將㈣有半導體日日日，之吸盤台叫多 動至切削區域之切削開始位置。此時，如第16⑷圖所示， 半導體晶圓2就位成預定切割道21之一端(在第16⑷圖為左 端）位於比切削葉片821之正下方還靠右預定量之處。然 後將切削葉片821於在第16⑷圖中以箭號821a顯示之方向 乂預疋％轉速度旋轉，從2點鏈線所示之待機位置以圖中未 不之切入進給機構如第16(幻圖中實線所示，於下方切入進 二預疋里。此切入進給位置如第16(幻圖所示，設定於切削 葉片821之外周緣到達被覆在半導體晶圓2之裡面2〇b之對 應於το件區域220之裡面2201)的樹脂層25〇之在第16(a)圖為 下面、亦即切割膠帶1^之表面的位置。 18 201036051 如上述，當執行切削葉片821之切入進給後，一面使切 削葉片821於以第16(a)圖中以箭號821a所示之方向以預定 旋轉速度旋轉’ 一面使吸盤台81於第16(a)圖中以箭號XI所 示之方向以預定切削進給速度移動。然後，保持在吸盤台 81之半導體晶圓2右端通過切削葉片821之正下方後，停止 吸盤台81之移動。結果，如第10(b)圖所示，於半導體晶圓2 形成從表面20a到達被覆在對應於元件區域23之區域裡面 的樹脂層250(參照第16(a)圖）下面之分割溝26。 如以上進行’當沿著於半導體晶圓2預定方向延伸之所 有切割道21執行上述晶圓分割步驟後，使吸盤台81旋動9〇 度，沿著於相對於上述預定方向垂直相交之方向延伸之各 切割道21 ,執行上述晶圓分割步驟。結果，於半導體晶圓2 沿著所有切割道21形成分割溝26，元件區域220分割成諸個 元件22。 當執行上述晶圓分割步驟後，將所分割之裝置22從切 割膠帶F剝離後拾取’如第17圖所示，可獲得諸個元件22。 此元件22於裡面被覆有樹脂層250，並且形成在樹脂層250 之裡面電極24之端面露出的狀態。因而，藉積層第17圖所 示之元件22,可獲得焊墊23與電極24相互連接之積層元件。 接著，就藉積層複數個業經執行上述樹脂層車削步驟 之半導體晶圓2，形成積層晶圓，將此積層晶圓沿著複數個 切割道21切斷，而獲侍諸個積層元件之方法，參照第a圖 至第24圖來說明。 為積層業經執行上述樹脂層車削步驟之半導體晶圓 19 201036051 2’如第18圖所示，準備基盤晶圓2A，該基盤晶圓係切斷上 述第1圖所示之半導體晶圓2之外周剩餘區域230,具有稍微 小於形成於業經執行上述樹脂層車削步驟之半導體晶圓2 裡面之圓形狀凹部221内徑的直徑。然後，如第18(a)圖及第 18(b)圖所示，執行晶圓積層步驟，該晶圓積層步驟係使基 盤晶圓2A之表面20a與被覆在業經執行樹脂層車削步驟之 半導體晶圓2之對應於元件區域230之裡面22沘的樹脂層 250相對，使對應之切割道21 一致而接合，而形成積層晶 圓。即’如第18(b)圖所示，將形成於半導體晶圓2裡面之圓 形凹部221嵌合於基盤晶圓2A，使基盤晶圓2A之表面20a與 被覆在半導體晶圓2之對應於元件區域22〇之裡面22〇b的樹 脂層250相對，進行超音波接合，藉此，可將形成於基盤晶 圓2A之表面20a之焊墊23與在被覆於半導體晶圓2之對應於 元件區域230之裡面220b的樹脂層25表面露出之電極24端 面接合’而形成積層晶圓2B。 當藉執行上述晶圓積層步驟，形成積層晶圓2後，亦可 執灯後述晶圓分割步驟，進—步，為積層半導體晶圓2，而 執行為使構成積層晶圓2B之半導體晶圓2形成稍微小於圓 形凹部221之内徑的直徑，而去除環狀觀部231之環狀補 強部去除步驟。此環狀補強部去除步驟在圖中所示之實施 形悲中’使用第19(a)圖所示之雷射加工裝置來執行。第19(a) 圖所示之雷射加工裝置9具有保持被加工物之吸盤台9卜對 保持在該吸盤台91上之被加卫物照射雷射光線之雷射光線 照射裝備92。吸盤台91構造成吸弓丨保持被加讀，以圖中 20 201036051 未示之加工進給機構於第i9(a)圖中以箭號X所示之加工進 給方向移動，並且，以圖中未示之分度進給機構，於以箭 號Y顯示之分度進給方向移動。上述雷射光線照射裝備92 從裝設在實質上水平配置之圓筒形殼體921前端之集光器 922照射脈衝雷射光線。圖中所示之雷射加工裝置9具有裝 設在構成上述雷射光線照射裝備92之殼體921前端部之拍 攝裝備93。此拍攝裝備93具有照明被加工物之照明裝備、 捕捉以該照明裝備所照明之區域之光學系統、拍攝以該光 學系統所捕捉之像之拍攝器件(CCD)等，並將所拍攝之圖像 信號送至圖中未示之控制裝備。 要使用上述雷射加工裝置9，執行環狀補強部去除步 驟’係如第19(a)圖所示，將上述積層晶圓2B之基盤晶圓2A 側載置於雷射加工9之吸盤台91上，將積層晶圓2B吸引保持 於吸盤台91上。因而，積層晶圓2B以半導體晶圓2之表面20a 為上側而保持。然後，如第19(a)圖及第19(b)圖所示，就位 成比形成於半導體晶圓2之環狀補強部231内面稍微（例如 1 m m)往内之側的位置形成在雷射光線照射裝備9 2之集光 器922之正下方。然後，如第19(b)圖所示，使雷射光線照射 裝備92作動，一面從集光器922對矽基板照射具吸收性之波 長（例如355nm)之派衝雷射光線，一面旋轉吸盤台91。此 時’從集光器922照射之脈衝雷射光線之集光點P瞄準構成 積層晶圓2B之半導體晶圓2之表面20a附近。結果，當吸盤 台91旋轉1次時，如第19(b)圖所示’在半導體晶圓2，於元 件區域220與外周剩餘區域230之分界部形成切斷溝27，而 21 201036051 可將環狀補強部231切斷。因而，半導體晶圓2之外徑與基 盤晶圓2A之外徑實質相同。 當執行上述環狀補強部去除步驟後，如第20(a)圖及第 20(b)圖所示，執行第2晶圓積層步驟，該第2晶圓積層步驟 係使積層晶圓2 B之半導體晶圓2之表面與被覆在下個積層 之半導體晶圓2之對應於元件區域22〇之裡面220b的樹脂層 250相對’而使相互對應之切割道一致而接合。此第2晶圓 積層步驟與上述第18圖所示之晶圓積層步驟實質相同。 §執行上述第2晶圓積層步驟後，執行上述第19(a)圖及 第19(b)圖所示之環狀補強部去除步驟。然後，反覆執行上 述第2晶圓積層步驟及環狀補強部去除步驟至積層所設定 之片數之半導體晶圓2為止，而形成多層積層晶圓。 接著’執行研磨構成積層晶圓2B之基盤2A之裡面 2〇b，而形成預定厚度之基盤晶圓研磨步驟。此基盤晶圓研 磨步驟使用第2l(a)圖所示之研磨裝置來執行。第21(a)圖所 示之研磨裝置1〇具有保持被加工物之吸盤台1(n、具研磨保 持在该吸盤台101之被加工物之磨石1〇2的研磨裝備1〇3。要 使用如此構成之研磨裝置10，執行基盤晶圓研磨步驟係如 第21(b)圖所示’於構成積層晶圓2B之上側半導體晶圓2表 面貼附保護構件3後，如第21(a)圖所示，將保護構件3側載 ;及盤〇1〇1上’而將積層晶圓2B吸引保持於吸盤台ιοί 上因而，積層晶圓2B以基盤晶圓2A之裡面20b為上側。 如此進行’當將積層晶圓2B保持於吸盤台91上後，一面使 吸盤台101於以箭號1〇1 a所示之方向以300rpm之旋轉速度 22 201036051 方疋轉，-面使研磨裳借103之磨石1〇2於以箭號i〇2a所示之 方向以6_啊之旋轉速度旋轉，而接觸基盤晶 圓2A之裡 面2二，藉此，研磨，而將基盤晶圓2A之厚度形成30μηι。 田執行上述基盤晶圓研磨步驟後，執行將積層晶圓 切J道切斷’分割成諸個積層元件之晶圓分割步驟。在 執行此分割步驟前’先如第所示，將構成制晶圓』 之基盤晶目从之棱面寫貼騎裝設在概框針之切割膠 帶Τ表面之晶圓支撐步驟。然後，將貼附在構成積層晶圓2 Β 之上側半導體晶圓2表面之保護構件3剝離（保護構件剝離 步驟）。 如此進行，當執行晶圓支撐步驟及保護構件剝離步驟 後，使用與上述第15圖所示之切削裝置8實質相同之切削裝 置，執行上述晶圓分割步驟。此外，執行此晶圓分割步驟 時，第15圖所示之切削裝置8之吸盤台81使用上面係同一平 面者。即，如第23圖所示，將在上述晶圓支撐步驟貼附有 積層晶圓2 Β之切割膠帶Τ載置於切削裝置8之吸盤台8丨上。 然後，藉使圖中未示之吸引裝備作動，藉由切割膠帶丁將積 層曰曰圓2Β保持於吸盤台81上。因而，保持在吸盤台μ之積 層bb圓2B以上側半導體晶圓2之表面20a為上側。此外，在 第23圖，省略顯示裝設有切割膠帶τ之環狀框架F，環狀框 架F保持於配設在吸盤台81之適當框架保持裝備。接著與上 述第15圖及第16圖所示之晶圓分割步驟同樣地，執行檢則 積層晶圓2B要切削之區域的對準作業，沿著形成於構成積 層晶圓2B之半導體晶圓2之切割道21，切削積層晶圓2b。 23 201036051 結果，積層晶圓2B分割成諸個積層元件。然後，藉將所分 割之積層元件從切割膠帶F剝離而拾取，而如第24圖所示， 可獲得諸個積層元件22B。由於此積層元件22B於各元件22 之裡面被覆有樹脂層250，而不致於元件22間產生空間，故 元件不致破損。 I：圖式簡單說明3 第1圖係作為以本發明之晶圓加工方法分割成諸個晶 圓之晶圓的半導體晶圓之立體圖。 第2圖係將第1圖所示之半導體晶圓之主要部份放大顯 示的截面圖。 第3圖係顯示於第1圖所示之半導體晶圓表面貼附有保 護構件之狀態的立體圖。 第4圖係顯示用以執行本發明晶圓加工方法之裡面研 磨步驟之研磨裝置主要部份的立體圖。 第5圖係以第4圖所示之研磨裝置執行之裡面研磨步驟 的說明圖。 第6圖係業經執行第5圖所示之裡面研磨步驟之半導體 晶圓的截面圖。 第7圖係用以執行本發明晶圓加工方法之裡面蝕刻步 驟之電漿餘刻裝置的截面圖。 第8圖係業經執行第7圖所示之裡面蝕刻步驟之半導體 晶圓的截面圖。 第9圖係本發明晶圓加工方法之樹脂層被覆步驟之說 明圖。 24 201036051 第ι〇圖係業經執行第9圖所示之樹脂層被覆步驟之半 導體晶圓的裁面圖。 第11圖係用以執行本發明晶圓加工方法之樹脂層車削 步驟之車削裝置主要部份的立體圖。 第12圖係以第11圖所示之車削裝置執行之樹脂層車削 步驟的說明圖。 第13圖係業經執行第12圖所示之樹脂層車肖彳步驟之半 導體晶圓的截面圖。 第14(a)圖〜第14(b)圖係本發明晶圓加工方法之晶圓支 撐步驟之說明圖。 第15圖係用以執行本發明晶圓加工方法之晶圓分割步 驟之切削裝置的主要部份立體圖。 第16(a)圖~第16(b)圖係本發明晶圓加工方法之晶圓分 割步驟之說明圖。 第17圖係以第16圖所示之晶圓分割步驟分割半導體晶 圓之裝置的立體圖。 第18(a)圖〜第18(b)圖係本發明晶圓加工方法之晶圓積 層步驟之說明圖。 第19 (a)圖〜第19 (b)圖係本發明晶圓加工方法之環狀補 強部去除步驟之說明圖。 第20(a)圖〜第20(b)圖係本發明晶圓加工方法之第2曰 圓積層步驟之說明圖。 第21(a)圖〜第21(b)圖係本發明晶圓加工方法之基盤曰 圓研磨步驟之說明圖。 25 201036051 第22圖係本發明晶圓加工方法之晶圓支撐步驟之另一 實施形態的說明圖。 第2 3圖係本發明晶圓加工方法之晶圓分割步驟之另一 實施形態的說明圖。 第24圖係業經以第23圖所示之晶圓分割步驟分割積層 晶圓之積層元件的立體圖。 【主要元件符號說明 2.. .半導體晶圓 2A...基盤晶圓 2B...積層晶圓 3.. .保護構件 5.. .電漿蚀刻裝置 6.. .旋轉塗佈機 7.. .車削裝置 8.. .切削裝置 9.. .雷射加工裝置 10.. .研磨裝置 20.. .矽基板 20a…表面 20b,220b...裡面 21.. .切割道 22.. .元件 22B...積層元件 23.. .焊墊 1 24.. .電極 25.. .樹脂 41,61,78,81,91,101 …吸盤台 41 a„61 a,78a,7 8b, 101 a, 102a,424a, 780,821a,XI··.箭號 42.. .研磨裝備 51,71·..裝置殼 52.. .下部電極 53.. .上部電極 54.. .高頻電壓施加裝備 55.. .氣體供給機構 62…噴嘴 72.. .車削單元 73.. .移動基台 74.. .刀具工具裝設構件 75.. .刀具工具 76.. .鎖固螺栓 26+ After performing the wafer supporting step and the protective member stripping step, the lamp is divided into the wafer dividing steps of the elements 22 by arranging the semiconductor wafer 2 along the Wei. This wafer dividing step is performed using the cutting device not shown in the figure. The paste shown in Fig. 15| has a cutting device 82 having a cutting blade 8 for holding a workpiece, and a shooting device 83. The suction table 81 is configured to attract and hold the workpiece, and the cutting feed (not shown) is equipped with the cutting feed direction indicated by the arrow X in Fig. 15 = moving 'equipment is not shown in the figure. Move in the indexing feed direction indicated by the arrow γ. Further, as shown in Fig. 16 (4), a circular recess 221 formed in the inside of the semiconductor wafer 2 is formed on the surface of the chuck table 81: a segment portion 811. To perform the wafer dividing step by the cutting device 8, the side of the dicing tape τ to which the inner surface 20b of the semiconductor wafer 2 is attached is placed on the chuck table w. Then, the semiconductor wafer 2 is held on the chuck table 81 by the attraction device not shown. Therefore, the surface 20a of the semiconductor wafer 2 held by the chuck table 81 is attracted to the upper side. In addition, in Fig. 16, the display is omitted. 17 201036051 It is equipped with the appropriate position (4) F, ^ (4), and the appropriate frame holding equipment is provided on the suction table 81. - In this manner, the chuck table 81 holding the semiconductor wafer 2 is sucked and placed under the photographing equipment just below the cutting feed equipment. When sucking the plate. In the case where the photographing device is finished, the alignment of the region to be cut of the semiconductor wafer 2 is detected by the shooting device and the control device not shown. #, The photographing equipment 83 and the control equipment not shown in the drawing perform image processing such as pattern matching of the alignment of the cutting blade 821 formed in the predetermined direction of the semiconductor wafer 2 to complete the cutting area. = quasi (alignment step). Further, alignment of the cutting regions is performed on the dicing streets formed in the semiconductor wafer 2 and extending in a direction perpendicular to the direction of the pre-twisting direction. In the above, the alignment of the cutting region of the semiconductor wafer 2 held on the chuck table 81 is performed, and (4) the semiconductor day and day are called, and the chuck table is called to the cutting start position of the cutting region. At this time, as shown in Fig. 16(4), the semiconductor wafer 2 is positioned at one end of the predetermined scribe line 21 (left end at the 16th (4th) diagram) at a position rightward rightward of the cutting blade 821. Then, the cutting blade 821 is rotated in the direction indicated by the arrow 821a in the 16th (4) diagram, and the feed position is as shown in the figure 16 from the standby position shown by the 2-point chain line. As shown by the solid line in the phantom, it is cut into the second pre-cut underneath. The plunging feed position is as shown in the 16th (the magic figure is set, and the outer periphery of the cutting blade 821 reaches the inside of the semiconductor wafer 2). The position of the resin layer 25 corresponding to the inner portion 2201 of the τ 件 region 220 is shown in Fig. 16(a) below, that is, the position of the surface of the dicing tape 1^ 18 201036051 As described above, when the cutting blade 821 is executed After the cutting is carried out, the cutting blade 821 is rotated at a predetermined rotational speed in the direction indicated by the arrow 821a in the 16th (a) drawing, and the chuck table 81 is shown in the 16th (a) figure by the arrow XI. The direction shown is moved at a predetermined cutting feed speed. Then, after the right end of the semiconductor wafer 2 of the chuck table 81 passes right under the cutting blade 821, the movement of the chuck table 81 is stopped. As a result, as shown in Fig. 10(b) As shown, the semiconductor wafer 2 is formed from the surface 20a to be coated over the corresponding component. The resin layer 250 in the region of the region 23 (refer to the segmentation groove 26 below the 16th (a)). As described above, the wafer dividing step is performed when all the dicing streets 21 extending in the predetermined direction of the semiconductor wafer 2 are performed. Thereafter, the chuck table 81 is rotated by 9 degrees, and the wafer dividing step is performed along each of the dicing streets 21 extending in a direction perpendicularly intersecting with the predetermined direction. As a result, the semiconductor wafer 2 is along all the dicing streets. 21, the dividing groove 26 is formed, and the element region 220 is divided into the respective elements 22. After the above-described wafer dividing step is performed, the divided device 22 is peeled off from the dicing tape F and picked up as shown in Fig. 17, and various pieces are obtained. Element 22. This element 22 is covered with a resin layer 250 and formed in a state in which the end faces of the back electrodes 24 of the resin layer 250 are exposed. Thus, by bonding the elements 22 shown in Fig. 17, the pads 23 and the electrodes can be obtained. 24 laminated elements connected to each other. Next, a plurality of stacked semiconductor wafers 2 subjected to the above-described resin layer turning step are formed by lamination, and a laminated wafer is formed, and the laminated wafer is cut along a plurality of dicing streets 21, A method of obtaining a laminated component is described with reference to FIGS. a to 24. A semiconductor wafer 19 that performs the above-described resin layer turning step for lamination is performed. 201036051 2', as shown in FIG. 18, a base wafer 2A is prepared, The base wafer is cut off from the outer peripheral region 230 of the semiconductor wafer 2 shown in Fig. 1 and has a diameter slightly smaller than the inner diameter of the circular recess 221 formed in the semiconductor wafer 2 on which the resin layer turning step is performed. Then, as shown in FIGS. 18(a) and 18(b), a wafer lamination step is performed which steps the surface 20a of the base wafer 2A and the coated resin layer performing the turning step. The resin layer 250 of the semiconductor wafer 2 corresponding to the inner surface 22 of the element region 230 is opposed to each other so that the corresponding dicing streets 21 are aligned and joined to form a laminated wafer. That is, as shown in Fig. 18(b), the circular recessed portion 221 formed in the inside of the semiconductor wafer 2 is fitted to the base wafer 2A, and the surface 20a of the base wafer 2A is bonded to the semiconductor wafer 2 The resin layer 250 inside the 22 〇b of the element region 22 is ultrasonically bonded to each other, whereby the pad 23 formed on the surface 20a of the base wafer 2A and the semiconductor pad 2 can be coated on the semiconductor wafer 2 The end surface of the resin layer 25 on the inner surface 220b of the element region 230 is exposed to the end surface of the electrode 24 to form a build-up wafer 2B. After the stacked wafer 2 is formed by performing the above-described wafer lamination step, the wafer dividing step described later may be performed, and the semiconductor wafer 2 is laminated to perform the semiconductor wafer constituting the laminated wafer 2B. 2 An annular reinforcing portion removing step of removing the annular inner portion 231 by a diameter slightly smaller than the inner diameter of the circular concave portion 221 is formed. This annular reinforcing portion removing step is performed using the laser processing apparatus shown in Fig. 19(a) in the embodiment shown in the figure. The laser processing apparatus 9 shown in Fig. 19(a) has a laser beam irradiation device 92 for holding a laser beam to be irradiated to the object to be held by the chuck table 9 for holding the workpiece. The suction cup table 91 is configured such that the suction bow is kept read, and the processing feed mechanism not shown in FIG. 20 201036051 moves in the processing feed direction indicated by the arrow X in the i9(a) diagram, and The indexing feed mechanism not shown is moved in the indexing feed direction indicated by the arrow Y. The above-described laser beam irradiation device 92 illuminates the pulsed laser beam from the concentrator 922 installed at the front end of the substantially horizontally disposed cylindrical casing 921. The laser processing apparatus 9 shown in the drawing has a photographing apparatus 93 installed at a front end portion of a casing 921 constituting the above-described laser beam irradiation apparatus 92. The photographing apparatus 93 has illumination equipment for illuminating the workpiece, an optical system for capturing an area illuminated by the illumination apparatus, a photographing device (CCD) for photographing an image captured by the optical system, and the like, and the photographed image is taken The signal is sent to control equipment not shown in the figure. To perform the annular reinforcing portion removing step using the above-described laser processing apparatus 9, the substrate wafer 2A side of the laminated wafer 2B is placed on the chuck table of the laser processing 9 as shown in Fig. 19(a). At 91, the laminated wafer 2B is sucked and held on the chuck table 91. Therefore, the build-up wafer 2B is held with the surface 20a of the semiconductor wafer 2 as the upper side. Then, as shown in FIGS. 19(a) and 19(b), the position is formed at a position slightly smaller (for example, 1 mm) on the inner surface of the annular reinforcing portion 231 formed on the semiconductor wafer 2. The laser light is directed directly below the concentrator 922 of the equipment 92. Then, as shown in Fig. 19(b), the laser beam irradiation device 92 is actuated, and the illuminating light of the absorption wavelength (e.g., 355 nm) is irradiated from the concentrator 922 to the substrate, and the suction cup is rotated. Taiwan 91. At this time, the spot P of the pulsed laser light irradiated from the concentrator 922 is aimed at the vicinity of the surface 20a of the semiconductor wafer 2 constituting the laminated wafer 2B. As a result, when the chuck table 91 is rotated once, as shown in FIG. 19(b), in the semiconductor wafer 2, the cut-off groove 27 is formed at the boundary portion between the element region 220 and the outer peripheral remaining region 230, and 21 201036051 can be The annular reinforcing portion 231 is cut. Therefore, the outer diameter of the semiconductor wafer 2 is substantially the same as the outer diameter of the base wafer 2A. After performing the above-described annular reinforcing portion removing step, as shown in FIGS. 20(a) and 20(b), a second wafer lamination step is performed, and the second wafer lamination step is to laminate the wafer 2B. The surface of the semiconductor wafer 2 is bonded to the resin layer 250 of the next stacked semiconductor wafer 2 corresponding to the inner surface 220b of the element region 22, and the mutually corresponding dicing streets are joined to each other. This second wafer lamination step is substantially the same as the wafer lamination step shown in Fig. 18. After the second wafer lamination step is performed, the annular reinforcing portion removing step shown in the above-mentioned 19th (a)th and 19th (b)th is performed. Then, the second wafer stacking step and the ring-shaped reinforcing portion removing step are repeated until the number of the semiconductor wafers 2 set in the stack is performed to form a multilayer stacked wafer. Next, the inside of the substrate 2A constituting the laminated wafer 2B is polished to form a substrate wafer polishing step of a predetermined thickness. This substrate wafer polishing step is performed using the polishing apparatus shown in Fig. 2l(a). The polishing apparatus 1 shown in Fig. 21(a) has a chucking station 1 for holding a workpiece (n, a grinding apparatus 1〇3 having a grindstone 1〇2 for polishing a workpiece held by the chucking table 101. To use the polishing apparatus 10 thus constructed, the substrate wafer polishing step is performed as shown in FIG. 21(b) after attaching the protective member 3 to the surface of the semiconductor wafer 2 on the upper side of the laminated wafer 2B, as in the 21st ( a) shown in the figure, the protective member 3 is loaded on the side; and the stack 1'1 is placed on the chuck table 2B, so that the laminated wafer 2B is on the upper side 20b of the base wafer 2A. In this way, when the laminated wafer 2B is held on the chuck table 91, the chuck table 101 is rotated at a rotation speed of 22 201036051 in the direction indicated by the arrow 1〇1 a, and the surface is ground. The shoe is rotated by a grinding stone of 103 in the direction indicated by the arrow i〇2a at a rotation speed of 6_ah, and contacts the inner 2A of the base wafer 2A, thereby grinding and polishing the base wafer The thickness of 2A is 30 μm. After performing the above-mentioned substrate wafer polishing step, the process of dividing the J-cut of the laminated wafer is performed. The wafer dividing step of the plurality of laminated elements. Before performing the dividing step, the substrate of the substrate constituting the wafer is mounted on the dicing tape of the frame needle. The wafer supporting step of the surface. Then, the protective member 3 attached to the surface of the semiconductor wafer 2 on the upper side of the laminated wafer 2 is peeled off (protective member peeling step). In this way, when the wafer supporting step and the protective member are performed After the stripping step, the wafer dividing step is performed using a cutting device substantially the same as the cutting device 8 shown in Fig. 15. Further, when the wafer dividing step is performed, the chuck of the cutting device 8 shown in Fig. 15 is executed. The stage 81 is the same plane as the upper surface. That is, as shown in Fig. 23, the dicing tape 贴 to which the laminated wafer 2 is attached in the wafer supporting step is placed on the chuck table 8 of the cutting device 8. Then, the suction device is operated by the dicing tape, and the laminated tape 2 is held on the chuck table 81. Therefore, the semiconductor wafer 2 is held on the side of the stacking plate μ of the bb circle 2B or more. Surface 20a In addition, in Fig. 23, the annular frame F provided with the dicing tape τ is omitted, and the annular frame F is held in an appropriate frame holding device disposed on the suction table 81. Next, the above-mentioned 15th and In the same manner as the wafer dividing step shown in Fig. 16, the alignment operation of the region to be cut by the build-up wafer 2B is performed, and the laminated crystal is cut along the dicing street 21 formed on the semiconductor wafer 2 constituting the laminated wafer 2B. Circle 2b. 23 201036051 As a result, the laminated wafer 2B is divided into laminated elements, and then the separated laminated elements are picked up by peeling off the dicing tape F, and as shown in Fig. 24, the laminated elements 22B are obtained. . Since the build-up element 22B is covered with the resin layer 250 inside each element 22 without creating a space between the elements 22, the element is not damaged. I: BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a semiconductor wafer which is divided into wafers of wafers by the wafer processing method of the present invention. Fig. 2 is a cross-sectional view showing an enlarged main portion of the semiconductor wafer shown in Fig. 1. Fig. 3 is a perspective view showing a state in which a protective member is attached to the surface of the semiconductor wafer shown in Fig. 1. Fig. 4 is a perspective view showing the main part of a polishing apparatus for carrying out the inside grinding step of the wafer processing method of the present invention. Fig. 5 is an explanatory view of the inner grinding step performed by the polishing apparatus shown in Fig. 4. Fig. 6 is a cross-sectional view showing a semiconductor wafer which is subjected to the inside grinding step shown in Fig. 5. Figure 7 is a cross-sectional view of a plasma remnant apparatus for performing the inner etching step of the wafer processing method of the present invention. Figure 8 is a cross-sectional view of a semiconductor wafer subjected to the internal etching step shown in Figure 7. Fig. 9 is an explanatory view showing a resin layer coating step of the wafer processing method of the present invention. 24 201036051 The figure is a plan view of a semiconductor wafer in which the resin layer coating step shown in Fig. 9 is performed. Fig. 11 is a perspective view showing the main part of a turning device for performing a resin layer turning step of the wafer processing method of the present invention. Fig. 12 is an explanatory view showing a resin layer turning step performed by the turning device shown in Fig. 11. Fig. 13 is a cross-sectional view showing a semiconductor wafer in which the resin layer is shown in Fig. 12. Figs. 14(a) to 14(b) are explanatory views of the wafer supporting step of the wafer processing method of the present invention. Fig. 15 is a perspective view showing a main part of a cutting apparatus for performing a wafer dividing step of the wafer processing method of the present invention. Figs. 16(a) to 16(b) are explanatory views of the wafer dividing step of the wafer processing method of the present invention. Fig. 17 is a perspective view showing a device for dividing a semiconductor wafer by the wafer dividing step shown in Fig. 16. Fig. 18(a) to Fig. 18(b) are explanatory views of the wafer lamination step of the wafer processing method of the present invention. 19(a) to 19(b) are explanatory views showing a step of removing the annular reinforcing portion of the wafer processing method of the present invention. 20(a) to 20(b) are explanatory views of the second 圆 round lamination step of the wafer processing method of the present invention. 21(a) to 21(b) are explanatory views of the substrate 曰 circular polishing step of the wafer processing method of the present invention. 25 201036051 Fig. 22 is an explanatory view showing another embodiment of the wafer supporting step of the wafer processing method of the present invention. Fig. 2 is an explanatory view showing another embodiment of the wafer dividing step of the wafer processing method of the present invention. Fig. 24 is a perspective view showing the laminated element of the laminated wafer by the wafer dividing step shown in Fig. 23. [Main component symbol description 2.. Semiconductor wafer 2A...Base wafer 2B...Laminated wafer 3.. Protective member 5.. Plasma etching device 6. Rotary coating machine 7. .. turning device 8.. cutting device 9.. laser processing device 10.. grinding device 20.. 矽 substrate 20a... surface 20b, 220b... inside 21.. cutting channel 22.. Element 22B...Laminating element 23.. Pad 1 24.. Electrode 25: Resin 41, 61, 78, 81, 91, 101 ... Suction cup table 41 a „61 a,78a,7 8b, 101 a, 102a, 424a, 780, 821a, XI··. Arrow 42.. Grinding equipment 51, 71 ·. Device shell 52.. Lower electrode 53.. Upper electrode 54.. High frequency voltage application equipment 55. . Gas supply mechanism 62...nozzle 72.. turning unit 73.. moving base 74.. tool tool mounting member 75.. tool tool 76.. locking bolt 26
201036051 77…車削單元進給機構 82.. .切削裝備 83.93.. .拍攝裝備 92.. .雷射光線照射機構 102.426.. .磨石 103.. .研磨裝備 220.. .元件區域 221···凹部 230.. .外周剩餘區域 231.. .補強部 240.. .分界線 250.. .樹脂層 421…心軸殼 422.. .旋轉心軸 423.. .固定機 424.. .研磨輪 425.. .基台 521.. .被加工物保持部 521a...吸附吸盤 522.. .支撐部 531.. .氣體喷出部 531a...喷出口 531b...連通路徑 532.. .支撐部 532a...連通路徑 710.. .加工作業部 711.. .直立壁 711a...引導執道 731.. .腳部 731a...被引導溝 741.. .刀具安裝孔 742.. .陰螺紋孔 751.. .刀具本體 752.. .切刀 771.. .陽螺桿 772.773.. .軸承構件 774.. .脈衝馬達 781.. .吸附吸盤 811.. .段部 821.. .切削葉片 921.. .殼體 922.. .集光器 F...環狀框架 T...切割膠帶 27201036051 77... turning unit feeding mechanism 82.. cutting equipment 83.93.. shooting equipment 92.. laser light irradiation mechanism 102.426.. grindstone 103.. grinding equipment 220.. . · Recessed portion 230.. . peripheral remaining area 231.. reinforcing portion 240.. dividing line 250.. resin layer 421... mandrel shell 422.. rotating mandrel 423.. fixing machine 424.. grinding Wheel 425.. . Abutment 521.. workpiece holding portion 521a... sucking suction cup 522.. support portion 531.. gas ejection portion 531a... discharge port 531b... communication path 532. . support portion 532a... communication path 710.. processing working portion 711.. standing wall 711a... guiding road 731.. foot portion 731a... guided groove 741.. tool mounting hole 742.. .Female threaded hole 751.. .Tool body 752.. .Cutter 771.. .Spiral screw 772.773.. bearing member 774.. .Pulse motor 781...Adsorption suction cup 811.. Section 821 .. cutting blade 921.. housing 922.. concentrator F... annular frame T... cutting tape 27